1114abfe1SNeil Armstrong// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
29d59b708SYixun Lan/*
39d59b708SYixun Lan * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
49d59b708SYixun Lan */
59d59b708SYixun Lan
68c0cf40fSJerome Brunet#include <dt-bindings/clock/axg-aoclkc.h>
78909e722SJerome Brunet#include <dt-bindings/clock/axg-audio-clkc.h>
806b7a631SYixun Lan#include <dt-bindings/clock/axg-clkc.h>
98c0cf40fSJerome Brunet#include <dt-bindings/gpio/gpio.h>
10221cf34bSNan Li#include <dt-bindings/gpio/meson-axg-gpio.h>
118c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/irq.h>
128c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/arm-gic.h>
13f2b8f6a9SJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
148c0cf40fSJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
159d59b708SYixun Lan
169d59b708SYixun Lan/ {
179d59b708SYixun Lan	compatible = "amlogic,meson-axg";
189d59b708SYixun Lan
199d59b708SYixun Lan	interrupt-parent = <&gic>;
209d59b708SYixun Lan	#address-cells = <2>;
219d59b708SYixun Lan	#size-cells = <2>;
229d59b708SYixun Lan
23fbd5cbc5SJerome Brunet	tdmif_a: audio-controller-0 {
248c0cf40fSJerome Brunet		compatible = "amlogic,axg-tdm-iface";
258c0cf40fSJerome Brunet		#sound-dai-cells = <0>;
268c0cf40fSJerome Brunet		sound-name-prefix = "TDM_A";
278c0cf40fSJerome Brunet		clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
288c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
298c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
308c0cf40fSJerome Brunet		clock-names = "mclk", "sclk", "lrclk";
318c0cf40fSJerome Brunet		status = "disabled";
329d59b708SYixun Lan	};
339d59b708SYixun Lan
34fbd5cbc5SJerome Brunet	tdmif_b: audio-controller-1 {
358c0cf40fSJerome Brunet		compatible = "amlogic,axg-tdm-iface";
368c0cf40fSJerome Brunet		#sound-dai-cells = <0>;
378c0cf40fSJerome Brunet		sound-name-prefix = "TDM_B";
388c0cf40fSJerome Brunet		clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
398c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
408c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
418c0cf40fSJerome Brunet		clock-names = "mclk", "sclk", "lrclk";
428c0cf40fSJerome Brunet		status = "disabled";
439d59b708SYixun Lan	};
448c0cf40fSJerome Brunet
45fbd5cbc5SJerome Brunet	tdmif_c: audio-controller-2 {
468c0cf40fSJerome Brunet		compatible = "amlogic,axg-tdm-iface";
478c0cf40fSJerome Brunet		#sound-dai-cells = <0>;
488c0cf40fSJerome Brunet		sound-name-prefix = "TDM_C";
498c0cf40fSJerome Brunet		clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
508c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
518c0cf40fSJerome Brunet			 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
528c0cf40fSJerome Brunet		clock-names = "mclk", "sclk", "lrclk";
538c0cf40fSJerome Brunet		status = "disabled";
548c0cf40fSJerome Brunet	};
558c0cf40fSJerome Brunet
568c0cf40fSJerome Brunet	arm-pmu {
578c0cf40fSJerome Brunet		compatible = "arm,cortex-a53-pmu";
588c0cf40fSJerome Brunet		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
598c0cf40fSJerome Brunet			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
608c0cf40fSJerome Brunet			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
618c0cf40fSJerome Brunet			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
628c0cf40fSJerome Brunet		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
639d59b708SYixun Lan	};
649d59b708SYixun Lan
659d59b708SYixun Lan	cpus {
669d59b708SYixun Lan		#address-cells = <0x2>;
679d59b708SYixun Lan		#size-cells = <0x0>;
689d59b708SYixun Lan
699d59b708SYixun Lan		cpu0: cpu@0 {
709d59b708SYixun Lan			device_type = "cpu";
719d59b708SYixun Lan			compatible = "arm,cortex-a53", "arm,armv8";
729d59b708SYixun Lan			reg = <0x0 0x0>;
739d59b708SYixun Lan			enable-method = "psci";
749d59b708SYixun Lan			next-level-cache = <&l2>;
752c130695SJerome Brunet			clocks = <&scpi_dvfs 0>;
769d59b708SYixun Lan		};
779d59b708SYixun Lan
789d59b708SYixun Lan		cpu1: cpu@1 {
799d59b708SYixun Lan			device_type = "cpu";
809d59b708SYixun Lan			compatible = "arm,cortex-a53", "arm,armv8";
819d59b708SYixun Lan			reg = <0x0 0x1>;
829d59b708SYixun Lan			enable-method = "psci";
839d59b708SYixun Lan			next-level-cache = <&l2>;
842c130695SJerome Brunet			clocks = <&scpi_dvfs 0>;
859d59b708SYixun Lan		};
869d59b708SYixun Lan
879d59b708SYixun Lan		cpu2: cpu@2 {
889d59b708SYixun Lan			device_type = "cpu";
899d59b708SYixun Lan			compatible = "arm,cortex-a53", "arm,armv8";
909d59b708SYixun Lan			reg = <0x0 0x2>;
919d59b708SYixun Lan			enable-method = "psci";
929d59b708SYixun Lan			next-level-cache = <&l2>;
932c130695SJerome Brunet			clocks = <&scpi_dvfs 0>;
949d59b708SYixun Lan		};
959d59b708SYixun Lan
969d59b708SYixun Lan		cpu3: cpu@3 {
979d59b708SYixun Lan			device_type = "cpu";
989d59b708SYixun Lan			compatible = "arm,cortex-a53", "arm,armv8";
999d59b708SYixun Lan			reg = <0x0 0x3>;
1009d59b708SYixun Lan			enable-method = "psci";
1019d59b708SYixun Lan			next-level-cache = <&l2>;
1022c130695SJerome Brunet			clocks = <&scpi_dvfs 0>;
1039d59b708SYixun Lan		};
1049d59b708SYixun Lan
1059d59b708SYixun Lan		l2: l2-cache0 {
1069d59b708SYixun Lan			compatible = "cache";
1079d59b708SYixun Lan		};
1089d59b708SYixun Lan	};
1099d59b708SYixun Lan
11096dc5702SJerome Brunet	sm: secure-monitor {
11196dc5702SJerome Brunet		compatible = "amlogic,meson-gxbb-sm";
11296dc5702SJerome Brunet	};
11396dc5702SJerome Brunet
1149d59b708SYixun Lan	psci {
1159d59b708SYixun Lan		compatible = "arm,psci-1.0";
1169d59b708SYixun Lan		method = "smc";
1179d59b708SYixun Lan	};
1189d59b708SYixun Lan
1198c0cf40fSJerome Brunet	reserved-memory {
1208c0cf40fSJerome Brunet		#address-cells = <2>;
1218c0cf40fSJerome Brunet		#size-cells = <2>;
1228c0cf40fSJerome Brunet		ranges;
1238c0cf40fSJerome Brunet
1248c0cf40fSJerome Brunet		/* 16 MiB reserved for Hardware ROM Firmware */
1258c0cf40fSJerome Brunet		hwrom_reserved: hwrom@0 {
1268c0cf40fSJerome Brunet			reg = <0x0 0x0 0x0 0x1000000>;
1278c0cf40fSJerome Brunet			no-map;
12808307aabSJerome Brunet		};
12908307aabSJerome Brunet
1308c0cf40fSJerome Brunet		/* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
1318c0cf40fSJerome Brunet		secmon_reserved: secmon@5000000 {
1328c0cf40fSJerome Brunet			reg = <0x0 0x05000000 0x0 0x300000>;
1338c0cf40fSJerome Brunet			no-map;
13408307aabSJerome Brunet		};
1355e395e14SYixun Lan	};
1365e395e14SYixun Lan
1372c130695SJerome Brunet	scpi {
1382c130695SJerome Brunet		compatible = "arm,scpi-pre-1.0";
1392c130695SJerome Brunet		mboxes = <&mailbox 1 &mailbox 2>;
1402c130695SJerome Brunet		shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
1412c130695SJerome Brunet
1422c130695SJerome Brunet		scpi_clocks: clocks {
1432c130695SJerome Brunet			compatible = "arm,scpi-clocks";
1442c130695SJerome Brunet
1452c130695SJerome Brunet			scpi_dvfs: clock-controller {
1462c130695SJerome Brunet				compatible = "arm,scpi-dvfs-clocks";
1472c130695SJerome Brunet				#clock-cells = <1>;
1482c130695SJerome Brunet				clock-indices = <0>;
1492c130695SJerome Brunet				clock-output-names = "vcpu";
1502c130695SJerome Brunet			};
1512c130695SJerome Brunet		};
1522c130695SJerome Brunet
1532c130695SJerome Brunet		scpi_sensors: sensors {
1542c130695SJerome Brunet			compatible = "amlogic,meson-gxbb-scpi-sensors";
1552c130695SJerome Brunet			#thermal-sensor-cells = <1>;
1562c130695SJerome Brunet		};
1572c130695SJerome Brunet	};
1582c130695SJerome Brunet
1599d59b708SYixun Lan	soc {
1609d59b708SYixun Lan		compatible = "simple-bus";
1619d59b708SYixun Lan		#address-cells = <2>;
1629d59b708SYixun Lan		#size-cells = <2>;
1639d59b708SYixun Lan		ranges;
1649d59b708SYixun Lan
1658c0cf40fSJerome Brunet		ethmac: ethernet@ff3f0000 {
166eaf8f57cSNeil Armstrong			compatible = "amlogic,meson-axg-dwmac", "snps,dwmac";
1678c0cf40fSJerome Brunet			reg = <0x0 0xff3f0000 0x0 0x10000
1688c0cf40fSJerome Brunet			       0x0 0xff634540 0x0 0x8>;
1698b3e6f89SCarlo Caione			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
1708c0cf40fSJerome Brunet			interrupt-names = "macirq";
1718c0cf40fSJerome Brunet			clocks = <&clkc CLKID_ETH>,
1728c0cf40fSJerome Brunet				 <&clkc CLKID_FCLK_DIV2>,
1738c0cf40fSJerome Brunet				 <&clkc CLKID_MPLL2>;
1748c0cf40fSJerome Brunet			clock-names = "stmmaceth", "clkin0", "clkin1";
1758c0cf40fSJerome Brunet			status = "disabled";
1768c0cf40fSJerome Brunet		};
1778c0cf40fSJerome Brunet
178c362e4e0SJerome Brunet		pdm: audio-controller@ff632000 {
179c362e4e0SJerome Brunet			compatible = "amlogic,axg-pdm";
180c362e4e0SJerome Brunet			reg = <0x0 0xff632000 0x0 0x34>;
181c362e4e0SJerome Brunet			#sound-dai-cells = <0>;
182c362e4e0SJerome Brunet			sound-name-prefix = "PDM";
183c362e4e0SJerome Brunet			clocks = <&clkc_audio AUD_CLKID_PDM>,
184c362e4e0SJerome Brunet				 <&clkc_audio AUD_CLKID_PDM_DCLK>,
185c362e4e0SJerome Brunet				 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
186c362e4e0SJerome Brunet			clock-names = "pclk", "dclk", "sysclk";
187c362e4e0SJerome Brunet			status = "disabled";
188c362e4e0SJerome Brunet		};
189c362e4e0SJerome Brunet
1908c0cf40fSJerome Brunet		periphs: bus@ff634000 {
191221cf34bSNan Li			compatible = "simple-bus";
1928c0cf40fSJerome Brunet			reg = <0x0 0xff634000 0x0 0x2000>;
193221cf34bSNan Li			#address-cells = <2>;
194221cf34bSNan Li			#size-cells = <2>;
1958c0cf40fSJerome Brunet			ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
196221cf34bSNan Li
1978c0cf40fSJerome Brunet			hwrng: rng@18 {
1988c0cf40fSJerome Brunet				compatible = "amlogic,meson-rng";
1998c0cf40fSJerome Brunet				reg = <0x0 0x18 0x0 0x4>;
2008c0cf40fSJerome Brunet				clocks = <&clkc CLKID_RNG0>;
2018c0cf40fSJerome Brunet				clock-names = "core";
202221cf34bSNan Li			};
203221cf34bSNan Li
2048c0cf40fSJerome Brunet			pinctrl_periphs: pinctrl@480 {
2058c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-periphs-pinctrl";
2068c0cf40fSJerome Brunet				#address-cells = <2>;
2078c0cf40fSJerome Brunet				#size-cells = <2>;
2088c0cf40fSJerome Brunet				ranges;
2098c0cf40fSJerome Brunet
2108c0cf40fSJerome Brunet				gpio: bank@480 {
2118c0cf40fSJerome Brunet					reg = <0x0 0x00480 0x0 0x40>,
2128c0cf40fSJerome Brunet					      <0x0 0x004e8 0x0 0x14>,
2138c0cf40fSJerome Brunet					      <0x0 0x00520 0x0 0x14>,
2148c0cf40fSJerome Brunet					      <0x0 0x00430 0x0 0x3c>;
2158c0cf40fSJerome Brunet					reg-names = "mux", "pull", "pull-enable", "gpio";
2168c0cf40fSJerome Brunet					gpio-controller;
2178c0cf40fSJerome Brunet					#gpio-cells = <2>;
2188c0cf40fSJerome Brunet					gpio-ranges = <&pinctrl_periphs 0 0 86>;
219221cf34bSNan Li				};
2208c0cf40fSJerome Brunet
2218c0cf40fSJerome Brunet				i2c0_pins: i2c0 {
2228c0cf40fSJerome Brunet					mux {
2238c0cf40fSJerome Brunet						groups = "i2c0_sck",
2248c0cf40fSJerome Brunet							 "i2c0_sda";
2258c0cf40fSJerome Brunet						function = "i2c0";
2261c5cc1c8SJerome Brunet						bias-disable;
2278c0cf40fSJerome Brunet					};
2288c0cf40fSJerome Brunet				};
2298c0cf40fSJerome Brunet
2308c0cf40fSJerome Brunet				i2c1_x_pins: i2c1_x {
2318c0cf40fSJerome Brunet					mux {
2328c0cf40fSJerome Brunet						groups = "i2c1_sck_x",
2338c0cf40fSJerome Brunet							 "i2c1_sda_x";
2348c0cf40fSJerome Brunet						function = "i2c1";
2351c5cc1c8SJerome Brunet						bias-disable;
2368c0cf40fSJerome Brunet					};
2378c0cf40fSJerome Brunet				};
2388c0cf40fSJerome Brunet
2398c0cf40fSJerome Brunet				i2c1_z_pins: i2c1_z {
2408c0cf40fSJerome Brunet					mux {
2418c0cf40fSJerome Brunet						groups = "i2c1_sck_z",
2428c0cf40fSJerome Brunet							 "i2c1_sda_z";
2438c0cf40fSJerome Brunet						function = "i2c1";
2441c5cc1c8SJerome Brunet						bias-disable;
2458c0cf40fSJerome Brunet					};
2468c0cf40fSJerome Brunet				};
2478c0cf40fSJerome Brunet
2488c0cf40fSJerome Brunet				i2c2_a_pins: i2c2_a {
2498c0cf40fSJerome Brunet					mux {
2508c0cf40fSJerome Brunet						groups = "i2c2_sck_a",
2518c0cf40fSJerome Brunet							 "i2c2_sda_a";
2528c0cf40fSJerome Brunet						function = "i2c2";
2531c5cc1c8SJerome Brunet						bias-disable;
2548c0cf40fSJerome Brunet					};
2558c0cf40fSJerome Brunet				};
2568c0cf40fSJerome Brunet
2578c0cf40fSJerome Brunet				i2c2_x_pins: i2c2_x {
2588c0cf40fSJerome Brunet					mux {
2598c0cf40fSJerome Brunet						groups = "i2c2_sck_x",
2608c0cf40fSJerome Brunet							 "i2c2_sda_x";
2618c0cf40fSJerome Brunet						function = "i2c2";
2621c5cc1c8SJerome Brunet						bias-disable;
2638c0cf40fSJerome Brunet					};
2648c0cf40fSJerome Brunet				};
2658c0cf40fSJerome Brunet
2668c0cf40fSJerome Brunet				i2c3_a6_pins: i2c3_a6 {
2678c0cf40fSJerome Brunet					mux {
2688c0cf40fSJerome Brunet						groups = "i2c3_sda_a6",
2698c0cf40fSJerome Brunet							 "i2c3_sck_a7";
2708c0cf40fSJerome Brunet						function = "i2c3";
2711c5cc1c8SJerome Brunet						bias-disable;
2728c0cf40fSJerome Brunet					};
2738c0cf40fSJerome Brunet				};
2748c0cf40fSJerome Brunet
2758c0cf40fSJerome Brunet				i2c3_a12_pins: i2c3_a12 {
2768c0cf40fSJerome Brunet					mux {
2778c0cf40fSJerome Brunet						groups = "i2c3_sda_a12",
2788c0cf40fSJerome Brunet							 "i2c3_sck_a13";
2798c0cf40fSJerome Brunet						function = "i2c3";
2801c5cc1c8SJerome Brunet						bias-disable;
2818c0cf40fSJerome Brunet					};
2828c0cf40fSJerome Brunet				};
2838c0cf40fSJerome Brunet
2848c0cf40fSJerome Brunet				i2c3_a19_pins: i2c3_a19 {
2858c0cf40fSJerome Brunet					mux {
2868c0cf40fSJerome Brunet						groups = "i2c3_sda_a19",
2878c0cf40fSJerome Brunet							 "i2c3_sck_a20";
2888c0cf40fSJerome Brunet						function = "i2c3";
2891c5cc1c8SJerome Brunet						bias-disable;
2908c0cf40fSJerome Brunet					};
2918c0cf40fSJerome Brunet				};
2928c0cf40fSJerome Brunet
2938c0cf40fSJerome Brunet				emmc_pins: emmc {
2948c0cf40fSJerome Brunet					mux {
2958c0cf40fSJerome Brunet						groups = "emmc_nand_d0",
2968c0cf40fSJerome Brunet							 "emmc_nand_d1",
2978c0cf40fSJerome Brunet							 "emmc_nand_d2",
2988c0cf40fSJerome Brunet							 "emmc_nand_d3",
2998c0cf40fSJerome Brunet							 "emmc_nand_d4",
3008c0cf40fSJerome Brunet							 "emmc_nand_d5",
3018c0cf40fSJerome Brunet							 "emmc_nand_d6",
3028c0cf40fSJerome Brunet							 "emmc_nand_d7",
3038c0cf40fSJerome Brunet							 "emmc_clk",
3048c0cf40fSJerome Brunet							 "emmc_cmd",
3058c0cf40fSJerome Brunet							 "emmc_ds";
3068c0cf40fSJerome Brunet						function = "emmc";
30796a13691SJerome Brunet						bias-disable;
3088c0cf40fSJerome Brunet					};
3098c0cf40fSJerome Brunet				};
3108c0cf40fSJerome Brunet
3118c0cf40fSJerome Brunet				emmc_clk_gate_pins: emmc_clk_gate {
3128c0cf40fSJerome Brunet					mux {
3138c0cf40fSJerome Brunet						groups = "BOOT_8";
3148c0cf40fSJerome Brunet						function = "gpio_periphs";
3158c0cf40fSJerome Brunet						bias-pull-down;
3168c0cf40fSJerome Brunet					};
3178c0cf40fSJerome Brunet				};
3188c0cf40fSJerome Brunet
3198c0cf40fSJerome Brunet				eth_rgmii_x_pins: eth-x-rgmii {
3208c0cf40fSJerome Brunet					mux {
3218c0cf40fSJerome Brunet						groups = "eth_mdio_x",
3228c0cf40fSJerome Brunet							 "eth_mdc_x",
3238c0cf40fSJerome Brunet							 "eth_rgmii_rx_clk_x",
3248c0cf40fSJerome Brunet							 "eth_rx_dv_x",
3258c0cf40fSJerome Brunet							 "eth_rxd0_x",
3268c0cf40fSJerome Brunet							 "eth_rxd1_x",
3278c0cf40fSJerome Brunet							 "eth_rxd2_rgmii",
3288c0cf40fSJerome Brunet							 "eth_rxd3_rgmii",
3298c0cf40fSJerome Brunet							 "eth_rgmii_tx_clk",
3308c0cf40fSJerome Brunet							 "eth_txen_x",
3318c0cf40fSJerome Brunet							 "eth_txd0_x",
3328c0cf40fSJerome Brunet							 "eth_txd1_x",
3338c0cf40fSJerome Brunet							 "eth_txd2_rgmii",
3348c0cf40fSJerome Brunet							 "eth_txd3_rgmii";
3358c0cf40fSJerome Brunet						function = "eth";
3361c5cc1c8SJerome Brunet						bias-disable;
3378c0cf40fSJerome Brunet					};
3388c0cf40fSJerome Brunet				};
3398c0cf40fSJerome Brunet
3408c0cf40fSJerome Brunet				eth_rgmii_y_pins: eth-y-rgmii {
3418c0cf40fSJerome Brunet					mux {
3428c0cf40fSJerome Brunet						groups = "eth_mdio_y",
3438c0cf40fSJerome Brunet							 "eth_mdc_y",
3448c0cf40fSJerome Brunet							 "eth_rgmii_rx_clk_y",
3458c0cf40fSJerome Brunet							 "eth_rx_dv_y",
3468c0cf40fSJerome Brunet							 "eth_rxd0_y",
3478c0cf40fSJerome Brunet							 "eth_rxd1_y",
3488c0cf40fSJerome Brunet							 "eth_rxd2_rgmii",
3498c0cf40fSJerome Brunet							 "eth_rxd3_rgmii",
3508c0cf40fSJerome Brunet							 "eth_rgmii_tx_clk",
3518c0cf40fSJerome Brunet							 "eth_txen_y",
3528c0cf40fSJerome Brunet							 "eth_txd0_y",
3538c0cf40fSJerome Brunet							 "eth_txd1_y",
3548c0cf40fSJerome Brunet							 "eth_txd2_rgmii",
3558c0cf40fSJerome Brunet							 "eth_txd3_rgmii";
3568c0cf40fSJerome Brunet						function = "eth";
3571c5cc1c8SJerome Brunet						bias-disable;
3588c0cf40fSJerome Brunet					};
3598c0cf40fSJerome Brunet				};
3608c0cf40fSJerome Brunet
3618c0cf40fSJerome Brunet				eth_rmii_x_pins: eth-x-rmii {
3628c0cf40fSJerome Brunet					mux {
3638c0cf40fSJerome Brunet						groups = "eth_mdio_x",
3648c0cf40fSJerome Brunet							 "eth_mdc_x",
3658c0cf40fSJerome Brunet							 "eth_rgmii_rx_clk_x",
3668c0cf40fSJerome Brunet							 "eth_rx_dv_x",
3678c0cf40fSJerome Brunet							 "eth_rxd0_x",
3688c0cf40fSJerome Brunet							 "eth_rxd1_x",
3698c0cf40fSJerome Brunet							 "eth_txen_x",
3708c0cf40fSJerome Brunet							 "eth_txd0_x",
3718c0cf40fSJerome Brunet							 "eth_txd1_x";
3728c0cf40fSJerome Brunet						function = "eth";
3731c5cc1c8SJerome Brunet						bias-disable;
3748c0cf40fSJerome Brunet					};
3758c0cf40fSJerome Brunet				};
3768c0cf40fSJerome Brunet
3778c0cf40fSJerome Brunet				eth_rmii_y_pins: eth-y-rmii {
3788c0cf40fSJerome Brunet					mux {
3798c0cf40fSJerome Brunet						groups = "eth_mdio_y",
3808c0cf40fSJerome Brunet							 "eth_mdc_y",
3818c0cf40fSJerome Brunet							 "eth_rgmii_rx_clk_y",
3828c0cf40fSJerome Brunet							 "eth_rx_dv_y",
3838c0cf40fSJerome Brunet							 "eth_rxd0_y",
3848c0cf40fSJerome Brunet							 "eth_rxd1_y",
3858c0cf40fSJerome Brunet							 "eth_txen_y",
3868c0cf40fSJerome Brunet							 "eth_txd0_y",
3878c0cf40fSJerome Brunet							 "eth_txd1_y";
3888c0cf40fSJerome Brunet						function = "eth";
3891c5cc1c8SJerome Brunet						bias-disable;
3908c0cf40fSJerome Brunet					};
3918c0cf40fSJerome Brunet				};
3928c0cf40fSJerome Brunet
3938c0cf40fSJerome Brunet				mclk_b_pins: mclk_b {
3948c0cf40fSJerome Brunet					mux {
3958c0cf40fSJerome Brunet						groups = "mclk_b";
3968c0cf40fSJerome Brunet						function = "mclk_b";
3971c5cc1c8SJerome Brunet						bias-disable;
3988c0cf40fSJerome Brunet					};
3998c0cf40fSJerome Brunet				};
4008c0cf40fSJerome Brunet
4018c0cf40fSJerome Brunet				mclk_c_pins: mclk_c {
4028c0cf40fSJerome Brunet					mux {
4038c0cf40fSJerome Brunet						groups = "mclk_c";
4048c0cf40fSJerome Brunet						function = "mclk_c";
4051c5cc1c8SJerome Brunet						bias-disable;
4068c0cf40fSJerome Brunet					};
4078c0cf40fSJerome Brunet				};
4088c0cf40fSJerome Brunet
4098c0cf40fSJerome Brunet				pdm_dclk_a14_pins: pdm_dclk_a14 {
4108c0cf40fSJerome Brunet					mux {
4118c0cf40fSJerome Brunet						groups = "pdm_dclk_a14";
4128c0cf40fSJerome Brunet						function = "pdm";
4131c5cc1c8SJerome Brunet						bias-disable;
4148c0cf40fSJerome Brunet					};
4158c0cf40fSJerome Brunet				};
4168c0cf40fSJerome Brunet
4178c0cf40fSJerome Brunet				pdm_dclk_a19_pins: pdm_dclk_a19 {
4188c0cf40fSJerome Brunet					mux {
4198c0cf40fSJerome Brunet						groups = "pdm_dclk_a19";
4208c0cf40fSJerome Brunet						function = "pdm";
4211c5cc1c8SJerome Brunet						bias-disable;
4228c0cf40fSJerome Brunet					};
4238c0cf40fSJerome Brunet				};
4248c0cf40fSJerome Brunet
4258c0cf40fSJerome Brunet				pdm_din0_pins: pdm_din0 {
4268c0cf40fSJerome Brunet					mux {
4278c0cf40fSJerome Brunet						groups = "pdm_din0";
4288c0cf40fSJerome Brunet						function = "pdm";
4291c5cc1c8SJerome Brunet						bias-disable;
4308c0cf40fSJerome Brunet					};
4318c0cf40fSJerome Brunet				};
4328c0cf40fSJerome Brunet
4338c0cf40fSJerome Brunet				pdm_din1_pins: pdm_din1 {
4348c0cf40fSJerome Brunet					mux {
4358c0cf40fSJerome Brunet						groups = "pdm_din1";
4368c0cf40fSJerome Brunet						function = "pdm";
4371c5cc1c8SJerome Brunet						bias-disable;
4388c0cf40fSJerome Brunet					};
4398c0cf40fSJerome Brunet				};
4408c0cf40fSJerome Brunet
4418c0cf40fSJerome Brunet				pdm_din2_pins: pdm_din2 {
4428c0cf40fSJerome Brunet					mux {
4438c0cf40fSJerome Brunet						groups = "pdm_din2";
4448c0cf40fSJerome Brunet						function = "pdm";
4451c5cc1c8SJerome Brunet						bias-disable;
4468c0cf40fSJerome Brunet					};
4478c0cf40fSJerome Brunet				};
4488c0cf40fSJerome Brunet
4498c0cf40fSJerome Brunet				pdm_din3_pins: pdm_din3 {
4508c0cf40fSJerome Brunet					mux {
4518c0cf40fSJerome Brunet						groups = "pdm_din3";
4528c0cf40fSJerome Brunet						function = "pdm";
4531c5cc1c8SJerome Brunet						bias-disable;
4548c0cf40fSJerome Brunet					};
4558c0cf40fSJerome Brunet				};
4568c0cf40fSJerome Brunet
4578c0cf40fSJerome Brunet				pwm_a_a_pins: pwm_a_a {
4588c0cf40fSJerome Brunet					mux {
4598c0cf40fSJerome Brunet						groups = "pwm_a_a";
4608c0cf40fSJerome Brunet						function = "pwm_a";
4611c5cc1c8SJerome Brunet						bias-disable;
4628c0cf40fSJerome Brunet					};
4638c0cf40fSJerome Brunet				};
4648c0cf40fSJerome Brunet
4658c0cf40fSJerome Brunet				pwm_a_x18_pins: pwm_a_x18 {
4668c0cf40fSJerome Brunet					mux {
4678c0cf40fSJerome Brunet						groups = "pwm_a_x18";
4688c0cf40fSJerome Brunet						function = "pwm_a";
4691c5cc1c8SJerome Brunet						bias-disable;
4708c0cf40fSJerome Brunet					};
4718c0cf40fSJerome Brunet				};
4728c0cf40fSJerome Brunet
4738c0cf40fSJerome Brunet				pwm_a_x20_pins: pwm_a_x20 {
4748c0cf40fSJerome Brunet					mux {
4758c0cf40fSJerome Brunet						groups = "pwm_a_x20";
4768c0cf40fSJerome Brunet						function = "pwm_a";
4771c5cc1c8SJerome Brunet						bias-disable;
4788c0cf40fSJerome Brunet					};
4798c0cf40fSJerome Brunet				};
4808c0cf40fSJerome Brunet
4818c0cf40fSJerome Brunet				pwm_a_z_pins: pwm_a_z {
4828c0cf40fSJerome Brunet					mux {
4838c0cf40fSJerome Brunet						groups = "pwm_a_z";
4848c0cf40fSJerome Brunet						function = "pwm_a";
4851c5cc1c8SJerome Brunet						bias-disable;
4868c0cf40fSJerome Brunet					};
4878c0cf40fSJerome Brunet				};
4888c0cf40fSJerome Brunet
4898c0cf40fSJerome Brunet				pwm_b_a_pins: pwm_b_a {
4908c0cf40fSJerome Brunet					mux {
4918c0cf40fSJerome Brunet						groups = "pwm_b_a";
4928c0cf40fSJerome Brunet						function = "pwm_b";
4931c5cc1c8SJerome Brunet						bias-disable;
4948c0cf40fSJerome Brunet					};
4958c0cf40fSJerome Brunet				};
4968c0cf40fSJerome Brunet
4978c0cf40fSJerome Brunet				pwm_b_x_pins: pwm_b_x {
4988c0cf40fSJerome Brunet					mux {
4998c0cf40fSJerome Brunet						groups = "pwm_b_x";
5008c0cf40fSJerome Brunet						function = "pwm_b";
5011c5cc1c8SJerome Brunet						bias-disable;
5028c0cf40fSJerome Brunet					};
5038c0cf40fSJerome Brunet				};
5048c0cf40fSJerome Brunet
5058c0cf40fSJerome Brunet				pwm_b_z_pins: pwm_b_z {
5068c0cf40fSJerome Brunet					mux {
5078c0cf40fSJerome Brunet						groups = "pwm_b_z";
5088c0cf40fSJerome Brunet						function = "pwm_b";
5091c5cc1c8SJerome Brunet						bias-disable;
5108c0cf40fSJerome Brunet					};
5118c0cf40fSJerome Brunet				};
5128c0cf40fSJerome Brunet
5138c0cf40fSJerome Brunet				pwm_c_a_pins: pwm_c_a {
5148c0cf40fSJerome Brunet					mux {
5158c0cf40fSJerome Brunet						groups = "pwm_c_a";
5168c0cf40fSJerome Brunet						function = "pwm_c";
5171c5cc1c8SJerome Brunet						bias-disable;
5188c0cf40fSJerome Brunet					};
5198c0cf40fSJerome Brunet				};
5208c0cf40fSJerome Brunet
5218c0cf40fSJerome Brunet				pwm_c_x10_pins: pwm_c_x10 {
5228c0cf40fSJerome Brunet					mux {
5238c0cf40fSJerome Brunet						groups = "pwm_c_x10";
5248c0cf40fSJerome Brunet						function = "pwm_c";
5251c5cc1c8SJerome Brunet						bias-disable;
5268c0cf40fSJerome Brunet					};
5278c0cf40fSJerome Brunet				};
5288c0cf40fSJerome Brunet
5298c0cf40fSJerome Brunet				pwm_c_x17_pins: pwm_c_x17 {
5308c0cf40fSJerome Brunet					mux {
5318c0cf40fSJerome Brunet						groups = "pwm_c_x17";
5328c0cf40fSJerome Brunet						function = "pwm_c";
5331c5cc1c8SJerome Brunet						bias-disable;
5348c0cf40fSJerome Brunet					};
5358c0cf40fSJerome Brunet				};
5368c0cf40fSJerome Brunet
5378c0cf40fSJerome Brunet				pwm_d_x11_pins: pwm_d_x11 {
5388c0cf40fSJerome Brunet					mux {
5398c0cf40fSJerome Brunet						groups = "pwm_d_x11";
5408c0cf40fSJerome Brunet						function = "pwm_d";
5411c5cc1c8SJerome Brunet						bias-disable;
5428c0cf40fSJerome Brunet					};
5438c0cf40fSJerome Brunet				};
5448c0cf40fSJerome Brunet
5458c0cf40fSJerome Brunet				pwm_d_x16_pins: pwm_d_x16 {
5468c0cf40fSJerome Brunet					mux {
5478c0cf40fSJerome Brunet						groups = "pwm_d_x16";
5488c0cf40fSJerome Brunet						function = "pwm_d";
5491c5cc1c8SJerome Brunet						bias-disable;
5508c0cf40fSJerome Brunet					};
5518c0cf40fSJerome Brunet				};
5528c0cf40fSJerome Brunet
5538c0cf40fSJerome Brunet				sdio_pins: sdio {
5548c0cf40fSJerome Brunet					mux {
5558c0cf40fSJerome Brunet						groups = "sdio_d0",
5568c0cf40fSJerome Brunet							 "sdio_d1",
5578c0cf40fSJerome Brunet							 "sdio_d2",
5588c0cf40fSJerome Brunet							 "sdio_d3",
5598c0cf40fSJerome Brunet							 "sdio_cmd",
5608c0cf40fSJerome Brunet							 "sdio_clk";
5618c0cf40fSJerome Brunet						function = "sdio";
56296a13691SJerome Brunet						bias-disable;
5638c0cf40fSJerome Brunet					};
5648c0cf40fSJerome Brunet				};
5658c0cf40fSJerome Brunet
5668c0cf40fSJerome Brunet				sdio_clk_gate_pins: sdio_clk_gate {
5678c0cf40fSJerome Brunet					mux {
5688c0cf40fSJerome Brunet						groups = "GPIOX_4";
5698c0cf40fSJerome Brunet						function = "gpio_periphs";
5708c0cf40fSJerome Brunet						bias-pull-down;
5718c0cf40fSJerome Brunet					};
5728c0cf40fSJerome Brunet				};
5738c0cf40fSJerome Brunet
5748c0cf40fSJerome Brunet				spdif_in_z_pins: spdif_in_z {
5758c0cf40fSJerome Brunet					mux {
5768c0cf40fSJerome Brunet						groups = "spdif_in_z";
5778c0cf40fSJerome Brunet						function = "spdif_in";
5781c5cc1c8SJerome Brunet						bias-disable;
5798c0cf40fSJerome Brunet					};
5808c0cf40fSJerome Brunet				};
5818c0cf40fSJerome Brunet
5828c0cf40fSJerome Brunet				spdif_in_a1_pins: spdif_in_a1 {
5838c0cf40fSJerome Brunet					mux {
5848c0cf40fSJerome Brunet						groups = "spdif_in_a1";
5858c0cf40fSJerome Brunet						function = "spdif_in";
5861c5cc1c8SJerome Brunet						bias-disable;
5878c0cf40fSJerome Brunet					};
5888c0cf40fSJerome Brunet				};
5898c0cf40fSJerome Brunet
5908c0cf40fSJerome Brunet				spdif_in_a7_pins: spdif_in_a7 {
5918c0cf40fSJerome Brunet					mux {
5928c0cf40fSJerome Brunet						groups = "spdif_in_a7";
5938c0cf40fSJerome Brunet						function = "spdif_in";
5941c5cc1c8SJerome Brunet						bias-disable;
5958c0cf40fSJerome Brunet					};
5968c0cf40fSJerome Brunet				};
5978c0cf40fSJerome Brunet
5988c0cf40fSJerome Brunet				spdif_in_a19_pins: spdif_in_a19 {
5998c0cf40fSJerome Brunet					mux {
6008c0cf40fSJerome Brunet						groups = "spdif_in_a19";
6018c0cf40fSJerome Brunet						function = "spdif_in";
6021c5cc1c8SJerome Brunet						bias-disable;
6038c0cf40fSJerome Brunet					};
6048c0cf40fSJerome Brunet				};
6058c0cf40fSJerome Brunet
6068c0cf40fSJerome Brunet				spdif_in_a20_pins: spdif_in_a20 {
6078c0cf40fSJerome Brunet					mux {
6088c0cf40fSJerome Brunet						groups = "spdif_in_a20";
6098c0cf40fSJerome Brunet						function = "spdif_in";
6101c5cc1c8SJerome Brunet						bias-disable;
6118c0cf40fSJerome Brunet					};
6128c0cf40fSJerome Brunet				};
6138c0cf40fSJerome Brunet
6148c0cf40fSJerome Brunet				spdif_out_a1_pins: spdif_out_a1 {
6158c0cf40fSJerome Brunet					mux {
6168c0cf40fSJerome Brunet						groups = "spdif_out_a1";
6178c0cf40fSJerome Brunet						function = "spdif_out";
6181c5cc1c8SJerome Brunet						bias-disable;
6198c0cf40fSJerome Brunet					};
6208c0cf40fSJerome Brunet				};
6218c0cf40fSJerome Brunet
6228c0cf40fSJerome Brunet				spdif_out_a11_pins: spdif_out_a11 {
6238c0cf40fSJerome Brunet					mux {
6248c0cf40fSJerome Brunet						groups = "spdif_out_a11";
6258c0cf40fSJerome Brunet						function = "spdif_out";
6261c5cc1c8SJerome Brunet						bias-disable;
6278c0cf40fSJerome Brunet					};
6288c0cf40fSJerome Brunet				};
6298c0cf40fSJerome Brunet
6308c0cf40fSJerome Brunet				spdif_out_a19_pins: spdif_out_a19 {
6318c0cf40fSJerome Brunet					mux {
6328c0cf40fSJerome Brunet						groups = "spdif_out_a19";
6338c0cf40fSJerome Brunet						function = "spdif_out";
6341c5cc1c8SJerome Brunet						bias-disable;
6358c0cf40fSJerome Brunet					};
6368c0cf40fSJerome Brunet				};
6378c0cf40fSJerome Brunet
6388c0cf40fSJerome Brunet				spdif_out_a20_pins: spdif_out_a20 {
6398c0cf40fSJerome Brunet					mux {
6408c0cf40fSJerome Brunet						groups = "spdif_out_a20";
6418c0cf40fSJerome Brunet						function = "spdif_out";
6421c5cc1c8SJerome Brunet						bias-disable;
6438c0cf40fSJerome Brunet					};
6448c0cf40fSJerome Brunet				};
6458c0cf40fSJerome Brunet
6468c0cf40fSJerome Brunet				spdif_out_z_pins: spdif_out_z {
6478c0cf40fSJerome Brunet					mux {
6488c0cf40fSJerome Brunet						groups = "spdif_out_z";
6498c0cf40fSJerome Brunet						function = "spdif_out";
6501c5cc1c8SJerome Brunet						bias-disable;
6518c0cf40fSJerome Brunet					};
6528c0cf40fSJerome Brunet				};
6538c0cf40fSJerome Brunet
6548c0cf40fSJerome Brunet				spi0_pins: spi0 {
6558c0cf40fSJerome Brunet					mux {
6568c0cf40fSJerome Brunet						groups = "spi0_miso",
6578c0cf40fSJerome Brunet							 "spi0_mosi",
6588c0cf40fSJerome Brunet							 "spi0_clk";
6598c0cf40fSJerome Brunet						function = "spi0";
6601c5cc1c8SJerome Brunet						bias-disable;
6618c0cf40fSJerome Brunet					};
6628c0cf40fSJerome Brunet				};
6638c0cf40fSJerome Brunet
6648c0cf40fSJerome Brunet				spi0_ss0_pins: spi0_ss0 {
6658c0cf40fSJerome Brunet					mux {
6668c0cf40fSJerome Brunet						groups = "spi0_ss0";
6678c0cf40fSJerome Brunet						function = "spi0";
6681c5cc1c8SJerome Brunet						bias-disable;
6698c0cf40fSJerome Brunet					};
6708c0cf40fSJerome Brunet				};
6718c0cf40fSJerome Brunet
6728c0cf40fSJerome Brunet				spi0_ss1_pins: spi0_ss1 {
6738c0cf40fSJerome Brunet					mux {
6748c0cf40fSJerome Brunet						groups = "spi0_ss1";
6758c0cf40fSJerome Brunet						function = "spi0";
6761c5cc1c8SJerome Brunet						bias-disable;
6778c0cf40fSJerome Brunet					};
6788c0cf40fSJerome Brunet				};
6798c0cf40fSJerome Brunet
6808c0cf40fSJerome Brunet				spi0_ss2_pins: spi0_ss2 {
6818c0cf40fSJerome Brunet					mux {
6828c0cf40fSJerome Brunet						groups = "spi0_ss2";
6838c0cf40fSJerome Brunet						function = "spi0";
6841c5cc1c8SJerome Brunet						bias-disable;
6858c0cf40fSJerome Brunet					};
6868c0cf40fSJerome Brunet				};
6878c0cf40fSJerome Brunet
6888c0cf40fSJerome Brunet				spi1_a_pins: spi1_a {
6898c0cf40fSJerome Brunet					mux {
6908c0cf40fSJerome Brunet						groups = "spi1_miso_a",
6918c0cf40fSJerome Brunet							 "spi1_mosi_a",
6928c0cf40fSJerome Brunet							 "spi1_clk_a";
6938c0cf40fSJerome Brunet						function = "spi1";
6941c5cc1c8SJerome Brunet						bias-disable;
6958c0cf40fSJerome Brunet					};
6968c0cf40fSJerome Brunet				};
6978c0cf40fSJerome Brunet
6988c0cf40fSJerome Brunet				spi1_ss0_a_pins: spi1_ss0_a {
6998c0cf40fSJerome Brunet					mux {
7008c0cf40fSJerome Brunet						groups = "spi1_ss0_a";
7018c0cf40fSJerome Brunet						function = "spi1";
7021c5cc1c8SJerome Brunet						bias-disable;
7038c0cf40fSJerome Brunet					};
7048c0cf40fSJerome Brunet				};
7058c0cf40fSJerome Brunet
7068c0cf40fSJerome Brunet				spi1_ss1_pins: spi1_ss1 {
7078c0cf40fSJerome Brunet					mux {
7088c0cf40fSJerome Brunet						groups = "spi1_ss1";
7098c0cf40fSJerome Brunet						function = "spi1";
7101c5cc1c8SJerome Brunet						bias-disable;
7118c0cf40fSJerome Brunet					};
7128c0cf40fSJerome Brunet				};
7138c0cf40fSJerome Brunet
7148c0cf40fSJerome Brunet				spi1_x_pins: spi1_x {
7158c0cf40fSJerome Brunet					mux {
7168c0cf40fSJerome Brunet						groups = "spi1_miso_x",
7178c0cf40fSJerome Brunet							 "spi1_mosi_x",
7188c0cf40fSJerome Brunet							 "spi1_clk_x";
7198c0cf40fSJerome Brunet						function = "spi1";
7201c5cc1c8SJerome Brunet						bias-disable;
7218c0cf40fSJerome Brunet					};
7228c0cf40fSJerome Brunet				};
7238c0cf40fSJerome Brunet
7248c0cf40fSJerome Brunet				spi1_ss0_x_pins: spi1_ss0_x {
7258c0cf40fSJerome Brunet					mux {
7268c0cf40fSJerome Brunet						groups = "spi1_ss0_x";
7278c0cf40fSJerome Brunet						function = "spi1";
7281c5cc1c8SJerome Brunet						bias-disable;
7298c0cf40fSJerome Brunet					};
7308c0cf40fSJerome Brunet				};
7318c0cf40fSJerome Brunet
7328c0cf40fSJerome Brunet				tdma_din0_pins: tdma_din0 {
7338c0cf40fSJerome Brunet					mux {
7348c0cf40fSJerome Brunet						groups = "tdma_din0";
7358c0cf40fSJerome Brunet						function = "tdma";
7361c5cc1c8SJerome Brunet						bias-disable;
7378c0cf40fSJerome Brunet					};
7388c0cf40fSJerome Brunet				};
7398c0cf40fSJerome Brunet
7408c0cf40fSJerome Brunet				tdma_dout0_x14_pins: tdma_dout0_x14 {
7418c0cf40fSJerome Brunet					mux {
7428c0cf40fSJerome Brunet						groups = "tdma_dout0_x14";
7438c0cf40fSJerome Brunet						function = "tdma";
7441c5cc1c8SJerome Brunet						bias-disable;
7458c0cf40fSJerome Brunet					};
7468c0cf40fSJerome Brunet				};
7478c0cf40fSJerome Brunet
7488c0cf40fSJerome Brunet				tdma_dout0_x15_pins: tdma_dout0_x15 {
7498c0cf40fSJerome Brunet					mux {
7508c0cf40fSJerome Brunet						groups = "tdma_dout0_x15";
7518c0cf40fSJerome Brunet						function = "tdma";
7521c5cc1c8SJerome Brunet						bias-disable;
7538c0cf40fSJerome Brunet					};
7548c0cf40fSJerome Brunet				};
7558c0cf40fSJerome Brunet
7568c0cf40fSJerome Brunet				tdma_dout1_pins: tdma_dout1 {
7578c0cf40fSJerome Brunet					mux {
7588c0cf40fSJerome Brunet						groups = "tdma_dout1";
7598c0cf40fSJerome Brunet						function = "tdma";
7601c5cc1c8SJerome Brunet						bias-disable;
7618c0cf40fSJerome Brunet					};
7628c0cf40fSJerome Brunet				};
7638c0cf40fSJerome Brunet
7648c0cf40fSJerome Brunet				tdma_din1_pins: tdma_din1 {
7658c0cf40fSJerome Brunet					mux {
7668c0cf40fSJerome Brunet						groups = "tdma_din1";
7678c0cf40fSJerome Brunet						function = "tdma";
7681c5cc1c8SJerome Brunet						bias-disable;
7698c0cf40fSJerome Brunet					};
7708c0cf40fSJerome Brunet				};
7718c0cf40fSJerome Brunet
7728c0cf40fSJerome Brunet				tdma_fs_pins: tdma_fs {
7738c0cf40fSJerome Brunet					mux {
7748c0cf40fSJerome Brunet						groups = "tdma_fs";
7758c0cf40fSJerome Brunet						function = "tdma";
7761c5cc1c8SJerome Brunet						bias-disable;
7778c0cf40fSJerome Brunet					};
7788c0cf40fSJerome Brunet				};
7798c0cf40fSJerome Brunet
7808c0cf40fSJerome Brunet				tdma_fs_slv_pins: tdma_fs_slv {
7818c0cf40fSJerome Brunet					mux {
7828c0cf40fSJerome Brunet						groups = "tdma_fs_slv";
7838c0cf40fSJerome Brunet						function = "tdma";
7841c5cc1c8SJerome Brunet						bias-disable;
7858c0cf40fSJerome Brunet					};
7868c0cf40fSJerome Brunet				};
7878c0cf40fSJerome Brunet
7888c0cf40fSJerome Brunet				tdma_sclk_pins: tdma_sclk {
7898c0cf40fSJerome Brunet					mux {
7908c0cf40fSJerome Brunet						groups = "tdma_sclk";
7918c0cf40fSJerome Brunet						function = "tdma";
7921c5cc1c8SJerome Brunet						bias-disable;
7938c0cf40fSJerome Brunet					};
7948c0cf40fSJerome Brunet				};
7958c0cf40fSJerome Brunet
7968c0cf40fSJerome Brunet				tdma_sclk_slv_pins: tdma_sclk_slv {
7978c0cf40fSJerome Brunet					mux {
7988c0cf40fSJerome Brunet						groups = "tdma_sclk_slv";
7998c0cf40fSJerome Brunet						function = "tdma";
8001c5cc1c8SJerome Brunet						bias-disable;
8018c0cf40fSJerome Brunet					};
8028c0cf40fSJerome Brunet				};
8038c0cf40fSJerome Brunet
8048c0cf40fSJerome Brunet				tdmb_din0_pins: tdmb_din0 {
8058c0cf40fSJerome Brunet					mux {
8068c0cf40fSJerome Brunet						groups = "tdmb_din0";
8078c0cf40fSJerome Brunet						function = "tdmb";
8081c5cc1c8SJerome Brunet						bias-disable;
8098c0cf40fSJerome Brunet					};
8108c0cf40fSJerome Brunet				};
8118c0cf40fSJerome Brunet
8128c0cf40fSJerome Brunet				tdmb_din1_pins: tdmb_din1 {
8138c0cf40fSJerome Brunet					mux {
8148c0cf40fSJerome Brunet						groups = "tdmb_din1";
8158c0cf40fSJerome Brunet						function = "tdmb";
8161c5cc1c8SJerome Brunet						bias-disable;
8178c0cf40fSJerome Brunet					};
8188c0cf40fSJerome Brunet				};
8198c0cf40fSJerome Brunet
8208c0cf40fSJerome Brunet				tdmb_din2_pins: tdmb_din2 {
8218c0cf40fSJerome Brunet					mux {
8228c0cf40fSJerome Brunet						groups = "tdmb_din2";
8238c0cf40fSJerome Brunet						function = "tdmb";
8241c5cc1c8SJerome Brunet						bias-disable;
8258c0cf40fSJerome Brunet					};
8268c0cf40fSJerome Brunet				};
8278c0cf40fSJerome Brunet
8288c0cf40fSJerome Brunet				tdmb_din3_pins: tdmb_din3 {
8298c0cf40fSJerome Brunet					mux {
8308c0cf40fSJerome Brunet						groups = "tdmb_din3";
8318c0cf40fSJerome Brunet						function = "tdmb";
8321c5cc1c8SJerome Brunet						bias-disable;
8338c0cf40fSJerome Brunet					};
8348c0cf40fSJerome Brunet				};
8358c0cf40fSJerome Brunet
8368c0cf40fSJerome Brunet				tdmb_dout0_pins: tdmb_dout0 {
8378c0cf40fSJerome Brunet					mux {
8388c0cf40fSJerome Brunet						groups = "tdmb_dout0";
8398c0cf40fSJerome Brunet						function = "tdmb";
8401c5cc1c8SJerome Brunet						bias-disable;
8418c0cf40fSJerome Brunet					};
8428c0cf40fSJerome Brunet				};
8438c0cf40fSJerome Brunet
8448c0cf40fSJerome Brunet				tdmb_dout1_pins: tdmb_dout1 {
8458c0cf40fSJerome Brunet					mux {
8468c0cf40fSJerome Brunet						groups = "tdmb_dout1";
8478c0cf40fSJerome Brunet						function = "tdmb";
8481c5cc1c8SJerome Brunet						bias-disable;
8498c0cf40fSJerome Brunet					};
8508c0cf40fSJerome Brunet				};
8518c0cf40fSJerome Brunet
8528c0cf40fSJerome Brunet				tdmb_dout2_pins: tdmb_dout2 {
8538c0cf40fSJerome Brunet					mux {
8548c0cf40fSJerome Brunet						groups = "tdmb_dout2";
8558c0cf40fSJerome Brunet						function = "tdmb";
8561c5cc1c8SJerome Brunet						bias-disable;
8578c0cf40fSJerome Brunet					};
8588c0cf40fSJerome Brunet				};
8598c0cf40fSJerome Brunet
8608c0cf40fSJerome Brunet				tdmb_dout3_pins: tdmb_dout3 {
8618c0cf40fSJerome Brunet					mux {
8628c0cf40fSJerome Brunet						groups = "tdmb_dout3";
8638c0cf40fSJerome Brunet						function = "tdmb";
8641c5cc1c8SJerome Brunet						bias-disable;
8658c0cf40fSJerome Brunet					};
8668c0cf40fSJerome Brunet				};
8678c0cf40fSJerome Brunet
8688c0cf40fSJerome Brunet				tdmb_fs_pins: tdmb_fs {
8698c0cf40fSJerome Brunet					mux {
8708c0cf40fSJerome Brunet						groups = "tdmb_fs";
8718c0cf40fSJerome Brunet						function = "tdmb";
8721c5cc1c8SJerome Brunet						bias-disable;
8738c0cf40fSJerome Brunet					};
8748c0cf40fSJerome Brunet				};
8758c0cf40fSJerome Brunet
8768c0cf40fSJerome Brunet				tdmb_fs_slv_pins: tdmb_fs_slv {
8778c0cf40fSJerome Brunet					mux {
8788c0cf40fSJerome Brunet						groups = "tdmb_fs_slv";
8798c0cf40fSJerome Brunet						function = "tdmb";
8801c5cc1c8SJerome Brunet						bias-disable;
8818c0cf40fSJerome Brunet					};
8828c0cf40fSJerome Brunet				};
8838c0cf40fSJerome Brunet
8848c0cf40fSJerome Brunet				tdmb_sclk_pins: tdmb_sclk {
8858c0cf40fSJerome Brunet					mux {
8868c0cf40fSJerome Brunet						groups = "tdmb_sclk";
8878c0cf40fSJerome Brunet						function = "tdmb";
8881c5cc1c8SJerome Brunet						bias-disable;
8898c0cf40fSJerome Brunet					};
8908c0cf40fSJerome Brunet				};
8918c0cf40fSJerome Brunet
8928c0cf40fSJerome Brunet				tdmb_sclk_slv_pins: tdmb_sclk_slv {
8938c0cf40fSJerome Brunet					mux {
8948c0cf40fSJerome Brunet						groups = "tdmb_sclk_slv";
8958c0cf40fSJerome Brunet						function = "tdmb";
8961c5cc1c8SJerome Brunet						bias-disable;
8978c0cf40fSJerome Brunet					};
8988c0cf40fSJerome Brunet				};
8998c0cf40fSJerome Brunet
9008c0cf40fSJerome Brunet				tdmc_fs_pins: tdmc_fs {
9018c0cf40fSJerome Brunet					mux {
9028c0cf40fSJerome Brunet						groups = "tdmc_fs";
9038c0cf40fSJerome Brunet						function = "tdmc";
9041c5cc1c8SJerome Brunet						bias-disable;
9058c0cf40fSJerome Brunet					};
9068c0cf40fSJerome Brunet				};
9078c0cf40fSJerome Brunet
9088c0cf40fSJerome Brunet				tdmc_fs_slv_pins: tdmc_fs_slv {
9098c0cf40fSJerome Brunet					mux {
9108c0cf40fSJerome Brunet						groups = "tdmc_fs_slv";
9118c0cf40fSJerome Brunet						function = "tdmc";
9121c5cc1c8SJerome Brunet						bias-disable;
9138c0cf40fSJerome Brunet					};
9148c0cf40fSJerome Brunet				};
9158c0cf40fSJerome Brunet
9168c0cf40fSJerome Brunet				tdmc_sclk_pins: tdmc_sclk {
9178c0cf40fSJerome Brunet					mux {
9188c0cf40fSJerome Brunet						groups = "tdmc_sclk";
9198c0cf40fSJerome Brunet						function = "tdmc";
9201c5cc1c8SJerome Brunet						bias-disable;
9218c0cf40fSJerome Brunet					};
9228c0cf40fSJerome Brunet				};
9238c0cf40fSJerome Brunet
9248c0cf40fSJerome Brunet				tdmc_sclk_slv_pins: tdmc_sclk_slv {
9258c0cf40fSJerome Brunet					mux {
9268c0cf40fSJerome Brunet						groups = "tdmc_sclk_slv";
9278c0cf40fSJerome Brunet						function = "tdmc";
9281c5cc1c8SJerome Brunet						bias-disable;
9298c0cf40fSJerome Brunet					};
9308c0cf40fSJerome Brunet				};
9318c0cf40fSJerome Brunet
9328c0cf40fSJerome Brunet				tdmc_din0_pins: tdmc_din0 {
9338c0cf40fSJerome Brunet					mux {
9348c0cf40fSJerome Brunet						groups = "tdmc_din0";
9358c0cf40fSJerome Brunet						function = "tdmc";
9361c5cc1c8SJerome Brunet						bias-disable;
9378c0cf40fSJerome Brunet					};
9388c0cf40fSJerome Brunet				};
9398c0cf40fSJerome Brunet
9408c0cf40fSJerome Brunet				tdmc_din1_pins: tdmc_din1 {
9418c0cf40fSJerome Brunet					mux {
9428c0cf40fSJerome Brunet						groups = "tdmc_din1";
9438c0cf40fSJerome Brunet						function = "tdmc";
9441c5cc1c8SJerome Brunet						bias-disable;
9458c0cf40fSJerome Brunet					};
9468c0cf40fSJerome Brunet				};
9478c0cf40fSJerome Brunet
9488c0cf40fSJerome Brunet				tdmc_din2_pins: tdmc_din2 {
9498c0cf40fSJerome Brunet					mux {
9508c0cf40fSJerome Brunet						groups = "tdmc_din2";
9518c0cf40fSJerome Brunet						function = "tdmc";
9521c5cc1c8SJerome Brunet						bias-disable;
9538c0cf40fSJerome Brunet					};
9548c0cf40fSJerome Brunet				};
9558c0cf40fSJerome Brunet
9568c0cf40fSJerome Brunet				tdmc_din3_pins: tdmc_din3 {
9578c0cf40fSJerome Brunet					mux {
9588c0cf40fSJerome Brunet						groups = "tdmc_din3";
9598c0cf40fSJerome Brunet						function = "tdmc";
9601c5cc1c8SJerome Brunet						bias-disable;
9618c0cf40fSJerome Brunet					};
9628c0cf40fSJerome Brunet				};
9638c0cf40fSJerome Brunet
9648c0cf40fSJerome Brunet				tdmc_dout0_pins: tdmc_dout0 {
9658c0cf40fSJerome Brunet					mux {
9668c0cf40fSJerome Brunet						groups = "tdmc_dout0";
9678c0cf40fSJerome Brunet						function = "tdmc";
9681c5cc1c8SJerome Brunet						bias-disable;
9698c0cf40fSJerome Brunet					};
9708c0cf40fSJerome Brunet				};
9718c0cf40fSJerome Brunet
9728c0cf40fSJerome Brunet				tdmc_dout1_pins: tdmc_dout1 {
9738c0cf40fSJerome Brunet					mux {
9748c0cf40fSJerome Brunet						groups = "tdmc_dout1";
9758c0cf40fSJerome Brunet						function = "tdmc";
9761c5cc1c8SJerome Brunet						bias-disable;
9778c0cf40fSJerome Brunet					};
9788c0cf40fSJerome Brunet				};
9798c0cf40fSJerome Brunet
9808c0cf40fSJerome Brunet				tdmc_dout2_pins: tdmc_dout2 {
9818c0cf40fSJerome Brunet					mux {
9828c0cf40fSJerome Brunet						groups = "tdmc_dout2";
9838c0cf40fSJerome Brunet						function = "tdmc";
9841c5cc1c8SJerome Brunet						bias-disable;
9858c0cf40fSJerome Brunet					};
9868c0cf40fSJerome Brunet				};
9878c0cf40fSJerome Brunet
9888c0cf40fSJerome Brunet				tdmc_dout3_pins: tdmc_dout3 {
9898c0cf40fSJerome Brunet					mux {
9908c0cf40fSJerome Brunet						groups = "tdmc_dout3";
9918c0cf40fSJerome Brunet						function = "tdmc";
9921c5cc1c8SJerome Brunet						bias-disable;
9938c0cf40fSJerome Brunet					};
9948c0cf40fSJerome Brunet				};
9958c0cf40fSJerome Brunet
9968c0cf40fSJerome Brunet				uart_a_pins: uart_a {
9978c0cf40fSJerome Brunet					mux {
9988c0cf40fSJerome Brunet						groups = "uart_tx_a",
9998c0cf40fSJerome Brunet							 "uart_rx_a";
10008c0cf40fSJerome Brunet						function = "uart_a";
10011c5cc1c8SJerome Brunet						bias-disable;
10028c0cf40fSJerome Brunet					};
10038c0cf40fSJerome Brunet				};
10048c0cf40fSJerome Brunet
10058c0cf40fSJerome Brunet				uart_a_cts_rts_pins: uart_a_cts_rts {
10068c0cf40fSJerome Brunet					mux {
10078c0cf40fSJerome Brunet						groups = "uart_cts_a",
10088c0cf40fSJerome Brunet							 "uart_rts_a";
10098c0cf40fSJerome Brunet						function = "uart_a";
10101c5cc1c8SJerome Brunet						bias-disable;
10118c0cf40fSJerome Brunet					};
10128c0cf40fSJerome Brunet				};
10138c0cf40fSJerome Brunet
10148c0cf40fSJerome Brunet				uart_b_x_pins: uart_b_x {
10158c0cf40fSJerome Brunet					mux {
10168c0cf40fSJerome Brunet						groups = "uart_tx_b_x",
10178c0cf40fSJerome Brunet							 "uart_rx_b_x";
10188c0cf40fSJerome Brunet						function = "uart_b";
10191c5cc1c8SJerome Brunet						bias-disable;
10208c0cf40fSJerome Brunet					};
10218c0cf40fSJerome Brunet				};
10228c0cf40fSJerome Brunet
10238c0cf40fSJerome Brunet				uart_b_x_cts_rts_pins: uart_b_x_cts_rts {
10248c0cf40fSJerome Brunet					mux {
10258c0cf40fSJerome Brunet						groups = "uart_cts_b_x",
10268c0cf40fSJerome Brunet							 "uart_rts_b_x";
10278c0cf40fSJerome Brunet						function = "uart_b";
10281c5cc1c8SJerome Brunet						bias-disable;
10298c0cf40fSJerome Brunet					};
10308c0cf40fSJerome Brunet				};
10318c0cf40fSJerome Brunet
10328c0cf40fSJerome Brunet				uart_b_z_pins: uart_b_z {
10338c0cf40fSJerome Brunet					mux {
10348c0cf40fSJerome Brunet						groups = "uart_tx_b_z",
10358c0cf40fSJerome Brunet							 "uart_rx_b_z";
10368c0cf40fSJerome Brunet						function = "uart_b";
10371c5cc1c8SJerome Brunet						bias-disable;
10388c0cf40fSJerome Brunet					};
10398c0cf40fSJerome Brunet				};
10408c0cf40fSJerome Brunet
10418c0cf40fSJerome Brunet				uart_b_z_cts_rts_pins: uart_b_z_cts_rts {
10428c0cf40fSJerome Brunet					mux {
10438c0cf40fSJerome Brunet						groups = "uart_cts_b_z",
10448c0cf40fSJerome Brunet							 "uart_rts_b_z";
10458c0cf40fSJerome Brunet						function = "uart_b";
10461c5cc1c8SJerome Brunet						bias-disable;
10478c0cf40fSJerome Brunet					};
10488c0cf40fSJerome Brunet				};
10498c0cf40fSJerome Brunet
10508c0cf40fSJerome Brunet				uart_ao_b_z_pins: uart_ao_b_z {
10518c0cf40fSJerome Brunet					mux {
10528c0cf40fSJerome Brunet						groups = "uart_ao_tx_b_z",
10538c0cf40fSJerome Brunet							 "uart_ao_rx_b_z";
10548c0cf40fSJerome Brunet						function = "uart_ao_b_z";
10551c5cc1c8SJerome Brunet						bias-disable;
10568c0cf40fSJerome Brunet					};
10578c0cf40fSJerome Brunet				};
10588c0cf40fSJerome Brunet
10598c0cf40fSJerome Brunet				uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts {
10608c0cf40fSJerome Brunet					mux {
10618c0cf40fSJerome Brunet						groups = "uart_ao_cts_b_z",
10628c0cf40fSJerome Brunet							 "uart_ao_rts_b_z";
10638c0cf40fSJerome Brunet						function = "uart_ao_b_z";
10641c5cc1c8SJerome Brunet						bias-disable;
10658c0cf40fSJerome Brunet					};
10668c0cf40fSJerome Brunet				};
10678c0cf40fSJerome Brunet			};
10688c0cf40fSJerome Brunet		};
10698c0cf40fSJerome Brunet
10708c0cf40fSJerome Brunet		hiubus: bus@ff63c000 {
10718c0cf40fSJerome Brunet			compatible = "simple-bus";
10728c0cf40fSJerome Brunet			reg = <0x0 0xff63c000 0x0 0x1c00>;
10738c0cf40fSJerome Brunet			#address-cells = <2>;
10748c0cf40fSJerome Brunet			#size-cells = <2>;
10758c0cf40fSJerome Brunet			ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
10768c0cf40fSJerome Brunet
10778c0cf40fSJerome Brunet			sysctrl: system-controller@0 {
10788c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-hhi-sysctrl",
1079445f2bdaSNeil Armstrong					     "simple-mfd", "syscon";
10808c0cf40fSJerome Brunet				reg = <0 0 0 0x400>;
10818c0cf40fSJerome Brunet
10828c0cf40fSJerome Brunet				clkc: clock-controller {
10838c0cf40fSJerome Brunet					compatible = "amlogic,axg-clkc";
10848c0cf40fSJerome Brunet					#clock-cells = <1>;
108516361ff2SJerome Brunet					clocks = <&xtal>;
108616361ff2SJerome Brunet					clock-names = "xtal";
10878c0cf40fSJerome Brunet				};
10888c0cf40fSJerome Brunet			};
10898c0cf40fSJerome Brunet		};
10908c0cf40fSJerome Brunet
10919fdff382SJerome Brunet		mailbox: mailbox@ff63c404 {
10928c0cf40fSJerome Brunet			compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
10939fdff382SJerome Brunet			reg = <0 0xff63c404 0 0x4c>;
10948c0cf40fSJerome Brunet			interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
10958c0cf40fSJerome Brunet				     <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
10968c0cf40fSJerome Brunet				     <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
10978c0cf40fSJerome Brunet			#mbox-cells = <1>;
1098221cf34bSNan Li		};
1099221cf34bSNan Li
11008909e722SJerome Brunet		audio: bus@ff642000 {
11018909e722SJerome Brunet			compatible = "simple-bus";
11028909e722SJerome Brunet			reg = <0x0 0xff642000 0x0 0x2000>;
11038909e722SJerome Brunet			#address-cells = <2>;
11048909e722SJerome Brunet			#size-cells = <2>;
11058909e722SJerome Brunet			ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>;
11068909e722SJerome Brunet
11078909e722SJerome Brunet			clkc_audio: clock-controller@0 {
11088909e722SJerome Brunet				compatible = "amlogic,axg-audio-clkc";
11098909e722SJerome Brunet				reg = <0x0 0x0 0x0 0xb4>;
11108909e722SJerome Brunet				#clock-cells = <1>;
11118909e722SJerome Brunet
11128909e722SJerome Brunet				clocks = <&clkc CLKID_AUDIO>,
11138909e722SJerome Brunet					 <&clkc CLKID_MPLL0>,
11148909e722SJerome Brunet					 <&clkc CLKID_MPLL1>,
11158909e722SJerome Brunet					 <&clkc CLKID_MPLL2>,
11168909e722SJerome Brunet					 <&clkc CLKID_MPLL3>,
11178909e722SJerome Brunet					 <&clkc CLKID_HIFI_PLL>,
11188909e722SJerome Brunet					 <&clkc CLKID_FCLK_DIV3>,
11198909e722SJerome Brunet					 <&clkc CLKID_FCLK_DIV4>,
11208909e722SJerome Brunet					 <&clkc CLKID_GP0_PLL>;
11218909e722SJerome Brunet				clock-names = "pclk",
11228909e722SJerome Brunet					      "mst_in0",
11238909e722SJerome Brunet					      "mst_in1",
11248909e722SJerome Brunet					      "mst_in2",
11258909e722SJerome Brunet					      "mst_in3",
11268909e722SJerome Brunet					      "mst_in4",
11278909e722SJerome Brunet					      "mst_in5",
11288909e722SJerome Brunet					      "mst_in6",
11298909e722SJerome Brunet					      "mst_in7";
11308909e722SJerome Brunet
11318909e722SJerome Brunet				resets = <&reset RESET_AUDIO>;
11328909e722SJerome Brunet			};
113366d58a8fSJerome Brunet
1134f2b8f6a9SJerome Brunet			toddr_a: audio-controller@100 {
1135f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-toddr";
1136f2b8f6a9SJerome Brunet				reg = <0x0 0x100 0x0 0x1c>;
1137f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1138f2b8f6a9SJerome Brunet				sound-name-prefix = "TODDR_A";
1139f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>;
1140f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
1141f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_TODDR_A>;
1142f2b8f6a9SJerome Brunet				status = "disabled";
1143f2b8f6a9SJerome Brunet			};
1144f2b8f6a9SJerome Brunet
1145f2b8f6a9SJerome Brunet			toddr_b: audio-controller@140 {
1146f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-toddr";
1147f2b8f6a9SJerome Brunet				reg = <0x0 0x140 0x0 0x1c>;
1148f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1149f2b8f6a9SJerome Brunet				sound-name-prefix = "TODDR_B";
1150f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>;
1151f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
1152f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_TODDR_B>;
1153f2b8f6a9SJerome Brunet				status = "disabled";
1154f2b8f6a9SJerome Brunet			};
1155f2b8f6a9SJerome Brunet
1156f2b8f6a9SJerome Brunet			toddr_c: audio-controller@180 {
1157f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-toddr";
1158f2b8f6a9SJerome Brunet				reg = <0x0 0x180 0x0 0x1c>;
1159f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1160f2b8f6a9SJerome Brunet				sound-name-prefix = "TODDR_C";
1161f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>;
1162f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
1163f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_TODDR_C>;
1164f2b8f6a9SJerome Brunet				status = "disabled";
1165f2b8f6a9SJerome Brunet			};
1166f2b8f6a9SJerome Brunet
1167f2b8f6a9SJerome Brunet			frddr_a: audio-controller@1c0 {
1168f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-frddr";
1169f2b8f6a9SJerome Brunet				reg = <0x0 0x1c0 0x0 0x1c>;
1170f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1171f2b8f6a9SJerome Brunet				sound-name-prefix = "FRDDR_A";
1172f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
1173f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
1174f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_FRDDR_A>;
1175f2b8f6a9SJerome Brunet				status = "disabled";
1176f2b8f6a9SJerome Brunet			};
1177f2b8f6a9SJerome Brunet
1178f2b8f6a9SJerome Brunet			frddr_b: audio-controller@200 {
1179f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-frddr";
1180f2b8f6a9SJerome Brunet				reg = <0x0 0x200 0x0 0x1c>;
1181f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1182f2b8f6a9SJerome Brunet				sound-name-prefix = "FRDDR_B";
1183f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
1184f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
1185f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_FRDDR_B>;
1186f2b8f6a9SJerome Brunet				status = "disabled";
1187f2b8f6a9SJerome Brunet			};
1188f2b8f6a9SJerome Brunet
1189f2b8f6a9SJerome Brunet			frddr_c: audio-controller@240 {
1190f2b8f6a9SJerome Brunet				compatible = "amlogic,axg-frddr";
1191f2b8f6a9SJerome Brunet				reg = <0x0 0x240 0x0 0x1c>;
1192f2b8f6a9SJerome Brunet				#sound-dai-cells = <0>;
1193f2b8f6a9SJerome Brunet				sound-name-prefix = "FRDDR_C";
1194f2b8f6a9SJerome Brunet				interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
1195f2b8f6a9SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
1196f2b8f6a9SJerome Brunet				resets = <&arb AXG_ARB_FRDDR_C>;
1197f2b8f6a9SJerome Brunet				status = "disabled";
1198f2b8f6a9SJerome Brunet			};
1199f2b8f6a9SJerome Brunet
120066d58a8fSJerome Brunet			arb: reset-controller@280 {
120166d58a8fSJerome Brunet				compatible = "amlogic,meson-axg-audio-arb";
120266d58a8fSJerome Brunet				reg = <0x0 0x280 0x0 0x4>;
120366d58a8fSJerome Brunet				#reset-cells = <1>;
120466d58a8fSJerome Brunet				clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
120566d58a8fSJerome Brunet			};
1206f08c52deSJerome Brunet
1207bf8e4790SJerome Brunet			tdmin_a: audio-controller@300 {
1208bf8e4790SJerome Brunet				compatible = "amlogic,axg-tdmin";
1209bf8e4790SJerome Brunet				reg = <0x0 0x300 0x0 0x40>;
1210bf8e4790SJerome Brunet				sound-name-prefix = "TDMIN_A";
1211bf8e4790SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
1212bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
1213bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
1214bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
1215bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
1216bf8e4790SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1217bf8e4790SJerome Brunet					      "lrclk", "lrclk_sel";
1218bf8e4790SJerome Brunet				status = "disabled";
1219bf8e4790SJerome Brunet			};
1220bf8e4790SJerome Brunet
1221bf8e4790SJerome Brunet			tdmin_b: audio-controller@340 {
1222bf8e4790SJerome Brunet				compatible = "amlogic,axg-tdmin";
1223bf8e4790SJerome Brunet				reg = <0x0 0x340 0x0 0x40>;
1224bf8e4790SJerome Brunet				sound-name-prefix = "TDMIN_B";
1225bf8e4790SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
1226bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
1227bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
1228bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
1229bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
1230bf8e4790SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1231bf8e4790SJerome Brunet					      "lrclk", "lrclk_sel";
1232bf8e4790SJerome Brunet				status = "disabled";
1233bf8e4790SJerome Brunet			};
1234bf8e4790SJerome Brunet
1235bf8e4790SJerome Brunet			tdmin_c: audio-controller@380 {
1236bf8e4790SJerome Brunet				compatible = "amlogic,axg-tdmin";
1237bf8e4790SJerome Brunet				reg = <0x0 0x380 0x0 0x40>;
1238bf8e4790SJerome Brunet				sound-name-prefix = "TDMIN_C";
1239bf8e4790SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
1240bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
1241bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
1242bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
1243bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
1244bf8e4790SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1245bf8e4790SJerome Brunet					      "lrclk", "lrclk_sel";
1246bf8e4790SJerome Brunet				status = "disabled";
1247bf8e4790SJerome Brunet			};
1248bf8e4790SJerome Brunet
1249bf8e4790SJerome Brunet			tdmin_lb: audio-controller@3c0 {
1250bf8e4790SJerome Brunet				compatible = "amlogic,axg-tdmin";
1251bf8e4790SJerome Brunet				reg = <0x0 0x3c0 0x0 0x40>;
1252bf8e4790SJerome Brunet				sound-name-prefix = "TDMIN_LB";
1253bf8e4790SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
1254bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
1255bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
1256bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
1257bf8e4790SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
1258bf8e4790SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1259bf8e4790SJerome Brunet					      "lrclk", "lrclk_sel";
1260bf8e4790SJerome Brunet				status = "disabled";
1261bf8e4790SJerome Brunet			};
1262bf8e4790SJerome Brunet
12635e6a18acSJerome Brunet			spdifin: audio-controller@400 {
12645e6a18acSJerome Brunet				compatible = "amlogic,axg-spdifin";
12655e6a18acSJerome Brunet				reg = <0x0 0x400 0x0 0x30>;
12665e6a18acSJerome Brunet				#sound-dai-cells = <0>;
12675e6a18acSJerome Brunet				sound-name-prefix = "SPDIFIN";
12685e6a18acSJerome Brunet				interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
12695e6a18acSJerome Brunet				clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
12705e6a18acSJerome Brunet					 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
12715e6a18acSJerome Brunet				clock-names = "pclk", "refclk";
12725e6a18acSJerome Brunet				status = "disabled";
12735e6a18acSJerome Brunet			};
12745e6a18acSJerome Brunet
1275f08c52deSJerome Brunet			spdifout: audio-controller@480 {
1276f08c52deSJerome Brunet				compatible = "amlogic,axg-spdifout";
1277f08c52deSJerome Brunet				reg = <0x0 0x480 0x0 0x50>;
1278f08c52deSJerome Brunet				#sound-dai-cells = <0>;
1279f08c52deSJerome Brunet				sound-name-prefix = "SPDIFOUT";
1280f08c52deSJerome Brunet				clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
1281f08c52deSJerome Brunet					 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
1282f08c52deSJerome Brunet				clock-names = "pclk", "mclk";
1283f08c52deSJerome Brunet				status = "disabled";
1284f08c52deSJerome Brunet			};
1285fd916739SJerome Brunet
1286fd916739SJerome Brunet			tdmout_a: audio-controller@500 {
1287fd916739SJerome Brunet				compatible = "amlogic,axg-tdmout";
1288fd916739SJerome Brunet				reg = <0x0 0x500 0x0 0x40>;
1289fd916739SJerome Brunet				sound-name-prefix = "TDMOUT_A";
1290fd916739SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
1291fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
1292fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
1293fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
1294fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
1295fd916739SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1296fd916739SJerome Brunet					      "lrclk", "lrclk_sel";
1297fd916739SJerome Brunet				status = "disabled";
1298fd916739SJerome Brunet			};
1299fd916739SJerome Brunet
1300fd916739SJerome Brunet			tdmout_b: audio-controller@540 {
1301fd916739SJerome Brunet				compatible = "amlogic,axg-tdmout";
1302fd916739SJerome Brunet				reg = <0x0 0x540 0x0 0x40>;
1303fd916739SJerome Brunet				sound-name-prefix = "TDMOUT_B";
1304fd916739SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
1305fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
1306fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
1307fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
1308fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
1309fd916739SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1310fd916739SJerome Brunet					      "lrclk", "lrclk_sel";
1311fd916739SJerome Brunet				status = "disabled";
1312fd916739SJerome Brunet			};
1313fd916739SJerome Brunet
1314fd916739SJerome Brunet			tdmout_c: audio-controller@580 {
1315fd916739SJerome Brunet				compatible = "amlogic,axg-tdmout";
1316fd916739SJerome Brunet				reg = <0x0 0x580 0x0 0x40>;
1317fd916739SJerome Brunet				sound-name-prefix = "TDMOUT_C";
1318fd916739SJerome Brunet				clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
1319fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
1320fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
1321fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
1322fd916739SJerome Brunet					 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
1323fd916739SJerome Brunet				clock-names = "pclk", "sclk", "sclk_sel",
1324fd916739SJerome Brunet					      "lrclk", "lrclk_sel";
1325fd916739SJerome Brunet				status = "disabled";
1326fd916739SJerome Brunet			};
13278909e722SJerome Brunet		};
13288909e722SJerome Brunet
13290cb6c604SKevin Hilman		aobus: bus@ff800000 {
13309d59b708SYixun Lan			compatible = "simple-bus";
13319d59b708SYixun Lan			reg = <0x0 0xff800000 0x0 0x100000>;
13329d59b708SYixun Lan			#address-cells = <2>;
13339d59b708SYixun Lan			#size-cells = <2>;
13349d59b708SYixun Lan			ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
13359d59b708SYixun Lan
1336e03421ecSQiufang Dai			sysctrl_AO: sys-ctrl@0 {
1337445f2bdaSNeil Armstrong				compatible = "amlogic,meson-axg-ao-sysctrl", "simple-mfd", "syscon";
1338e03421ecSQiufang Dai				reg =  <0x0 0x0 0x0 0x100>;
1339e03421ecSQiufang Dai
1340e03421ecSQiufang Dai				clkc_AO: clock-controller {
1341e03421ecSQiufang Dai					compatible = "amlogic,meson-axg-aoclkc";
1342e03421ecSQiufang Dai					#clock-cells = <1>;
1343e03421ecSQiufang Dai					#reset-cells = <1>;
134416361ff2SJerome Brunet					clocks = <&xtal>, <&clkc CLKID_CLK81>;
134516361ff2SJerome Brunet					clock-names = "xtal", "mpeg-clk";
1346e03421ecSQiufang Dai				};
1347e03421ecSQiufang Dai			};
1348e03421ecSQiufang Dai
1349de05ded6SXingyu Chen			pinctrl_aobus: pinctrl@14 {
1350de05ded6SXingyu Chen				compatible = "amlogic,meson-axg-aobus-pinctrl";
1351de05ded6SXingyu Chen				#address-cells = <2>;
1352de05ded6SXingyu Chen				#size-cells = <2>;
1353de05ded6SXingyu Chen				ranges;
1354de05ded6SXingyu Chen
1355de05ded6SXingyu Chen				gpio_ao: bank@14 {
1356de05ded6SXingyu Chen					reg = <0x0 0x00014 0x0 0x8>,
1357de05ded6SXingyu Chen					      <0x0 0x0002c 0x0 0x4>,
1358de05ded6SXingyu Chen					      <0x0 0x00024 0x0 0x8>;
1359de05ded6SXingyu Chen					reg-names = "mux", "pull", "gpio";
1360de05ded6SXingyu Chen					gpio-controller;
1361de05ded6SXingyu Chen					#gpio-cells = <2>;
1362de05ded6SXingyu Chen					gpio-ranges = <&pinctrl_aobus 0 0 15>;
1363de05ded6SXingyu Chen				};
13647bd46a79SYixun Lan
1365c054b6c2SJerome Brunet				i2c_ao_sck_4_pins: i2c_ao_sck_4 {
1366c054b6c2SJerome Brunet					mux {
1367c054b6c2SJerome Brunet						groups = "i2c_ao_sck_4";
1368c054b6c2SJerome Brunet						function = "i2c_ao";
13691c5cc1c8SJerome Brunet						bias-disable;
1370c054b6c2SJerome Brunet					};
1371c054b6c2SJerome Brunet				};
1372c054b6c2SJerome Brunet
1373c054b6c2SJerome Brunet				i2c_ao_sck_8_pins: i2c_ao_sck_8 {
1374c054b6c2SJerome Brunet					mux {
1375c054b6c2SJerome Brunet						groups = "i2c_ao_sck_8";
1376c054b6c2SJerome Brunet						function = "i2c_ao";
13771c5cc1c8SJerome Brunet						bias-disable;
1378c054b6c2SJerome Brunet					};
1379c054b6c2SJerome Brunet				};
1380c054b6c2SJerome Brunet
1381c054b6c2SJerome Brunet				i2c_ao_sck_10_pins: i2c_ao_sck_10 {
1382c054b6c2SJerome Brunet					mux {
1383c054b6c2SJerome Brunet						groups = "i2c_ao_sck_10";
1384c054b6c2SJerome Brunet						function = "i2c_ao";
13851c5cc1c8SJerome Brunet						bias-disable;
1386c054b6c2SJerome Brunet					};
1387c054b6c2SJerome Brunet				};
1388c054b6c2SJerome Brunet
1389c054b6c2SJerome Brunet				i2c_ao_sda_5_pins: i2c_ao_sda_5 {
1390c054b6c2SJerome Brunet					mux {
1391c054b6c2SJerome Brunet						groups = "i2c_ao_sda_5";
1392c054b6c2SJerome Brunet						function = "i2c_ao";
13931c5cc1c8SJerome Brunet						bias-disable;
1394c054b6c2SJerome Brunet					};
1395c054b6c2SJerome Brunet				};
1396c054b6c2SJerome Brunet
1397c054b6c2SJerome Brunet				i2c_ao_sda_9_pins: i2c_ao_sda_9 {
1398c054b6c2SJerome Brunet					mux {
1399c054b6c2SJerome Brunet						groups = "i2c_ao_sda_9";
1400c054b6c2SJerome Brunet						function = "i2c_ao";
14011c5cc1c8SJerome Brunet						bias-disable;
1402c054b6c2SJerome Brunet					};
1403c054b6c2SJerome Brunet				};
1404c054b6c2SJerome Brunet
1405c054b6c2SJerome Brunet				i2c_ao_sda_11_pins: i2c_ao_sda_11 {
1406c054b6c2SJerome Brunet					mux {
1407c054b6c2SJerome Brunet						groups = "i2c_ao_sda_11";
1408c054b6c2SJerome Brunet						function = "i2c_ao";
14091c5cc1c8SJerome Brunet						bias-disable;
1410c054b6c2SJerome Brunet					};
1411c054b6c2SJerome Brunet				};
1412c054b6c2SJerome Brunet
14137bd46a79SYixun Lan				remote_input_ao_pins: remote_input_ao {
14147bd46a79SYixun Lan					mux {
14157bd46a79SYixun Lan						groups = "remote_input_ao";
14167bd46a79SYixun Lan						function = "remote_input_ao";
14171c5cc1c8SJerome Brunet						bias-disable;
14187bd46a79SYixun Lan					};
14197bd46a79SYixun Lan				};
14204eae66a6SYixun Lan
14214eae66a6SYixun Lan				uart_ao_a_pins: uart_ao_a {
14224eae66a6SYixun Lan					mux {
14234eae66a6SYixun Lan						groups = "uart_ao_tx_a",
14244eae66a6SYixun Lan							 "uart_ao_rx_a";
14254eae66a6SYixun Lan						function = "uart_ao_a";
14261c5cc1c8SJerome Brunet						bias-disable;
14274eae66a6SYixun Lan					};
14284eae66a6SYixun Lan				};
14294eae66a6SYixun Lan
14304eae66a6SYixun Lan				uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
14314eae66a6SYixun Lan					mux {
14324eae66a6SYixun Lan						groups = "uart_ao_cts_a",
14334eae66a6SYixun Lan							 "uart_ao_rts_a";
14344eae66a6SYixun Lan						function = "uart_ao_a";
14351c5cc1c8SJerome Brunet						bias-disable;
14364eae66a6SYixun Lan					};
14374eae66a6SYixun Lan				};
14384eae66a6SYixun Lan
14394eae66a6SYixun Lan				uart_ao_b_pins: uart_ao_b {
14404eae66a6SYixun Lan					mux {
14414eae66a6SYixun Lan						groups = "uart_ao_tx_b",
14424eae66a6SYixun Lan							 "uart_ao_rx_b";
14434eae66a6SYixun Lan						function = "uart_ao_b";
14441c5cc1c8SJerome Brunet						bias-disable;
14454eae66a6SYixun Lan					};
14464eae66a6SYixun Lan				};
14474eae66a6SYixun Lan
14484eae66a6SYixun Lan				uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
14494eae66a6SYixun Lan					mux {
14504eae66a6SYixun Lan						groups = "uart_ao_cts_b",
14514eae66a6SYixun Lan							 "uart_ao_rts_b";
14524eae66a6SYixun Lan						function = "uart_ao_b";
14531c5cc1c8SJerome Brunet						bias-disable;
14544eae66a6SYixun Lan					};
14554eae66a6SYixun Lan				};
1456de05ded6SXingyu Chen			};
1457de05ded6SXingyu Chen
1458a04c18cbSJerome Brunet			sec_AO: ao-secure@140 {
1459a04c18cbSJerome Brunet				compatible = "amlogic,meson-gx-ao-secure", "syscon";
1460a04c18cbSJerome Brunet				reg = <0x0 0x140 0x0 0x140>;
1461a04c18cbSJerome Brunet				amlogic,has-chip-id;
1462a04c18cbSJerome Brunet			};
1463a04c18cbSJerome Brunet
14644a81e5ddSJian Hu			pwm_AO_cd: pwm@2000 {
1465b4ff05caSJerome Brunet				compatible = "amlogic,meson-axg-ao-pwm";
14664a81e5ddSJian Hu				reg = <0x0 0x02000  0x0 0x20>;
14674a81e5ddSJian Hu				#pwm-cells = <3>;
14684a81e5ddSJian Hu				status = "disabled";
14694a81e5ddSJian Hu			};
14704a81e5ddSJian Hu
14719d59b708SYixun Lan			uart_AO: serial@3000 {
14729d59b708SYixun Lan				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
14739d59b708SYixun Lan				reg = <0x0 0x3000 0x0 0x18>;
14749d59b708SYixun Lan				interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
14759adda353SYixun Lan				clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
14769d59b708SYixun Lan				clock-names = "xtal", "pclk", "baud";
14779d59b708SYixun Lan				status = "disabled";
14789d59b708SYixun Lan			};
14799d59b708SYixun Lan
14809d59b708SYixun Lan			uart_AO_B: serial@4000 {
14819d59b708SYixun Lan				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
14829d59b708SYixun Lan				reg = <0x0 0x4000 0x0 0x18>;
14839d59b708SYixun Lan				interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
14849adda353SYixun Lan				clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
14859d59b708SYixun Lan				clock-names = "xtal", "pclk", "baud";
14869d59b708SYixun Lan				status = "disabled";
14879d59b708SYixun Lan			};
14887bd46a79SYixun Lan
14898c0cf40fSJerome Brunet			i2c_AO: i2c@5000 {
14908c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
14918c0cf40fSJerome Brunet				reg = <0x0 0x05000 0x0 0x20>;
14928c0cf40fSJerome Brunet				interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
14938c0cf40fSJerome Brunet				clocks = <&clkc CLKID_AO_I2C>;
14948c0cf40fSJerome Brunet				#address-cells = <1>;
14958c0cf40fSJerome Brunet				#size-cells = <0>;
14968c0cf40fSJerome Brunet				status = "disabled";
14978c0cf40fSJerome Brunet			};
14988c0cf40fSJerome Brunet
14998c0cf40fSJerome Brunet			pwm_AO_ab: pwm@7000 {
15008c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-ao-pwm";
15018c0cf40fSJerome Brunet				reg = <0x0 0x07000 0x0 0x20>;
15028c0cf40fSJerome Brunet				#pwm-cells = <3>;
15038c0cf40fSJerome Brunet				status = "disabled";
15048c0cf40fSJerome Brunet			};
15058c0cf40fSJerome Brunet
15067bd46a79SYixun Lan			ir: ir@8000 {
15077bd46a79SYixun Lan				compatible = "amlogic,meson-gxbb-ir";
15087bd46a79SYixun Lan				reg = <0x0 0x8000 0x0 0x20>;
15097bd46a79SYixun Lan				interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
15107bd46a79SYixun Lan				status = "disabled";
15117bd46a79SYixun Lan			};
1512a51b74eaSXingyu Chen
1513a51b74eaSXingyu Chen			saradc: adc@9000 {
1514a51b74eaSXingyu Chen				compatible = "amlogic,meson-axg-saradc",
1515a51b74eaSXingyu Chen					"amlogic,meson-saradc";
1516a51b74eaSXingyu Chen				reg = <0x0 0x9000 0x0 0x38>;
1517a51b74eaSXingyu Chen				#io-channel-cells = <1>;
1518a51b74eaSXingyu Chen				interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
1519a51b74eaSXingyu Chen				clocks = <&xtal>,
1520a51b74eaSXingyu Chen					 <&clkc_AO CLKID_AO_SAR_ADC>,
1521a51b74eaSXingyu Chen					 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
1522a51b74eaSXingyu Chen					 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
1523a51b74eaSXingyu Chen				clock-names = "clkin", "core", "adc_clk", "adc_sel";
1524a51b74eaSXingyu Chen				status = "disabled";
1525a51b74eaSXingyu Chen			};
15269d59b708SYixun Lan		};
15278c0cf40fSJerome Brunet
15288c0cf40fSJerome Brunet		gic: interrupt-controller@ffc01000 {
15298c0cf40fSJerome Brunet			compatible = "arm,gic-400";
15308c0cf40fSJerome Brunet			reg = <0x0 0xffc01000 0 0x1000>,
15318c0cf40fSJerome Brunet			      <0x0 0xffc02000 0 0x2000>,
15328c0cf40fSJerome Brunet			      <0x0 0xffc04000 0 0x2000>,
15338c0cf40fSJerome Brunet			      <0x0 0xffc06000 0 0x2000>;
15348c0cf40fSJerome Brunet			interrupt-controller;
15358c0cf40fSJerome Brunet			interrupts = <GIC_PPI 9
15368c0cf40fSJerome Brunet				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
15378c0cf40fSJerome Brunet			#interrupt-cells = <3>;
15388c0cf40fSJerome Brunet			#address-cells = <0>;
15398c0cf40fSJerome Brunet		};
15408c0cf40fSJerome Brunet
15418c0cf40fSJerome Brunet		cbus: bus@ffd00000 {
15428c0cf40fSJerome Brunet			compatible = "simple-bus";
15438c0cf40fSJerome Brunet			reg = <0x0 0xffd00000 0x0 0x25000>;
15448c0cf40fSJerome Brunet			#address-cells = <2>;
15458c0cf40fSJerome Brunet			#size-cells = <2>;
15468c0cf40fSJerome Brunet			ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>;
15478c0cf40fSJerome Brunet
15488c0cf40fSJerome Brunet			reset: reset-controller@1004 {
15498c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-reset";
15508c0cf40fSJerome Brunet				reg = <0x0 0x01004 0x0 0x9c>;
15518c0cf40fSJerome Brunet				#reset-cells = <1>;
15528c0cf40fSJerome Brunet			};
15538c0cf40fSJerome Brunet
15548c0cf40fSJerome Brunet			gpio_intc: interrupt-controller@f080 {
1555cbddb02eSCarlo Caione				compatible = "amlogic,meson-axg-gpio-intc",
1556cbddb02eSCarlo Caione					     "amlogic,meson-gpio-intc";
15578c0cf40fSJerome Brunet				reg = <0x0 0xf080 0x0 0x10>;
15588c0cf40fSJerome Brunet				interrupt-controller;
15598c0cf40fSJerome Brunet				#interrupt-cells = <2>;
15608c0cf40fSJerome Brunet				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
15618c0cf40fSJerome Brunet			};
15628c0cf40fSJerome Brunet
15636f31ba17SCarlo Caione			watchdog@f0d0 {
15646f31ba17SCarlo Caione				compatible = "amlogic,meson-gxbb-wdt";
15656f31ba17SCarlo Caione				reg = <0x0 0xf0d0 0x0 0x10>;
15666f31ba17SCarlo Caione				clocks = <&xtal>;
15676f31ba17SCarlo Caione			};
15686f31ba17SCarlo Caione
15698c0cf40fSJerome Brunet			pwm_ab: pwm@1b000 {
15708c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-ee-pwm";
15718c0cf40fSJerome Brunet				reg = <0x0 0x1b000 0x0 0x20>;
15728c0cf40fSJerome Brunet				#pwm-cells = <3>;
15738c0cf40fSJerome Brunet				status = "disabled";
15748c0cf40fSJerome Brunet			};
15758c0cf40fSJerome Brunet
15768c0cf40fSJerome Brunet			pwm_cd: pwm@1a000 {
15778c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-ee-pwm";
15788c0cf40fSJerome Brunet				reg = <0x0 0x1a000 0x0 0x20>;
15798c0cf40fSJerome Brunet				#pwm-cells = <3>;
15808c0cf40fSJerome Brunet				status = "disabled";
15818c0cf40fSJerome Brunet			};
15828c0cf40fSJerome Brunet
15838c0cf40fSJerome Brunet			spicc0: spi@13000 {
15848c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-spicc";
15858c0cf40fSJerome Brunet				reg = <0x0 0x13000 0x0 0x3c>;
15868c0cf40fSJerome Brunet				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
15878c0cf40fSJerome Brunet				clocks = <&clkc CLKID_SPICC0>;
15888c0cf40fSJerome Brunet				clock-names = "core";
15898c0cf40fSJerome Brunet				#address-cells = <1>;
15908c0cf40fSJerome Brunet				#size-cells = <0>;
15918c0cf40fSJerome Brunet				status = "disabled";
15928c0cf40fSJerome Brunet			};
15938c0cf40fSJerome Brunet
15948c0cf40fSJerome Brunet			spicc1: spi@15000 {
15958c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-spicc";
15968c0cf40fSJerome Brunet				reg = <0x0 0x15000 0x0 0x3c>;
15978c0cf40fSJerome Brunet				interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
15988c0cf40fSJerome Brunet				clocks = <&clkc CLKID_SPICC1>;
15998c0cf40fSJerome Brunet				clock-names = "core";
16008c0cf40fSJerome Brunet				#address-cells = <1>;
16018c0cf40fSJerome Brunet				#size-cells = <0>;
16028c0cf40fSJerome Brunet				status = "disabled";
16038c0cf40fSJerome Brunet			};
16048c0cf40fSJerome Brunet
16058c0cf40fSJerome Brunet			i2c3: i2c@1c000 {
16068c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
16078c0cf40fSJerome Brunet				reg = <0x0 0x1c000 0x0 0x20>;
16088c0cf40fSJerome Brunet				interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
16098c0cf40fSJerome Brunet				clocks = <&clkc CLKID_I2C>;
16108c0cf40fSJerome Brunet				#address-cells = <1>;
16118c0cf40fSJerome Brunet				#size-cells = <0>;
16128c0cf40fSJerome Brunet				status = "disabled";
16138c0cf40fSJerome Brunet			};
16148c0cf40fSJerome Brunet
16158c0cf40fSJerome Brunet			i2c2: i2c@1d000 {
16168c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
16178c0cf40fSJerome Brunet				reg = <0x0 0x1d000 0x0 0x20>;
16188c0cf40fSJerome Brunet				interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
16198c0cf40fSJerome Brunet				clocks = <&clkc CLKID_I2C>;
16208c0cf40fSJerome Brunet				#address-cells = <1>;
16218c0cf40fSJerome Brunet				#size-cells = <0>;
16228c0cf40fSJerome Brunet				status = "disabled";
16238c0cf40fSJerome Brunet			};
16248c0cf40fSJerome Brunet
16258c0cf40fSJerome Brunet			i2c1: i2c@1e000 {
16268c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
16278c0cf40fSJerome Brunet				reg = <0x0 0x1e000 0x0 0x20>;
16288c0cf40fSJerome Brunet				interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
16298c0cf40fSJerome Brunet				clocks = <&clkc CLKID_I2C>;
16308c0cf40fSJerome Brunet				#address-cells = <1>;
16318c0cf40fSJerome Brunet				#size-cells = <0>;
16328c0cf40fSJerome Brunet				status = "disabled";
16338c0cf40fSJerome Brunet			};
16348c0cf40fSJerome Brunet
16358c0cf40fSJerome Brunet			i2c0: i2c@1f000 {
16368c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-i2c";
16378c0cf40fSJerome Brunet				reg = <0x0 0x1f000 0x0 0x20>;
16388c0cf40fSJerome Brunet				interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
16398c0cf40fSJerome Brunet				clocks = <&clkc CLKID_I2C>;
16408c0cf40fSJerome Brunet				#address-cells = <1>;
16418c0cf40fSJerome Brunet				#size-cells = <0>;
16428c0cf40fSJerome Brunet				status = "disabled";
16438c0cf40fSJerome Brunet			};
16448c0cf40fSJerome Brunet
16458c0cf40fSJerome Brunet			uart_B: serial@23000 {
16468c0cf40fSJerome Brunet				compatible = "amlogic,meson-gx-uart";
16478c0cf40fSJerome Brunet				reg = <0x0 0x23000 0x0 0x18>;
16488c0cf40fSJerome Brunet				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
16498c0cf40fSJerome Brunet				status = "disabled";
16508c0cf40fSJerome Brunet				clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
16518c0cf40fSJerome Brunet				clock-names = "xtal", "pclk", "baud";
16528c0cf40fSJerome Brunet			};
16538c0cf40fSJerome Brunet
16548c0cf40fSJerome Brunet			uart_A: serial@24000 {
16558c0cf40fSJerome Brunet				compatible = "amlogic,meson-gx-uart";
16568c0cf40fSJerome Brunet				reg = <0x0 0x24000 0x0 0x18>;
16578c0cf40fSJerome Brunet				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
16588c0cf40fSJerome Brunet				status = "disabled";
16598c0cf40fSJerome Brunet				clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
16608c0cf40fSJerome Brunet				clock-names = "xtal", "pclk", "baud";
16618c0cf40fSJerome Brunet			};
16628c0cf40fSJerome Brunet		};
16638c0cf40fSJerome Brunet
16648c0cf40fSJerome Brunet		apb: bus@ffe00000 {
16658c0cf40fSJerome Brunet			compatible = "simple-bus";
16668c0cf40fSJerome Brunet			reg = <0x0 0xffe00000 0x0 0x200000>;
16678c0cf40fSJerome Brunet			#address-cells = <2>;
16688c0cf40fSJerome Brunet			#size-cells = <2>;
16698c0cf40fSJerome Brunet			ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>;
16708c0cf40fSJerome Brunet
16718c0cf40fSJerome Brunet			sd_emmc_b: sd@5000 {
16728c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-mmc";
16738c0cf40fSJerome Brunet				reg = <0x0 0x5000 0x0 0x800>;
16748c0cf40fSJerome Brunet				interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
16758c0cf40fSJerome Brunet				status = "disabled";
16768c0cf40fSJerome Brunet				clocks = <&clkc CLKID_SD_EMMC_B>,
16778c0cf40fSJerome Brunet					<&clkc CLKID_SD_EMMC_B_CLK0>,
16788c0cf40fSJerome Brunet					<&clkc CLKID_FCLK_DIV2>;
16798c0cf40fSJerome Brunet				clock-names = "core", "clkin0", "clkin1";
16808c0cf40fSJerome Brunet				resets = <&reset RESET_SD_EMMC_B>;
16818c0cf40fSJerome Brunet			};
16828c0cf40fSJerome Brunet
16838c0cf40fSJerome Brunet			sd_emmc_c: mmc@7000 {
16848c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-mmc";
16858c0cf40fSJerome Brunet				reg = <0x0 0x7000 0x0 0x800>;
16868c0cf40fSJerome Brunet				interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
16878c0cf40fSJerome Brunet				status = "disabled";
16888c0cf40fSJerome Brunet				clocks = <&clkc CLKID_SD_EMMC_C>,
16898c0cf40fSJerome Brunet					<&clkc CLKID_SD_EMMC_C_CLK0>,
16908c0cf40fSJerome Brunet					<&clkc CLKID_FCLK_DIV2>;
16918c0cf40fSJerome Brunet				clock-names = "core", "clkin0", "clkin1";
16928c0cf40fSJerome Brunet				resets = <&reset RESET_SD_EMMC_C>;
16938c0cf40fSJerome Brunet			};
16948c0cf40fSJerome Brunet		};
16958c0cf40fSJerome Brunet
16968c0cf40fSJerome Brunet		sram: sram@fffc0000 {
16978c0cf40fSJerome Brunet			compatible = "amlogic,meson-axg-sram", "mmio-sram";
16988c0cf40fSJerome Brunet			reg = <0x0 0xfffc0000 0x0 0x20000>;
16998c0cf40fSJerome Brunet			#address-cells = <1>;
17008c0cf40fSJerome Brunet			#size-cells = <1>;
17018c0cf40fSJerome Brunet			ranges = <0 0x0 0xfffc0000 0x20000>;
17028c0cf40fSJerome Brunet
17039c2d16bbSJerome Brunet			cpu_scp_lpri: scp-shmem@13000 {
17048c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-scp-shmem";
17058c0cf40fSJerome Brunet				reg = <0x13000 0x400>;
17068c0cf40fSJerome Brunet			};
17078c0cf40fSJerome Brunet
17089c2d16bbSJerome Brunet			cpu_scp_hpri: scp-shmem@13400 {
17098c0cf40fSJerome Brunet				compatible = "amlogic,meson-axg-scp-shmem";
17108c0cf40fSJerome Brunet				reg = <0x13400 0x400>;
17118c0cf40fSJerome Brunet			};
17128c0cf40fSJerome Brunet		};
17138c0cf40fSJerome Brunet	};
17148c0cf40fSJerome Brunet
17158c0cf40fSJerome Brunet	timer {
17168c0cf40fSJerome Brunet		compatible = "arm,armv8-timer";
17178c0cf40fSJerome Brunet		interrupts = <GIC_PPI 13
17188c0cf40fSJerome Brunet			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
17198c0cf40fSJerome Brunet			     <GIC_PPI 14
17208c0cf40fSJerome Brunet			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
17218c0cf40fSJerome Brunet			     <GIC_PPI 11
17228c0cf40fSJerome Brunet			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
17238c0cf40fSJerome Brunet			     <GIC_PPI 10
17248c0cf40fSJerome Brunet			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
17258c0cf40fSJerome Brunet	};
17268c0cf40fSJerome Brunet
17278c0cf40fSJerome Brunet	xtal: xtal-clk {
17288c0cf40fSJerome Brunet		compatible = "fixed-clock";
17298c0cf40fSJerome Brunet		clock-frequency = <24000000>;
17308c0cf40fSJerome Brunet		clock-output-names = "xtal";
17318c0cf40fSJerome Brunet		#clock-cells = <0>;
17329d59b708SYixun Lan	};
17339d59b708SYixun Lan};
1734