1114abfe1SNeil Armstrong// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 29d59b708SYixun Lan/* 39d59b708SYixun Lan * Copyright (c) 2017 Amlogic, Inc. All rights reserved. 49d59b708SYixun Lan */ 59d59b708SYixun Lan 68c0cf40fSJerome Brunet#include <dt-bindings/clock/axg-aoclkc.h> 78909e722SJerome Brunet#include <dt-bindings/clock/axg-audio-clkc.h> 806b7a631SYixun Lan#include <dt-bindings/clock/axg-clkc.h> 98c0cf40fSJerome Brunet#include <dt-bindings/gpio/gpio.h> 10221cf34bSNan Li#include <dt-bindings/gpio/meson-axg-gpio.h> 118c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/irq.h> 128c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/arm-gic.h> 13f2b8f6a9SJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h> 148c0cf40fSJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-reset.h> 1578a6dcb5SNeil Armstrong#include <dt-bindings/power/meson-axg-power.h> 169d59b708SYixun Lan 179d59b708SYixun Lan/ { 189d59b708SYixun Lan compatible = "amlogic,meson-axg"; 199d59b708SYixun Lan 209d59b708SYixun Lan interrupt-parent = <&gic>; 219d59b708SYixun Lan #address-cells = <2>; 229d59b708SYixun Lan #size-cells = <2>; 239d59b708SYixun Lan 24fbd5cbc5SJerome Brunet tdmif_a: audio-controller-0 { 258c0cf40fSJerome Brunet compatible = "amlogic,axg-tdm-iface"; 268c0cf40fSJerome Brunet #sound-dai-cells = <0>; 278c0cf40fSJerome Brunet sound-name-prefix = "TDM_A"; 288c0cf40fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>, 298c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_A_SCLK>, 308c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_A_LRCLK>; 318c0cf40fSJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 328c0cf40fSJerome Brunet status = "disabled"; 339d59b708SYixun Lan }; 349d59b708SYixun Lan 35fbd5cbc5SJerome Brunet tdmif_b: audio-controller-1 { 368c0cf40fSJerome Brunet compatible = "amlogic,axg-tdm-iface"; 378c0cf40fSJerome Brunet #sound-dai-cells = <0>; 388c0cf40fSJerome Brunet sound-name-prefix = "TDM_B"; 398c0cf40fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>, 408c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_B_SCLK>, 418c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_B_LRCLK>; 428c0cf40fSJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 438c0cf40fSJerome Brunet status = "disabled"; 449d59b708SYixun Lan }; 458c0cf40fSJerome Brunet 46fbd5cbc5SJerome Brunet tdmif_c: audio-controller-2 { 478c0cf40fSJerome Brunet compatible = "amlogic,axg-tdm-iface"; 488c0cf40fSJerome Brunet #sound-dai-cells = <0>; 498c0cf40fSJerome Brunet sound-name-prefix = "TDM_C"; 508c0cf40fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>, 518c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_C_SCLK>, 528c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_C_LRCLK>; 538c0cf40fSJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 548c0cf40fSJerome Brunet status = "disabled"; 558c0cf40fSJerome Brunet }; 568c0cf40fSJerome Brunet 578c0cf40fSJerome Brunet arm-pmu { 588c0cf40fSJerome Brunet compatible = "arm,cortex-a53-pmu"; 598c0cf40fSJerome Brunet interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 608c0cf40fSJerome Brunet <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 618c0cf40fSJerome Brunet <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, 628c0cf40fSJerome Brunet <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 638c0cf40fSJerome Brunet interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 649d59b708SYixun Lan }; 659d59b708SYixun Lan 669d59b708SYixun Lan cpus { 679d59b708SYixun Lan #address-cells = <0x2>; 689d59b708SYixun Lan #size-cells = <0x0>; 699d59b708SYixun Lan 709d59b708SYixun Lan cpu0: cpu@0 { 719d59b708SYixun Lan device_type = "cpu"; 7231af04cdSRob Herring compatible = "arm,cortex-a53"; 739d59b708SYixun Lan reg = <0x0 0x0>; 749d59b708SYixun Lan enable-method = "psci"; 759d59b708SYixun Lan next-level-cache = <&l2>; 762c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 779d59b708SYixun Lan }; 789d59b708SYixun Lan 799d59b708SYixun Lan cpu1: cpu@1 { 809d59b708SYixun Lan device_type = "cpu"; 8131af04cdSRob Herring compatible = "arm,cortex-a53"; 829d59b708SYixun Lan reg = <0x0 0x1>; 839d59b708SYixun Lan enable-method = "psci"; 849d59b708SYixun Lan next-level-cache = <&l2>; 852c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 869d59b708SYixun Lan }; 879d59b708SYixun Lan 889d59b708SYixun Lan cpu2: cpu@2 { 899d59b708SYixun Lan device_type = "cpu"; 9031af04cdSRob Herring compatible = "arm,cortex-a53"; 919d59b708SYixun Lan reg = <0x0 0x2>; 929d59b708SYixun Lan enable-method = "psci"; 939d59b708SYixun Lan next-level-cache = <&l2>; 942c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 959d59b708SYixun Lan }; 969d59b708SYixun Lan 979d59b708SYixun Lan cpu3: cpu@3 { 989d59b708SYixun Lan device_type = "cpu"; 9931af04cdSRob Herring compatible = "arm,cortex-a53"; 1009d59b708SYixun Lan reg = <0x0 0x3>; 1019d59b708SYixun Lan enable-method = "psci"; 1029d59b708SYixun Lan next-level-cache = <&l2>; 1032c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 1049d59b708SYixun Lan }; 1059d59b708SYixun Lan 1069d59b708SYixun Lan l2: l2-cache0 { 1079d59b708SYixun Lan compatible = "cache"; 1089d59b708SYixun Lan }; 1099d59b708SYixun Lan }; 1109d59b708SYixun Lan 11196dc5702SJerome Brunet sm: secure-monitor { 11296dc5702SJerome Brunet compatible = "amlogic,meson-gxbb-sm"; 11396dc5702SJerome Brunet }; 11496dc5702SJerome Brunet 1159ab2d15cSJerome Brunet efuse: efuse { 1169ab2d15cSJerome Brunet compatible = "amlogic,meson-gxbb-efuse"; 1179ab2d15cSJerome Brunet clocks = <&clkc CLKID_EFUSE>; 1189ab2d15cSJerome Brunet #address-cells = <1>; 1199ab2d15cSJerome Brunet #size-cells = <1>; 1209ab2d15cSJerome Brunet read-only; 121de82e74aSCarlo Caione secure-monitor = <&sm>; 1229ab2d15cSJerome Brunet }; 1239ab2d15cSJerome Brunet 1249d59b708SYixun Lan psci { 1259d59b708SYixun Lan compatible = "arm,psci-1.0"; 1269d59b708SYixun Lan method = "smc"; 1279d59b708SYixun Lan }; 1289d59b708SYixun Lan 1298c0cf40fSJerome Brunet reserved-memory { 1308c0cf40fSJerome Brunet #address-cells = <2>; 1318c0cf40fSJerome Brunet #size-cells = <2>; 1328c0cf40fSJerome Brunet ranges; 1338c0cf40fSJerome Brunet 1348c0cf40fSJerome Brunet /* 16 MiB reserved for Hardware ROM Firmware */ 1358c0cf40fSJerome Brunet hwrom_reserved: hwrom@0 { 1368c0cf40fSJerome Brunet reg = <0x0 0x0 0x0 0x1000000>; 1378c0cf40fSJerome Brunet no-map; 13808307aabSJerome Brunet }; 13908307aabSJerome Brunet 1408c0cf40fSJerome Brunet /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ 1418c0cf40fSJerome Brunet secmon_reserved: secmon@5000000 { 1428c0cf40fSJerome Brunet reg = <0x0 0x05000000 0x0 0x300000>; 1438c0cf40fSJerome Brunet no-map; 14408307aabSJerome Brunet }; 1455e395e14SYixun Lan }; 1465e395e14SYixun Lan 1472c130695SJerome Brunet scpi { 1482c130695SJerome Brunet compatible = "arm,scpi-pre-1.0"; 1492c130695SJerome Brunet mboxes = <&mailbox 1 &mailbox 2>; 1502c130695SJerome Brunet shmem = <&cpu_scp_lpri &cpu_scp_hpri>; 1512c130695SJerome Brunet 1522c130695SJerome Brunet scpi_clocks: clocks { 1532c130695SJerome Brunet compatible = "arm,scpi-clocks"; 1542c130695SJerome Brunet 1552c130695SJerome Brunet scpi_dvfs: clock-controller { 1562c130695SJerome Brunet compatible = "arm,scpi-dvfs-clocks"; 1572c130695SJerome Brunet #clock-cells = <1>; 1582c130695SJerome Brunet clock-indices = <0>; 1592c130695SJerome Brunet clock-output-names = "vcpu"; 1602c130695SJerome Brunet }; 1612c130695SJerome Brunet }; 1622c130695SJerome Brunet 1632c130695SJerome Brunet scpi_sensors: sensors { 1642c130695SJerome Brunet compatible = "amlogic,meson-gxbb-scpi-sensors"; 1652c130695SJerome Brunet #thermal-sensor-cells = <1>; 1662c130695SJerome Brunet }; 1672c130695SJerome Brunet }; 1682c130695SJerome Brunet 1699d59b708SYixun Lan soc { 1709d59b708SYixun Lan compatible = "simple-bus"; 1719d59b708SYixun Lan #address-cells = <2>; 1729d59b708SYixun Lan #size-cells = <2>; 1739d59b708SYixun Lan ranges; 1749d59b708SYixun Lan 1751b208babSNeil Armstrong usb: usb@ffe09080 { 1761b208babSNeil Armstrong compatible = "amlogic,meson-axg-usb-ctrl"; 1771b208babSNeil Armstrong reg = <0x0 0xffe09080 0x0 0x20>; 1781b208babSNeil Armstrong interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1791b208babSNeil Armstrong #address-cells = <2>; 1801b208babSNeil Armstrong #size-cells = <2>; 1811b208babSNeil Armstrong ranges; 1821b208babSNeil Armstrong 1831b208babSNeil Armstrong clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>; 1841b208babSNeil Armstrong clock-names = "usb_ctrl", "ddr"; 1851b208babSNeil Armstrong resets = <&reset RESET_USB_OTG>; 1861b208babSNeil Armstrong 1871b208babSNeil Armstrong dr_mode = "otg"; 1881b208babSNeil Armstrong 1891b208babSNeil Armstrong phys = <&usb2_phy1>; 1901b208babSNeil Armstrong phy-names = "usb2-phy1"; 1911b208babSNeil Armstrong 1921b208babSNeil Armstrong dwc2: usb@ff400000 { 1931b208babSNeil Armstrong compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; 1941b208babSNeil Armstrong reg = <0x0 0xff400000 0x0 0x40000>; 1951b208babSNeil Armstrong interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 1961b208babSNeil Armstrong clocks = <&clkc CLKID_USB1>; 1971b208babSNeil Armstrong clock-names = "otg"; 1981b208babSNeil Armstrong phys = <&usb2_phy1>; 1991b208babSNeil Armstrong dr_mode = "peripheral"; 2001b208babSNeil Armstrong g-rx-fifo-size = <192>; 2011b208babSNeil Armstrong g-np-tx-fifo-size = <128>; 2021b208babSNeil Armstrong g-tx-fifo-size = <128 128 16 16 16>; 2031b208babSNeil Armstrong }; 2041b208babSNeil Armstrong 2051b208babSNeil Armstrong dwc3: usb@ff500000 { 2061b208babSNeil Armstrong compatible = "snps,dwc3"; 2071b208babSNeil Armstrong reg = <0x0 0xff500000 0x0 0x100000>; 2081b208babSNeil Armstrong interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 2091b208babSNeil Armstrong dr_mode = "host"; 2101b208babSNeil Armstrong maximum-speed = "high-speed"; 2111b208babSNeil Armstrong snps,dis_u2_susphy_quirk; 2121b208babSNeil Armstrong }; 2131b208babSNeil Armstrong }; 2141b208babSNeil Armstrong 2158c0cf40fSJerome Brunet ethmac: ethernet@ff3f0000 { 2169d63f5d1SJerome Brunet compatible = "amlogic,meson-axg-dwmac", 2179d63f5d1SJerome Brunet "snps,dwmac-3.70a", 2189d63f5d1SJerome Brunet "snps,dwmac"; 2193ad6c9e3SNeil Armstrong reg = <0x0 0xff3f0000 0x0 0x10000>, 2203ad6c9e3SNeil Armstrong <0x0 0xff634540 0x0 0x8>; 2218b3e6f89SCarlo Caione interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 2228c0cf40fSJerome Brunet interrupt-names = "macirq"; 2238c0cf40fSJerome Brunet clocks = <&clkc CLKID_ETH>, 2248c0cf40fSJerome Brunet <&clkc CLKID_FCLK_DIV2>, 22532b5f4b6SMartin Blumenstingl <&clkc CLKID_MPLL2>, 22632b5f4b6SMartin Blumenstingl <&clkc CLKID_FCLK_DIV2>; 22732b5f4b6SMartin Blumenstingl clock-names = "stmmaceth", "clkin0", "clkin1", 22832b5f4b6SMartin Blumenstingl "timing-adjustment"; 229ef68984eSJerome Brunet rx-fifo-depth = <4096>; 230ef68984eSJerome Brunet tx-fifo-depth = <2048>; 231f3362f0cSAnand Moon resets = <&reset RESET_ETHERNET>; 232f3362f0cSAnand Moon reset-names = "stmmaceth"; 23378a6dcb5SNeil Armstrong power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>; 2348c0cf40fSJerome Brunet status = "disabled"; 2358c0cf40fSJerome Brunet }; 2368c0cf40fSJerome Brunet 237c362e4e0SJerome Brunet pdm: audio-controller@ff632000 { 238c362e4e0SJerome Brunet compatible = "amlogic,axg-pdm"; 239c362e4e0SJerome Brunet reg = <0x0 0xff632000 0x0 0x34>; 240c362e4e0SJerome Brunet #sound-dai-cells = <0>; 241c362e4e0SJerome Brunet sound-name-prefix = "PDM"; 242c362e4e0SJerome Brunet clocks = <&clkc_audio AUD_CLKID_PDM>, 243c362e4e0SJerome Brunet <&clkc_audio AUD_CLKID_PDM_DCLK>, 244c362e4e0SJerome Brunet <&clkc_audio AUD_CLKID_PDM_SYSCLK>; 245c362e4e0SJerome Brunet clock-names = "pclk", "dclk", "sysclk"; 246c362e4e0SJerome Brunet status = "disabled"; 247c362e4e0SJerome Brunet }; 248c362e4e0SJerome Brunet 2498c0cf40fSJerome Brunet periphs: bus@ff634000 { 250221cf34bSNan Li compatible = "simple-bus"; 2518c0cf40fSJerome Brunet reg = <0x0 0xff634000 0x0 0x2000>; 252221cf34bSNan Li #address-cells = <2>; 253221cf34bSNan Li #size-cells = <2>; 2548c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; 255221cf34bSNan Li 2568c0cf40fSJerome Brunet hwrng: rng@18 { 2578c0cf40fSJerome Brunet compatible = "amlogic,meson-rng"; 2588c0cf40fSJerome Brunet reg = <0x0 0x18 0x0 0x4>; 2598c0cf40fSJerome Brunet clocks = <&clkc CLKID_RNG0>; 2608c0cf40fSJerome Brunet clock-names = "core"; 261221cf34bSNan Li }; 262221cf34bSNan Li 2638c0cf40fSJerome Brunet pinctrl_periphs: pinctrl@480 { 2648c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-periphs-pinctrl"; 2658c0cf40fSJerome Brunet #address-cells = <2>; 2668c0cf40fSJerome Brunet #size-cells = <2>; 2678c0cf40fSJerome Brunet ranges; 2688c0cf40fSJerome Brunet 2698c0cf40fSJerome Brunet gpio: bank@480 { 2708c0cf40fSJerome Brunet reg = <0x0 0x00480 0x0 0x40>, 2718c0cf40fSJerome Brunet <0x0 0x004e8 0x0 0x14>, 2728c0cf40fSJerome Brunet <0x0 0x00520 0x0 0x14>, 2738c0cf40fSJerome Brunet <0x0 0x00430 0x0 0x3c>; 2748c0cf40fSJerome Brunet reg-names = "mux", "pull", "pull-enable", "gpio"; 2758c0cf40fSJerome Brunet gpio-controller; 2768c0cf40fSJerome Brunet #gpio-cells = <2>; 2778c0cf40fSJerome Brunet gpio-ranges = <&pinctrl_periphs 0 0 86>; 278221cf34bSNan Li }; 2798c0cf40fSJerome Brunet 2808c0cf40fSJerome Brunet i2c0_pins: i2c0 { 2818c0cf40fSJerome Brunet mux { 2828c0cf40fSJerome Brunet groups = "i2c0_sck", 2838c0cf40fSJerome Brunet "i2c0_sda"; 2848c0cf40fSJerome Brunet function = "i2c0"; 2851c5cc1c8SJerome Brunet bias-disable; 2868c0cf40fSJerome Brunet }; 2878c0cf40fSJerome Brunet }; 2888c0cf40fSJerome Brunet 2898c0cf40fSJerome Brunet i2c1_x_pins: i2c1_x { 2908c0cf40fSJerome Brunet mux { 2918c0cf40fSJerome Brunet groups = "i2c1_sck_x", 2928c0cf40fSJerome Brunet "i2c1_sda_x"; 2938c0cf40fSJerome Brunet function = "i2c1"; 2941c5cc1c8SJerome Brunet bias-disable; 2958c0cf40fSJerome Brunet }; 2968c0cf40fSJerome Brunet }; 2978c0cf40fSJerome Brunet 2988c0cf40fSJerome Brunet i2c1_z_pins: i2c1_z { 2998c0cf40fSJerome Brunet mux { 3008c0cf40fSJerome Brunet groups = "i2c1_sck_z", 3018c0cf40fSJerome Brunet "i2c1_sda_z"; 3028c0cf40fSJerome Brunet function = "i2c1"; 3031c5cc1c8SJerome Brunet bias-disable; 3048c0cf40fSJerome Brunet }; 3058c0cf40fSJerome Brunet }; 3068c0cf40fSJerome Brunet 3078c0cf40fSJerome Brunet i2c2_a_pins: i2c2_a { 3088c0cf40fSJerome Brunet mux { 3098c0cf40fSJerome Brunet groups = "i2c2_sck_a", 3108c0cf40fSJerome Brunet "i2c2_sda_a"; 3118c0cf40fSJerome Brunet function = "i2c2"; 3121c5cc1c8SJerome Brunet bias-disable; 3138c0cf40fSJerome Brunet }; 3148c0cf40fSJerome Brunet }; 3158c0cf40fSJerome Brunet 3168c0cf40fSJerome Brunet i2c2_x_pins: i2c2_x { 3178c0cf40fSJerome Brunet mux { 3188c0cf40fSJerome Brunet groups = "i2c2_sck_x", 3198c0cf40fSJerome Brunet "i2c2_sda_x"; 3208c0cf40fSJerome Brunet function = "i2c2"; 3211c5cc1c8SJerome Brunet bias-disable; 3228c0cf40fSJerome Brunet }; 3238c0cf40fSJerome Brunet }; 3248c0cf40fSJerome Brunet 3258c0cf40fSJerome Brunet i2c3_a6_pins: i2c3_a6 { 3268c0cf40fSJerome Brunet mux { 3278c0cf40fSJerome Brunet groups = "i2c3_sda_a6", 3288c0cf40fSJerome Brunet "i2c3_sck_a7"; 3298c0cf40fSJerome Brunet function = "i2c3"; 3301c5cc1c8SJerome Brunet bias-disable; 3318c0cf40fSJerome Brunet }; 3328c0cf40fSJerome Brunet }; 3338c0cf40fSJerome Brunet 3348c0cf40fSJerome Brunet i2c3_a12_pins: i2c3_a12 { 3358c0cf40fSJerome Brunet mux { 3368c0cf40fSJerome Brunet groups = "i2c3_sda_a12", 3378c0cf40fSJerome Brunet "i2c3_sck_a13"; 3388c0cf40fSJerome Brunet function = "i2c3"; 3391c5cc1c8SJerome Brunet bias-disable; 3408c0cf40fSJerome Brunet }; 3418c0cf40fSJerome Brunet }; 3428c0cf40fSJerome Brunet 3438c0cf40fSJerome Brunet i2c3_a19_pins: i2c3_a19 { 3448c0cf40fSJerome Brunet mux { 3458c0cf40fSJerome Brunet groups = "i2c3_sda_a19", 3468c0cf40fSJerome Brunet "i2c3_sck_a20"; 3478c0cf40fSJerome Brunet function = "i2c3"; 3481c5cc1c8SJerome Brunet bias-disable; 3498c0cf40fSJerome Brunet }; 3508c0cf40fSJerome Brunet }; 3518c0cf40fSJerome Brunet 3528c0cf40fSJerome Brunet emmc_pins: emmc { 353b43033b1SJerome Brunet mux-0 { 3548c0cf40fSJerome Brunet groups = "emmc_nand_d0", 3558c0cf40fSJerome Brunet "emmc_nand_d1", 3568c0cf40fSJerome Brunet "emmc_nand_d2", 3578c0cf40fSJerome Brunet "emmc_nand_d3", 3588c0cf40fSJerome Brunet "emmc_nand_d4", 3598c0cf40fSJerome Brunet "emmc_nand_d5", 3608c0cf40fSJerome Brunet "emmc_nand_d6", 3618c0cf40fSJerome Brunet "emmc_nand_d7", 362b43033b1SJerome Brunet "emmc_cmd"; 363b43033b1SJerome Brunet function = "emmc"; 364b43033b1SJerome Brunet bias-pull-up; 365b43033b1SJerome Brunet }; 366b43033b1SJerome Brunet 367b43033b1SJerome Brunet mux-1 { 368b43033b1SJerome Brunet groups = "emmc_clk"; 3698c0cf40fSJerome Brunet function = "emmc"; 37096a13691SJerome Brunet bias-disable; 3718c0cf40fSJerome Brunet }; 3728c0cf40fSJerome Brunet }; 3738c0cf40fSJerome Brunet 374b43033b1SJerome Brunet emmc_ds_pins: emmc_ds { 375b43033b1SJerome Brunet mux { 376b43033b1SJerome Brunet groups = "emmc_ds"; 377b43033b1SJerome Brunet function = "emmc"; 378b43033b1SJerome Brunet bias-pull-down; 379b43033b1SJerome Brunet }; 380b43033b1SJerome Brunet }; 381b43033b1SJerome Brunet 3828c0cf40fSJerome Brunet emmc_clk_gate_pins: emmc_clk_gate { 3838c0cf40fSJerome Brunet mux { 3848c0cf40fSJerome Brunet groups = "BOOT_8"; 3858c0cf40fSJerome Brunet function = "gpio_periphs"; 3868c0cf40fSJerome Brunet bias-pull-down; 3878c0cf40fSJerome Brunet }; 3888c0cf40fSJerome Brunet }; 3898c0cf40fSJerome Brunet 3908c0cf40fSJerome Brunet eth_rgmii_x_pins: eth-x-rgmii { 3918c0cf40fSJerome Brunet mux { 3928c0cf40fSJerome Brunet groups = "eth_mdio_x", 3938c0cf40fSJerome Brunet "eth_mdc_x", 3948c0cf40fSJerome Brunet "eth_rgmii_rx_clk_x", 3958c0cf40fSJerome Brunet "eth_rx_dv_x", 3968c0cf40fSJerome Brunet "eth_rxd0_x", 3978c0cf40fSJerome Brunet "eth_rxd1_x", 3988c0cf40fSJerome Brunet "eth_rxd2_rgmii", 3998c0cf40fSJerome Brunet "eth_rxd3_rgmii", 4008c0cf40fSJerome Brunet "eth_rgmii_tx_clk", 4018c0cf40fSJerome Brunet "eth_txen_x", 4028c0cf40fSJerome Brunet "eth_txd0_x", 4038c0cf40fSJerome Brunet "eth_txd1_x", 4048c0cf40fSJerome Brunet "eth_txd2_rgmii", 4058c0cf40fSJerome Brunet "eth_txd3_rgmii"; 4068c0cf40fSJerome Brunet function = "eth"; 4071c5cc1c8SJerome Brunet bias-disable; 4088c0cf40fSJerome Brunet }; 4098c0cf40fSJerome Brunet }; 4108c0cf40fSJerome Brunet 4118c0cf40fSJerome Brunet eth_rgmii_y_pins: eth-y-rgmii { 4128c0cf40fSJerome Brunet mux { 4138c0cf40fSJerome Brunet groups = "eth_mdio_y", 4148c0cf40fSJerome Brunet "eth_mdc_y", 4158c0cf40fSJerome Brunet "eth_rgmii_rx_clk_y", 4168c0cf40fSJerome Brunet "eth_rx_dv_y", 4178c0cf40fSJerome Brunet "eth_rxd0_y", 4188c0cf40fSJerome Brunet "eth_rxd1_y", 4198c0cf40fSJerome Brunet "eth_rxd2_rgmii", 4208c0cf40fSJerome Brunet "eth_rxd3_rgmii", 4218c0cf40fSJerome Brunet "eth_rgmii_tx_clk", 4228c0cf40fSJerome Brunet "eth_txen_y", 4238c0cf40fSJerome Brunet "eth_txd0_y", 4248c0cf40fSJerome Brunet "eth_txd1_y", 4258c0cf40fSJerome Brunet "eth_txd2_rgmii", 4268c0cf40fSJerome Brunet "eth_txd3_rgmii"; 4278c0cf40fSJerome Brunet function = "eth"; 4281c5cc1c8SJerome Brunet bias-disable; 4298c0cf40fSJerome Brunet }; 4308c0cf40fSJerome Brunet }; 4318c0cf40fSJerome Brunet 4328c0cf40fSJerome Brunet eth_rmii_x_pins: eth-x-rmii { 4338c0cf40fSJerome Brunet mux { 4348c0cf40fSJerome Brunet groups = "eth_mdio_x", 4358c0cf40fSJerome Brunet "eth_mdc_x", 4368c0cf40fSJerome Brunet "eth_rgmii_rx_clk_x", 4378c0cf40fSJerome Brunet "eth_rx_dv_x", 4388c0cf40fSJerome Brunet "eth_rxd0_x", 4398c0cf40fSJerome Brunet "eth_rxd1_x", 4408c0cf40fSJerome Brunet "eth_txen_x", 4418c0cf40fSJerome Brunet "eth_txd0_x", 4428c0cf40fSJerome Brunet "eth_txd1_x"; 4438c0cf40fSJerome Brunet function = "eth"; 4441c5cc1c8SJerome Brunet bias-disable; 4458c0cf40fSJerome Brunet }; 4468c0cf40fSJerome Brunet }; 4478c0cf40fSJerome Brunet 4488c0cf40fSJerome Brunet eth_rmii_y_pins: eth-y-rmii { 4498c0cf40fSJerome Brunet mux { 4508c0cf40fSJerome Brunet groups = "eth_mdio_y", 4518c0cf40fSJerome Brunet "eth_mdc_y", 4528c0cf40fSJerome Brunet "eth_rgmii_rx_clk_y", 4538c0cf40fSJerome Brunet "eth_rx_dv_y", 4548c0cf40fSJerome Brunet "eth_rxd0_y", 4558c0cf40fSJerome Brunet "eth_rxd1_y", 4568c0cf40fSJerome Brunet "eth_txen_y", 4578c0cf40fSJerome Brunet "eth_txd0_y", 4588c0cf40fSJerome Brunet "eth_txd1_y"; 4598c0cf40fSJerome Brunet function = "eth"; 4601c5cc1c8SJerome Brunet bias-disable; 4618c0cf40fSJerome Brunet }; 4628c0cf40fSJerome Brunet }; 4638c0cf40fSJerome Brunet 4648c0cf40fSJerome Brunet mclk_b_pins: mclk_b { 4658c0cf40fSJerome Brunet mux { 4668c0cf40fSJerome Brunet groups = "mclk_b"; 4678c0cf40fSJerome Brunet function = "mclk_b"; 4681c5cc1c8SJerome Brunet bias-disable; 4698c0cf40fSJerome Brunet }; 4708c0cf40fSJerome Brunet }; 4718c0cf40fSJerome Brunet 4728c0cf40fSJerome Brunet mclk_c_pins: mclk_c { 4738c0cf40fSJerome Brunet mux { 4748c0cf40fSJerome Brunet groups = "mclk_c"; 4758c0cf40fSJerome Brunet function = "mclk_c"; 4761c5cc1c8SJerome Brunet bias-disable; 4778c0cf40fSJerome Brunet }; 4788c0cf40fSJerome Brunet }; 4798c0cf40fSJerome Brunet 4808c0cf40fSJerome Brunet pdm_dclk_a14_pins: pdm_dclk_a14 { 4818c0cf40fSJerome Brunet mux { 4828c0cf40fSJerome Brunet groups = "pdm_dclk_a14"; 4838c0cf40fSJerome Brunet function = "pdm"; 4841c5cc1c8SJerome Brunet bias-disable; 4858c0cf40fSJerome Brunet }; 4868c0cf40fSJerome Brunet }; 4878c0cf40fSJerome Brunet 4888c0cf40fSJerome Brunet pdm_dclk_a19_pins: pdm_dclk_a19 { 4898c0cf40fSJerome Brunet mux { 4908c0cf40fSJerome Brunet groups = "pdm_dclk_a19"; 4918c0cf40fSJerome Brunet function = "pdm"; 4921c5cc1c8SJerome Brunet bias-disable; 4938c0cf40fSJerome Brunet }; 4948c0cf40fSJerome Brunet }; 4958c0cf40fSJerome Brunet 4968c0cf40fSJerome Brunet pdm_din0_pins: pdm_din0 { 4978c0cf40fSJerome Brunet mux { 4988c0cf40fSJerome Brunet groups = "pdm_din0"; 4998c0cf40fSJerome Brunet function = "pdm"; 5001c5cc1c8SJerome Brunet bias-disable; 5018c0cf40fSJerome Brunet }; 5028c0cf40fSJerome Brunet }; 5038c0cf40fSJerome Brunet 5048c0cf40fSJerome Brunet pdm_din1_pins: pdm_din1 { 5058c0cf40fSJerome Brunet mux { 5068c0cf40fSJerome Brunet groups = "pdm_din1"; 5078c0cf40fSJerome Brunet function = "pdm"; 5081c5cc1c8SJerome Brunet bias-disable; 5098c0cf40fSJerome Brunet }; 5108c0cf40fSJerome Brunet }; 5118c0cf40fSJerome Brunet 5128c0cf40fSJerome Brunet pdm_din2_pins: pdm_din2 { 5138c0cf40fSJerome Brunet mux { 5148c0cf40fSJerome Brunet groups = "pdm_din2"; 5158c0cf40fSJerome Brunet function = "pdm"; 5161c5cc1c8SJerome Brunet bias-disable; 5178c0cf40fSJerome Brunet }; 5188c0cf40fSJerome Brunet }; 5198c0cf40fSJerome Brunet 5208c0cf40fSJerome Brunet pdm_din3_pins: pdm_din3 { 5218c0cf40fSJerome Brunet mux { 5228c0cf40fSJerome Brunet groups = "pdm_din3"; 5238c0cf40fSJerome Brunet function = "pdm"; 5241c5cc1c8SJerome Brunet bias-disable; 5258c0cf40fSJerome Brunet }; 5268c0cf40fSJerome Brunet }; 5278c0cf40fSJerome Brunet 5288c0cf40fSJerome Brunet pwm_a_a_pins: pwm_a_a { 5298c0cf40fSJerome Brunet mux { 5308c0cf40fSJerome Brunet groups = "pwm_a_a"; 5318c0cf40fSJerome Brunet function = "pwm_a"; 5321c5cc1c8SJerome Brunet bias-disable; 5338c0cf40fSJerome Brunet }; 5348c0cf40fSJerome Brunet }; 5358c0cf40fSJerome Brunet 5368c0cf40fSJerome Brunet pwm_a_x18_pins: pwm_a_x18 { 5378c0cf40fSJerome Brunet mux { 5388c0cf40fSJerome Brunet groups = "pwm_a_x18"; 5398c0cf40fSJerome Brunet function = "pwm_a"; 5401c5cc1c8SJerome Brunet bias-disable; 5418c0cf40fSJerome Brunet }; 5428c0cf40fSJerome Brunet }; 5438c0cf40fSJerome Brunet 5448c0cf40fSJerome Brunet pwm_a_x20_pins: pwm_a_x20 { 5458c0cf40fSJerome Brunet mux { 5468c0cf40fSJerome Brunet groups = "pwm_a_x20"; 5478c0cf40fSJerome Brunet function = "pwm_a"; 5481c5cc1c8SJerome Brunet bias-disable; 5498c0cf40fSJerome Brunet }; 5508c0cf40fSJerome Brunet }; 5518c0cf40fSJerome Brunet 5528c0cf40fSJerome Brunet pwm_a_z_pins: pwm_a_z { 5538c0cf40fSJerome Brunet mux { 5548c0cf40fSJerome Brunet groups = "pwm_a_z"; 5558c0cf40fSJerome Brunet function = "pwm_a"; 5561c5cc1c8SJerome Brunet bias-disable; 5578c0cf40fSJerome Brunet }; 5588c0cf40fSJerome Brunet }; 5598c0cf40fSJerome Brunet 5608c0cf40fSJerome Brunet pwm_b_a_pins: pwm_b_a { 5618c0cf40fSJerome Brunet mux { 5628c0cf40fSJerome Brunet groups = "pwm_b_a"; 5638c0cf40fSJerome Brunet function = "pwm_b"; 5641c5cc1c8SJerome Brunet bias-disable; 5658c0cf40fSJerome Brunet }; 5668c0cf40fSJerome Brunet }; 5678c0cf40fSJerome Brunet 5688c0cf40fSJerome Brunet pwm_b_x_pins: pwm_b_x { 5698c0cf40fSJerome Brunet mux { 5708c0cf40fSJerome Brunet groups = "pwm_b_x"; 5718c0cf40fSJerome Brunet function = "pwm_b"; 5721c5cc1c8SJerome Brunet bias-disable; 5738c0cf40fSJerome Brunet }; 5748c0cf40fSJerome Brunet }; 5758c0cf40fSJerome Brunet 5768c0cf40fSJerome Brunet pwm_b_z_pins: pwm_b_z { 5778c0cf40fSJerome Brunet mux { 5788c0cf40fSJerome Brunet groups = "pwm_b_z"; 5798c0cf40fSJerome Brunet function = "pwm_b"; 5801c5cc1c8SJerome Brunet bias-disable; 5818c0cf40fSJerome Brunet }; 5828c0cf40fSJerome Brunet }; 5838c0cf40fSJerome Brunet 5848c0cf40fSJerome Brunet pwm_c_a_pins: pwm_c_a { 5858c0cf40fSJerome Brunet mux { 5868c0cf40fSJerome Brunet groups = "pwm_c_a"; 5878c0cf40fSJerome Brunet function = "pwm_c"; 5881c5cc1c8SJerome Brunet bias-disable; 5898c0cf40fSJerome Brunet }; 5908c0cf40fSJerome Brunet }; 5918c0cf40fSJerome Brunet 5928c0cf40fSJerome Brunet pwm_c_x10_pins: pwm_c_x10 { 5938c0cf40fSJerome Brunet mux { 5948c0cf40fSJerome Brunet groups = "pwm_c_x10"; 5958c0cf40fSJerome Brunet function = "pwm_c"; 5961c5cc1c8SJerome Brunet bias-disable; 5978c0cf40fSJerome Brunet }; 5988c0cf40fSJerome Brunet }; 5998c0cf40fSJerome Brunet 6008c0cf40fSJerome Brunet pwm_c_x17_pins: pwm_c_x17 { 6018c0cf40fSJerome Brunet mux { 6028c0cf40fSJerome Brunet groups = "pwm_c_x17"; 6038c0cf40fSJerome Brunet function = "pwm_c"; 6041c5cc1c8SJerome Brunet bias-disable; 6058c0cf40fSJerome Brunet }; 6068c0cf40fSJerome Brunet }; 6078c0cf40fSJerome Brunet 6088c0cf40fSJerome Brunet pwm_d_x11_pins: pwm_d_x11 { 6098c0cf40fSJerome Brunet mux { 6108c0cf40fSJerome Brunet groups = "pwm_d_x11"; 6118c0cf40fSJerome Brunet function = "pwm_d"; 6121c5cc1c8SJerome Brunet bias-disable; 6138c0cf40fSJerome Brunet }; 6148c0cf40fSJerome Brunet }; 6158c0cf40fSJerome Brunet 6168c0cf40fSJerome Brunet pwm_d_x16_pins: pwm_d_x16 { 6178c0cf40fSJerome Brunet mux { 6188c0cf40fSJerome Brunet groups = "pwm_d_x16"; 6198c0cf40fSJerome Brunet function = "pwm_d"; 6201c5cc1c8SJerome Brunet bias-disable; 6218c0cf40fSJerome Brunet }; 6228c0cf40fSJerome Brunet }; 6238c0cf40fSJerome Brunet 6248c0cf40fSJerome Brunet sdio_pins: sdio { 625b43033b1SJerome Brunet mux-0 { 6268c0cf40fSJerome Brunet groups = "sdio_d0", 6278c0cf40fSJerome Brunet "sdio_d1", 6288c0cf40fSJerome Brunet "sdio_d2", 6298c0cf40fSJerome Brunet "sdio_d3", 630b43033b1SJerome Brunet "sdio_cmd"; 631b43033b1SJerome Brunet function = "sdio"; 632b43033b1SJerome Brunet bias-pull-up; 633b43033b1SJerome Brunet }; 634b43033b1SJerome Brunet 635b43033b1SJerome Brunet mux-1 { 636b43033b1SJerome Brunet groups = "sdio_clk"; 6378c0cf40fSJerome Brunet function = "sdio"; 63896a13691SJerome Brunet bias-disable; 6398c0cf40fSJerome Brunet }; 6408c0cf40fSJerome Brunet }; 6418c0cf40fSJerome Brunet 6428c0cf40fSJerome Brunet sdio_clk_gate_pins: sdio_clk_gate { 6438c0cf40fSJerome Brunet mux { 6448c0cf40fSJerome Brunet groups = "GPIOX_4"; 6458c0cf40fSJerome Brunet function = "gpio_periphs"; 6468c0cf40fSJerome Brunet bias-pull-down; 6478c0cf40fSJerome Brunet }; 6488c0cf40fSJerome Brunet }; 6498c0cf40fSJerome Brunet 6508c0cf40fSJerome Brunet spdif_in_z_pins: spdif_in_z { 6518c0cf40fSJerome Brunet mux { 6528c0cf40fSJerome Brunet groups = "spdif_in_z"; 6538c0cf40fSJerome Brunet function = "spdif_in"; 6541c5cc1c8SJerome Brunet bias-disable; 6558c0cf40fSJerome Brunet }; 6568c0cf40fSJerome Brunet }; 6578c0cf40fSJerome Brunet 6588c0cf40fSJerome Brunet spdif_in_a1_pins: spdif_in_a1 { 6598c0cf40fSJerome Brunet mux { 6608c0cf40fSJerome Brunet groups = "spdif_in_a1"; 6618c0cf40fSJerome Brunet function = "spdif_in"; 6621c5cc1c8SJerome Brunet bias-disable; 6638c0cf40fSJerome Brunet }; 6648c0cf40fSJerome Brunet }; 6658c0cf40fSJerome Brunet 6668c0cf40fSJerome Brunet spdif_in_a7_pins: spdif_in_a7 { 6678c0cf40fSJerome Brunet mux { 6688c0cf40fSJerome Brunet groups = "spdif_in_a7"; 6698c0cf40fSJerome Brunet function = "spdif_in"; 6701c5cc1c8SJerome Brunet bias-disable; 6718c0cf40fSJerome Brunet }; 6728c0cf40fSJerome Brunet }; 6738c0cf40fSJerome Brunet 6748c0cf40fSJerome Brunet spdif_in_a19_pins: spdif_in_a19 { 6758c0cf40fSJerome Brunet mux { 6768c0cf40fSJerome Brunet groups = "spdif_in_a19"; 6778c0cf40fSJerome Brunet function = "spdif_in"; 6781c5cc1c8SJerome Brunet bias-disable; 6798c0cf40fSJerome Brunet }; 6808c0cf40fSJerome Brunet }; 6818c0cf40fSJerome Brunet 6828c0cf40fSJerome Brunet spdif_in_a20_pins: spdif_in_a20 { 6838c0cf40fSJerome Brunet mux { 6848c0cf40fSJerome Brunet groups = "spdif_in_a20"; 6858c0cf40fSJerome Brunet function = "spdif_in"; 6861c5cc1c8SJerome Brunet bias-disable; 6878c0cf40fSJerome Brunet }; 6888c0cf40fSJerome Brunet }; 6898c0cf40fSJerome Brunet 6908c0cf40fSJerome Brunet spdif_out_a1_pins: spdif_out_a1 { 6918c0cf40fSJerome Brunet mux { 6928c0cf40fSJerome Brunet groups = "spdif_out_a1"; 6938c0cf40fSJerome Brunet function = "spdif_out"; 6941c5cc1c8SJerome Brunet bias-disable; 6958c0cf40fSJerome Brunet }; 6968c0cf40fSJerome Brunet }; 6978c0cf40fSJerome Brunet 6988c0cf40fSJerome Brunet spdif_out_a11_pins: spdif_out_a11 { 6998c0cf40fSJerome Brunet mux { 7008c0cf40fSJerome Brunet groups = "spdif_out_a11"; 7018c0cf40fSJerome Brunet function = "spdif_out"; 7021c5cc1c8SJerome Brunet bias-disable; 7038c0cf40fSJerome Brunet }; 7048c0cf40fSJerome Brunet }; 7058c0cf40fSJerome Brunet 7068c0cf40fSJerome Brunet spdif_out_a19_pins: spdif_out_a19 { 7078c0cf40fSJerome Brunet mux { 7088c0cf40fSJerome Brunet groups = "spdif_out_a19"; 7098c0cf40fSJerome Brunet function = "spdif_out"; 7101c5cc1c8SJerome Brunet bias-disable; 7118c0cf40fSJerome Brunet }; 7128c0cf40fSJerome Brunet }; 7138c0cf40fSJerome Brunet 7148c0cf40fSJerome Brunet spdif_out_a20_pins: spdif_out_a20 { 7158c0cf40fSJerome Brunet mux { 7168c0cf40fSJerome Brunet groups = "spdif_out_a20"; 7178c0cf40fSJerome Brunet function = "spdif_out"; 7181c5cc1c8SJerome Brunet bias-disable; 7198c0cf40fSJerome Brunet }; 7208c0cf40fSJerome Brunet }; 7218c0cf40fSJerome Brunet 7228c0cf40fSJerome Brunet spdif_out_z_pins: spdif_out_z { 7238c0cf40fSJerome Brunet mux { 7248c0cf40fSJerome Brunet groups = "spdif_out_z"; 7258c0cf40fSJerome Brunet function = "spdif_out"; 7261c5cc1c8SJerome Brunet bias-disable; 7278c0cf40fSJerome Brunet }; 7288c0cf40fSJerome Brunet }; 7298c0cf40fSJerome Brunet 7308c0cf40fSJerome Brunet spi0_pins: spi0 { 7318c0cf40fSJerome Brunet mux { 7328c0cf40fSJerome Brunet groups = "spi0_miso", 7338c0cf40fSJerome Brunet "spi0_mosi", 7348c0cf40fSJerome Brunet "spi0_clk"; 7358c0cf40fSJerome Brunet function = "spi0"; 7361c5cc1c8SJerome Brunet bias-disable; 7378c0cf40fSJerome Brunet }; 7388c0cf40fSJerome Brunet }; 7398c0cf40fSJerome Brunet 7408c0cf40fSJerome Brunet spi0_ss0_pins: spi0_ss0 { 7418c0cf40fSJerome Brunet mux { 7428c0cf40fSJerome Brunet groups = "spi0_ss0"; 7438c0cf40fSJerome Brunet function = "spi0"; 7441c5cc1c8SJerome Brunet bias-disable; 7458c0cf40fSJerome Brunet }; 7468c0cf40fSJerome Brunet }; 7478c0cf40fSJerome Brunet 7488c0cf40fSJerome Brunet spi0_ss1_pins: spi0_ss1 { 7498c0cf40fSJerome Brunet mux { 7508c0cf40fSJerome Brunet groups = "spi0_ss1"; 7518c0cf40fSJerome Brunet function = "spi0"; 7521c5cc1c8SJerome Brunet bias-disable; 7538c0cf40fSJerome Brunet }; 7548c0cf40fSJerome Brunet }; 7558c0cf40fSJerome Brunet 7568c0cf40fSJerome Brunet spi0_ss2_pins: spi0_ss2 { 7578c0cf40fSJerome Brunet mux { 7588c0cf40fSJerome Brunet groups = "spi0_ss2"; 7598c0cf40fSJerome Brunet function = "spi0"; 7601c5cc1c8SJerome Brunet bias-disable; 7618c0cf40fSJerome Brunet }; 7628c0cf40fSJerome Brunet }; 7638c0cf40fSJerome Brunet 7648c0cf40fSJerome Brunet spi1_a_pins: spi1_a { 7658c0cf40fSJerome Brunet mux { 7668c0cf40fSJerome Brunet groups = "spi1_miso_a", 7678c0cf40fSJerome Brunet "spi1_mosi_a", 7688c0cf40fSJerome Brunet "spi1_clk_a"; 7698c0cf40fSJerome Brunet function = "spi1"; 7701c5cc1c8SJerome Brunet bias-disable; 7718c0cf40fSJerome Brunet }; 7728c0cf40fSJerome Brunet }; 7738c0cf40fSJerome Brunet 7748c0cf40fSJerome Brunet spi1_ss0_a_pins: spi1_ss0_a { 7758c0cf40fSJerome Brunet mux { 7768c0cf40fSJerome Brunet groups = "spi1_ss0_a"; 7778c0cf40fSJerome Brunet function = "spi1"; 7781c5cc1c8SJerome Brunet bias-disable; 7798c0cf40fSJerome Brunet }; 7808c0cf40fSJerome Brunet }; 7818c0cf40fSJerome Brunet 7828c0cf40fSJerome Brunet spi1_ss1_pins: spi1_ss1 { 7838c0cf40fSJerome Brunet mux { 7848c0cf40fSJerome Brunet groups = "spi1_ss1"; 7858c0cf40fSJerome Brunet function = "spi1"; 7861c5cc1c8SJerome Brunet bias-disable; 7878c0cf40fSJerome Brunet }; 7888c0cf40fSJerome Brunet }; 7898c0cf40fSJerome Brunet 7908c0cf40fSJerome Brunet spi1_x_pins: spi1_x { 7918c0cf40fSJerome Brunet mux { 7928c0cf40fSJerome Brunet groups = "spi1_miso_x", 7938c0cf40fSJerome Brunet "spi1_mosi_x", 7948c0cf40fSJerome Brunet "spi1_clk_x"; 7958c0cf40fSJerome Brunet function = "spi1"; 7961c5cc1c8SJerome Brunet bias-disable; 7978c0cf40fSJerome Brunet }; 7988c0cf40fSJerome Brunet }; 7998c0cf40fSJerome Brunet 8008c0cf40fSJerome Brunet spi1_ss0_x_pins: spi1_ss0_x { 8018c0cf40fSJerome Brunet mux { 8028c0cf40fSJerome Brunet groups = "spi1_ss0_x"; 8038c0cf40fSJerome Brunet function = "spi1"; 8041c5cc1c8SJerome Brunet bias-disable; 8058c0cf40fSJerome Brunet }; 8068c0cf40fSJerome Brunet }; 8078c0cf40fSJerome Brunet 8088c0cf40fSJerome Brunet tdma_din0_pins: tdma_din0 { 8098c0cf40fSJerome Brunet mux { 8108c0cf40fSJerome Brunet groups = "tdma_din0"; 8118c0cf40fSJerome Brunet function = "tdma"; 8121c5cc1c8SJerome Brunet bias-disable; 8138c0cf40fSJerome Brunet }; 8148c0cf40fSJerome Brunet }; 8158c0cf40fSJerome Brunet 8168c0cf40fSJerome Brunet tdma_dout0_x14_pins: tdma_dout0_x14 { 8178c0cf40fSJerome Brunet mux { 8188c0cf40fSJerome Brunet groups = "tdma_dout0_x14"; 8198c0cf40fSJerome Brunet function = "tdma"; 8201c5cc1c8SJerome Brunet bias-disable; 8218c0cf40fSJerome Brunet }; 8228c0cf40fSJerome Brunet }; 8238c0cf40fSJerome Brunet 8248c0cf40fSJerome Brunet tdma_dout0_x15_pins: tdma_dout0_x15 { 8258c0cf40fSJerome Brunet mux { 8268c0cf40fSJerome Brunet groups = "tdma_dout0_x15"; 8278c0cf40fSJerome Brunet function = "tdma"; 8281c5cc1c8SJerome Brunet bias-disable; 8298c0cf40fSJerome Brunet }; 8308c0cf40fSJerome Brunet }; 8318c0cf40fSJerome Brunet 8328c0cf40fSJerome Brunet tdma_dout1_pins: tdma_dout1 { 8338c0cf40fSJerome Brunet mux { 8348c0cf40fSJerome Brunet groups = "tdma_dout1"; 8358c0cf40fSJerome Brunet function = "tdma"; 8361c5cc1c8SJerome Brunet bias-disable; 8378c0cf40fSJerome Brunet }; 8388c0cf40fSJerome Brunet }; 8398c0cf40fSJerome Brunet 8408c0cf40fSJerome Brunet tdma_din1_pins: tdma_din1 { 8418c0cf40fSJerome Brunet mux { 8428c0cf40fSJerome Brunet groups = "tdma_din1"; 8438c0cf40fSJerome Brunet function = "tdma"; 8441c5cc1c8SJerome Brunet bias-disable; 8458c0cf40fSJerome Brunet }; 8468c0cf40fSJerome Brunet }; 8478c0cf40fSJerome Brunet 8488c0cf40fSJerome Brunet tdma_fs_pins: tdma_fs { 8498c0cf40fSJerome Brunet mux { 8508c0cf40fSJerome Brunet groups = "tdma_fs"; 8518c0cf40fSJerome Brunet function = "tdma"; 8521c5cc1c8SJerome Brunet bias-disable; 8538c0cf40fSJerome Brunet }; 8548c0cf40fSJerome Brunet }; 8558c0cf40fSJerome Brunet 8568c0cf40fSJerome Brunet tdma_fs_slv_pins: tdma_fs_slv { 8578c0cf40fSJerome Brunet mux { 8588c0cf40fSJerome Brunet groups = "tdma_fs_slv"; 8598c0cf40fSJerome Brunet function = "tdma"; 8601c5cc1c8SJerome Brunet bias-disable; 8618c0cf40fSJerome Brunet }; 8628c0cf40fSJerome Brunet }; 8638c0cf40fSJerome Brunet 8648c0cf40fSJerome Brunet tdma_sclk_pins: tdma_sclk { 8658c0cf40fSJerome Brunet mux { 8668c0cf40fSJerome Brunet groups = "tdma_sclk"; 8678c0cf40fSJerome Brunet function = "tdma"; 8681c5cc1c8SJerome Brunet bias-disable; 8698c0cf40fSJerome Brunet }; 8708c0cf40fSJerome Brunet }; 8718c0cf40fSJerome Brunet 8728c0cf40fSJerome Brunet tdma_sclk_slv_pins: tdma_sclk_slv { 8738c0cf40fSJerome Brunet mux { 8748c0cf40fSJerome Brunet groups = "tdma_sclk_slv"; 8758c0cf40fSJerome Brunet function = "tdma"; 8761c5cc1c8SJerome Brunet bias-disable; 8778c0cf40fSJerome Brunet }; 8788c0cf40fSJerome Brunet }; 8798c0cf40fSJerome Brunet 8808c0cf40fSJerome Brunet tdmb_din0_pins: tdmb_din0 { 8818c0cf40fSJerome Brunet mux { 8828c0cf40fSJerome Brunet groups = "tdmb_din0"; 8838c0cf40fSJerome Brunet function = "tdmb"; 8841c5cc1c8SJerome Brunet bias-disable; 8858c0cf40fSJerome Brunet }; 8868c0cf40fSJerome Brunet }; 8878c0cf40fSJerome Brunet 8888c0cf40fSJerome Brunet tdmb_din1_pins: tdmb_din1 { 8898c0cf40fSJerome Brunet mux { 8908c0cf40fSJerome Brunet groups = "tdmb_din1"; 8918c0cf40fSJerome Brunet function = "tdmb"; 8921c5cc1c8SJerome Brunet bias-disable; 8938c0cf40fSJerome Brunet }; 8948c0cf40fSJerome Brunet }; 8958c0cf40fSJerome Brunet 8968c0cf40fSJerome Brunet tdmb_din2_pins: tdmb_din2 { 8978c0cf40fSJerome Brunet mux { 8988c0cf40fSJerome Brunet groups = "tdmb_din2"; 8998c0cf40fSJerome Brunet function = "tdmb"; 9001c5cc1c8SJerome Brunet bias-disable; 9018c0cf40fSJerome Brunet }; 9028c0cf40fSJerome Brunet }; 9038c0cf40fSJerome Brunet 9048c0cf40fSJerome Brunet tdmb_din3_pins: tdmb_din3 { 9058c0cf40fSJerome Brunet mux { 9068c0cf40fSJerome Brunet groups = "tdmb_din3"; 9078c0cf40fSJerome Brunet function = "tdmb"; 9081c5cc1c8SJerome Brunet bias-disable; 9098c0cf40fSJerome Brunet }; 9108c0cf40fSJerome Brunet }; 9118c0cf40fSJerome Brunet 9128c0cf40fSJerome Brunet tdmb_dout0_pins: tdmb_dout0 { 9138c0cf40fSJerome Brunet mux { 9148c0cf40fSJerome Brunet groups = "tdmb_dout0"; 9158c0cf40fSJerome Brunet function = "tdmb"; 9161c5cc1c8SJerome Brunet bias-disable; 9178c0cf40fSJerome Brunet }; 9188c0cf40fSJerome Brunet }; 9198c0cf40fSJerome Brunet 9208c0cf40fSJerome Brunet tdmb_dout1_pins: tdmb_dout1 { 9218c0cf40fSJerome Brunet mux { 9228c0cf40fSJerome Brunet groups = "tdmb_dout1"; 9238c0cf40fSJerome Brunet function = "tdmb"; 9241c5cc1c8SJerome Brunet bias-disable; 9258c0cf40fSJerome Brunet }; 9268c0cf40fSJerome Brunet }; 9278c0cf40fSJerome Brunet 9288c0cf40fSJerome Brunet tdmb_dout2_pins: tdmb_dout2 { 9298c0cf40fSJerome Brunet mux { 9308c0cf40fSJerome Brunet groups = "tdmb_dout2"; 9318c0cf40fSJerome Brunet function = "tdmb"; 9321c5cc1c8SJerome Brunet bias-disable; 9338c0cf40fSJerome Brunet }; 9348c0cf40fSJerome Brunet }; 9358c0cf40fSJerome Brunet 9368c0cf40fSJerome Brunet tdmb_dout3_pins: tdmb_dout3 { 9378c0cf40fSJerome Brunet mux { 9388c0cf40fSJerome Brunet groups = "tdmb_dout3"; 9398c0cf40fSJerome Brunet function = "tdmb"; 9401c5cc1c8SJerome Brunet bias-disable; 9418c0cf40fSJerome Brunet }; 9428c0cf40fSJerome Brunet }; 9438c0cf40fSJerome Brunet 9448c0cf40fSJerome Brunet tdmb_fs_pins: tdmb_fs { 9458c0cf40fSJerome Brunet mux { 9468c0cf40fSJerome Brunet groups = "tdmb_fs"; 9478c0cf40fSJerome Brunet function = "tdmb"; 9481c5cc1c8SJerome Brunet bias-disable; 9498c0cf40fSJerome Brunet }; 9508c0cf40fSJerome Brunet }; 9518c0cf40fSJerome Brunet 9528c0cf40fSJerome Brunet tdmb_fs_slv_pins: tdmb_fs_slv { 9538c0cf40fSJerome Brunet mux { 9548c0cf40fSJerome Brunet groups = "tdmb_fs_slv"; 9558c0cf40fSJerome Brunet function = "tdmb"; 9561c5cc1c8SJerome Brunet bias-disable; 9578c0cf40fSJerome Brunet }; 9588c0cf40fSJerome Brunet }; 9598c0cf40fSJerome Brunet 9608c0cf40fSJerome Brunet tdmb_sclk_pins: tdmb_sclk { 9618c0cf40fSJerome Brunet mux { 9628c0cf40fSJerome Brunet groups = "tdmb_sclk"; 9638c0cf40fSJerome Brunet function = "tdmb"; 9641c5cc1c8SJerome Brunet bias-disable; 9658c0cf40fSJerome Brunet }; 9668c0cf40fSJerome Brunet }; 9678c0cf40fSJerome Brunet 9688c0cf40fSJerome Brunet tdmb_sclk_slv_pins: tdmb_sclk_slv { 9698c0cf40fSJerome Brunet mux { 9708c0cf40fSJerome Brunet groups = "tdmb_sclk_slv"; 9718c0cf40fSJerome Brunet function = "tdmb"; 9721c5cc1c8SJerome Brunet bias-disable; 9738c0cf40fSJerome Brunet }; 9748c0cf40fSJerome Brunet }; 9758c0cf40fSJerome Brunet 9768c0cf40fSJerome Brunet tdmc_fs_pins: tdmc_fs { 9778c0cf40fSJerome Brunet mux { 9788c0cf40fSJerome Brunet groups = "tdmc_fs"; 9798c0cf40fSJerome Brunet function = "tdmc"; 9801c5cc1c8SJerome Brunet bias-disable; 9818c0cf40fSJerome Brunet }; 9828c0cf40fSJerome Brunet }; 9838c0cf40fSJerome Brunet 9848c0cf40fSJerome Brunet tdmc_fs_slv_pins: tdmc_fs_slv { 9858c0cf40fSJerome Brunet mux { 9868c0cf40fSJerome Brunet groups = "tdmc_fs_slv"; 9878c0cf40fSJerome Brunet function = "tdmc"; 9881c5cc1c8SJerome Brunet bias-disable; 9898c0cf40fSJerome Brunet }; 9908c0cf40fSJerome Brunet }; 9918c0cf40fSJerome Brunet 9928c0cf40fSJerome Brunet tdmc_sclk_pins: tdmc_sclk { 9938c0cf40fSJerome Brunet mux { 9948c0cf40fSJerome Brunet groups = "tdmc_sclk"; 9958c0cf40fSJerome Brunet function = "tdmc"; 9961c5cc1c8SJerome Brunet bias-disable; 9978c0cf40fSJerome Brunet }; 9988c0cf40fSJerome Brunet }; 9998c0cf40fSJerome Brunet 10008c0cf40fSJerome Brunet tdmc_sclk_slv_pins: tdmc_sclk_slv { 10018c0cf40fSJerome Brunet mux { 10028c0cf40fSJerome Brunet groups = "tdmc_sclk_slv"; 10038c0cf40fSJerome Brunet function = "tdmc"; 10041c5cc1c8SJerome Brunet bias-disable; 10058c0cf40fSJerome Brunet }; 10068c0cf40fSJerome Brunet }; 10078c0cf40fSJerome Brunet 10088c0cf40fSJerome Brunet tdmc_din0_pins: tdmc_din0 { 10098c0cf40fSJerome Brunet mux { 10108c0cf40fSJerome Brunet groups = "tdmc_din0"; 10118c0cf40fSJerome Brunet function = "tdmc"; 10121c5cc1c8SJerome Brunet bias-disable; 10138c0cf40fSJerome Brunet }; 10148c0cf40fSJerome Brunet }; 10158c0cf40fSJerome Brunet 10168c0cf40fSJerome Brunet tdmc_din1_pins: tdmc_din1 { 10178c0cf40fSJerome Brunet mux { 10188c0cf40fSJerome Brunet groups = "tdmc_din1"; 10198c0cf40fSJerome Brunet function = "tdmc"; 10201c5cc1c8SJerome Brunet bias-disable; 10218c0cf40fSJerome Brunet }; 10228c0cf40fSJerome Brunet }; 10238c0cf40fSJerome Brunet 10248c0cf40fSJerome Brunet tdmc_din2_pins: tdmc_din2 { 10258c0cf40fSJerome Brunet mux { 10268c0cf40fSJerome Brunet groups = "tdmc_din2"; 10278c0cf40fSJerome Brunet function = "tdmc"; 10281c5cc1c8SJerome Brunet bias-disable; 10298c0cf40fSJerome Brunet }; 10308c0cf40fSJerome Brunet }; 10318c0cf40fSJerome Brunet 10328c0cf40fSJerome Brunet tdmc_din3_pins: tdmc_din3 { 10338c0cf40fSJerome Brunet mux { 10348c0cf40fSJerome Brunet groups = "tdmc_din3"; 10358c0cf40fSJerome Brunet function = "tdmc"; 10361c5cc1c8SJerome Brunet bias-disable; 10378c0cf40fSJerome Brunet }; 10388c0cf40fSJerome Brunet }; 10398c0cf40fSJerome Brunet 10408c0cf40fSJerome Brunet tdmc_dout0_pins: tdmc_dout0 { 10418c0cf40fSJerome Brunet mux { 10428c0cf40fSJerome Brunet groups = "tdmc_dout0"; 10438c0cf40fSJerome Brunet function = "tdmc"; 10441c5cc1c8SJerome Brunet bias-disable; 10458c0cf40fSJerome Brunet }; 10468c0cf40fSJerome Brunet }; 10478c0cf40fSJerome Brunet 10488c0cf40fSJerome Brunet tdmc_dout1_pins: tdmc_dout1 { 10498c0cf40fSJerome Brunet mux { 10508c0cf40fSJerome Brunet groups = "tdmc_dout1"; 10518c0cf40fSJerome Brunet function = "tdmc"; 10521c5cc1c8SJerome Brunet bias-disable; 10538c0cf40fSJerome Brunet }; 10548c0cf40fSJerome Brunet }; 10558c0cf40fSJerome Brunet 10568c0cf40fSJerome Brunet tdmc_dout2_pins: tdmc_dout2 { 10578c0cf40fSJerome Brunet mux { 10588c0cf40fSJerome Brunet groups = "tdmc_dout2"; 10598c0cf40fSJerome Brunet function = "tdmc"; 10601c5cc1c8SJerome Brunet bias-disable; 10618c0cf40fSJerome Brunet }; 10628c0cf40fSJerome Brunet }; 10638c0cf40fSJerome Brunet 10648c0cf40fSJerome Brunet tdmc_dout3_pins: tdmc_dout3 { 10658c0cf40fSJerome Brunet mux { 10668c0cf40fSJerome Brunet groups = "tdmc_dout3"; 10678c0cf40fSJerome Brunet function = "tdmc"; 10681c5cc1c8SJerome Brunet bias-disable; 10698c0cf40fSJerome Brunet }; 10708c0cf40fSJerome Brunet }; 10718c0cf40fSJerome Brunet 10728c0cf40fSJerome Brunet uart_a_pins: uart_a { 10738c0cf40fSJerome Brunet mux { 10748c0cf40fSJerome Brunet groups = "uart_tx_a", 10758c0cf40fSJerome Brunet "uart_rx_a"; 10768c0cf40fSJerome Brunet function = "uart_a"; 10771c5cc1c8SJerome Brunet bias-disable; 10788c0cf40fSJerome Brunet }; 10798c0cf40fSJerome Brunet }; 10808c0cf40fSJerome Brunet 10818c0cf40fSJerome Brunet uart_a_cts_rts_pins: uart_a_cts_rts { 10828c0cf40fSJerome Brunet mux { 10838c0cf40fSJerome Brunet groups = "uart_cts_a", 10848c0cf40fSJerome Brunet "uart_rts_a"; 10858c0cf40fSJerome Brunet function = "uart_a"; 10861c5cc1c8SJerome Brunet bias-disable; 10878c0cf40fSJerome Brunet }; 10888c0cf40fSJerome Brunet }; 10898c0cf40fSJerome Brunet 10908c0cf40fSJerome Brunet uart_b_x_pins: uart_b_x { 10918c0cf40fSJerome Brunet mux { 10928c0cf40fSJerome Brunet groups = "uart_tx_b_x", 10938c0cf40fSJerome Brunet "uart_rx_b_x"; 10948c0cf40fSJerome Brunet function = "uart_b"; 10951c5cc1c8SJerome Brunet bias-disable; 10968c0cf40fSJerome Brunet }; 10978c0cf40fSJerome Brunet }; 10988c0cf40fSJerome Brunet 10998c0cf40fSJerome Brunet uart_b_x_cts_rts_pins: uart_b_x_cts_rts { 11008c0cf40fSJerome Brunet mux { 11018c0cf40fSJerome Brunet groups = "uart_cts_b_x", 11028c0cf40fSJerome Brunet "uart_rts_b_x"; 11038c0cf40fSJerome Brunet function = "uart_b"; 11041c5cc1c8SJerome Brunet bias-disable; 11058c0cf40fSJerome Brunet }; 11068c0cf40fSJerome Brunet }; 11078c0cf40fSJerome Brunet 11088c0cf40fSJerome Brunet uart_b_z_pins: uart_b_z { 11098c0cf40fSJerome Brunet mux { 11108c0cf40fSJerome Brunet groups = "uart_tx_b_z", 11118c0cf40fSJerome Brunet "uart_rx_b_z"; 11128c0cf40fSJerome Brunet function = "uart_b"; 11131c5cc1c8SJerome Brunet bias-disable; 11148c0cf40fSJerome Brunet }; 11158c0cf40fSJerome Brunet }; 11168c0cf40fSJerome Brunet 11178c0cf40fSJerome Brunet uart_b_z_cts_rts_pins: uart_b_z_cts_rts { 11188c0cf40fSJerome Brunet mux { 11198c0cf40fSJerome Brunet groups = "uart_cts_b_z", 11208c0cf40fSJerome Brunet "uart_rts_b_z"; 11218c0cf40fSJerome Brunet function = "uart_b"; 11221c5cc1c8SJerome Brunet bias-disable; 11238c0cf40fSJerome Brunet }; 11248c0cf40fSJerome Brunet }; 11258c0cf40fSJerome Brunet 11268c0cf40fSJerome Brunet uart_ao_b_z_pins: uart_ao_b_z { 11278c0cf40fSJerome Brunet mux { 11288c0cf40fSJerome Brunet groups = "uart_ao_tx_b_z", 11298c0cf40fSJerome Brunet "uart_ao_rx_b_z"; 11308c0cf40fSJerome Brunet function = "uart_ao_b_z"; 11311c5cc1c8SJerome Brunet bias-disable; 11328c0cf40fSJerome Brunet }; 11338c0cf40fSJerome Brunet }; 11348c0cf40fSJerome Brunet 11358c0cf40fSJerome Brunet uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts { 11368c0cf40fSJerome Brunet mux { 11378c0cf40fSJerome Brunet groups = "uart_ao_cts_b_z", 11388c0cf40fSJerome Brunet "uart_ao_rts_b_z"; 11398c0cf40fSJerome Brunet function = "uart_ao_b_z"; 11401c5cc1c8SJerome Brunet bias-disable; 11418c0cf40fSJerome Brunet }; 11428c0cf40fSJerome Brunet }; 11438c0cf40fSJerome Brunet }; 11448c0cf40fSJerome Brunet }; 11458c0cf40fSJerome Brunet 11468c0cf40fSJerome Brunet hiubus: bus@ff63c000 { 11478c0cf40fSJerome Brunet compatible = "simple-bus"; 11488c0cf40fSJerome Brunet reg = <0x0 0xff63c000 0x0 0x1c00>; 11498c0cf40fSJerome Brunet #address-cells = <2>; 11508c0cf40fSJerome Brunet #size-cells = <2>; 11518c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; 11528c0cf40fSJerome Brunet 11538c0cf40fSJerome Brunet sysctrl: system-controller@0 { 11548c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-hhi-sysctrl", 1155445f2bdaSNeil Armstrong "simple-mfd", "syscon"; 11568c0cf40fSJerome Brunet reg = <0 0 0 0x400>; 11578c0cf40fSJerome Brunet 11588c0cf40fSJerome Brunet clkc: clock-controller { 11598c0cf40fSJerome Brunet compatible = "amlogic,axg-clkc"; 11608c0cf40fSJerome Brunet #clock-cells = <1>; 116116361ff2SJerome Brunet clocks = <&xtal>; 116216361ff2SJerome Brunet clock-names = "xtal"; 11638c0cf40fSJerome Brunet }; 116478a6dcb5SNeil Armstrong 116578a6dcb5SNeil Armstrong pwrc: power-controller { 116678a6dcb5SNeil Armstrong compatible = "amlogic,meson-axg-pwrc"; 116778a6dcb5SNeil Armstrong #power-domain-cells = <1>; 116878a6dcb5SNeil Armstrong amlogic,ao-sysctrl = <&sysctrl_AO>; 116978a6dcb5SNeil Armstrong resets = <&reset RESET_VIU>, 117078a6dcb5SNeil Armstrong <&reset RESET_VENC>, 117178a6dcb5SNeil Armstrong <&reset RESET_VCBUS>, 117278a6dcb5SNeil Armstrong <&reset RESET_VENCL>, 117378a6dcb5SNeil Armstrong <&reset RESET_VID_LOCK>; 117478a6dcb5SNeil Armstrong reset-names = "viu", "venc", "vcbus", 117578a6dcb5SNeil Armstrong "vencl", "vid_lock"; 117678a6dcb5SNeil Armstrong clocks = <&clkc CLKID_VPU>, 117778a6dcb5SNeil Armstrong <&clkc CLKID_VAPB>; 117878a6dcb5SNeil Armstrong clock-names = "vpu", "vapb"; 117978a6dcb5SNeil Armstrong /* 118078a6dcb5SNeil Armstrong * VPU clocking is provided by two identical clock paths 118178a6dcb5SNeil Armstrong * VPU_0 and VPU_1 muxed to a single clock by a glitch 118278a6dcb5SNeil Armstrong * free mux to safely change frequency while running. 118378a6dcb5SNeil Armstrong * Same for VAPB but with a final gate after the glitch free mux. 118478a6dcb5SNeil Armstrong */ 118578a6dcb5SNeil Armstrong assigned-clocks = <&clkc CLKID_VPU_0_SEL>, 118678a6dcb5SNeil Armstrong <&clkc CLKID_VPU_0>, 118778a6dcb5SNeil Armstrong <&clkc CLKID_VPU>, /* Glitch free mux */ 118878a6dcb5SNeil Armstrong <&clkc CLKID_VAPB_0_SEL>, 118978a6dcb5SNeil Armstrong <&clkc CLKID_VAPB_0>, 119078a6dcb5SNeil Armstrong <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */ 119178a6dcb5SNeil Armstrong assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>, 119278a6dcb5SNeil Armstrong <0>, /* Do Nothing */ 119378a6dcb5SNeil Armstrong <&clkc CLKID_VPU_0>, 119478a6dcb5SNeil Armstrong <&clkc CLKID_FCLK_DIV4>, 119578a6dcb5SNeil Armstrong <0>, /* Do Nothing */ 119678a6dcb5SNeil Armstrong <&clkc CLKID_VAPB_0>; 119778a6dcb5SNeil Armstrong assigned-clock-rates = <0>, /* Do Nothing */ 119878a6dcb5SNeil Armstrong <250000000>, 119978a6dcb5SNeil Armstrong <0>, /* Do Nothing */ 120078a6dcb5SNeil Armstrong <0>, /* Do Nothing */ 120178a6dcb5SNeil Armstrong <250000000>, 120278a6dcb5SNeil Armstrong <0>; /* Do Nothing */ 120378a6dcb5SNeil Armstrong }; 1204*3d3f1dfaSNeil Armstrong 1205*3d3f1dfaSNeil Armstrong mipi_pcie_analog_dphy: phy { 1206*3d3f1dfaSNeil Armstrong compatible = "amlogic,axg-mipi-pcie-analog-phy"; 1207*3d3f1dfaSNeil Armstrong #phy-cells = <0>; 1208*3d3f1dfaSNeil Armstrong status = "disabled"; 1209*3d3f1dfaSNeil Armstrong }; 12108c0cf40fSJerome Brunet }; 12118c0cf40fSJerome Brunet }; 12128c0cf40fSJerome Brunet 12139fdff382SJerome Brunet mailbox: mailbox@ff63c404 { 121401efc19cSNeil Armstrong compatible = "amlogic,meson-gxbb-mhu"; 12159fdff382SJerome Brunet reg = <0 0xff63c404 0 0x4c>; 12168c0cf40fSJerome Brunet interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>, 12178c0cf40fSJerome Brunet <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>, 12188c0cf40fSJerome Brunet <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>; 12198c0cf40fSJerome Brunet #mbox-cells = <1>; 1220221cf34bSNan Li }; 1221221cf34bSNan Li 1222*3d3f1dfaSNeil Armstrong mipi_dphy: phy@ff640000 { 1223*3d3f1dfaSNeil Armstrong compatible = "amlogic,axg-mipi-dphy"; 1224*3d3f1dfaSNeil Armstrong reg = <0x0 0xff640000 0x0 0x100>; 1225*3d3f1dfaSNeil Armstrong clocks = <&clkc CLKID_MIPI_DSI_PHY>; 1226*3d3f1dfaSNeil Armstrong clock-names = "pclk"; 1227*3d3f1dfaSNeil Armstrong resets = <&reset RESET_MIPI_PHY>; 1228*3d3f1dfaSNeil Armstrong reset-names = "phy"; 1229*3d3f1dfaSNeil Armstrong phys = <&mipi_pcie_analog_dphy>; 1230*3d3f1dfaSNeil Armstrong phy-names = "analog"; 1231*3d3f1dfaSNeil Armstrong #phy-cells = <0>; 1232*3d3f1dfaSNeil Armstrong status = "disabled"; 1233*3d3f1dfaSNeil Armstrong }; 1234*3d3f1dfaSNeil Armstrong 12358909e722SJerome Brunet audio: bus@ff642000 { 12368909e722SJerome Brunet compatible = "simple-bus"; 12378909e722SJerome Brunet reg = <0x0 0xff642000 0x0 0x2000>; 12388909e722SJerome Brunet #address-cells = <2>; 12398909e722SJerome Brunet #size-cells = <2>; 12408909e722SJerome Brunet ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>; 12418909e722SJerome Brunet 12428909e722SJerome Brunet clkc_audio: clock-controller@0 { 12438909e722SJerome Brunet compatible = "amlogic,axg-audio-clkc"; 12448909e722SJerome Brunet reg = <0x0 0x0 0x0 0xb4>; 12458909e722SJerome Brunet #clock-cells = <1>; 12468909e722SJerome Brunet 12478909e722SJerome Brunet clocks = <&clkc CLKID_AUDIO>, 12488909e722SJerome Brunet <&clkc CLKID_MPLL0>, 12498909e722SJerome Brunet <&clkc CLKID_MPLL1>, 12508909e722SJerome Brunet <&clkc CLKID_MPLL2>, 12518909e722SJerome Brunet <&clkc CLKID_MPLL3>, 12528909e722SJerome Brunet <&clkc CLKID_HIFI_PLL>, 12538909e722SJerome Brunet <&clkc CLKID_FCLK_DIV3>, 12548909e722SJerome Brunet <&clkc CLKID_FCLK_DIV4>, 12558909e722SJerome Brunet <&clkc CLKID_GP0_PLL>; 12568909e722SJerome Brunet clock-names = "pclk", 12578909e722SJerome Brunet "mst_in0", 12588909e722SJerome Brunet "mst_in1", 12598909e722SJerome Brunet "mst_in2", 12608909e722SJerome Brunet "mst_in3", 12618909e722SJerome Brunet "mst_in4", 12628909e722SJerome Brunet "mst_in5", 12638909e722SJerome Brunet "mst_in6", 12648909e722SJerome Brunet "mst_in7"; 12658909e722SJerome Brunet 12668909e722SJerome Brunet resets = <&reset RESET_AUDIO>; 12678909e722SJerome Brunet }; 126866d58a8fSJerome Brunet 1269f2b8f6a9SJerome Brunet toddr_a: audio-controller@100 { 1270f2b8f6a9SJerome Brunet compatible = "amlogic,axg-toddr"; 1271301b94d4SJerome Brunet reg = <0x0 0x100 0x0 0x2c>; 1272f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1273f2b8f6a9SJerome Brunet sound-name-prefix = "TODDR_A"; 1274f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>; 1275f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_A>; 1276f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_TODDR_A>; 1277be638075SJerome Brunet amlogic,fifo-depth = <512>; 1278f2b8f6a9SJerome Brunet status = "disabled"; 1279f2b8f6a9SJerome Brunet }; 1280f2b8f6a9SJerome Brunet 1281f2b8f6a9SJerome Brunet toddr_b: audio-controller@140 { 1282f2b8f6a9SJerome Brunet compatible = "amlogic,axg-toddr"; 1283301b94d4SJerome Brunet reg = <0x0 0x140 0x0 0x2c>; 1284f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1285f2b8f6a9SJerome Brunet sound-name-prefix = "TODDR_B"; 1286f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>; 1287f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_B>; 1288f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_TODDR_B>; 1289be638075SJerome Brunet amlogic,fifo-depth = <256>; 1290f2b8f6a9SJerome Brunet status = "disabled"; 1291f2b8f6a9SJerome Brunet }; 1292f2b8f6a9SJerome Brunet 1293f2b8f6a9SJerome Brunet toddr_c: audio-controller@180 { 1294f2b8f6a9SJerome Brunet compatible = "amlogic,axg-toddr"; 1295301b94d4SJerome Brunet reg = <0x0 0x180 0x0 0x2c>; 1296f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1297f2b8f6a9SJerome Brunet sound-name-prefix = "TODDR_C"; 1298f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>; 1299f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_C>; 1300f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_TODDR_C>; 1301be638075SJerome Brunet amlogic,fifo-depth = <256>; 1302f2b8f6a9SJerome Brunet status = "disabled"; 1303f2b8f6a9SJerome Brunet }; 1304f2b8f6a9SJerome Brunet 1305f2b8f6a9SJerome Brunet frddr_a: audio-controller@1c0 { 1306f2b8f6a9SJerome Brunet compatible = "amlogic,axg-frddr"; 1307301b94d4SJerome Brunet reg = <0x0 0x1c0 0x0 0x2c>; 1308f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1309f2b8f6a9SJerome Brunet sound-name-prefix = "FRDDR_A"; 1310f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; 1311f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; 1312f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_FRDDR_A>; 1313be638075SJerome Brunet amlogic,fifo-depth = <512>; 1314f2b8f6a9SJerome Brunet status = "disabled"; 1315f2b8f6a9SJerome Brunet }; 1316f2b8f6a9SJerome Brunet 1317f2b8f6a9SJerome Brunet frddr_b: audio-controller@200 { 1318f2b8f6a9SJerome Brunet compatible = "amlogic,axg-frddr"; 1319301b94d4SJerome Brunet reg = <0x0 0x200 0x0 0x2c>; 1320f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1321f2b8f6a9SJerome Brunet sound-name-prefix = "FRDDR_B"; 1322f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>; 1323f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_B>; 1324f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_FRDDR_B>; 1325be638075SJerome Brunet amlogic,fifo-depth = <256>; 1326f2b8f6a9SJerome Brunet status = "disabled"; 1327f2b8f6a9SJerome Brunet }; 1328f2b8f6a9SJerome Brunet 1329f2b8f6a9SJerome Brunet frddr_c: audio-controller@240 { 1330f2b8f6a9SJerome Brunet compatible = "amlogic,axg-frddr"; 1331301b94d4SJerome Brunet reg = <0x0 0x240 0x0 0x2c>; 1332f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1333f2b8f6a9SJerome Brunet sound-name-prefix = "FRDDR_C"; 1334f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>; 1335f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_C>; 1336f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_FRDDR_C>; 1337be638075SJerome Brunet amlogic,fifo-depth = <256>; 1338f2b8f6a9SJerome Brunet status = "disabled"; 1339f2b8f6a9SJerome Brunet }; 1340f2b8f6a9SJerome Brunet 134166d58a8fSJerome Brunet arb: reset-controller@280 { 134266d58a8fSJerome Brunet compatible = "amlogic,meson-axg-audio-arb"; 134366d58a8fSJerome Brunet reg = <0x0 0x280 0x0 0x4>; 134466d58a8fSJerome Brunet #reset-cells = <1>; 134566d58a8fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; 134666d58a8fSJerome Brunet }; 1347f08c52deSJerome Brunet 1348bf8e4790SJerome Brunet tdmin_a: audio-controller@300 { 1349bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1350bf8e4790SJerome Brunet reg = <0x0 0x300 0x0 0x40>; 1351bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_A"; 1352bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_A>, 1353bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>, 1354bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>, 1355bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>, 1356bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>; 1357bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1358bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1359bf8e4790SJerome Brunet status = "disabled"; 1360bf8e4790SJerome Brunet }; 1361bf8e4790SJerome Brunet 1362bf8e4790SJerome Brunet tdmin_b: audio-controller@340 { 1363bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1364bf8e4790SJerome Brunet reg = <0x0 0x340 0x0 0x40>; 1365bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_B"; 1366bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_B>, 1367bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>, 1368bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>, 1369bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>, 1370bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>; 1371bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1372bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1373bf8e4790SJerome Brunet status = "disabled"; 1374bf8e4790SJerome Brunet }; 1375bf8e4790SJerome Brunet 1376bf8e4790SJerome Brunet tdmin_c: audio-controller@380 { 1377bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1378bf8e4790SJerome Brunet reg = <0x0 0x380 0x0 0x40>; 1379bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_C"; 1380bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_C>, 1381bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>, 1382bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>, 1383bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>, 1384bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>; 1385bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1386bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1387bf8e4790SJerome Brunet status = "disabled"; 1388bf8e4790SJerome Brunet }; 1389bf8e4790SJerome Brunet 1390bf8e4790SJerome Brunet tdmin_lb: audio-controller@3c0 { 1391bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1392bf8e4790SJerome Brunet reg = <0x0 0x3c0 0x0 0x40>; 1393bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_LB"; 1394bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>, 1395bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>, 1396bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>, 1397bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>, 1398bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>; 1399bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1400bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1401bf8e4790SJerome Brunet status = "disabled"; 1402bf8e4790SJerome Brunet }; 1403bf8e4790SJerome Brunet 14045e6a18acSJerome Brunet spdifin: audio-controller@400 { 14055e6a18acSJerome Brunet compatible = "amlogic,axg-spdifin"; 14065e6a18acSJerome Brunet reg = <0x0 0x400 0x0 0x30>; 14075e6a18acSJerome Brunet #sound-dai-cells = <0>; 14085e6a18acSJerome Brunet sound-name-prefix = "SPDIFIN"; 14095e6a18acSJerome Brunet interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>; 14105e6a18acSJerome Brunet clocks = <&clkc_audio AUD_CLKID_SPDIFIN>, 14115e6a18acSJerome Brunet <&clkc_audio AUD_CLKID_SPDIFIN_CLK>; 14125e6a18acSJerome Brunet clock-names = "pclk", "refclk"; 14135e6a18acSJerome Brunet status = "disabled"; 14145e6a18acSJerome Brunet }; 14155e6a18acSJerome Brunet 1416f08c52deSJerome Brunet spdifout: audio-controller@480 { 1417f08c52deSJerome Brunet compatible = "amlogic,axg-spdifout"; 1418f08c52deSJerome Brunet reg = <0x0 0x480 0x0 0x50>; 1419f08c52deSJerome Brunet #sound-dai-cells = <0>; 1420f08c52deSJerome Brunet sound-name-prefix = "SPDIFOUT"; 1421f08c52deSJerome Brunet clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>, 1422f08c52deSJerome Brunet <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>; 1423f08c52deSJerome Brunet clock-names = "pclk", "mclk"; 1424f08c52deSJerome Brunet status = "disabled"; 1425f08c52deSJerome Brunet }; 1426fd916739SJerome Brunet 1427fd916739SJerome Brunet tdmout_a: audio-controller@500 { 1428fd916739SJerome Brunet compatible = "amlogic,axg-tdmout"; 1429fd916739SJerome Brunet reg = <0x0 0x500 0x0 0x40>; 1430fd916739SJerome Brunet sound-name-prefix = "TDMOUT_A"; 1431fd916739SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>, 1432fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>, 1433fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>, 1434fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>, 1435fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>; 1436fd916739SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1437fd916739SJerome Brunet "lrclk", "lrclk_sel"; 1438fd916739SJerome Brunet status = "disabled"; 1439fd916739SJerome Brunet }; 1440fd916739SJerome Brunet 1441fd916739SJerome Brunet tdmout_b: audio-controller@540 { 1442fd916739SJerome Brunet compatible = "amlogic,axg-tdmout"; 1443fd916739SJerome Brunet reg = <0x0 0x540 0x0 0x40>; 1444fd916739SJerome Brunet sound-name-prefix = "TDMOUT_B"; 1445fd916739SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>, 1446fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>, 1447fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>, 1448fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>, 1449fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>; 1450fd916739SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1451fd916739SJerome Brunet "lrclk", "lrclk_sel"; 1452fd916739SJerome Brunet status = "disabled"; 1453fd916739SJerome Brunet }; 1454fd916739SJerome Brunet 1455fd916739SJerome Brunet tdmout_c: audio-controller@580 { 1456fd916739SJerome Brunet compatible = "amlogic,axg-tdmout"; 1457fd916739SJerome Brunet reg = <0x0 0x580 0x0 0x40>; 1458fd916739SJerome Brunet sound-name-prefix = "TDMOUT_C"; 1459fd916739SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>, 1460fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>, 1461fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>, 1462fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>, 1463fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>; 1464fd916739SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1465fd916739SJerome Brunet "lrclk", "lrclk_sel"; 1466fd916739SJerome Brunet status = "disabled"; 1467fd916739SJerome Brunet }; 14688909e722SJerome Brunet }; 14698909e722SJerome Brunet 14700cb6c604SKevin Hilman aobus: bus@ff800000 { 14719d59b708SYixun Lan compatible = "simple-bus"; 14729d59b708SYixun Lan reg = <0x0 0xff800000 0x0 0x100000>; 14739d59b708SYixun Lan #address-cells = <2>; 14749d59b708SYixun Lan #size-cells = <2>; 14759d59b708SYixun Lan ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; 14769d59b708SYixun Lan 1477e03421ecSQiufang Dai sysctrl_AO: sys-ctrl@0 { 1478445f2bdaSNeil Armstrong compatible = "amlogic,meson-axg-ao-sysctrl", "simple-mfd", "syscon"; 1479e03421ecSQiufang Dai reg = <0x0 0x0 0x0 0x100>; 1480e03421ecSQiufang Dai 1481e03421ecSQiufang Dai clkc_AO: clock-controller { 1482e03421ecSQiufang Dai compatible = "amlogic,meson-axg-aoclkc"; 1483e03421ecSQiufang Dai #clock-cells = <1>; 1484e03421ecSQiufang Dai #reset-cells = <1>; 148516361ff2SJerome Brunet clocks = <&xtal>, <&clkc CLKID_CLK81>; 148616361ff2SJerome Brunet clock-names = "xtal", "mpeg-clk"; 1487e03421ecSQiufang Dai }; 1488e03421ecSQiufang Dai }; 1489e03421ecSQiufang Dai 1490de05ded6SXingyu Chen pinctrl_aobus: pinctrl@14 { 1491de05ded6SXingyu Chen compatible = "amlogic,meson-axg-aobus-pinctrl"; 1492de05ded6SXingyu Chen #address-cells = <2>; 1493de05ded6SXingyu Chen #size-cells = <2>; 1494de05ded6SXingyu Chen ranges; 1495de05ded6SXingyu Chen 1496de05ded6SXingyu Chen gpio_ao: bank@14 { 1497de05ded6SXingyu Chen reg = <0x0 0x00014 0x0 0x8>, 1498de05ded6SXingyu Chen <0x0 0x0002c 0x0 0x4>, 1499de05ded6SXingyu Chen <0x0 0x00024 0x0 0x8>; 1500de05ded6SXingyu Chen reg-names = "mux", "pull", "gpio"; 1501de05ded6SXingyu Chen gpio-controller; 1502de05ded6SXingyu Chen #gpio-cells = <2>; 1503de05ded6SXingyu Chen gpio-ranges = <&pinctrl_aobus 0 0 15>; 1504de05ded6SXingyu Chen }; 15057bd46a79SYixun Lan 1506c054b6c2SJerome Brunet i2c_ao_sck_4_pins: i2c_ao_sck_4 { 1507c054b6c2SJerome Brunet mux { 1508c054b6c2SJerome Brunet groups = "i2c_ao_sck_4"; 1509c054b6c2SJerome Brunet function = "i2c_ao"; 15101c5cc1c8SJerome Brunet bias-disable; 1511c054b6c2SJerome Brunet }; 1512c054b6c2SJerome Brunet }; 1513c054b6c2SJerome Brunet 1514c054b6c2SJerome Brunet i2c_ao_sck_8_pins: i2c_ao_sck_8 { 1515c054b6c2SJerome Brunet mux { 1516c054b6c2SJerome Brunet groups = "i2c_ao_sck_8"; 1517c054b6c2SJerome Brunet function = "i2c_ao"; 15181c5cc1c8SJerome Brunet bias-disable; 1519c054b6c2SJerome Brunet }; 1520c054b6c2SJerome Brunet }; 1521c054b6c2SJerome Brunet 1522c054b6c2SJerome Brunet i2c_ao_sck_10_pins: i2c_ao_sck_10 { 1523c054b6c2SJerome Brunet mux { 1524c054b6c2SJerome Brunet groups = "i2c_ao_sck_10"; 1525c054b6c2SJerome Brunet function = "i2c_ao"; 15261c5cc1c8SJerome Brunet bias-disable; 1527c054b6c2SJerome Brunet }; 1528c054b6c2SJerome Brunet }; 1529c054b6c2SJerome Brunet 1530c054b6c2SJerome Brunet i2c_ao_sda_5_pins: i2c_ao_sda_5 { 1531c054b6c2SJerome Brunet mux { 1532c054b6c2SJerome Brunet groups = "i2c_ao_sda_5"; 1533c054b6c2SJerome Brunet function = "i2c_ao"; 15341c5cc1c8SJerome Brunet bias-disable; 1535c054b6c2SJerome Brunet }; 1536c054b6c2SJerome Brunet }; 1537c054b6c2SJerome Brunet 1538c054b6c2SJerome Brunet i2c_ao_sda_9_pins: i2c_ao_sda_9 { 1539c054b6c2SJerome Brunet mux { 1540c054b6c2SJerome Brunet groups = "i2c_ao_sda_9"; 1541c054b6c2SJerome Brunet function = "i2c_ao"; 15421c5cc1c8SJerome Brunet bias-disable; 1543c054b6c2SJerome Brunet }; 1544c054b6c2SJerome Brunet }; 1545c054b6c2SJerome Brunet 1546c054b6c2SJerome Brunet i2c_ao_sda_11_pins: i2c_ao_sda_11 { 1547c054b6c2SJerome Brunet mux { 1548c054b6c2SJerome Brunet groups = "i2c_ao_sda_11"; 1549c054b6c2SJerome Brunet function = "i2c_ao"; 15501c5cc1c8SJerome Brunet bias-disable; 1551c054b6c2SJerome Brunet }; 1552c054b6c2SJerome Brunet }; 1553c054b6c2SJerome Brunet 15547bd46a79SYixun Lan remote_input_ao_pins: remote_input_ao { 15557bd46a79SYixun Lan mux { 15567bd46a79SYixun Lan groups = "remote_input_ao"; 15577bd46a79SYixun Lan function = "remote_input_ao"; 15581c5cc1c8SJerome Brunet bias-disable; 15597bd46a79SYixun Lan }; 15607bd46a79SYixun Lan }; 15614eae66a6SYixun Lan 15624eae66a6SYixun Lan uart_ao_a_pins: uart_ao_a { 15634eae66a6SYixun Lan mux { 15644eae66a6SYixun Lan groups = "uart_ao_tx_a", 15654eae66a6SYixun Lan "uart_ao_rx_a"; 15664eae66a6SYixun Lan function = "uart_ao_a"; 15671c5cc1c8SJerome Brunet bias-disable; 15684eae66a6SYixun Lan }; 15694eae66a6SYixun Lan }; 15704eae66a6SYixun Lan 15714eae66a6SYixun Lan uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts { 15724eae66a6SYixun Lan mux { 15734eae66a6SYixun Lan groups = "uart_ao_cts_a", 15744eae66a6SYixun Lan "uart_ao_rts_a"; 15754eae66a6SYixun Lan function = "uart_ao_a"; 15761c5cc1c8SJerome Brunet bias-disable; 15774eae66a6SYixun Lan }; 15784eae66a6SYixun Lan }; 15794eae66a6SYixun Lan 15804eae66a6SYixun Lan uart_ao_b_pins: uart_ao_b { 15814eae66a6SYixun Lan mux { 15824eae66a6SYixun Lan groups = "uart_ao_tx_b", 15834eae66a6SYixun Lan "uart_ao_rx_b"; 15844eae66a6SYixun Lan function = "uart_ao_b"; 15851c5cc1c8SJerome Brunet bias-disable; 15864eae66a6SYixun Lan }; 15874eae66a6SYixun Lan }; 15884eae66a6SYixun Lan 15894eae66a6SYixun Lan uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { 15904eae66a6SYixun Lan mux { 15914eae66a6SYixun Lan groups = "uart_ao_cts_b", 15924eae66a6SYixun Lan "uart_ao_rts_b"; 15934eae66a6SYixun Lan function = "uart_ao_b"; 15941c5cc1c8SJerome Brunet bias-disable; 15954eae66a6SYixun Lan }; 15964eae66a6SYixun Lan }; 1597de05ded6SXingyu Chen }; 1598de05ded6SXingyu Chen 1599a04c18cbSJerome Brunet sec_AO: ao-secure@140 { 1600a04c18cbSJerome Brunet compatible = "amlogic,meson-gx-ao-secure", "syscon"; 1601a04c18cbSJerome Brunet reg = <0x0 0x140 0x0 0x140>; 1602a04c18cbSJerome Brunet amlogic,has-chip-id; 1603a04c18cbSJerome Brunet }; 1604a04c18cbSJerome Brunet 16054a81e5ddSJian Hu pwm_AO_cd: pwm@2000 { 1606b4ff05caSJerome Brunet compatible = "amlogic,meson-axg-ao-pwm"; 16074a81e5ddSJian Hu reg = <0x0 0x02000 0x0 0x20>; 16084a81e5ddSJian Hu #pwm-cells = <3>; 16094a81e5ddSJian Hu status = "disabled"; 16104a81e5ddSJian Hu }; 16114a81e5ddSJian Hu 16129d59b708SYixun Lan uart_AO: serial@3000 { 16139d59b708SYixun Lan compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 16149d59b708SYixun Lan reg = <0x0 0x3000 0x0 0x18>; 16159d59b708SYixun Lan interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; 16169adda353SYixun Lan clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; 16179d59b708SYixun Lan clock-names = "xtal", "pclk", "baud"; 16189d59b708SYixun Lan status = "disabled"; 16199d59b708SYixun Lan }; 16209d59b708SYixun Lan 16219d59b708SYixun Lan uart_AO_B: serial@4000 { 16229d59b708SYixun Lan compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 16239d59b708SYixun Lan reg = <0x0 0x4000 0x0 0x18>; 16249d59b708SYixun Lan interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; 16259adda353SYixun Lan clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; 16269d59b708SYixun Lan clock-names = "xtal", "pclk", "baud"; 16279d59b708SYixun Lan status = "disabled"; 16289d59b708SYixun Lan }; 16297bd46a79SYixun Lan 16308c0cf40fSJerome Brunet i2c_AO: i2c@5000 { 16318c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 16328c0cf40fSJerome Brunet reg = <0x0 0x05000 0x0 0x20>; 16338c0cf40fSJerome Brunet interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; 16348c0cf40fSJerome Brunet clocks = <&clkc CLKID_AO_I2C>; 16358c0cf40fSJerome Brunet #address-cells = <1>; 16368c0cf40fSJerome Brunet #size-cells = <0>; 16378c0cf40fSJerome Brunet status = "disabled"; 16388c0cf40fSJerome Brunet }; 16398c0cf40fSJerome Brunet 16408c0cf40fSJerome Brunet pwm_AO_ab: pwm@7000 { 16418c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-ao-pwm"; 16428c0cf40fSJerome Brunet reg = <0x0 0x07000 0x0 0x20>; 16438c0cf40fSJerome Brunet #pwm-cells = <3>; 16448c0cf40fSJerome Brunet status = "disabled"; 16458c0cf40fSJerome Brunet }; 16468c0cf40fSJerome Brunet 16477bd46a79SYixun Lan ir: ir@8000 { 16487bd46a79SYixun Lan compatible = "amlogic,meson-gxbb-ir"; 16497bd46a79SYixun Lan reg = <0x0 0x8000 0x0 0x20>; 16507bd46a79SYixun Lan interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; 16517bd46a79SYixun Lan status = "disabled"; 16527bd46a79SYixun Lan }; 1653a51b74eaSXingyu Chen 1654a51b74eaSXingyu Chen saradc: adc@9000 { 1655a51b74eaSXingyu Chen compatible = "amlogic,meson-axg-saradc", 1656a51b74eaSXingyu Chen "amlogic,meson-saradc"; 1657a51b74eaSXingyu Chen reg = <0x0 0x9000 0x0 0x38>; 1658a51b74eaSXingyu Chen #io-channel-cells = <1>; 1659a51b74eaSXingyu Chen interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; 1660a51b74eaSXingyu Chen clocks = <&xtal>, 1661a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC>, 1662a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC_CLK>, 1663a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC_SEL>; 1664a51b74eaSXingyu Chen clock-names = "clkin", "core", "adc_clk", "adc_sel"; 1665a51b74eaSXingyu Chen status = "disabled"; 1666a51b74eaSXingyu Chen }; 16679d59b708SYixun Lan }; 16688c0cf40fSJerome Brunet 16698c0cf40fSJerome Brunet gic: interrupt-controller@ffc01000 { 16708c0cf40fSJerome Brunet compatible = "arm,gic-400"; 16718c0cf40fSJerome Brunet reg = <0x0 0xffc01000 0 0x1000>, 16728c0cf40fSJerome Brunet <0x0 0xffc02000 0 0x2000>, 16738c0cf40fSJerome Brunet <0x0 0xffc04000 0 0x2000>, 16748c0cf40fSJerome Brunet <0x0 0xffc06000 0 0x2000>; 16758c0cf40fSJerome Brunet interrupt-controller; 16768c0cf40fSJerome Brunet interrupts = <GIC_PPI 9 16778c0cf40fSJerome Brunet (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 16788c0cf40fSJerome Brunet #interrupt-cells = <3>; 16798c0cf40fSJerome Brunet #address-cells = <0>; 16808c0cf40fSJerome Brunet }; 16818c0cf40fSJerome Brunet 16828c0cf40fSJerome Brunet cbus: bus@ffd00000 { 16838c0cf40fSJerome Brunet compatible = "simple-bus"; 16848c0cf40fSJerome Brunet reg = <0x0 0xffd00000 0x0 0x25000>; 16858c0cf40fSJerome Brunet #address-cells = <2>; 16868c0cf40fSJerome Brunet #size-cells = <2>; 16878c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; 16888c0cf40fSJerome Brunet 16898c0cf40fSJerome Brunet reset: reset-controller@1004 { 16908c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-reset"; 16918c0cf40fSJerome Brunet reg = <0x0 0x01004 0x0 0x9c>; 16928c0cf40fSJerome Brunet #reset-cells = <1>; 16938c0cf40fSJerome Brunet }; 16948c0cf40fSJerome Brunet 16958c0cf40fSJerome Brunet gpio_intc: interrupt-controller@f080 { 1696cbddb02eSCarlo Caione compatible = "amlogic,meson-axg-gpio-intc", 1697cbddb02eSCarlo Caione "amlogic,meson-gpio-intc"; 16988c0cf40fSJerome Brunet reg = <0x0 0xf080 0x0 0x10>; 16998c0cf40fSJerome Brunet interrupt-controller; 17008c0cf40fSJerome Brunet #interrupt-cells = <2>; 17018c0cf40fSJerome Brunet amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; 17028c0cf40fSJerome Brunet }; 17038c0cf40fSJerome Brunet 17046f31ba17SCarlo Caione watchdog@f0d0 { 17056f31ba17SCarlo Caione compatible = "amlogic,meson-gxbb-wdt"; 17066f31ba17SCarlo Caione reg = <0x0 0xf0d0 0x0 0x10>; 17076f31ba17SCarlo Caione clocks = <&xtal>; 17086f31ba17SCarlo Caione }; 17096f31ba17SCarlo Caione 17108c0cf40fSJerome Brunet pwm_ab: pwm@1b000 { 17118c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-ee-pwm"; 17128c0cf40fSJerome Brunet reg = <0x0 0x1b000 0x0 0x20>; 17138c0cf40fSJerome Brunet #pwm-cells = <3>; 17148c0cf40fSJerome Brunet status = "disabled"; 17158c0cf40fSJerome Brunet }; 17168c0cf40fSJerome Brunet 17178c0cf40fSJerome Brunet pwm_cd: pwm@1a000 { 17188c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-ee-pwm"; 17198c0cf40fSJerome Brunet reg = <0x0 0x1a000 0x0 0x20>; 17208c0cf40fSJerome Brunet #pwm-cells = <3>; 17218c0cf40fSJerome Brunet status = "disabled"; 17228c0cf40fSJerome Brunet }; 17238c0cf40fSJerome Brunet 17248c0cf40fSJerome Brunet spicc0: spi@13000 { 17258c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-spicc"; 17268c0cf40fSJerome Brunet reg = <0x0 0x13000 0x0 0x3c>; 17278c0cf40fSJerome Brunet interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 17288c0cf40fSJerome Brunet clocks = <&clkc CLKID_SPICC0>; 17298c0cf40fSJerome Brunet clock-names = "core"; 17308c0cf40fSJerome Brunet #address-cells = <1>; 17318c0cf40fSJerome Brunet #size-cells = <0>; 17328c0cf40fSJerome Brunet status = "disabled"; 17338c0cf40fSJerome Brunet }; 17348c0cf40fSJerome Brunet 17358c0cf40fSJerome Brunet spicc1: spi@15000 { 17368c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-spicc"; 17378c0cf40fSJerome Brunet reg = <0x0 0x15000 0x0 0x3c>; 17388c0cf40fSJerome Brunet interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 17398c0cf40fSJerome Brunet clocks = <&clkc CLKID_SPICC1>; 17408c0cf40fSJerome Brunet clock-names = "core"; 17418c0cf40fSJerome Brunet #address-cells = <1>; 17428c0cf40fSJerome Brunet #size-cells = <0>; 17438c0cf40fSJerome Brunet status = "disabled"; 17448c0cf40fSJerome Brunet }; 17458c0cf40fSJerome Brunet 1746fea888bdSJerome Brunet clk_msr: clock-measure@18000 { 1747fea888bdSJerome Brunet compatible = "amlogic,meson-axg-clk-measure"; 1748fea888bdSJerome Brunet reg = <0x0 0x18000 0x0 0x10>; 1749fea888bdSJerome Brunet }; 1750fea888bdSJerome Brunet 17518c0cf40fSJerome Brunet i2c3: i2c@1c000 { 17528c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 17538c0cf40fSJerome Brunet reg = <0x0 0x1c000 0x0 0x20>; 17548c0cf40fSJerome Brunet interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>; 17558c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 17568c0cf40fSJerome Brunet #address-cells = <1>; 17578c0cf40fSJerome Brunet #size-cells = <0>; 17588c0cf40fSJerome Brunet status = "disabled"; 17598c0cf40fSJerome Brunet }; 17608c0cf40fSJerome Brunet 17618c0cf40fSJerome Brunet i2c2: i2c@1d000 { 17628c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 17638c0cf40fSJerome Brunet reg = <0x0 0x1d000 0x0 0x20>; 17648c0cf40fSJerome Brunet interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; 17658c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 17668c0cf40fSJerome Brunet #address-cells = <1>; 17678c0cf40fSJerome Brunet #size-cells = <0>; 17688c0cf40fSJerome Brunet status = "disabled"; 17698c0cf40fSJerome Brunet }; 17708c0cf40fSJerome Brunet 17718c0cf40fSJerome Brunet i2c1: i2c@1e000 { 17728c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 17738c0cf40fSJerome Brunet reg = <0x0 0x1e000 0x0 0x20>; 17748c0cf40fSJerome Brunet interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; 17758c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 17768c0cf40fSJerome Brunet #address-cells = <1>; 17778c0cf40fSJerome Brunet #size-cells = <0>; 17788c0cf40fSJerome Brunet status = "disabled"; 17798c0cf40fSJerome Brunet }; 17808c0cf40fSJerome Brunet 17818c0cf40fSJerome Brunet i2c0: i2c@1f000 { 17828c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 17838c0cf40fSJerome Brunet reg = <0x0 0x1f000 0x0 0x20>; 17848c0cf40fSJerome Brunet interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; 17858c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 17868c0cf40fSJerome Brunet #address-cells = <1>; 17878c0cf40fSJerome Brunet #size-cells = <0>; 17888c0cf40fSJerome Brunet status = "disabled"; 17898c0cf40fSJerome Brunet }; 17908c0cf40fSJerome Brunet 17918c0cf40fSJerome Brunet uart_B: serial@23000 { 17928c0cf40fSJerome Brunet compatible = "amlogic,meson-gx-uart"; 17938c0cf40fSJerome Brunet reg = <0x0 0x23000 0x0 0x18>; 17948c0cf40fSJerome Brunet interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; 17958c0cf40fSJerome Brunet status = "disabled"; 17968c0cf40fSJerome Brunet clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; 17978c0cf40fSJerome Brunet clock-names = "xtal", "pclk", "baud"; 17988c0cf40fSJerome Brunet }; 17998c0cf40fSJerome Brunet 18008c0cf40fSJerome Brunet uart_A: serial@24000 { 18018c0cf40fSJerome Brunet compatible = "amlogic,meson-gx-uart"; 18028c0cf40fSJerome Brunet reg = <0x0 0x24000 0x0 0x18>; 18038c0cf40fSJerome Brunet interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; 18048c0cf40fSJerome Brunet status = "disabled"; 18058c0cf40fSJerome Brunet clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; 18068c0cf40fSJerome Brunet clock-names = "xtal", "pclk", "baud"; 18078c0cf40fSJerome Brunet }; 18088c0cf40fSJerome Brunet }; 18098c0cf40fSJerome Brunet 18108c0cf40fSJerome Brunet apb: bus@ffe00000 { 18118c0cf40fSJerome Brunet compatible = "simple-bus"; 18128c0cf40fSJerome Brunet reg = <0x0 0xffe00000 0x0 0x200000>; 18138c0cf40fSJerome Brunet #address-cells = <2>; 18148c0cf40fSJerome Brunet #size-cells = <2>; 18158c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>; 18168c0cf40fSJerome Brunet 18178c0cf40fSJerome Brunet sd_emmc_b: sd@5000 { 18188c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-mmc"; 18198c0cf40fSJerome Brunet reg = <0x0 0x5000 0x0 0x800>; 18208c0cf40fSJerome Brunet interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>; 18218c0cf40fSJerome Brunet status = "disabled"; 18228c0cf40fSJerome Brunet clocks = <&clkc CLKID_SD_EMMC_B>, 18238c0cf40fSJerome Brunet <&clkc CLKID_SD_EMMC_B_CLK0>, 18248c0cf40fSJerome Brunet <&clkc CLKID_FCLK_DIV2>; 18258c0cf40fSJerome Brunet clock-names = "core", "clkin0", "clkin1"; 18268c0cf40fSJerome Brunet resets = <&reset RESET_SD_EMMC_B>; 18278c0cf40fSJerome Brunet }; 18288c0cf40fSJerome Brunet 18298c0cf40fSJerome Brunet sd_emmc_c: mmc@7000 { 18308c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-mmc"; 18318c0cf40fSJerome Brunet reg = <0x0 0x7000 0x0 0x800>; 18328c0cf40fSJerome Brunet interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>; 18338c0cf40fSJerome Brunet status = "disabled"; 18348c0cf40fSJerome Brunet clocks = <&clkc CLKID_SD_EMMC_C>, 18358c0cf40fSJerome Brunet <&clkc CLKID_SD_EMMC_C_CLK0>, 18368c0cf40fSJerome Brunet <&clkc CLKID_FCLK_DIV2>; 18378c0cf40fSJerome Brunet clock-names = "core", "clkin0", "clkin1"; 18388c0cf40fSJerome Brunet resets = <&reset RESET_SD_EMMC_C>; 18398c0cf40fSJerome Brunet }; 18401b208babSNeil Armstrong 18411b208babSNeil Armstrong usb2_phy1: phy@9020 { 18421b208babSNeil Armstrong compatible = "amlogic,meson-gxl-usb2-phy"; 18431b208babSNeil Armstrong #phy-cells = <0>; 18441b208babSNeil Armstrong reg = <0x0 0x9020 0x0 0x20>; 18451b208babSNeil Armstrong clocks = <&clkc CLKID_USB>; 18461b208babSNeil Armstrong clock-names = "phy"; 18471b208babSNeil Armstrong resets = <&reset RESET_USB_OTG>; 18481b208babSNeil Armstrong reset-names = "phy"; 18491b208babSNeil Armstrong }; 18508c0cf40fSJerome Brunet }; 18518c0cf40fSJerome Brunet 18528c0cf40fSJerome Brunet sram: sram@fffc0000 { 18539ecded10SNeil Armstrong compatible = "mmio-sram"; 18548c0cf40fSJerome Brunet reg = <0x0 0xfffc0000 0x0 0x20000>; 18558c0cf40fSJerome Brunet #address-cells = <1>; 18568c0cf40fSJerome Brunet #size-cells = <1>; 18578c0cf40fSJerome Brunet ranges = <0 0x0 0xfffc0000 0x20000>; 18588c0cf40fSJerome Brunet 18599ecded10SNeil Armstrong cpu_scp_lpri: scp-sram@13000 { 18608c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-scp-shmem"; 18618c0cf40fSJerome Brunet reg = <0x13000 0x400>; 18628c0cf40fSJerome Brunet }; 18638c0cf40fSJerome Brunet 18649ecded10SNeil Armstrong cpu_scp_hpri: scp-sram@13400 { 18658c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-scp-shmem"; 18668c0cf40fSJerome Brunet reg = <0x13400 0x400>; 18678c0cf40fSJerome Brunet }; 18688c0cf40fSJerome Brunet }; 18698c0cf40fSJerome Brunet }; 18708c0cf40fSJerome Brunet 18718c0cf40fSJerome Brunet timer { 18728c0cf40fSJerome Brunet compatible = "arm,armv8-timer"; 18738c0cf40fSJerome Brunet interrupts = <GIC_PPI 13 18748c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 18758c0cf40fSJerome Brunet <GIC_PPI 14 18768c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 18778c0cf40fSJerome Brunet <GIC_PPI 11 18788c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 18798c0cf40fSJerome Brunet <GIC_PPI 10 18808c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; 18818c0cf40fSJerome Brunet }; 18828c0cf40fSJerome Brunet 18838c0cf40fSJerome Brunet xtal: xtal-clk { 18848c0cf40fSJerome Brunet compatible = "fixed-clock"; 18858c0cf40fSJerome Brunet clock-frequency = <24000000>; 18868c0cf40fSJerome Brunet clock-output-names = "xtal"; 18878c0cf40fSJerome Brunet #clock-cells = <0>; 18889d59b708SYixun Lan }; 18899d59b708SYixun Lan}; 1890