1114abfe1SNeil Armstrong// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 29d59b708SYixun Lan/* 39d59b708SYixun Lan * Copyright (c) 2017 Amlogic, Inc. All rights reserved. 49d59b708SYixun Lan */ 59d59b708SYixun Lan 68c0cf40fSJerome Brunet#include <dt-bindings/clock/axg-aoclkc.h> 78909e722SJerome Brunet#include <dt-bindings/clock/axg-audio-clkc.h> 806b7a631SYixun Lan#include <dt-bindings/clock/axg-clkc.h> 98c0cf40fSJerome Brunet#include <dt-bindings/gpio/gpio.h> 10221cf34bSNan Li#include <dt-bindings/gpio/meson-axg-gpio.h> 118c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/irq.h> 128c0cf40fSJerome Brunet#include <dt-bindings/interrupt-controller/arm-gic.h> 13f2b8f6a9SJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h> 148c0cf40fSJerome Brunet#include <dt-bindings/reset/amlogic,meson-axg-reset.h> 159d59b708SYixun Lan 169d59b708SYixun Lan/ { 179d59b708SYixun Lan compatible = "amlogic,meson-axg"; 189d59b708SYixun Lan 199d59b708SYixun Lan interrupt-parent = <&gic>; 209d59b708SYixun Lan #address-cells = <2>; 219d59b708SYixun Lan #size-cells = <2>; 229d59b708SYixun Lan 23fbd5cbc5SJerome Brunet tdmif_a: audio-controller-0 { 248c0cf40fSJerome Brunet compatible = "amlogic,axg-tdm-iface"; 258c0cf40fSJerome Brunet #sound-dai-cells = <0>; 268c0cf40fSJerome Brunet sound-name-prefix = "TDM_A"; 278c0cf40fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>, 288c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_A_SCLK>, 298c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_A_LRCLK>; 308c0cf40fSJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 318c0cf40fSJerome Brunet status = "disabled"; 329d59b708SYixun Lan }; 339d59b708SYixun Lan 34fbd5cbc5SJerome Brunet tdmif_b: audio-controller-1 { 358c0cf40fSJerome Brunet compatible = "amlogic,axg-tdm-iface"; 368c0cf40fSJerome Brunet #sound-dai-cells = <0>; 378c0cf40fSJerome Brunet sound-name-prefix = "TDM_B"; 388c0cf40fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>, 398c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_B_SCLK>, 408c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_B_LRCLK>; 418c0cf40fSJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 428c0cf40fSJerome Brunet status = "disabled"; 439d59b708SYixun Lan }; 448c0cf40fSJerome Brunet 45fbd5cbc5SJerome Brunet tdmif_c: audio-controller-2 { 468c0cf40fSJerome Brunet compatible = "amlogic,axg-tdm-iface"; 478c0cf40fSJerome Brunet #sound-dai-cells = <0>; 488c0cf40fSJerome Brunet sound-name-prefix = "TDM_C"; 498c0cf40fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>, 508c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_C_SCLK>, 518c0cf40fSJerome Brunet <&clkc_audio AUD_CLKID_MST_C_LRCLK>; 528c0cf40fSJerome Brunet clock-names = "mclk", "sclk", "lrclk"; 538c0cf40fSJerome Brunet status = "disabled"; 548c0cf40fSJerome Brunet }; 558c0cf40fSJerome Brunet 568c0cf40fSJerome Brunet arm-pmu { 578c0cf40fSJerome Brunet compatible = "arm,cortex-a53-pmu"; 588c0cf40fSJerome Brunet interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 598c0cf40fSJerome Brunet <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 608c0cf40fSJerome Brunet <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, 618c0cf40fSJerome Brunet <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 628c0cf40fSJerome Brunet interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 639d59b708SYixun Lan }; 649d59b708SYixun Lan 659d59b708SYixun Lan cpus { 669d59b708SYixun Lan #address-cells = <0x2>; 679d59b708SYixun Lan #size-cells = <0x0>; 689d59b708SYixun Lan 699d59b708SYixun Lan cpu0: cpu@0 { 709d59b708SYixun Lan device_type = "cpu"; 7131af04cdSRob Herring compatible = "arm,cortex-a53"; 729d59b708SYixun Lan reg = <0x0 0x0>; 739d59b708SYixun Lan enable-method = "psci"; 749d59b708SYixun Lan next-level-cache = <&l2>; 752c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 769d59b708SYixun Lan }; 779d59b708SYixun Lan 789d59b708SYixun Lan cpu1: cpu@1 { 799d59b708SYixun Lan device_type = "cpu"; 8031af04cdSRob Herring compatible = "arm,cortex-a53"; 819d59b708SYixun Lan reg = <0x0 0x1>; 829d59b708SYixun Lan enable-method = "psci"; 839d59b708SYixun Lan next-level-cache = <&l2>; 842c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 859d59b708SYixun Lan }; 869d59b708SYixun Lan 879d59b708SYixun Lan cpu2: cpu@2 { 889d59b708SYixun Lan device_type = "cpu"; 8931af04cdSRob Herring compatible = "arm,cortex-a53"; 909d59b708SYixun Lan reg = <0x0 0x2>; 919d59b708SYixun Lan enable-method = "psci"; 929d59b708SYixun Lan next-level-cache = <&l2>; 932c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 949d59b708SYixun Lan }; 959d59b708SYixun Lan 969d59b708SYixun Lan cpu3: cpu@3 { 979d59b708SYixun Lan device_type = "cpu"; 9831af04cdSRob Herring compatible = "arm,cortex-a53"; 999d59b708SYixun Lan reg = <0x0 0x3>; 1009d59b708SYixun Lan enable-method = "psci"; 1019d59b708SYixun Lan next-level-cache = <&l2>; 1022c130695SJerome Brunet clocks = <&scpi_dvfs 0>; 1039d59b708SYixun Lan }; 1049d59b708SYixun Lan 1059d59b708SYixun Lan l2: l2-cache0 { 1069d59b708SYixun Lan compatible = "cache"; 1079d59b708SYixun Lan }; 1089d59b708SYixun Lan }; 1099d59b708SYixun Lan 11096dc5702SJerome Brunet sm: secure-monitor { 11196dc5702SJerome Brunet compatible = "amlogic,meson-gxbb-sm"; 11296dc5702SJerome Brunet }; 11396dc5702SJerome Brunet 1149ab2d15cSJerome Brunet efuse: efuse { 1159ab2d15cSJerome Brunet compatible = "amlogic,meson-gxbb-efuse"; 1169ab2d15cSJerome Brunet clocks = <&clkc CLKID_EFUSE>; 1179ab2d15cSJerome Brunet #address-cells = <1>; 1189ab2d15cSJerome Brunet #size-cells = <1>; 1199ab2d15cSJerome Brunet read-only; 120de82e74aSCarlo Caione secure-monitor = <&sm>; 1219ab2d15cSJerome Brunet }; 1229ab2d15cSJerome Brunet 1239d59b708SYixun Lan psci { 1249d59b708SYixun Lan compatible = "arm,psci-1.0"; 1259d59b708SYixun Lan method = "smc"; 1269d59b708SYixun Lan }; 1279d59b708SYixun Lan 1288c0cf40fSJerome Brunet reserved-memory { 1298c0cf40fSJerome Brunet #address-cells = <2>; 1308c0cf40fSJerome Brunet #size-cells = <2>; 1318c0cf40fSJerome Brunet ranges; 1328c0cf40fSJerome Brunet 1338c0cf40fSJerome Brunet /* 16 MiB reserved for Hardware ROM Firmware */ 1348c0cf40fSJerome Brunet hwrom_reserved: hwrom@0 { 1358c0cf40fSJerome Brunet reg = <0x0 0x0 0x0 0x1000000>; 1368c0cf40fSJerome Brunet no-map; 13708307aabSJerome Brunet }; 13808307aabSJerome Brunet 1398c0cf40fSJerome Brunet /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ 1408c0cf40fSJerome Brunet secmon_reserved: secmon@5000000 { 1418c0cf40fSJerome Brunet reg = <0x0 0x05000000 0x0 0x300000>; 1428c0cf40fSJerome Brunet no-map; 14308307aabSJerome Brunet }; 1445e395e14SYixun Lan }; 1455e395e14SYixun Lan 1462c130695SJerome Brunet scpi { 1472c130695SJerome Brunet compatible = "arm,scpi-pre-1.0"; 1482c130695SJerome Brunet mboxes = <&mailbox 1 &mailbox 2>; 1492c130695SJerome Brunet shmem = <&cpu_scp_lpri &cpu_scp_hpri>; 1502c130695SJerome Brunet 1512c130695SJerome Brunet scpi_clocks: clocks { 1522c130695SJerome Brunet compatible = "arm,scpi-clocks"; 1532c130695SJerome Brunet 1542c130695SJerome Brunet scpi_dvfs: clock-controller { 1552c130695SJerome Brunet compatible = "arm,scpi-dvfs-clocks"; 1562c130695SJerome Brunet #clock-cells = <1>; 1572c130695SJerome Brunet clock-indices = <0>; 1582c130695SJerome Brunet clock-output-names = "vcpu"; 1592c130695SJerome Brunet }; 1602c130695SJerome Brunet }; 1612c130695SJerome Brunet 1622c130695SJerome Brunet scpi_sensors: sensors { 1632c130695SJerome Brunet compatible = "amlogic,meson-gxbb-scpi-sensors"; 1642c130695SJerome Brunet #thermal-sensor-cells = <1>; 1652c130695SJerome Brunet }; 1662c130695SJerome Brunet }; 1672c130695SJerome Brunet 1689d59b708SYixun Lan soc { 1699d59b708SYixun Lan compatible = "simple-bus"; 1709d59b708SYixun Lan #address-cells = <2>; 1719d59b708SYixun Lan #size-cells = <2>; 1729d59b708SYixun Lan ranges; 1739d59b708SYixun Lan 1741b208babSNeil Armstrong usb: usb@ffe09080 { 1751b208babSNeil Armstrong compatible = "amlogic,meson-axg-usb-ctrl"; 1761b208babSNeil Armstrong reg = <0x0 0xffe09080 0x0 0x20>; 1771b208babSNeil Armstrong interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1781b208babSNeil Armstrong #address-cells = <2>; 1791b208babSNeil Armstrong #size-cells = <2>; 1801b208babSNeil Armstrong ranges; 1811b208babSNeil Armstrong 1821b208babSNeil Armstrong clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>; 1831b208babSNeil Armstrong clock-names = "usb_ctrl", "ddr"; 1841b208babSNeil Armstrong resets = <&reset RESET_USB_OTG>; 1851b208babSNeil Armstrong 1861b208babSNeil Armstrong dr_mode = "otg"; 1871b208babSNeil Armstrong 1881b208babSNeil Armstrong phys = <&usb2_phy1>; 1891b208babSNeil Armstrong phy-names = "usb2-phy1"; 1901b208babSNeil Armstrong 1911b208babSNeil Armstrong dwc2: usb@ff400000 { 1921b208babSNeil Armstrong compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; 1931b208babSNeil Armstrong reg = <0x0 0xff400000 0x0 0x40000>; 1941b208babSNeil Armstrong interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 1951b208babSNeil Armstrong clocks = <&clkc CLKID_USB1>; 1961b208babSNeil Armstrong clock-names = "otg"; 1971b208babSNeil Armstrong phys = <&usb2_phy1>; 1981b208babSNeil Armstrong dr_mode = "peripheral"; 1991b208babSNeil Armstrong g-rx-fifo-size = <192>; 2001b208babSNeil Armstrong g-np-tx-fifo-size = <128>; 2011b208babSNeil Armstrong g-tx-fifo-size = <128 128 16 16 16>; 2021b208babSNeil Armstrong }; 2031b208babSNeil Armstrong 2041b208babSNeil Armstrong dwc3: usb@ff500000 { 2051b208babSNeil Armstrong compatible = "snps,dwc3"; 2061b208babSNeil Armstrong reg = <0x0 0xff500000 0x0 0x100000>; 2071b208babSNeil Armstrong interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 2081b208babSNeil Armstrong dr_mode = "host"; 2091b208babSNeil Armstrong maximum-speed = "high-speed"; 2101b208babSNeil Armstrong snps,dis_u2_susphy_quirk; 2111b208babSNeil Armstrong }; 2121b208babSNeil Armstrong }; 2131b208babSNeil Armstrong 2148c0cf40fSJerome Brunet ethmac: ethernet@ff3f0000 { 2159d63f5d1SJerome Brunet compatible = "amlogic,meson-axg-dwmac", 2169d63f5d1SJerome Brunet "snps,dwmac-3.70a", 2179d63f5d1SJerome Brunet "snps,dwmac"; 2183ad6c9e3SNeil Armstrong reg = <0x0 0xff3f0000 0x0 0x10000>, 2193ad6c9e3SNeil Armstrong <0x0 0xff634540 0x0 0x8>; 2208b3e6f89SCarlo Caione interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 2218c0cf40fSJerome Brunet interrupt-names = "macirq"; 2228c0cf40fSJerome Brunet clocks = <&clkc CLKID_ETH>, 2238c0cf40fSJerome Brunet <&clkc CLKID_FCLK_DIV2>, 22432b5f4b6SMartin Blumenstingl <&clkc CLKID_MPLL2>, 22532b5f4b6SMartin Blumenstingl <&clkc CLKID_FCLK_DIV2>; 22632b5f4b6SMartin Blumenstingl clock-names = "stmmaceth", "clkin0", "clkin1", 22732b5f4b6SMartin Blumenstingl "timing-adjustment"; 228ef68984eSJerome Brunet rx-fifo-depth = <4096>; 229ef68984eSJerome Brunet tx-fifo-depth = <2048>; 2308c0cf40fSJerome Brunet status = "disabled"; 2318c0cf40fSJerome Brunet }; 2328c0cf40fSJerome Brunet 233c362e4e0SJerome Brunet pdm: audio-controller@ff632000 { 234c362e4e0SJerome Brunet compatible = "amlogic,axg-pdm"; 235c362e4e0SJerome Brunet reg = <0x0 0xff632000 0x0 0x34>; 236c362e4e0SJerome Brunet #sound-dai-cells = <0>; 237c362e4e0SJerome Brunet sound-name-prefix = "PDM"; 238c362e4e0SJerome Brunet clocks = <&clkc_audio AUD_CLKID_PDM>, 239c362e4e0SJerome Brunet <&clkc_audio AUD_CLKID_PDM_DCLK>, 240c362e4e0SJerome Brunet <&clkc_audio AUD_CLKID_PDM_SYSCLK>; 241c362e4e0SJerome Brunet clock-names = "pclk", "dclk", "sysclk"; 242c362e4e0SJerome Brunet status = "disabled"; 243c362e4e0SJerome Brunet }; 244c362e4e0SJerome Brunet 2458c0cf40fSJerome Brunet periphs: bus@ff634000 { 246221cf34bSNan Li compatible = "simple-bus"; 2478c0cf40fSJerome Brunet reg = <0x0 0xff634000 0x0 0x2000>; 248221cf34bSNan Li #address-cells = <2>; 249221cf34bSNan Li #size-cells = <2>; 2508c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; 251221cf34bSNan Li 2528c0cf40fSJerome Brunet hwrng: rng@18 { 2538c0cf40fSJerome Brunet compatible = "amlogic,meson-rng"; 2548c0cf40fSJerome Brunet reg = <0x0 0x18 0x0 0x4>; 2558c0cf40fSJerome Brunet clocks = <&clkc CLKID_RNG0>; 2568c0cf40fSJerome Brunet clock-names = "core"; 257221cf34bSNan Li }; 258221cf34bSNan Li 2598c0cf40fSJerome Brunet pinctrl_periphs: pinctrl@480 { 2608c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-periphs-pinctrl"; 2618c0cf40fSJerome Brunet #address-cells = <2>; 2628c0cf40fSJerome Brunet #size-cells = <2>; 2638c0cf40fSJerome Brunet ranges; 2648c0cf40fSJerome Brunet 2658c0cf40fSJerome Brunet gpio: bank@480 { 2668c0cf40fSJerome Brunet reg = <0x0 0x00480 0x0 0x40>, 2678c0cf40fSJerome Brunet <0x0 0x004e8 0x0 0x14>, 2688c0cf40fSJerome Brunet <0x0 0x00520 0x0 0x14>, 2698c0cf40fSJerome Brunet <0x0 0x00430 0x0 0x3c>; 2708c0cf40fSJerome Brunet reg-names = "mux", "pull", "pull-enable", "gpio"; 2718c0cf40fSJerome Brunet gpio-controller; 2728c0cf40fSJerome Brunet #gpio-cells = <2>; 2738c0cf40fSJerome Brunet gpio-ranges = <&pinctrl_periphs 0 0 86>; 274221cf34bSNan Li }; 2758c0cf40fSJerome Brunet 2768c0cf40fSJerome Brunet i2c0_pins: i2c0 { 2778c0cf40fSJerome Brunet mux { 2788c0cf40fSJerome Brunet groups = "i2c0_sck", 2798c0cf40fSJerome Brunet "i2c0_sda"; 2808c0cf40fSJerome Brunet function = "i2c0"; 2811c5cc1c8SJerome Brunet bias-disable; 2828c0cf40fSJerome Brunet }; 2838c0cf40fSJerome Brunet }; 2848c0cf40fSJerome Brunet 2858c0cf40fSJerome Brunet i2c1_x_pins: i2c1_x { 2868c0cf40fSJerome Brunet mux { 2878c0cf40fSJerome Brunet groups = "i2c1_sck_x", 2888c0cf40fSJerome Brunet "i2c1_sda_x"; 2898c0cf40fSJerome Brunet function = "i2c1"; 2901c5cc1c8SJerome Brunet bias-disable; 2918c0cf40fSJerome Brunet }; 2928c0cf40fSJerome Brunet }; 2938c0cf40fSJerome Brunet 2948c0cf40fSJerome Brunet i2c1_z_pins: i2c1_z { 2958c0cf40fSJerome Brunet mux { 2968c0cf40fSJerome Brunet groups = "i2c1_sck_z", 2978c0cf40fSJerome Brunet "i2c1_sda_z"; 2988c0cf40fSJerome Brunet function = "i2c1"; 2991c5cc1c8SJerome Brunet bias-disable; 3008c0cf40fSJerome Brunet }; 3018c0cf40fSJerome Brunet }; 3028c0cf40fSJerome Brunet 3038c0cf40fSJerome Brunet i2c2_a_pins: i2c2_a { 3048c0cf40fSJerome Brunet mux { 3058c0cf40fSJerome Brunet groups = "i2c2_sck_a", 3068c0cf40fSJerome Brunet "i2c2_sda_a"; 3078c0cf40fSJerome Brunet function = "i2c2"; 3081c5cc1c8SJerome Brunet bias-disable; 3098c0cf40fSJerome Brunet }; 3108c0cf40fSJerome Brunet }; 3118c0cf40fSJerome Brunet 3128c0cf40fSJerome Brunet i2c2_x_pins: i2c2_x { 3138c0cf40fSJerome Brunet mux { 3148c0cf40fSJerome Brunet groups = "i2c2_sck_x", 3158c0cf40fSJerome Brunet "i2c2_sda_x"; 3168c0cf40fSJerome Brunet function = "i2c2"; 3171c5cc1c8SJerome Brunet bias-disable; 3188c0cf40fSJerome Brunet }; 3198c0cf40fSJerome Brunet }; 3208c0cf40fSJerome Brunet 3218c0cf40fSJerome Brunet i2c3_a6_pins: i2c3_a6 { 3228c0cf40fSJerome Brunet mux { 3238c0cf40fSJerome Brunet groups = "i2c3_sda_a6", 3248c0cf40fSJerome Brunet "i2c3_sck_a7"; 3258c0cf40fSJerome Brunet function = "i2c3"; 3261c5cc1c8SJerome Brunet bias-disable; 3278c0cf40fSJerome Brunet }; 3288c0cf40fSJerome Brunet }; 3298c0cf40fSJerome Brunet 3308c0cf40fSJerome Brunet i2c3_a12_pins: i2c3_a12 { 3318c0cf40fSJerome Brunet mux { 3328c0cf40fSJerome Brunet groups = "i2c3_sda_a12", 3338c0cf40fSJerome Brunet "i2c3_sck_a13"; 3348c0cf40fSJerome Brunet function = "i2c3"; 3351c5cc1c8SJerome Brunet bias-disable; 3368c0cf40fSJerome Brunet }; 3378c0cf40fSJerome Brunet }; 3388c0cf40fSJerome Brunet 3398c0cf40fSJerome Brunet i2c3_a19_pins: i2c3_a19 { 3408c0cf40fSJerome Brunet mux { 3418c0cf40fSJerome Brunet groups = "i2c3_sda_a19", 3428c0cf40fSJerome Brunet "i2c3_sck_a20"; 3438c0cf40fSJerome Brunet function = "i2c3"; 3441c5cc1c8SJerome Brunet bias-disable; 3458c0cf40fSJerome Brunet }; 3468c0cf40fSJerome Brunet }; 3478c0cf40fSJerome Brunet 3488c0cf40fSJerome Brunet emmc_pins: emmc { 349b43033b1SJerome Brunet mux-0 { 3508c0cf40fSJerome Brunet groups = "emmc_nand_d0", 3518c0cf40fSJerome Brunet "emmc_nand_d1", 3528c0cf40fSJerome Brunet "emmc_nand_d2", 3538c0cf40fSJerome Brunet "emmc_nand_d3", 3548c0cf40fSJerome Brunet "emmc_nand_d4", 3558c0cf40fSJerome Brunet "emmc_nand_d5", 3568c0cf40fSJerome Brunet "emmc_nand_d6", 3578c0cf40fSJerome Brunet "emmc_nand_d7", 358b43033b1SJerome Brunet "emmc_cmd"; 359b43033b1SJerome Brunet function = "emmc"; 360b43033b1SJerome Brunet bias-pull-up; 361b43033b1SJerome Brunet }; 362b43033b1SJerome Brunet 363b43033b1SJerome Brunet mux-1 { 364b43033b1SJerome Brunet groups = "emmc_clk"; 3658c0cf40fSJerome Brunet function = "emmc"; 36696a13691SJerome Brunet bias-disable; 3678c0cf40fSJerome Brunet }; 3688c0cf40fSJerome Brunet }; 3698c0cf40fSJerome Brunet 370b43033b1SJerome Brunet emmc_ds_pins: emmc_ds { 371b43033b1SJerome Brunet mux { 372b43033b1SJerome Brunet groups = "emmc_ds"; 373b43033b1SJerome Brunet function = "emmc"; 374b43033b1SJerome Brunet bias-pull-down; 375b43033b1SJerome Brunet }; 376b43033b1SJerome Brunet }; 377b43033b1SJerome Brunet 3788c0cf40fSJerome Brunet emmc_clk_gate_pins: emmc_clk_gate { 3798c0cf40fSJerome Brunet mux { 3808c0cf40fSJerome Brunet groups = "BOOT_8"; 3818c0cf40fSJerome Brunet function = "gpio_periphs"; 3828c0cf40fSJerome Brunet bias-pull-down; 3838c0cf40fSJerome Brunet }; 3848c0cf40fSJerome Brunet }; 3858c0cf40fSJerome Brunet 3868c0cf40fSJerome Brunet eth_rgmii_x_pins: eth-x-rgmii { 3878c0cf40fSJerome Brunet mux { 3888c0cf40fSJerome Brunet groups = "eth_mdio_x", 3898c0cf40fSJerome Brunet "eth_mdc_x", 3908c0cf40fSJerome Brunet "eth_rgmii_rx_clk_x", 3918c0cf40fSJerome Brunet "eth_rx_dv_x", 3928c0cf40fSJerome Brunet "eth_rxd0_x", 3938c0cf40fSJerome Brunet "eth_rxd1_x", 3948c0cf40fSJerome Brunet "eth_rxd2_rgmii", 3958c0cf40fSJerome Brunet "eth_rxd3_rgmii", 3968c0cf40fSJerome Brunet "eth_rgmii_tx_clk", 3978c0cf40fSJerome Brunet "eth_txen_x", 3988c0cf40fSJerome Brunet "eth_txd0_x", 3998c0cf40fSJerome Brunet "eth_txd1_x", 4008c0cf40fSJerome Brunet "eth_txd2_rgmii", 4018c0cf40fSJerome Brunet "eth_txd3_rgmii"; 4028c0cf40fSJerome Brunet function = "eth"; 4031c5cc1c8SJerome Brunet bias-disable; 4048c0cf40fSJerome Brunet }; 4058c0cf40fSJerome Brunet }; 4068c0cf40fSJerome Brunet 4078c0cf40fSJerome Brunet eth_rgmii_y_pins: eth-y-rgmii { 4088c0cf40fSJerome Brunet mux { 4098c0cf40fSJerome Brunet groups = "eth_mdio_y", 4108c0cf40fSJerome Brunet "eth_mdc_y", 4118c0cf40fSJerome Brunet "eth_rgmii_rx_clk_y", 4128c0cf40fSJerome Brunet "eth_rx_dv_y", 4138c0cf40fSJerome Brunet "eth_rxd0_y", 4148c0cf40fSJerome Brunet "eth_rxd1_y", 4158c0cf40fSJerome Brunet "eth_rxd2_rgmii", 4168c0cf40fSJerome Brunet "eth_rxd3_rgmii", 4178c0cf40fSJerome Brunet "eth_rgmii_tx_clk", 4188c0cf40fSJerome Brunet "eth_txen_y", 4198c0cf40fSJerome Brunet "eth_txd0_y", 4208c0cf40fSJerome Brunet "eth_txd1_y", 4218c0cf40fSJerome Brunet "eth_txd2_rgmii", 4228c0cf40fSJerome Brunet "eth_txd3_rgmii"; 4238c0cf40fSJerome Brunet function = "eth"; 4241c5cc1c8SJerome Brunet bias-disable; 4258c0cf40fSJerome Brunet }; 4268c0cf40fSJerome Brunet }; 4278c0cf40fSJerome Brunet 4288c0cf40fSJerome Brunet eth_rmii_x_pins: eth-x-rmii { 4298c0cf40fSJerome Brunet mux { 4308c0cf40fSJerome Brunet groups = "eth_mdio_x", 4318c0cf40fSJerome Brunet "eth_mdc_x", 4328c0cf40fSJerome Brunet "eth_rgmii_rx_clk_x", 4338c0cf40fSJerome Brunet "eth_rx_dv_x", 4348c0cf40fSJerome Brunet "eth_rxd0_x", 4358c0cf40fSJerome Brunet "eth_rxd1_x", 4368c0cf40fSJerome Brunet "eth_txen_x", 4378c0cf40fSJerome Brunet "eth_txd0_x", 4388c0cf40fSJerome Brunet "eth_txd1_x"; 4398c0cf40fSJerome Brunet function = "eth"; 4401c5cc1c8SJerome Brunet bias-disable; 4418c0cf40fSJerome Brunet }; 4428c0cf40fSJerome Brunet }; 4438c0cf40fSJerome Brunet 4448c0cf40fSJerome Brunet eth_rmii_y_pins: eth-y-rmii { 4458c0cf40fSJerome Brunet mux { 4468c0cf40fSJerome Brunet groups = "eth_mdio_y", 4478c0cf40fSJerome Brunet "eth_mdc_y", 4488c0cf40fSJerome Brunet "eth_rgmii_rx_clk_y", 4498c0cf40fSJerome Brunet "eth_rx_dv_y", 4508c0cf40fSJerome Brunet "eth_rxd0_y", 4518c0cf40fSJerome Brunet "eth_rxd1_y", 4528c0cf40fSJerome Brunet "eth_txen_y", 4538c0cf40fSJerome Brunet "eth_txd0_y", 4548c0cf40fSJerome Brunet "eth_txd1_y"; 4558c0cf40fSJerome Brunet function = "eth"; 4561c5cc1c8SJerome Brunet bias-disable; 4578c0cf40fSJerome Brunet }; 4588c0cf40fSJerome Brunet }; 4598c0cf40fSJerome Brunet 4608c0cf40fSJerome Brunet mclk_b_pins: mclk_b { 4618c0cf40fSJerome Brunet mux { 4628c0cf40fSJerome Brunet groups = "mclk_b"; 4638c0cf40fSJerome Brunet function = "mclk_b"; 4641c5cc1c8SJerome Brunet bias-disable; 4658c0cf40fSJerome Brunet }; 4668c0cf40fSJerome Brunet }; 4678c0cf40fSJerome Brunet 4688c0cf40fSJerome Brunet mclk_c_pins: mclk_c { 4698c0cf40fSJerome Brunet mux { 4708c0cf40fSJerome Brunet groups = "mclk_c"; 4718c0cf40fSJerome Brunet function = "mclk_c"; 4721c5cc1c8SJerome Brunet bias-disable; 4738c0cf40fSJerome Brunet }; 4748c0cf40fSJerome Brunet }; 4758c0cf40fSJerome Brunet 4768c0cf40fSJerome Brunet pdm_dclk_a14_pins: pdm_dclk_a14 { 4778c0cf40fSJerome Brunet mux { 4788c0cf40fSJerome Brunet groups = "pdm_dclk_a14"; 4798c0cf40fSJerome Brunet function = "pdm"; 4801c5cc1c8SJerome Brunet bias-disable; 4818c0cf40fSJerome Brunet }; 4828c0cf40fSJerome Brunet }; 4838c0cf40fSJerome Brunet 4848c0cf40fSJerome Brunet pdm_dclk_a19_pins: pdm_dclk_a19 { 4858c0cf40fSJerome Brunet mux { 4868c0cf40fSJerome Brunet groups = "pdm_dclk_a19"; 4878c0cf40fSJerome Brunet function = "pdm"; 4881c5cc1c8SJerome Brunet bias-disable; 4898c0cf40fSJerome Brunet }; 4908c0cf40fSJerome Brunet }; 4918c0cf40fSJerome Brunet 4928c0cf40fSJerome Brunet pdm_din0_pins: pdm_din0 { 4938c0cf40fSJerome Brunet mux { 4948c0cf40fSJerome Brunet groups = "pdm_din0"; 4958c0cf40fSJerome Brunet function = "pdm"; 4961c5cc1c8SJerome Brunet bias-disable; 4978c0cf40fSJerome Brunet }; 4988c0cf40fSJerome Brunet }; 4998c0cf40fSJerome Brunet 5008c0cf40fSJerome Brunet pdm_din1_pins: pdm_din1 { 5018c0cf40fSJerome Brunet mux { 5028c0cf40fSJerome Brunet groups = "pdm_din1"; 5038c0cf40fSJerome Brunet function = "pdm"; 5041c5cc1c8SJerome Brunet bias-disable; 5058c0cf40fSJerome Brunet }; 5068c0cf40fSJerome Brunet }; 5078c0cf40fSJerome Brunet 5088c0cf40fSJerome Brunet pdm_din2_pins: pdm_din2 { 5098c0cf40fSJerome Brunet mux { 5108c0cf40fSJerome Brunet groups = "pdm_din2"; 5118c0cf40fSJerome Brunet function = "pdm"; 5121c5cc1c8SJerome Brunet bias-disable; 5138c0cf40fSJerome Brunet }; 5148c0cf40fSJerome Brunet }; 5158c0cf40fSJerome Brunet 5168c0cf40fSJerome Brunet pdm_din3_pins: pdm_din3 { 5178c0cf40fSJerome Brunet mux { 5188c0cf40fSJerome Brunet groups = "pdm_din3"; 5198c0cf40fSJerome Brunet function = "pdm"; 5201c5cc1c8SJerome Brunet bias-disable; 5218c0cf40fSJerome Brunet }; 5228c0cf40fSJerome Brunet }; 5238c0cf40fSJerome Brunet 5248c0cf40fSJerome Brunet pwm_a_a_pins: pwm_a_a { 5258c0cf40fSJerome Brunet mux { 5268c0cf40fSJerome Brunet groups = "pwm_a_a"; 5278c0cf40fSJerome Brunet function = "pwm_a"; 5281c5cc1c8SJerome Brunet bias-disable; 5298c0cf40fSJerome Brunet }; 5308c0cf40fSJerome Brunet }; 5318c0cf40fSJerome Brunet 5328c0cf40fSJerome Brunet pwm_a_x18_pins: pwm_a_x18 { 5338c0cf40fSJerome Brunet mux { 5348c0cf40fSJerome Brunet groups = "pwm_a_x18"; 5358c0cf40fSJerome Brunet function = "pwm_a"; 5361c5cc1c8SJerome Brunet bias-disable; 5378c0cf40fSJerome Brunet }; 5388c0cf40fSJerome Brunet }; 5398c0cf40fSJerome Brunet 5408c0cf40fSJerome Brunet pwm_a_x20_pins: pwm_a_x20 { 5418c0cf40fSJerome Brunet mux { 5428c0cf40fSJerome Brunet groups = "pwm_a_x20"; 5438c0cf40fSJerome Brunet function = "pwm_a"; 5441c5cc1c8SJerome Brunet bias-disable; 5458c0cf40fSJerome Brunet }; 5468c0cf40fSJerome Brunet }; 5478c0cf40fSJerome Brunet 5488c0cf40fSJerome Brunet pwm_a_z_pins: pwm_a_z { 5498c0cf40fSJerome Brunet mux { 5508c0cf40fSJerome Brunet groups = "pwm_a_z"; 5518c0cf40fSJerome Brunet function = "pwm_a"; 5521c5cc1c8SJerome Brunet bias-disable; 5538c0cf40fSJerome Brunet }; 5548c0cf40fSJerome Brunet }; 5558c0cf40fSJerome Brunet 5568c0cf40fSJerome Brunet pwm_b_a_pins: pwm_b_a { 5578c0cf40fSJerome Brunet mux { 5588c0cf40fSJerome Brunet groups = "pwm_b_a"; 5598c0cf40fSJerome Brunet function = "pwm_b"; 5601c5cc1c8SJerome Brunet bias-disable; 5618c0cf40fSJerome Brunet }; 5628c0cf40fSJerome Brunet }; 5638c0cf40fSJerome Brunet 5648c0cf40fSJerome Brunet pwm_b_x_pins: pwm_b_x { 5658c0cf40fSJerome Brunet mux { 5668c0cf40fSJerome Brunet groups = "pwm_b_x"; 5678c0cf40fSJerome Brunet function = "pwm_b"; 5681c5cc1c8SJerome Brunet bias-disable; 5698c0cf40fSJerome Brunet }; 5708c0cf40fSJerome Brunet }; 5718c0cf40fSJerome Brunet 5728c0cf40fSJerome Brunet pwm_b_z_pins: pwm_b_z { 5738c0cf40fSJerome Brunet mux { 5748c0cf40fSJerome Brunet groups = "pwm_b_z"; 5758c0cf40fSJerome Brunet function = "pwm_b"; 5761c5cc1c8SJerome Brunet bias-disable; 5778c0cf40fSJerome Brunet }; 5788c0cf40fSJerome Brunet }; 5798c0cf40fSJerome Brunet 5808c0cf40fSJerome Brunet pwm_c_a_pins: pwm_c_a { 5818c0cf40fSJerome Brunet mux { 5828c0cf40fSJerome Brunet groups = "pwm_c_a"; 5838c0cf40fSJerome Brunet function = "pwm_c"; 5841c5cc1c8SJerome Brunet bias-disable; 5858c0cf40fSJerome Brunet }; 5868c0cf40fSJerome Brunet }; 5878c0cf40fSJerome Brunet 5888c0cf40fSJerome Brunet pwm_c_x10_pins: pwm_c_x10 { 5898c0cf40fSJerome Brunet mux { 5908c0cf40fSJerome Brunet groups = "pwm_c_x10"; 5918c0cf40fSJerome Brunet function = "pwm_c"; 5921c5cc1c8SJerome Brunet bias-disable; 5938c0cf40fSJerome Brunet }; 5948c0cf40fSJerome Brunet }; 5958c0cf40fSJerome Brunet 5968c0cf40fSJerome Brunet pwm_c_x17_pins: pwm_c_x17 { 5978c0cf40fSJerome Brunet mux { 5988c0cf40fSJerome Brunet groups = "pwm_c_x17"; 5998c0cf40fSJerome Brunet function = "pwm_c"; 6001c5cc1c8SJerome Brunet bias-disable; 6018c0cf40fSJerome Brunet }; 6028c0cf40fSJerome Brunet }; 6038c0cf40fSJerome Brunet 6048c0cf40fSJerome Brunet pwm_d_x11_pins: pwm_d_x11 { 6058c0cf40fSJerome Brunet mux { 6068c0cf40fSJerome Brunet groups = "pwm_d_x11"; 6078c0cf40fSJerome Brunet function = "pwm_d"; 6081c5cc1c8SJerome Brunet bias-disable; 6098c0cf40fSJerome Brunet }; 6108c0cf40fSJerome Brunet }; 6118c0cf40fSJerome Brunet 6128c0cf40fSJerome Brunet pwm_d_x16_pins: pwm_d_x16 { 6138c0cf40fSJerome Brunet mux { 6148c0cf40fSJerome Brunet groups = "pwm_d_x16"; 6158c0cf40fSJerome Brunet function = "pwm_d"; 6161c5cc1c8SJerome Brunet bias-disable; 6178c0cf40fSJerome Brunet }; 6188c0cf40fSJerome Brunet }; 6198c0cf40fSJerome Brunet 6208c0cf40fSJerome Brunet sdio_pins: sdio { 621b43033b1SJerome Brunet mux-0 { 6228c0cf40fSJerome Brunet groups = "sdio_d0", 6238c0cf40fSJerome Brunet "sdio_d1", 6248c0cf40fSJerome Brunet "sdio_d2", 6258c0cf40fSJerome Brunet "sdio_d3", 626b43033b1SJerome Brunet "sdio_cmd"; 627b43033b1SJerome Brunet function = "sdio"; 628b43033b1SJerome Brunet bias-pull-up; 629b43033b1SJerome Brunet }; 630b43033b1SJerome Brunet 631b43033b1SJerome Brunet mux-1 { 632b43033b1SJerome Brunet groups = "sdio_clk"; 6338c0cf40fSJerome Brunet function = "sdio"; 63496a13691SJerome Brunet bias-disable; 6358c0cf40fSJerome Brunet }; 6368c0cf40fSJerome Brunet }; 6378c0cf40fSJerome Brunet 6388c0cf40fSJerome Brunet sdio_clk_gate_pins: sdio_clk_gate { 6398c0cf40fSJerome Brunet mux { 6408c0cf40fSJerome Brunet groups = "GPIOX_4"; 6418c0cf40fSJerome Brunet function = "gpio_periphs"; 6428c0cf40fSJerome Brunet bias-pull-down; 6438c0cf40fSJerome Brunet }; 6448c0cf40fSJerome Brunet }; 6458c0cf40fSJerome Brunet 6468c0cf40fSJerome Brunet spdif_in_z_pins: spdif_in_z { 6478c0cf40fSJerome Brunet mux { 6488c0cf40fSJerome Brunet groups = "spdif_in_z"; 6498c0cf40fSJerome Brunet function = "spdif_in"; 6501c5cc1c8SJerome Brunet bias-disable; 6518c0cf40fSJerome Brunet }; 6528c0cf40fSJerome Brunet }; 6538c0cf40fSJerome Brunet 6548c0cf40fSJerome Brunet spdif_in_a1_pins: spdif_in_a1 { 6558c0cf40fSJerome Brunet mux { 6568c0cf40fSJerome Brunet groups = "spdif_in_a1"; 6578c0cf40fSJerome Brunet function = "spdif_in"; 6581c5cc1c8SJerome Brunet bias-disable; 6598c0cf40fSJerome Brunet }; 6608c0cf40fSJerome Brunet }; 6618c0cf40fSJerome Brunet 6628c0cf40fSJerome Brunet spdif_in_a7_pins: spdif_in_a7 { 6638c0cf40fSJerome Brunet mux { 6648c0cf40fSJerome Brunet groups = "spdif_in_a7"; 6658c0cf40fSJerome Brunet function = "spdif_in"; 6661c5cc1c8SJerome Brunet bias-disable; 6678c0cf40fSJerome Brunet }; 6688c0cf40fSJerome Brunet }; 6698c0cf40fSJerome Brunet 6708c0cf40fSJerome Brunet spdif_in_a19_pins: spdif_in_a19 { 6718c0cf40fSJerome Brunet mux { 6728c0cf40fSJerome Brunet groups = "spdif_in_a19"; 6738c0cf40fSJerome Brunet function = "spdif_in"; 6741c5cc1c8SJerome Brunet bias-disable; 6758c0cf40fSJerome Brunet }; 6768c0cf40fSJerome Brunet }; 6778c0cf40fSJerome Brunet 6788c0cf40fSJerome Brunet spdif_in_a20_pins: spdif_in_a20 { 6798c0cf40fSJerome Brunet mux { 6808c0cf40fSJerome Brunet groups = "spdif_in_a20"; 6818c0cf40fSJerome Brunet function = "spdif_in"; 6821c5cc1c8SJerome Brunet bias-disable; 6838c0cf40fSJerome Brunet }; 6848c0cf40fSJerome Brunet }; 6858c0cf40fSJerome Brunet 6868c0cf40fSJerome Brunet spdif_out_a1_pins: spdif_out_a1 { 6878c0cf40fSJerome Brunet mux { 6888c0cf40fSJerome Brunet groups = "spdif_out_a1"; 6898c0cf40fSJerome Brunet function = "spdif_out"; 6901c5cc1c8SJerome Brunet bias-disable; 6918c0cf40fSJerome Brunet }; 6928c0cf40fSJerome Brunet }; 6938c0cf40fSJerome Brunet 6948c0cf40fSJerome Brunet spdif_out_a11_pins: spdif_out_a11 { 6958c0cf40fSJerome Brunet mux { 6968c0cf40fSJerome Brunet groups = "spdif_out_a11"; 6978c0cf40fSJerome Brunet function = "spdif_out"; 6981c5cc1c8SJerome Brunet bias-disable; 6998c0cf40fSJerome Brunet }; 7008c0cf40fSJerome Brunet }; 7018c0cf40fSJerome Brunet 7028c0cf40fSJerome Brunet spdif_out_a19_pins: spdif_out_a19 { 7038c0cf40fSJerome Brunet mux { 7048c0cf40fSJerome Brunet groups = "spdif_out_a19"; 7058c0cf40fSJerome Brunet function = "spdif_out"; 7061c5cc1c8SJerome Brunet bias-disable; 7078c0cf40fSJerome Brunet }; 7088c0cf40fSJerome Brunet }; 7098c0cf40fSJerome Brunet 7108c0cf40fSJerome Brunet spdif_out_a20_pins: spdif_out_a20 { 7118c0cf40fSJerome Brunet mux { 7128c0cf40fSJerome Brunet groups = "spdif_out_a20"; 7138c0cf40fSJerome Brunet function = "spdif_out"; 7141c5cc1c8SJerome Brunet bias-disable; 7158c0cf40fSJerome Brunet }; 7168c0cf40fSJerome Brunet }; 7178c0cf40fSJerome Brunet 7188c0cf40fSJerome Brunet spdif_out_z_pins: spdif_out_z { 7198c0cf40fSJerome Brunet mux { 7208c0cf40fSJerome Brunet groups = "spdif_out_z"; 7218c0cf40fSJerome Brunet function = "spdif_out"; 7221c5cc1c8SJerome Brunet bias-disable; 7238c0cf40fSJerome Brunet }; 7248c0cf40fSJerome Brunet }; 7258c0cf40fSJerome Brunet 7268c0cf40fSJerome Brunet spi0_pins: spi0 { 7278c0cf40fSJerome Brunet mux { 7288c0cf40fSJerome Brunet groups = "spi0_miso", 7298c0cf40fSJerome Brunet "spi0_mosi", 7308c0cf40fSJerome Brunet "spi0_clk"; 7318c0cf40fSJerome Brunet function = "spi0"; 7321c5cc1c8SJerome Brunet bias-disable; 7338c0cf40fSJerome Brunet }; 7348c0cf40fSJerome Brunet }; 7358c0cf40fSJerome Brunet 7368c0cf40fSJerome Brunet spi0_ss0_pins: spi0_ss0 { 7378c0cf40fSJerome Brunet mux { 7388c0cf40fSJerome Brunet groups = "spi0_ss0"; 7398c0cf40fSJerome Brunet function = "spi0"; 7401c5cc1c8SJerome Brunet bias-disable; 7418c0cf40fSJerome Brunet }; 7428c0cf40fSJerome Brunet }; 7438c0cf40fSJerome Brunet 7448c0cf40fSJerome Brunet spi0_ss1_pins: spi0_ss1 { 7458c0cf40fSJerome Brunet mux { 7468c0cf40fSJerome Brunet groups = "spi0_ss1"; 7478c0cf40fSJerome Brunet function = "spi0"; 7481c5cc1c8SJerome Brunet bias-disable; 7498c0cf40fSJerome Brunet }; 7508c0cf40fSJerome Brunet }; 7518c0cf40fSJerome Brunet 7528c0cf40fSJerome Brunet spi0_ss2_pins: spi0_ss2 { 7538c0cf40fSJerome Brunet mux { 7548c0cf40fSJerome Brunet groups = "spi0_ss2"; 7558c0cf40fSJerome Brunet function = "spi0"; 7561c5cc1c8SJerome Brunet bias-disable; 7578c0cf40fSJerome Brunet }; 7588c0cf40fSJerome Brunet }; 7598c0cf40fSJerome Brunet 7608c0cf40fSJerome Brunet spi1_a_pins: spi1_a { 7618c0cf40fSJerome Brunet mux { 7628c0cf40fSJerome Brunet groups = "spi1_miso_a", 7638c0cf40fSJerome Brunet "spi1_mosi_a", 7648c0cf40fSJerome Brunet "spi1_clk_a"; 7658c0cf40fSJerome Brunet function = "spi1"; 7661c5cc1c8SJerome Brunet bias-disable; 7678c0cf40fSJerome Brunet }; 7688c0cf40fSJerome Brunet }; 7698c0cf40fSJerome Brunet 7708c0cf40fSJerome Brunet spi1_ss0_a_pins: spi1_ss0_a { 7718c0cf40fSJerome Brunet mux { 7728c0cf40fSJerome Brunet groups = "spi1_ss0_a"; 7738c0cf40fSJerome Brunet function = "spi1"; 7741c5cc1c8SJerome Brunet bias-disable; 7758c0cf40fSJerome Brunet }; 7768c0cf40fSJerome Brunet }; 7778c0cf40fSJerome Brunet 7788c0cf40fSJerome Brunet spi1_ss1_pins: spi1_ss1 { 7798c0cf40fSJerome Brunet mux { 7808c0cf40fSJerome Brunet groups = "spi1_ss1"; 7818c0cf40fSJerome Brunet function = "spi1"; 7821c5cc1c8SJerome Brunet bias-disable; 7838c0cf40fSJerome Brunet }; 7848c0cf40fSJerome Brunet }; 7858c0cf40fSJerome Brunet 7868c0cf40fSJerome Brunet spi1_x_pins: spi1_x { 7878c0cf40fSJerome Brunet mux { 7888c0cf40fSJerome Brunet groups = "spi1_miso_x", 7898c0cf40fSJerome Brunet "spi1_mosi_x", 7908c0cf40fSJerome Brunet "spi1_clk_x"; 7918c0cf40fSJerome Brunet function = "spi1"; 7921c5cc1c8SJerome Brunet bias-disable; 7938c0cf40fSJerome Brunet }; 7948c0cf40fSJerome Brunet }; 7958c0cf40fSJerome Brunet 7968c0cf40fSJerome Brunet spi1_ss0_x_pins: spi1_ss0_x { 7978c0cf40fSJerome Brunet mux { 7988c0cf40fSJerome Brunet groups = "spi1_ss0_x"; 7998c0cf40fSJerome Brunet function = "spi1"; 8001c5cc1c8SJerome Brunet bias-disable; 8018c0cf40fSJerome Brunet }; 8028c0cf40fSJerome Brunet }; 8038c0cf40fSJerome Brunet 8048c0cf40fSJerome Brunet tdma_din0_pins: tdma_din0 { 8058c0cf40fSJerome Brunet mux { 8068c0cf40fSJerome Brunet groups = "tdma_din0"; 8078c0cf40fSJerome Brunet function = "tdma"; 8081c5cc1c8SJerome Brunet bias-disable; 8098c0cf40fSJerome Brunet }; 8108c0cf40fSJerome Brunet }; 8118c0cf40fSJerome Brunet 8128c0cf40fSJerome Brunet tdma_dout0_x14_pins: tdma_dout0_x14 { 8138c0cf40fSJerome Brunet mux { 8148c0cf40fSJerome Brunet groups = "tdma_dout0_x14"; 8158c0cf40fSJerome Brunet function = "tdma"; 8161c5cc1c8SJerome Brunet bias-disable; 8178c0cf40fSJerome Brunet }; 8188c0cf40fSJerome Brunet }; 8198c0cf40fSJerome Brunet 8208c0cf40fSJerome Brunet tdma_dout0_x15_pins: tdma_dout0_x15 { 8218c0cf40fSJerome Brunet mux { 8228c0cf40fSJerome Brunet groups = "tdma_dout0_x15"; 8238c0cf40fSJerome Brunet function = "tdma"; 8241c5cc1c8SJerome Brunet bias-disable; 8258c0cf40fSJerome Brunet }; 8268c0cf40fSJerome Brunet }; 8278c0cf40fSJerome Brunet 8288c0cf40fSJerome Brunet tdma_dout1_pins: tdma_dout1 { 8298c0cf40fSJerome Brunet mux { 8308c0cf40fSJerome Brunet groups = "tdma_dout1"; 8318c0cf40fSJerome Brunet function = "tdma"; 8321c5cc1c8SJerome Brunet bias-disable; 8338c0cf40fSJerome Brunet }; 8348c0cf40fSJerome Brunet }; 8358c0cf40fSJerome Brunet 8368c0cf40fSJerome Brunet tdma_din1_pins: tdma_din1 { 8378c0cf40fSJerome Brunet mux { 8388c0cf40fSJerome Brunet groups = "tdma_din1"; 8398c0cf40fSJerome Brunet function = "tdma"; 8401c5cc1c8SJerome Brunet bias-disable; 8418c0cf40fSJerome Brunet }; 8428c0cf40fSJerome Brunet }; 8438c0cf40fSJerome Brunet 8448c0cf40fSJerome Brunet tdma_fs_pins: tdma_fs { 8458c0cf40fSJerome Brunet mux { 8468c0cf40fSJerome Brunet groups = "tdma_fs"; 8478c0cf40fSJerome Brunet function = "tdma"; 8481c5cc1c8SJerome Brunet bias-disable; 8498c0cf40fSJerome Brunet }; 8508c0cf40fSJerome Brunet }; 8518c0cf40fSJerome Brunet 8528c0cf40fSJerome Brunet tdma_fs_slv_pins: tdma_fs_slv { 8538c0cf40fSJerome Brunet mux { 8548c0cf40fSJerome Brunet groups = "tdma_fs_slv"; 8558c0cf40fSJerome Brunet function = "tdma"; 8561c5cc1c8SJerome Brunet bias-disable; 8578c0cf40fSJerome Brunet }; 8588c0cf40fSJerome Brunet }; 8598c0cf40fSJerome Brunet 8608c0cf40fSJerome Brunet tdma_sclk_pins: tdma_sclk { 8618c0cf40fSJerome Brunet mux { 8628c0cf40fSJerome Brunet groups = "tdma_sclk"; 8638c0cf40fSJerome Brunet function = "tdma"; 8641c5cc1c8SJerome Brunet bias-disable; 8658c0cf40fSJerome Brunet }; 8668c0cf40fSJerome Brunet }; 8678c0cf40fSJerome Brunet 8688c0cf40fSJerome Brunet tdma_sclk_slv_pins: tdma_sclk_slv { 8698c0cf40fSJerome Brunet mux { 8708c0cf40fSJerome Brunet groups = "tdma_sclk_slv"; 8718c0cf40fSJerome Brunet function = "tdma"; 8721c5cc1c8SJerome Brunet bias-disable; 8738c0cf40fSJerome Brunet }; 8748c0cf40fSJerome Brunet }; 8758c0cf40fSJerome Brunet 8768c0cf40fSJerome Brunet tdmb_din0_pins: tdmb_din0 { 8778c0cf40fSJerome Brunet mux { 8788c0cf40fSJerome Brunet groups = "tdmb_din0"; 8798c0cf40fSJerome Brunet function = "tdmb"; 8801c5cc1c8SJerome Brunet bias-disable; 8818c0cf40fSJerome Brunet }; 8828c0cf40fSJerome Brunet }; 8838c0cf40fSJerome Brunet 8848c0cf40fSJerome Brunet tdmb_din1_pins: tdmb_din1 { 8858c0cf40fSJerome Brunet mux { 8868c0cf40fSJerome Brunet groups = "tdmb_din1"; 8878c0cf40fSJerome Brunet function = "tdmb"; 8881c5cc1c8SJerome Brunet bias-disable; 8898c0cf40fSJerome Brunet }; 8908c0cf40fSJerome Brunet }; 8918c0cf40fSJerome Brunet 8928c0cf40fSJerome Brunet tdmb_din2_pins: tdmb_din2 { 8938c0cf40fSJerome Brunet mux { 8948c0cf40fSJerome Brunet groups = "tdmb_din2"; 8958c0cf40fSJerome Brunet function = "tdmb"; 8961c5cc1c8SJerome Brunet bias-disable; 8978c0cf40fSJerome Brunet }; 8988c0cf40fSJerome Brunet }; 8998c0cf40fSJerome Brunet 9008c0cf40fSJerome Brunet tdmb_din3_pins: tdmb_din3 { 9018c0cf40fSJerome Brunet mux { 9028c0cf40fSJerome Brunet groups = "tdmb_din3"; 9038c0cf40fSJerome Brunet function = "tdmb"; 9041c5cc1c8SJerome Brunet bias-disable; 9058c0cf40fSJerome Brunet }; 9068c0cf40fSJerome Brunet }; 9078c0cf40fSJerome Brunet 9088c0cf40fSJerome Brunet tdmb_dout0_pins: tdmb_dout0 { 9098c0cf40fSJerome Brunet mux { 9108c0cf40fSJerome Brunet groups = "tdmb_dout0"; 9118c0cf40fSJerome Brunet function = "tdmb"; 9121c5cc1c8SJerome Brunet bias-disable; 9138c0cf40fSJerome Brunet }; 9148c0cf40fSJerome Brunet }; 9158c0cf40fSJerome Brunet 9168c0cf40fSJerome Brunet tdmb_dout1_pins: tdmb_dout1 { 9178c0cf40fSJerome Brunet mux { 9188c0cf40fSJerome Brunet groups = "tdmb_dout1"; 9198c0cf40fSJerome Brunet function = "tdmb"; 9201c5cc1c8SJerome Brunet bias-disable; 9218c0cf40fSJerome Brunet }; 9228c0cf40fSJerome Brunet }; 9238c0cf40fSJerome Brunet 9248c0cf40fSJerome Brunet tdmb_dout2_pins: tdmb_dout2 { 9258c0cf40fSJerome Brunet mux { 9268c0cf40fSJerome Brunet groups = "tdmb_dout2"; 9278c0cf40fSJerome Brunet function = "tdmb"; 9281c5cc1c8SJerome Brunet bias-disable; 9298c0cf40fSJerome Brunet }; 9308c0cf40fSJerome Brunet }; 9318c0cf40fSJerome Brunet 9328c0cf40fSJerome Brunet tdmb_dout3_pins: tdmb_dout3 { 9338c0cf40fSJerome Brunet mux { 9348c0cf40fSJerome Brunet groups = "tdmb_dout3"; 9358c0cf40fSJerome Brunet function = "tdmb"; 9361c5cc1c8SJerome Brunet bias-disable; 9378c0cf40fSJerome Brunet }; 9388c0cf40fSJerome Brunet }; 9398c0cf40fSJerome Brunet 9408c0cf40fSJerome Brunet tdmb_fs_pins: tdmb_fs { 9418c0cf40fSJerome Brunet mux { 9428c0cf40fSJerome Brunet groups = "tdmb_fs"; 9438c0cf40fSJerome Brunet function = "tdmb"; 9441c5cc1c8SJerome Brunet bias-disable; 9458c0cf40fSJerome Brunet }; 9468c0cf40fSJerome Brunet }; 9478c0cf40fSJerome Brunet 9488c0cf40fSJerome Brunet tdmb_fs_slv_pins: tdmb_fs_slv { 9498c0cf40fSJerome Brunet mux { 9508c0cf40fSJerome Brunet groups = "tdmb_fs_slv"; 9518c0cf40fSJerome Brunet function = "tdmb"; 9521c5cc1c8SJerome Brunet bias-disable; 9538c0cf40fSJerome Brunet }; 9548c0cf40fSJerome Brunet }; 9558c0cf40fSJerome Brunet 9568c0cf40fSJerome Brunet tdmb_sclk_pins: tdmb_sclk { 9578c0cf40fSJerome Brunet mux { 9588c0cf40fSJerome Brunet groups = "tdmb_sclk"; 9598c0cf40fSJerome Brunet function = "tdmb"; 9601c5cc1c8SJerome Brunet bias-disable; 9618c0cf40fSJerome Brunet }; 9628c0cf40fSJerome Brunet }; 9638c0cf40fSJerome Brunet 9648c0cf40fSJerome Brunet tdmb_sclk_slv_pins: tdmb_sclk_slv { 9658c0cf40fSJerome Brunet mux { 9668c0cf40fSJerome Brunet groups = "tdmb_sclk_slv"; 9678c0cf40fSJerome Brunet function = "tdmb"; 9681c5cc1c8SJerome Brunet bias-disable; 9698c0cf40fSJerome Brunet }; 9708c0cf40fSJerome Brunet }; 9718c0cf40fSJerome Brunet 9728c0cf40fSJerome Brunet tdmc_fs_pins: tdmc_fs { 9738c0cf40fSJerome Brunet mux { 9748c0cf40fSJerome Brunet groups = "tdmc_fs"; 9758c0cf40fSJerome Brunet function = "tdmc"; 9761c5cc1c8SJerome Brunet bias-disable; 9778c0cf40fSJerome Brunet }; 9788c0cf40fSJerome Brunet }; 9798c0cf40fSJerome Brunet 9808c0cf40fSJerome Brunet tdmc_fs_slv_pins: tdmc_fs_slv { 9818c0cf40fSJerome Brunet mux { 9828c0cf40fSJerome Brunet groups = "tdmc_fs_slv"; 9838c0cf40fSJerome Brunet function = "tdmc"; 9841c5cc1c8SJerome Brunet bias-disable; 9858c0cf40fSJerome Brunet }; 9868c0cf40fSJerome Brunet }; 9878c0cf40fSJerome Brunet 9888c0cf40fSJerome Brunet tdmc_sclk_pins: tdmc_sclk { 9898c0cf40fSJerome Brunet mux { 9908c0cf40fSJerome Brunet groups = "tdmc_sclk"; 9918c0cf40fSJerome Brunet function = "tdmc"; 9921c5cc1c8SJerome Brunet bias-disable; 9938c0cf40fSJerome Brunet }; 9948c0cf40fSJerome Brunet }; 9958c0cf40fSJerome Brunet 9968c0cf40fSJerome Brunet tdmc_sclk_slv_pins: tdmc_sclk_slv { 9978c0cf40fSJerome Brunet mux { 9988c0cf40fSJerome Brunet groups = "tdmc_sclk_slv"; 9998c0cf40fSJerome Brunet function = "tdmc"; 10001c5cc1c8SJerome Brunet bias-disable; 10018c0cf40fSJerome Brunet }; 10028c0cf40fSJerome Brunet }; 10038c0cf40fSJerome Brunet 10048c0cf40fSJerome Brunet tdmc_din0_pins: tdmc_din0 { 10058c0cf40fSJerome Brunet mux { 10068c0cf40fSJerome Brunet groups = "tdmc_din0"; 10078c0cf40fSJerome Brunet function = "tdmc"; 10081c5cc1c8SJerome Brunet bias-disable; 10098c0cf40fSJerome Brunet }; 10108c0cf40fSJerome Brunet }; 10118c0cf40fSJerome Brunet 10128c0cf40fSJerome Brunet tdmc_din1_pins: tdmc_din1 { 10138c0cf40fSJerome Brunet mux { 10148c0cf40fSJerome Brunet groups = "tdmc_din1"; 10158c0cf40fSJerome Brunet function = "tdmc"; 10161c5cc1c8SJerome Brunet bias-disable; 10178c0cf40fSJerome Brunet }; 10188c0cf40fSJerome Brunet }; 10198c0cf40fSJerome Brunet 10208c0cf40fSJerome Brunet tdmc_din2_pins: tdmc_din2 { 10218c0cf40fSJerome Brunet mux { 10228c0cf40fSJerome Brunet groups = "tdmc_din2"; 10238c0cf40fSJerome Brunet function = "tdmc"; 10241c5cc1c8SJerome Brunet bias-disable; 10258c0cf40fSJerome Brunet }; 10268c0cf40fSJerome Brunet }; 10278c0cf40fSJerome Brunet 10288c0cf40fSJerome Brunet tdmc_din3_pins: tdmc_din3 { 10298c0cf40fSJerome Brunet mux { 10308c0cf40fSJerome Brunet groups = "tdmc_din3"; 10318c0cf40fSJerome Brunet function = "tdmc"; 10321c5cc1c8SJerome Brunet bias-disable; 10338c0cf40fSJerome Brunet }; 10348c0cf40fSJerome Brunet }; 10358c0cf40fSJerome Brunet 10368c0cf40fSJerome Brunet tdmc_dout0_pins: tdmc_dout0 { 10378c0cf40fSJerome Brunet mux { 10388c0cf40fSJerome Brunet groups = "tdmc_dout0"; 10398c0cf40fSJerome Brunet function = "tdmc"; 10401c5cc1c8SJerome Brunet bias-disable; 10418c0cf40fSJerome Brunet }; 10428c0cf40fSJerome Brunet }; 10438c0cf40fSJerome Brunet 10448c0cf40fSJerome Brunet tdmc_dout1_pins: tdmc_dout1 { 10458c0cf40fSJerome Brunet mux { 10468c0cf40fSJerome Brunet groups = "tdmc_dout1"; 10478c0cf40fSJerome Brunet function = "tdmc"; 10481c5cc1c8SJerome Brunet bias-disable; 10498c0cf40fSJerome Brunet }; 10508c0cf40fSJerome Brunet }; 10518c0cf40fSJerome Brunet 10528c0cf40fSJerome Brunet tdmc_dout2_pins: tdmc_dout2 { 10538c0cf40fSJerome Brunet mux { 10548c0cf40fSJerome Brunet groups = "tdmc_dout2"; 10558c0cf40fSJerome Brunet function = "tdmc"; 10561c5cc1c8SJerome Brunet bias-disable; 10578c0cf40fSJerome Brunet }; 10588c0cf40fSJerome Brunet }; 10598c0cf40fSJerome Brunet 10608c0cf40fSJerome Brunet tdmc_dout3_pins: tdmc_dout3 { 10618c0cf40fSJerome Brunet mux { 10628c0cf40fSJerome Brunet groups = "tdmc_dout3"; 10638c0cf40fSJerome Brunet function = "tdmc"; 10641c5cc1c8SJerome Brunet bias-disable; 10658c0cf40fSJerome Brunet }; 10668c0cf40fSJerome Brunet }; 10678c0cf40fSJerome Brunet 10688c0cf40fSJerome Brunet uart_a_pins: uart_a { 10698c0cf40fSJerome Brunet mux { 10708c0cf40fSJerome Brunet groups = "uart_tx_a", 10718c0cf40fSJerome Brunet "uart_rx_a"; 10728c0cf40fSJerome Brunet function = "uart_a"; 10731c5cc1c8SJerome Brunet bias-disable; 10748c0cf40fSJerome Brunet }; 10758c0cf40fSJerome Brunet }; 10768c0cf40fSJerome Brunet 10778c0cf40fSJerome Brunet uart_a_cts_rts_pins: uart_a_cts_rts { 10788c0cf40fSJerome Brunet mux { 10798c0cf40fSJerome Brunet groups = "uart_cts_a", 10808c0cf40fSJerome Brunet "uart_rts_a"; 10818c0cf40fSJerome Brunet function = "uart_a"; 10821c5cc1c8SJerome Brunet bias-disable; 10838c0cf40fSJerome Brunet }; 10848c0cf40fSJerome Brunet }; 10858c0cf40fSJerome Brunet 10868c0cf40fSJerome Brunet uart_b_x_pins: uart_b_x { 10878c0cf40fSJerome Brunet mux { 10888c0cf40fSJerome Brunet groups = "uart_tx_b_x", 10898c0cf40fSJerome Brunet "uart_rx_b_x"; 10908c0cf40fSJerome Brunet function = "uart_b"; 10911c5cc1c8SJerome Brunet bias-disable; 10928c0cf40fSJerome Brunet }; 10938c0cf40fSJerome Brunet }; 10948c0cf40fSJerome Brunet 10958c0cf40fSJerome Brunet uart_b_x_cts_rts_pins: uart_b_x_cts_rts { 10968c0cf40fSJerome Brunet mux { 10978c0cf40fSJerome Brunet groups = "uart_cts_b_x", 10988c0cf40fSJerome Brunet "uart_rts_b_x"; 10998c0cf40fSJerome Brunet function = "uart_b"; 11001c5cc1c8SJerome Brunet bias-disable; 11018c0cf40fSJerome Brunet }; 11028c0cf40fSJerome Brunet }; 11038c0cf40fSJerome Brunet 11048c0cf40fSJerome Brunet uart_b_z_pins: uart_b_z { 11058c0cf40fSJerome Brunet mux { 11068c0cf40fSJerome Brunet groups = "uart_tx_b_z", 11078c0cf40fSJerome Brunet "uart_rx_b_z"; 11088c0cf40fSJerome Brunet function = "uart_b"; 11091c5cc1c8SJerome Brunet bias-disable; 11108c0cf40fSJerome Brunet }; 11118c0cf40fSJerome Brunet }; 11128c0cf40fSJerome Brunet 11138c0cf40fSJerome Brunet uart_b_z_cts_rts_pins: uart_b_z_cts_rts { 11148c0cf40fSJerome Brunet mux { 11158c0cf40fSJerome Brunet groups = "uart_cts_b_z", 11168c0cf40fSJerome Brunet "uart_rts_b_z"; 11178c0cf40fSJerome Brunet function = "uart_b"; 11181c5cc1c8SJerome Brunet bias-disable; 11198c0cf40fSJerome Brunet }; 11208c0cf40fSJerome Brunet }; 11218c0cf40fSJerome Brunet 11228c0cf40fSJerome Brunet uart_ao_b_z_pins: uart_ao_b_z { 11238c0cf40fSJerome Brunet mux { 11248c0cf40fSJerome Brunet groups = "uart_ao_tx_b_z", 11258c0cf40fSJerome Brunet "uart_ao_rx_b_z"; 11268c0cf40fSJerome Brunet function = "uart_ao_b_z"; 11271c5cc1c8SJerome Brunet bias-disable; 11288c0cf40fSJerome Brunet }; 11298c0cf40fSJerome Brunet }; 11308c0cf40fSJerome Brunet 11318c0cf40fSJerome Brunet uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts { 11328c0cf40fSJerome Brunet mux { 11338c0cf40fSJerome Brunet groups = "uart_ao_cts_b_z", 11348c0cf40fSJerome Brunet "uart_ao_rts_b_z"; 11358c0cf40fSJerome Brunet function = "uart_ao_b_z"; 11361c5cc1c8SJerome Brunet bias-disable; 11378c0cf40fSJerome Brunet }; 11388c0cf40fSJerome Brunet }; 11398c0cf40fSJerome Brunet }; 11408c0cf40fSJerome Brunet }; 11418c0cf40fSJerome Brunet 11428c0cf40fSJerome Brunet hiubus: bus@ff63c000 { 11438c0cf40fSJerome Brunet compatible = "simple-bus"; 11448c0cf40fSJerome Brunet reg = <0x0 0xff63c000 0x0 0x1c00>; 11458c0cf40fSJerome Brunet #address-cells = <2>; 11468c0cf40fSJerome Brunet #size-cells = <2>; 11478c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; 11488c0cf40fSJerome Brunet 11498c0cf40fSJerome Brunet sysctrl: system-controller@0 { 11508c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-hhi-sysctrl", 1151445f2bdaSNeil Armstrong "simple-mfd", "syscon"; 11528c0cf40fSJerome Brunet reg = <0 0 0 0x400>; 11538c0cf40fSJerome Brunet 11548c0cf40fSJerome Brunet clkc: clock-controller { 11558c0cf40fSJerome Brunet compatible = "amlogic,axg-clkc"; 11568c0cf40fSJerome Brunet #clock-cells = <1>; 115716361ff2SJerome Brunet clocks = <&xtal>; 115816361ff2SJerome Brunet clock-names = "xtal"; 11598c0cf40fSJerome Brunet }; 11608c0cf40fSJerome Brunet }; 11618c0cf40fSJerome Brunet }; 11628c0cf40fSJerome Brunet 11639fdff382SJerome Brunet mailbox: mailbox@ff63c404 { 116401efc19cSNeil Armstrong compatible = "amlogic,meson-gxbb-mhu"; 11659fdff382SJerome Brunet reg = <0 0xff63c404 0 0x4c>; 11668c0cf40fSJerome Brunet interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>, 11678c0cf40fSJerome Brunet <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>, 11688c0cf40fSJerome Brunet <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>; 11698c0cf40fSJerome Brunet #mbox-cells = <1>; 1170221cf34bSNan Li }; 1171221cf34bSNan Li 11728909e722SJerome Brunet audio: bus@ff642000 { 11738909e722SJerome Brunet compatible = "simple-bus"; 11748909e722SJerome Brunet reg = <0x0 0xff642000 0x0 0x2000>; 11758909e722SJerome Brunet #address-cells = <2>; 11768909e722SJerome Brunet #size-cells = <2>; 11778909e722SJerome Brunet ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>; 11788909e722SJerome Brunet 11798909e722SJerome Brunet clkc_audio: clock-controller@0 { 11808909e722SJerome Brunet compatible = "amlogic,axg-audio-clkc"; 11818909e722SJerome Brunet reg = <0x0 0x0 0x0 0xb4>; 11828909e722SJerome Brunet #clock-cells = <1>; 11838909e722SJerome Brunet 11848909e722SJerome Brunet clocks = <&clkc CLKID_AUDIO>, 11858909e722SJerome Brunet <&clkc CLKID_MPLL0>, 11868909e722SJerome Brunet <&clkc CLKID_MPLL1>, 11878909e722SJerome Brunet <&clkc CLKID_MPLL2>, 11888909e722SJerome Brunet <&clkc CLKID_MPLL3>, 11898909e722SJerome Brunet <&clkc CLKID_HIFI_PLL>, 11908909e722SJerome Brunet <&clkc CLKID_FCLK_DIV3>, 11918909e722SJerome Brunet <&clkc CLKID_FCLK_DIV4>, 11928909e722SJerome Brunet <&clkc CLKID_GP0_PLL>; 11938909e722SJerome Brunet clock-names = "pclk", 11948909e722SJerome Brunet "mst_in0", 11958909e722SJerome Brunet "mst_in1", 11968909e722SJerome Brunet "mst_in2", 11978909e722SJerome Brunet "mst_in3", 11988909e722SJerome Brunet "mst_in4", 11998909e722SJerome Brunet "mst_in5", 12008909e722SJerome Brunet "mst_in6", 12018909e722SJerome Brunet "mst_in7"; 12028909e722SJerome Brunet 12038909e722SJerome Brunet resets = <&reset RESET_AUDIO>; 12048909e722SJerome Brunet }; 120566d58a8fSJerome Brunet 1206f2b8f6a9SJerome Brunet toddr_a: audio-controller@100 { 1207f2b8f6a9SJerome Brunet compatible = "amlogic,axg-toddr"; 1208301b94d4SJerome Brunet reg = <0x0 0x100 0x0 0x2c>; 1209f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1210f2b8f6a9SJerome Brunet sound-name-prefix = "TODDR_A"; 1211f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>; 1212f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_A>; 1213f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_TODDR_A>; 1214be638075SJerome Brunet amlogic,fifo-depth = <512>; 1215f2b8f6a9SJerome Brunet status = "disabled"; 1216f2b8f6a9SJerome Brunet }; 1217f2b8f6a9SJerome Brunet 1218f2b8f6a9SJerome Brunet toddr_b: audio-controller@140 { 1219f2b8f6a9SJerome Brunet compatible = "amlogic,axg-toddr"; 1220301b94d4SJerome Brunet reg = <0x0 0x140 0x0 0x2c>; 1221f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1222f2b8f6a9SJerome Brunet sound-name-prefix = "TODDR_B"; 1223f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>; 1224f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_B>; 1225f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_TODDR_B>; 1226be638075SJerome Brunet amlogic,fifo-depth = <256>; 1227f2b8f6a9SJerome Brunet status = "disabled"; 1228f2b8f6a9SJerome Brunet }; 1229f2b8f6a9SJerome Brunet 1230f2b8f6a9SJerome Brunet toddr_c: audio-controller@180 { 1231f2b8f6a9SJerome Brunet compatible = "amlogic,axg-toddr"; 1232301b94d4SJerome Brunet reg = <0x0 0x180 0x0 0x2c>; 1233f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1234f2b8f6a9SJerome Brunet sound-name-prefix = "TODDR_C"; 1235f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>; 1236f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TODDR_C>; 1237f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_TODDR_C>; 1238be638075SJerome Brunet amlogic,fifo-depth = <256>; 1239f2b8f6a9SJerome Brunet status = "disabled"; 1240f2b8f6a9SJerome Brunet }; 1241f2b8f6a9SJerome Brunet 1242f2b8f6a9SJerome Brunet frddr_a: audio-controller@1c0 { 1243f2b8f6a9SJerome Brunet compatible = "amlogic,axg-frddr"; 1244301b94d4SJerome Brunet reg = <0x0 0x1c0 0x0 0x2c>; 1245f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1246f2b8f6a9SJerome Brunet sound-name-prefix = "FRDDR_A"; 1247f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; 1248f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; 1249f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_FRDDR_A>; 1250be638075SJerome Brunet amlogic,fifo-depth = <512>; 1251f2b8f6a9SJerome Brunet status = "disabled"; 1252f2b8f6a9SJerome Brunet }; 1253f2b8f6a9SJerome Brunet 1254f2b8f6a9SJerome Brunet frddr_b: audio-controller@200 { 1255f2b8f6a9SJerome Brunet compatible = "amlogic,axg-frddr"; 1256301b94d4SJerome Brunet reg = <0x0 0x200 0x0 0x2c>; 1257f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1258f2b8f6a9SJerome Brunet sound-name-prefix = "FRDDR_B"; 1259f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>; 1260f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_B>; 1261f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_FRDDR_B>; 1262be638075SJerome Brunet amlogic,fifo-depth = <256>; 1263f2b8f6a9SJerome Brunet status = "disabled"; 1264f2b8f6a9SJerome Brunet }; 1265f2b8f6a9SJerome Brunet 1266f2b8f6a9SJerome Brunet frddr_c: audio-controller@240 { 1267f2b8f6a9SJerome Brunet compatible = "amlogic,axg-frddr"; 1268301b94d4SJerome Brunet reg = <0x0 0x240 0x0 0x2c>; 1269f2b8f6a9SJerome Brunet #sound-dai-cells = <0>; 1270f2b8f6a9SJerome Brunet sound-name-prefix = "FRDDR_C"; 1271f2b8f6a9SJerome Brunet interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>; 1272f2b8f6a9SJerome Brunet clocks = <&clkc_audio AUD_CLKID_FRDDR_C>; 1273f2b8f6a9SJerome Brunet resets = <&arb AXG_ARB_FRDDR_C>; 1274be638075SJerome Brunet amlogic,fifo-depth = <256>; 1275f2b8f6a9SJerome Brunet status = "disabled"; 1276f2b8f6a9SJerome Brunet }; 1277f2b8f6a9SJerome Brunet 127866d58a8fSJerome Brunet arb: reset-controller@280 { 127966d58a8fSJerome Brunet compatible = "amlogic,meson-axg-audio-arb"; 128066d58a8fSJerome Brunet reg = <0x0 0x280 0x0 0x4>; 128166d58a8fSJerome Brunet #reset-cells = <1>; 128266d58a8fSJerome Brunet clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; 128366d58a8fSJerome Brunet }; 1284f08c52deSJerome Brunet 1285bf8e4790SJerome Brunet tdmin_a: audio-controller@300 { 1286bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1287bf8e4790SJerome Brunet reg = <0x0 0x300 0x0 0x40>; 1288bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_A"; 1289bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_A>, 1290bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>, 1291bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>, 1292bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>, 1293bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>; 1294bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1295bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1296bf8e4790SJerome Brunet status = "disabled"; 1297bf8e4790SJerome Brunet }; 1298bf8e4790SJerome Brunet 1299bf8e4790SJerome Brunet tdmin_b: audio-controller@340 { 1300bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1301bf8e4790SJerome Brunet reg = <0x0 0x340 0x0 0x40>; 1302bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_B"; 1303bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_B>, 1304bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>, 1305bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>, 1306bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>, 1307bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>; 1308bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1309bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1310bf8e4790SJerome Brunet status = "disabled"; 1311bf8e4790SJerome Brunet }; 1312bf8e4790SJerome Brunet 1313bf8e4790SJerome Brunet tdmin_c: audio-controller@380 { 1314bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1315bf8e4790SJerome Brunet reg = <0x0 0x380 0x0 0x40>; 1316bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_C"; 1317bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_C>, 1318bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>, 1319bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>, 1320bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>, 1321bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>; 1322bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1323bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1324bf8e4790SJerome Brunet status = "disabled"; 1325bf8e4790SJerome Brunet }; 1326bf8e4790SJerome Brunet 1327bf8e4790SJerome Brunet tdmin_lb: audio-controller@3c0 { 1328bf8e4790SJerome Brunet compatible = "amlogic,axg-tdmin"; 1329bf8e4790SJerome Brunet reg = <0x0 0x3c0 0x0 0x40>; 1330bf8e4790SJerome Brunet sound-name-prefix = "TDMIN_LB"; 1331bf8e4790SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>, 1332bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>, 1333bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>, 1334bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>, 1335bf8e4790SJerome Brunet <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>; 1336bf8e4790SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1337bf8e4790SJerome Brunet "lrclk", "lrclk_sel"; 1338bf8e4790SJerome Brunet status = "disabled"; 1339bf8e4790SJerome Brunet }; 1340bf8e4790SJerome Brunet 13415e6a18acSJerome Brunet spdifin: audio-controller@400 { 13425e6a18acSJerome Brunet compatible = "amlogic,axg-spdifin"; 13435e6a18acSJerome Brunet reg = <0x0 0x400 0x0 0x30>; 13445e6a18acSJerome Brunet #sound-dai-cells = <0>; 13455e6a18acSJerome Brunet sound-name-prefix = "SPDIFIN"; 13465e6a18acSJerome Brunet interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>; 13475e6a18acSJerome Brunet clocks = <&clkc_audio AUD_CLKID_SPDIFIN>, 13485e6a18acSJerome Brunet <&clkc_audio AUD_CLKID_SPDIFIN_CLK>; 13495e6a18acSJerome Brunet clock-names = "pclk", "refclk"; 13505e6a18acSJerome Brunet status = "disabled"; 13515e6a18acSJerome Brunet }; 13525e6a18acSJerome Brunet 1353f08c52deSJerome Brunet spdifout: audio-controller@480 { 1354f08c52deSJerome Brunet compatible = "amlogic,axg-spdifout"; 1355f08c52deSJerome Brunet reg = <0x0 0x480 0x0 0x50>; 1356f08c52deSJerome Brunet #sound-dai-cells = <0>; 1357f08c52deSJerome Brunet sound-name-prefix = "SPDIFOUT"; 1358f08c52deSJerome Brunet clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>, 1359f08c52deSJerome Brunet <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>; 1360f08c52deSJerome Brunet clock-names = "pclk", "mclk"; 1361f08c52deSJerome Brunet status = "disabled"; 1362f08c52deSJerome Brunet }; 1363fd916739SJerome Brunet 1364fd916739SJerome Brunet tdmout_a: audio-controller@500 { 1365fd916739SJerome Brunet compatible = "amlogic,axg-tdmout"; 1366fd916739SJerome Brunet reg = <0x0 0x500 0x0 0x40>; 1367fd916739SJerome Brunet sound-name-prefix = "TDMOUT_A"; 1368fd916739SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>, 1369fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>, 1370fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>, 1371fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>, 1372fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>; 1373fd916739SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1374fd916739SJerome Brunet "lrclk", "lrclk_sel"; 1375fd916739SJerome Brunet status = "disabled"; 1376fd916739SJerome Brunet }; 1377fd916739SJerome Brunet 1378fd916739SJerome Brunet tdmout_b: audio-controller@540 { 1379fd916739SJerome Brunet compatible = "amlogic,axg-tdmout"; 1380fd916739SJerome Brunet reg = <0x0 0x540 0x0 0x40>; 1381fd916739SJerome Brunet sound-name-prefix = "TDMOUT_B"; 1382fd916739SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>, 1383fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>, 1384fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>, 1385fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>, 1386fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>; 1387fd916739SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1388fd916739SJerome Brunet "lrclk", "lrclk_sel"; 1389fd916739SJerome Brunet status = "disabled"; 1390fd916739SJerome Brunet }; 1391fd916739SJerome Brunet 1392fd916739SJerome Brunet tdmout_c: audio-controller@580 { 1393fd916739SJerome Brunet compatible = "amlogic,axg-tdmout"; 1394fd916739SJerome Brunet reg = <0x0 0x580 0x0 0x40>; 1395fd916739SJerome Brunet sound-name-prefix = "TDMOUT_C"; 1396fd916739SJerome Brunet clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>, 1397fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>, 1398fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>, 1399fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>, 1400fd916739SJerome Brunet <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>; 1401fd916739SJerome Brunet clock-names = "pclk", "sclk", "sclk_sel", 1402fd916739SJerome Brunet "lrclk", "lrclk_sel"; 1403fd916739SJerome Brunet status = "disabled"; 1404fd916739SJerome Brunet }; 14058909e722SJerome Brunet }; 14068909e722SJerome Brunet 14070cb6c604SKevin Hilman aobus: bus@ff800000 { 14089d59b708SYixun Lan compatible = "simple-bus"; 14099d59b708SYixun Lan reg = <0x0 0xff800000 0x0 0x100000>; 14109d59b708SYixun Lan #address-cells = <2>; 14119d59b708SYixun Lan #size-cells = <2>; 14129d59b708SYixun Lan ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; 14139d59b708SYixun Lan 1414e03421ecSQiufang Dai sysctrl_AO: sys-ctrl@0 { 1415445f2bdaSNeil Armstrong compatible = "amlogic,meson-axg-ao-sysctrl", "simple-mfd", "syscon"; 1416e03421ecSQiufang Dai reg = <0x0 0x0 0x0 0x100>; 1417e03421ecSQiufang Dai 1418e03421ecSQiufang Dai clkc_AO: clock-controller { 1419e03421ecSQiufang Dai compatible = "amlogic,meson-axg-aoclkc"; 1420e03421ecSQiufang Dai #clock-cells = <1>; 1421e03421ecSQiufang Dai #reset-cells = <1>; 142216361ff2SJerome Brunet clocks = <&xtal>, <&clkc CLKID_CLK81>; 142316361ff2SJerome Brunet clock-names = "xtal", "mpeg-clk"; 1424e03421ecSQiufang Dai }; 1425e03421ecSQiufang Dai }; 1426e03421ecSQiufang Dai 1427de05ded6SXingyu Chen pinctrl_aobus: pinctrl@14 { 1428de05ded6SXingyu Chen compatible = "amlogic,meson-axg-aobus-pinctrl"; 1429de05ded6SXingyu Chen #address-cells = <2>; 1430de05ded6SXingyu Chen #size-cells = <2>; 1431de05ded6SXingyu Chen ranges; 1432de05ded6SXingyu Chen 1433de05ded6SXingyu Chen gpio_ao: bank@14 { 1434de05ded6SXingyu Chen reg = <0x0 0x00014 0x0 0x8>, 1435de05ded6SXingyu Chen <0x0 0x0002c 0x0 0x4>, 1436de05ded6SXingyu Chen <0x0 0x00024 0x0 0x8>; 1437de05ded6SXingyu Chen reg-names = "mux", "pull", "gpio"; 1438de05ded6SXingyu Chen gpio-controller; 1439de05ded6SXingyu Chen #gpio-cells = <2>; 1440de05ded6SXingyu Chen gpio-ranges = <&pinctrl_aobus 0 0 15>; 1441de05ded6SXingyu Chen }; 14427bd46a79SYixun Lan 1443c054b6c2SJerome Brunet i2c_ao_sck_4_pins: i2c_ao_sck_4 { 1444c054b6c2SJerome Brunet mux { 1445c054b6c2SJerome Brunet groups = "i2c_ao_sck_4"; 1446c054b6c2SJerome Brunet function = "i2c_ao"; 14471c5cc1c8SJerome Brunet bias-disable; 1448c054b6c2SJerome Brunet }; 1449c054b6c2SJerome Brunet }; 1450c054b6c2SJerome Brunet 1451c054b6c2SJerome Brunet i2c_ao_sck_8_pins: i2c_ao_sck_8 { 1452c054b6c2SJerome Brunet mux { 1453c054b6c2SJerome Brunet groups = "i2c_ao_sck_8"; 1454c054b6c2SJerome Brunet function = "i2c_ao"; 14551c5cc1c8SJerome Brunet bias-disable; 1456c054b6c2SJerome Brunet }; 1457c054b6c2SJerome Brunet }; 1458c054b6c2SJerome Brunet 1459c054b6c2SJerome Brunet i2c_ao_sck_10_pins: i2c_ao_sck_10 { 1460c054b6c2SJerome Brunet mux { 1461c054b6c2SJerome Brunet groups = "i2c_ao_sck_10"; 1462c054b6c2SJerome Brunet function = "i2c_ao"; 14631c5cc1c8SJerome Brunet bias-disable; 1464c054b6c2SJerome Brunet }; 1465c054b6c2SJerome Brunet }; 1466c054b6c2SJerome Brunet 1467c054b6c2SJerome Brunet i2c_ao_sda_5_pins: i2c_ao_sda_5 { 1468c054b6c2SJerome Brunet mux { 1469c054b6c2SJerome Brunet groups = "i2c_ao_sda_5"; 1470c054b6c2SJerome Brunet function = "i2c_ao"; 14711c5cc1c8SJerome Brunet bias-disable; 1472c054b6c2SJerome Brunet }; 1473c054b6c2SJerome Brunet }; 1474c054b6c2SJerome Brunet 1475c054b6c2SJerome Brunet i2c_ao_sda_9_pins: i2c_ao_sda_9 { 1476c054b6c2SJerome Brunet mux { 1477c054b6c2SJerome Brunet groups = "i2c_ao_sda_9"; 1478c054b6c2SJerome Brunet function = "i2c_ao"; 14791c5cc1c8SJerome Brunet bias-disable; 1480c054b6c2SJerome Brunet }; 1481c054b6c2SJerome Brunet }; 1482c054b6c2SJerome Brunet 1483c054b6c2SJerome Brunet i2c_ao_sda_11_pins: i2c_ao_sda_11 { 1484c054b6c2SJerome Brunet mux { 1485c054b6c2SJerome Brunet groups = "i2c_ao_sda_11"; 1486c054b6c2SJerome Brunet function = "i2c_ao"; 14871c5cc1c8SJerome Brunet bias-disable; 1488c054b6c2SJerome Brunet }; 1489c054b6c2SJerome Brunet }; 1490c054b6c2SJerome Brunet 14917bd46a79SYixun Lan remote_input_ao_pins: remote_input_ao { 14927bd46a79SYixun Lan mux { 14937bd46a79SYixun Lan groups = "remote_input_ao"; 14947bd46a79SYixun Lan function = "remote_input_ao"; 14951c5cc1c8SJerome Brunet bias-disable; 14967bd46a79SYixun Lan }; 14977bd46a79SYixun Lan }; 14984eae66a6SYixun Lan 14994eae66a6SYixun Lan uart_ao_a_pins: uart_ao_a { 15004eae66a6SYixun Lan mux { 15014eae66a6SYixun Lan groups = "uart_ao_tx_a", 15024eae66a6SYixun Lan "uart_ao_rx_a"; 15034eae66a6SYixun Lan function = "uart_ao_a"; 15041c5cc1c8SJerome Brunet bias-disable; 15054eae66a6SYixun Lan }; 15064eae66a6SYixun Lan }; 15074eae66a6SYixun Lan 15084eae66a6SYixun Lan uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts { 15094eae66a6SYixun Lan mux { 15104eae66a6SYixun Lan groups = "uart_ao_cts_a", 15114eae66a6SYixun Lan "uart_ao_rts_a"; 15124eae66a6SYixun Lan function = "uart_ao_a"; 15131c5cc1c8SJerome Brunet bias-disable; 15144eae66a6SYixun Lan }; 15154eae66a6SYixun Lan }; 15164eae66a6SYixun Lan 15174eae66a6SYixun Lan uart_ao_b_pins: uart_ao_b { 15184eae66a6SYixun Lan mux { 15194eae66a6SYixun Lan groups = "uart_ao_tx_b", 15204eae66a6SYixun Lan "uart_ao_rx_b"; 15214eae66a6SYixun Lan function = "uart_ao_b"; 15221c5cc1c8SJerome Brunet bias-disable; 15234eae66a6SYixun Lan }; 15244eae66a6SYixun Lan }; 15254eae66a6SYixun Lan 15264eae66a6SYixun Lan uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { 15274eae66a6SYixun Lan mux { 15284eae66a6SYixun Lan groups = "uart_ao_cts_b", 15294eae66a6SYixun Lan "uart_ao_rts_b"; 15304eae66a6SYixun Lan function = "uart_ao_b"; 15311c5cc1c8SJerome Brunet bias-disable; 15324eae66a6SYixun Lan }; 15334eae66a6SYixun Lan }; 1534de05ded6SXingyu Chen }; 1535de05ded6SXingyu Chen 1536a04c18cbSJerome Brunet sec_AO: ao-secure@140 { 1537a04c18cbSJerome Brunet compatible = "amlogic,meson-gx-ao-secure", "syscon"; 1538a04c18cbSJerome Brunet reg = <0x0 0x140 0x0 0x140>; 1539a04c18cbSJerome Brunet amlogic,has-chip-id; 1540a04c18cbSJerome Brunet }; 1541a04c18cbSJerome Brunet 15424a81e5ddSJian Hu pwm_AO_cd: pwm@2000 { 1543b4ff05caSJerome Brunet compatible = "amlogic,meson-axg-ao-pwm"; 15444a81e5ddSJian Hu reg = <0x0 0x02000 0x0 0x20>; 15454a81e5ddSJian Hu #pwm-cells = <3>; 15464a81e5ddSJian Hu status = "disabled"; 15474a81e5ddSJian Hu }; 15484a81e5ddSJian Hu 15499d59b708SYixun Lan uart_AO: serial@3000 { 15509d59b708SYixun Lan compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 15519d59b708SYixun Lan reg = <0x0 0x3000 0x0 0x18>; 15529d59b708SYixun Lan interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; 15539adda353SYixun Lan clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; 15549d59b708SYixun Lan clock-names = "xtal", "pclk", "baud"; 15559d59b708SYixun Lan status = "disabled"; 15569d59b708SYixun Lan }; 15579d59b708SYixun Lan 15589d59b708SYixun Lan uart_AO_B: serial@4000 { 15599d59b708SYixun Lan compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 15609d59b708SYixun Lan reg = <0x0 0x4000 0x0 0x18>; 15619d59b708SYixun Lan interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; 15629adda353SYixun Lan clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; 15639d59b708SYixun Lan clock-names = "xtal", "pclk", "baud"; 15649d59b708SYixun Lan status = "disabled"; 15659d59b708SYixun Lan }; 15667bd46a79SYixun Lan 15678c0cf40fSJerome Brunet i2c_AO: i2c@5000 { 15688c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 15698c0cf40fSJerome Brunet reg = <0x0 0x05000 0x0 0x20>; 15708c0cf40fSJerome Brunet interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; 15718c0cf40fSJerome Brunet clocks = <&clkc CLKID_AO_I2C>; 15728c0cf40fSJerome Brunet #address-cells = <1>; 15738c0cf40fSJerome Brunet #size-cells = <0>; 15748c0cf40fSJerome Brunet status = "disabled"; 15758c0cf40fSJerome Brunet }; 15768c0cf40fSJerome Brunet 15778c0cf40fSJerome Brunet pwm_AO_ab: pwm@7000 { 15788c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-ao-pwm"; 15798c0cf40fSJerome Brunet reg = <0x0 0x07000 0x0 0x20>; 15808c0cf40fSJerome Brunet #pwm-cells = <3>; 15818c0cf40fSJerome Brunet status = "disabled"; 15828c0cf40fSJerome Brunet }; 15838c0cf40fSJerome Brunet 15847bd46a79SYixun Lan ir: ir@8000 { 15857bd46a79SYixun Lan compatible = "amlogic,meson-gxbb-ir"; 15867bd46a79SYixun Lan reg = <0x0 0x8000 0x0 0x20>; 15877bd46a79SYixun Lan interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; 15887bd46a79SYixun Lan status = "disabled"; 15897bd46a79SYixun Lan }; 1590a51b74eaSXingyu Chen 1591a51b74eaSXingyu Chen saradc: adc@9000 { 1592a51b74eaSXingyu Chen compatible = "amlogic,meson-axg-saradc", 1593a51b74eaSXingyu Chen "amlogic,meson-saradc"; 1594a51b74eaSXingyu Chen reg = <0x0 0x9000 0x0 0x38>; 1595a51b74eaSXingyu Chen #io-channel-cells = <1>; 1596a51b74eaSXingyu Chen interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; 1597a51b74eaSXingyu Chen clocks = <&xtal>, 1598a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC>, 1599a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC_CLK>, 1600a51b74eaSXingyu Chen <&clkc_AO CLKID_AO_SAR_ADC_SEL>; 1601a51b74eaSXingyu Chen clock-names = "clkin", "core", "adc_clk", "adc_sel"; 1602a51b74eaSXingyu Chen status = "disabled"; 1603a51b74eaSXingyu Chen }; 16049d59b708SYixun Lan }; 16058c0cf40fSJerome Brunet 16068c0cf40fSJerome Brunet gic: interrupt-controller@ffc01000 { 16078c0cf40fSJerome Brunet compatible = "arm,gic-400"; 16088c0cf40fSJerome Brunet reg = <0x0 0xffc01000 0 0x1000>, 16098c0cf40fSJerome Brunet <0x0 0xffc02000 0 0x2000>, 16108c0cf40fSJerome Brunet <0x0 0xffc04000 0 0x2000>, 16118c0cf40fSJerome Brunet <0x0 0xffc06000 0 0x2000>; 16128c0cf40fSJerome Brunet interrupt-controller; 16138c0cf40fSJerome Brunet interrupts = <GIC_PPI 9 16148c0cf40fSJerome Brunet (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 16158c0cf40fSJerome Brunet #interrupt-cells = <3>; 16168c0cf40fSJerome Brunet #address-cells = <0>; 16178c0cf40fSJerome Brunet }; 16188c0cf40fSJerome Brunet 16198c0cf40fSJerome Brunet cbus: bus@ffd00000 { 16208c0cf40fSJerome Brunet compatible = "simple-bus"; 16218c0cf40fSJerome Brunet reg = <0x0 0xffd00000 0x0 0x25000>; 16228c0cf40fSJerome Brunet #address-cells = <2>; 16238c0cf40fSJerome Brunet #size-cells = <2>; 16248c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; 16258c0cf40fSJerome Brunet 16268c0cf40fSJerome Brunet reset: reset-controller@1004 { 16278c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-reset"; 16288c0cf40fSJerome Brunet reg = <0x0 0x01004 0x0 0x9c>; 16298c0cf40fSJerome Brunet #reset-cells = <1>; 16308c0cf40fSJerome Brunet }; 16318c0cf40fSJerome Brunet 16328c0cf40fSJerome Brunet gpio_intc: interrupt-controller@f080 { 1633cbddb02eSCarlo Caione compatible = "amlogic,meson-axg-gpio-intc", 1634cbddb02eSCarlo Caione "amlogic,meson-gpio-intc"; 16358c0cf40fSJerome Brunet reg = <0x0 0xf080 0x0 0x10>; 16368c0cf40fSJerome Brunet interrupt-controller; 16378c0cf40fSJerome Brunet #interrupt-cells = <2>; 16388c0cf40fSJerome Brunet amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; 16398c0cf40fSJerome Brunet }; 16408c0cf40fSJerome Brunet 16416f31ba17SCarlo Caione watchdog@f0d0 { 16426f31ba17SCarlo Caione compatible = "amlogic,meson-gxbb-wdt"; 16436f31ba17SCarlo Caione reg = <0x0 0xf0d0 0x0 0x10>; 16446f31ba17SCarlo Caione clocks = <&xtal>; 16456f31ba17SCarlo Caione }; 16466f31ba17SCarlo Caione 16478c0cf40fSJerome Brunet pwm_ab: pwm@1b000 { 16488c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-ee-pwm"; 16498c0cf40fSJerome Brunet reg = <0x0 0x1b000 0x0 0x20>; 16508c0cf40fSJerome Brunet #pwm-cells = <3>; 16518c0cf40fSJerome Brunet status = "disabled"; 16528c0cf40fSJerome Brunet }; 16538c0cf40fSJerome Brunet 16548c0cf40fSJerome Brunet pwm_cd: pwm@1a000 { 16558c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-ee-pwm"; 16568c0cf40fSJerome Brunet reg = <0x0 0x1a000 0x0 0x20>; 16578c0cf40fSJerome Brunet #pwm-cells = <3>; 16588c0cf40fSJerome Brunet status = "disabled"; 16598c0cf40fSJerome Brunet }; 16608c0cf40fSJerome Brunet 16618c0cf40fSJerome Brunet spicc0: spi@13000 { 16628c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-spicc"; 16638c0cf40fSJerome Brunet reg = <0x0 0x13000 0x0 0x3c>; 16648c0cf40fSJerome Brunet interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 16658c0cf40fSJerome Brunet clocks = <&clkc CLKID_SPICC0>; 16668c0cf40fSJerome Brunet clock-names = "core"; 16678c0cf40fSJerome Brunet #address-cells = <1>; 16688c0cf40fSJerome Brunet #size-cells = <0>; 16698c0cf40fSJerome Brunet status = "disabled"; 16708c0cf40fSJerome Brunet }; 16718c0cf40fSJerome Brunet 16728c0cf40fSJerome Brunet spicc1: spi@15000 { 16738c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-spicc"; 16748c0cf40fSJerome Brunet reg = <0x0 0x15000 0x0 0x3c>; 16758c0cf40fSJerome Brunet interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 16768c0cf40fSJerome Brunet clocks = <&clkc CLKID_SPICC1>; 16778c0cf40fSJerome Brunet clock-names = "core"; 16788c0cf40fSJerome Brunet #address-cells = <1>; 16798c0cf40fSJerome Brunet #size-cells = <0>; 16808c0cf40fSJerome Brunet status = "disabled"; 16818c0cf40fSJerome Brunet }; 16828c0cf40fSJerome Brunet 1683fea888bdSJerome Brunet clk_msr: clock-measure@18000 { 1684fea888bdSJerome Brunet compatible = "amlogic,meson-axg-clk-measure"; 1685fea888bdSJerome Brunet reg = <0x0 0x18000 0x0 0x10>; 1686fea888bdSJerome Brunet }; 1687fea888bdSJerome Brunet 16888c0cf40fSJerome Brunet i2c3: i2c@1c000 { 16898c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 16908c0cf40fSJerome Brunet reg = <0x0 0x1c000 0x0 0x20>; 16918c0cf40fSJerome Brunet interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>; 16928c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 16938c0cf40fSJerome Brunet #address-cells = <1>; 16948c0cf40fSJerome Brunet #size-cells = <0>; 16958c0cf40fSJerome Brunet status = "disabled"; 16968c0cf40fSJerome Brunet }; 16978c0cf40fSJerome Brunet 16988c0cf40fSJerome Brunet i2c2: i2c@1d000 { 16998c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 17008c0cf40fSJerome Brunet reg = <0x0 0x1d000 0x0 0x20>; 17018c0cf40fSJerome Brunet interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; 17028c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 17038c0cf40fSJerome Brunet #address-cells = <1>; 17048c0cf40fSJerome Brunet #size-cells = <0>; 17058c0cf40fSJerome Brunet status = "disabled"; 17068c0cf40fSJerome Brunet }; 17078c0cf40fSJerome Brunet 17088c0cf40fSJerome Brunet i2c1: i2c@1e000 { 17098c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 17108c0cf40fSJerome Brunet reg = <0x0 0x1e000 0x0 0x20>; 17118c0cf40fSJerome Brunet interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; 17128c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 17138c0cf40fSJerome Brunet #address-cells = <1>; 17148c0cf40fSJerome Brunet #size-cells = <0>; 17158c0cf40fSJerome Brunet status = "disabled"; 17168c0cf40fSJerome Brunet }; 17178c0cf40fSJerome Brunet 17188c0cf40fSJerome Brunet i2c0: i2c@1f000 { 17198c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-i2c"; 17208c0cf40fSJerome Brunet reg = <0x0 0x1f000 0x0 0x20>; 17218c0cf40fSJerome Brunet interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; 17228c0cf40fSJerome Brunet clocks = <&clkc CLKID_I2C>; 17238c0cf40fSJerome Brunet #address-cells = <1>; 17248c0cf40fSJerome Brunet #size-cells = <0>; 17258c0cf40fSJerome Brunet status = "disabled"; 17268c0cf40fSJerome Brunet }; 17278c0cf40fSJerome Brunet 17288c0cf40fSJerome Brunet uart_B: serial@23000 { 17298c0cf40fSJerome Brunet compatible = "amlogic,meson-gx-uart"; 17308c0cf40fSJerome Brunet reg = <0x0 0x23000 0x0 0x18>; 17318c0cf40fSJerome Brunet interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; 17328c0cf40fSJerome Brunet status = "disabled"; 17338c0cf40fSJerome Brunet clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; 17348c0cf40fSJerome Brunet clock-names = "xtal", "pclk", "baud"; 17358c0cf40fSJerome Brunet }; 17368c0cf40fSJerome Brunet 17378c0cf40fSJerome Brunet uart_A: serial@24000 { 17388c0cf40fSJerome Brunet compatible = "amlogic,meson-gx-uart"; 17398c0cf40fSJerome Brunet reg = <0x0 0x24000 0x0 0x18>; 17408c0cf40fSJerome Brunet interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; 17418c0cf40fSJerome Brunet status = "disabled"; 17428c0cf40fSJerome Brunet clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; 17438c0cf40fSJerome Brunet clock-names = "xtal", "pclk", "baud"; 17448c0cf40fSJerome Brunet }; 17458c0cf40fSJerome Brunet }; 17468c0cf40fSJerome Brunet 17478c0cf40fSJerome Brunet apb: bus@ffe00000 { 17488c0cf40fSJerome Brunet compatible = "simple-bus"; 17498c0cf40fSJerome Brunet reg = <0x0 0xffe00000 0x0 0x200000>; 17508c0cf40fSJerome Brunet #address-cells = <2>; 17518c0cf40fSJerome Brunet #size-cells = <2>; 17528c0cf40fSJerome Brunet ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>; 17538c0cf40fSJerome Brunet 17548c0cf40fSJerome Brunet sd_emmc_b: sd@5000 { 17558c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-mmc"; 17568c0cf40fSJerome Brunet reg = <0x0 0x5000 0x0 0x800>; 17578c0cf40fSJerome Brunet interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>; 17588c0cf40fSJerome Brunet status = "disabled"; 17598c0cf40fSJerome Brunet clocks = <&clkc CLKID_SD_EMMC_B>, 17608c0cf40fSJerome Brunet <&clkc CLKID_SD_EMMC_B_CLK0>, 17618c0cf40fSJerome Brunet <&clkc CLKID_FCLK_DIV2>; 17628c0cf40fSJerome Brunet clock-names = "core", "clkin0", "clkin1"; 17638c0cf40fSJerome Brunet resets = <&reset RESET_SD_EMMC_B>; 17648c0cf40fSJerome Brunet }; 17658c0cf40fSJerome Brunet 17668c0cf40fSJerome Brunet sd_emmc_c: mmc@7000 { 17678c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-mmc"; 17688c0cf40fSJerome Brunet reg = <0x0 0x7000 0x0 0x800>; 17698c0cf40fSJerome Brunet interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>; 17708c0cf40fSJerome Brunet status = "disabled"; 17718c0cf40fSJerome Brunet clocks = <&clkc CLKID_SD_EMMC_C>, 17728c0cf40fSJerome Brunet <&clkc CLKID_SD_EMMC_C_CLK0>, 17738c0cf40fSJerome Brunet <&clkc CLKID_FCLK_DIV2>; 17748c0cf40fSJerome Brunet clock-names = "core", "clkin0", "clkin1"; 17758c0cf40fSJerome Brunet resets = <&reset RESET_SD_EMMC_C>; 17768c0cf40fSJerome Brunet }; 17771b208babSNeil Armstrong 17781b208babSNeil Armstrong usb2_phy1: phy@9020 { 17791b208babSNeil Armstrong compatible = "amlogic,meson-gxl-usb2-phy"; 17801b208babSNeil Armstrong #phy-cells = <0>; 17811b208babSNeil Armstrong reg = <0x0 0x9020 0x0 0x20>; 17821b208babSNeil Armstrong clocks = <&clkc CLKID_USB>; 17831b208babSNeil Armstrong clock-names = "phy"; 17841b208babSNeil Armstrong resets = <&reset RESET_USB_OTG>; 17851b208babSNeil Armstrong reset-names = "phy"; 17861b208babSNeil Armstrong }; 17878c0cf40fSJerome Brunet }; 17888c0cf40fSJerome Brunet 17898c0cf40fSJerome Brunet sram: sram@fffc0000 { 17909ecded10SNeil Armstrong compatible = "mmio-sram"; 17918c0cf40fSJerome Brunet reg = <0x0 0xfffc0000 0x0 0x20000>; 17928c0cf40fSJerome Brunet #address-cells = <1>; 17938c0cf40fSJerome Brunet #size-cells = <1>; 17948c0cf40fSJerome Brunet ranges = <0 0x0 0xfffc0000 0x20000>; 17958c0cf40fSJerome Brunet 17969ecded10SNeil Armstrong cpu_scp_lpri: scp-sram@13000 { 17978c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-scp-shmem"; 17988c0cf40fSJerome Brunet reg = <0x13000 0x400>; 17998c0cf40fSJerome Brunet }; 18008c0cf40fSJerome Brunet 18019ecded10SNeil Armstrong cpu_scp_hpri: scp-sram@13400 { 18028c0cf40fSJerome Brunet compatible = "amlogic,meson-axg-scp-shmem"; 18038c0cf40fSJerome Brunet reg = <0x13400 0x400>; 18048c0cf40fSJerome Brunet }; 18058c0cf40fSJerome Brunet }; 18068c0cf40fSJerome Brunet }; 18078c0cf40fSJerome Brunet 18088c0cf40fSJerome Brunet timer { 18098c0cf40fSJerome Brunet compatible = "arm,armv8-timer"; 18108c0cf40fSJerome Brunet interrupts = <GIC_PPI 13 18118c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 18128c0cf40fSJerome Brunet <GIC_PPI 14 18138c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 18148c0cf40fSJerome Brunet <GIC_PPI 11 18158c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 18168c0cf40fSJerome Brunet <GIC_PPI 10 18178c0cf40fSJerome Brunet (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; 18188c0cf40fSJerome Brunet }; 18198c0cf40fSJerome Brunet 18208c0cf40fSJerome Brunet xtal: xtal-clk { 18218c0cf40fSJerome Brunet compatible = "fixed-clock"; 18228c0cf40fSJerome Brunet clock-frequency = <24000000>; 18238c0cf40fSJerome Brunet clock-output-names = "xtal"; 18248c0cf40fSJerome Brunet #clock-cells = <0>; 18259d59b708SYixun Lan }; 18269d59b708SYixun Lan}; 1827