1/*
2 * Copyright Altera Corporation (C) 2015. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program.  If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include "socfpga_stratix10.dtsi"
18
19/ {
20	model = "SoCFPGA Stratix 10 SoCDK";
21
22	aliases {
23		serial0 = &uart0;
24	};
25
26	chosen {
27		stdout-path = "serial0:115200n8";
28	};
29
30	leds {
31		compatible = "gpio-leds";
32		hps0 {
33			label = "hps_led0";
34			gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
35		};
36
37		hps1 {
38			label = "hps_led1";
39			gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
40		};
41
42		hps2 {
43			label = "hps_led2";
44			gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
45		};
46	};
47
48	memory {
49		device_type = "memory";
50		/* We expect the bootloader to fill in the reg */
51		reg = <0 0 0 0>;
52	};
53
54	ref_033v: 033-v-ref {
55		compatible = "regulator-fixed";
56		regulator-name = "0.33V";
57		regulator-min-microvolt = <330000>;
58		regulator-max-microvolt = <330000>;
59	};
60
61	soc {
62		clocks {
63			osc1 {
64				clock-frequency = <25000000>;
65			};
66		};
67	};
68};
69
70&gpio1 {
71	status = "okay";
72};
73
74&gmac0 {
75	status = "okay";
76	phy-mode = "rgmii";
77	phy-handle = <&phy0>;
78
79	max-frame-size = <9000>;
80
81	mdio0 {
82		#address-cells = <1>;
83		#size-cells = <0>;
84		compatible = "snps,dwmac-mdio";
85		phy0: ethernet-phy@0 {
86			reg = <4>;
87
88			txd0-skew-ps = <0>; /* -420ps */
89			txd1-skew-ps = <0>; /* -420ps */
90			txd2-skew-ps = <0>; /* -420ps */
91			txd3-skew-ps = <0>; /* -420ps */
92			rxd0-skew-ps = <420>; /* 0ps */
93			rxd1-skew-ps = <420>; /* 0ps */
94			rxd2-skew-ps = <420>; /* 0ps */
95			rxd3-skew-ps = <420>; /* 0ps */
96			txen-skew-ps = <0>; /* -420ps */
97			txc-skew-ps = <900>; /* 0ps */
98			rxdv-skew-ps = <420>; /* 0ps */
99			rxc-skew-ps = <1680>; /* 780ps */
100		};
101	};
102};
103
104&mmc {
105	status = "okay";
106	cap-sd-highspeed;
107	broken-cd;
108	bus-width = <4>;
109};
110
111&uart0 {
112	status = "okay";
113};
114
115&usb0 {
116	status = "okay";
117	disable-over-current;
118};
119
120&watchdog0 {
121	status = "okay";
122};
123
124&i2c1 {
125	status = "okay";
126	clock-frequency = <100000>;
127
128	adc@14 {
129		compatible = "lltc,ltc2497";
130		reg = <0x14>;
131		vref-supply = <&ref_033v>;
132	};
133
134	temp@4c {
135		compatible = "maxim,max1619";
136		reg = <0x4c>;
137	};
138
139	eeprom@51 {
140		compatible = "atmel,24c32";
141		reg = <0x51>;
142		pagesize = <32>;
143	};
144
145	rtc@68 {
146		compatible = "dallas,ds1339";
147		reg = <0x68>;
148	};
149};
150
151&qspi {
152	flash@0 {
153		#address-cells = <1>;
154		#size-cells = <1>;
155		compatible = "n25q00a";
156		reg = <0>;
157		spi-max-frequency = <50000000>;
158
159		m25p,fast-read;
160		cdns,page-size = <256>;
161		cdns,block-size = <16>;
162		cdns,read-delay = <1>;
163		cdns,tshsl-ns = <50>;
164		cdns,tsd2d-ns = <50>;
165		cdns,tchsh-ns = <4>;
166		cdns,tslch-ns = <4>;
167
168		partitions {
169			compatible = "fixed-partitions";
170			#address-cells = <1>;
171			#size-cells = <1>;
172
173			qspi_boot: partition@0 {
174				label = "Boot and fpga data";
175				reg = <0x0 0x4000000>;
176			};
177
178			qspi_rootfs: partition@4000000 {
179				label = "Root Filesystem - JFFS2";
180				reg = <0x4000000 0x4000000>;
181			};
182		};
183	};
184};
185