1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright Altera Corporation (C) 2015. All rights reserved.
4 */
5
6#include "socfpga_stratix10.dtsi"
7
8/ {
9	model = "SoCFPGA Stratix 10 SoCDK";
10
11	aliases {
12		serial0 = &uart0;
13		ethernet0 = &gmac0;
14		ethernet1 = &gmac1;
15		ethernet2 = &gmac2;
16	};
17
18	chosen {
19		stdout-path = "serial0:115200n8";
20	};
21
22	leds {
23		compatible = "gpio-leds";
24		hps0 {
25			label = "hps_led0";
26			gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
27		};
28
29		hps1 {
30			label = "hps_led1";
31			gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
32		};
33
34		hps2 {
35			label = "hps_led2";
36			gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
37		};
38	};
39
40	memory {
41		device_type = "memory";
42		/* We expect the bootloader to fill in the reg */
43		reg = <0 0 0 0>;
44	};
45
46	ref_033v: 033-v-ref {
47		compatible = "regulator-fixed";
48		regulator-name = "0.33V";
49		regulator-min-microvolt = <330000>;
50		regulator-max-microvolt = <330000>;
51	};
52
53	soc {
54		clocks {
55			osc1 {
56				clock-frequency = <25000000>;
57			};
58		};
59	};
60};
61
62&gpio1 {
63	status = "okay";
64};
65
66&gmac0 {
67	status = "okay";
68	phy-mode = "rgmii";
69	phy-handle = <&phy0>;
70
71	max-frame-size = <9000>;
72
73	mdio0 {
74		#address-cells = <1>;
75		#size-cells = <0>;
76		compatible = "snps,dwmac-mdio";
77		phy0: ethernet-phy@0 {
78			reg = <4>;
79
80			txd0-skew-ps = <0>; /* -420ps */
81			txd1-skew-ps = <0>; /* -420ps */
82			txd2-skew-ps = <0>; /* -420ps */
83			txd3-skew-ps = <0>; /* -420ps */
84			rxd0-skew-ps = <420>; /* 0ps */
85			rxd1-skew-ps = <420>; /* 0ps */
86			rxd2-skew-ps = <420>; /* 0ps */
87			rxd3-skew-ps = <420>; /* 0ps */
88			txen-skew-ps = <0>; /* -420ps */
89			txc-skew-ps = <900>; /* 0ps */
90			rxdv-skew-ps = <420>; /* 0ps */
91			rxc-skew-ps = <1680>; /* 780ps */
92		};
93	};
94};
95
96&mmc {
97	status = "okay";
98	cap-sd-highspeed;
99	cap-mmc-highspeed;
100	broken-cd;
101	bus-width = <4>;
102};
103
104&uart0 {
105	status = "okay";
106};
107
108&usb0 {
109	status = "okay";
110	disable-over-current;
111};
112
113&watchdog0 {
114	status = "okay";
115};
116
117&i2c1 {
118	status = "okay";
119	clock-frequency = <100000>;
120	i2c-sda-falling-time-ns = <890>;  /* hcnt */
121	i2c-sdl-falling-time-ns = <890>;  /* lcnt */
122
123	adc@14 {
124		compatible = "lltc,ltc2497";
125		reg = <0x14>;
126		vref-supply = <&ref_033v>;
127	};
128
129	temp@4c {
130		compatible = "maxim,max1619";
131		reg = <0x4c>;
132	};
133
134	eeprom@51 {
135		compatible = "atmel,24c32";
136		reg = <0x51>;
137		pagesize = <32>;
138	};
139
140	rtc@68 {
141		compatible = "dallas,ds1339";
142		reg = <0x68>;
143	};
144};
145
146&qspi {
147	flash@0 {
148		#address-cells = <1>;
149		#size-cells = <1>;
150		compatible = "n25q00a";
151		reg = <0>;
152		spi-max-frequency = <100000000>;
153
154		m25p,fast-read;
155		cdns,page-size = <256>;
156		cdns,block-size = <16>;
157		cdns,read-delay = <1>;
158		cdns,tshsl-ns = <50>;
159		cdns,tsd2d-ns = <50>;
160		cdns,tchsh-ns = <4>;
161		cdns,tslch-ns = <4>;
162
163		partitions {
164			compatible = "fixed-partitions";
165			#address-cells = <1>;
166			#size-cells = <1>;
167
168			qspi_boot: partition@0 {
169				label = "Boot and fpga data";
170				reg = <0x0 0x4000000>;
171			};
172
173			qspi_rootfs: partition@4000000 {
174				label = "Root Filesystem - JFFS2";
175				reg = <0x4000000 0x4000000>;
176			};
177		};
178	};
179};
180