1b4b8f2c9SClément Péron// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2d6d1291dSIcenowy Zheng/* 3d6d1291dSIcenowy Zheng * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> 4d6d1291dSIcenowy Zheng */ 5d6d1291dSIcenowy Zheng 6d6d1291dSIcenowy Zheng/dts-v1/; 7d6d1291dSIcenowy Zheng#include "sun50i-h5.dtsi" 8d6d1291dSIcenowy Zheng 9d6d1291dSIcenowy Zheng#include <dt-bindings/gpio/gpio.h> 10d6d1291dSIcenowy Zheng 11d6d1291dSIcenowy Zheng/ { 12d6d1291dSIcenowy Zheng model = "FriendlyARM NanoPi NEO 2"; 13d6d1291dSIcenowy Zheng compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5"; 14d6d1291dSIcenowy Zheng 15d6d1291dSIcenowy Zheng aliases { 1644a94c7eSCorentin Labbe ethernet0 = &emac; 17d6d1291dSIcenowy Zheng serial0 = &uart0; 18d6d1291dSIcenowy Zheng }; 19d6d1291dSIcenowy Zheng 20d6d1291dSIcenowy Zheng chosen { 21d6d1291dSIcenowy Zheng stdout-path = "serial0:115200n8"; 22d6d1291dSIcenowy Zheng }; 23d6d1291dSIcenowy Zheng 24d6d1291dSIcenowy Zheng leds { 25d6d1291dSIcenowy Zheng compatible = "gpio-leds"; 26d6d1291dSIcenowy Zheng 27d6d1291dSIcenowy Zheng pwr { 28d6d1291dSIcenowy Zheng label = "nanopi:green:pwr"; 29d6d1291dSIcenowy Zheng gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; 30d6d1291dSIcenowy Zheng default-state = "on"; 31d6d1291dSIcenowy Zheng }; 32d6d1291dSIcenowy Zheng 33d6d1291dSIcenowy Zheng status { 34d6d1291dSIcenowy Zheng label = "nanopi:blue:status"; 35d6d1291dSIcenowy Zheng gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; 36d6d1291dSIcenowy Zheng }; 37d6d1291dSIcenowy Zheng }; 38d6d1291dSIcenowy Zheng 3963b95687SIcenowy Zheng reg_gmac_3v3: gmac-3v3 { 4063b95687SIcenowy Zheng compatible = "regulator-fixed"; 4163b95687SIcenowy Zheng regulator-name = "gmac-3v3"; 4263b95687SIcenowy Zheng regulator-min-microvolt = <3300000>; 4363b95687SIcenowy Zheng regulator-max-microvolt = <3300000>; 4463b95687SIcenowy Zheng startup-delay-us = <100000>; 4563b95687SIcenowy Zheng enable-active-high; 4663b95687SIcenowy Zheng gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; 4763b95687SIcenowy Zheng }; 4863b95687SIcenowy Zheng 499907da07SIcenowy Zheng reg_vcc3v3: vcc3v3 { 509907da07SIcenowy Zheng compatible = "regulator-fixed"; 519907da07SIcenowy Zheng regulator-name = "vcc3v3"; 529907da07SIcenowy Zheng regulator-min-microvolt = <3300000>; 539907da07SIcenowy Zheng regulator-max-microvolt = <3300000>; 549907da07SIcenowy Zheng }; 559907da07SIcenowy Zheng 56d6d1291dSIcenowy Zheng reg_usb0_vbus: usb0-vbus { 57d6d1291dSIcenowy Zheng compatible = "regulator-fixed"; 58d6d1291dSIcenowy Zheng regulator-name = "usb0-vbus"; 59d6d1291dSIcenowy Zheng regulator-min-microvolt = <5000000>; 60d6d1291dSIcenowy Zheng regulator-max-microvolt = <5000000>; 61d6d1291dSIcenowy Zheng enable-active-high; 62d6d1291dSIcenowy Zheng gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */ 63d6d1291dSIcenowy Zheng status = "okay"; 64d6d1291dSIcenowy Zheng }; 65d6d1291dSIcenowy Zheng}; 66d6d1291dSIcenowy Zheng 67d6d1291dSIcenowy Zheng&ehci0 { 68d6d1291dSIcenowy Zheng status = "okay"; 69d6d1291dSIcenowy Zheng}; 70d6d1291dSIcenowy Zheng 71d6d1291dSIcenowy Zheng&ehci3 { 72d6d1291dSIcenowy Zheng status = "okay"; 73d6d1291dSIcenowy Zheng}; 74d6d1291dSIcenowy Zheng 7544a94c7eSCorentin Labbe&emac { 7644a94c7eSCorentin Labbe pinctrl-names = "default"; 7744a94c7eSCorentin Labbe pinctrl-0 = <&emac_rgmii_pins>; 7844a94c7eSCorentin Labbe phy-supply = <®_gmac_3v3>; 7944a94c7eSCorentin Labbe phy-handle = <&ext_rgmii_phy>; 8044a94c7eSCorentin Labbe phy-mode = "rgmii"; 8144a94c7eSCorentin Labbe status = "okay"; 8244a94c7eSCorentin Labbe}; 8344a94c7eSCorentin Labbe 8444a94c7eSCorentin Labbe&external_mdio { 8544a94c7eSCorentin Labbe ext_rgmii_phy: ethernet-phy@7 { 8644a94c7eSCorentin Labbe compatible = "ethernet-phy-ieee802.3-c22"; 8744a94c7eSCorentin Labbe reg = <7>; 8844a94c7eSCorentin Labbe }; 8944a94c7eSCorentin Labbe}; 9044a94c7eSCorentin Labbe 91d6d1291dSIcenowy Zheng&mmc0 { 92d6d1291dSIcenowy Zheng vmmc-supply = <®_vcc3v3>; 93d6d1291dSIcenowy Zheng bus-width = <4>; 94d6d1291dSIcenowy Zheng cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 95d6d1291dSIcenowy Zheng status = "okay"; 96d6d1291dSIcenowy Zheng}; 97d6d1291dSIcenowy Zheng 98d6d1291dSIcenowy Zheng&ohci0 { 99d6d1291dSIcenowy Zheng status = "okay"; 100d6d1291dSIcenowy Zheng}; 101d6d1291dSIcenowy Zheng 102d6d1291dSIcenowy Zheng&ohci3 { 103d6d1291dSIcenowy Zheng status = "okay"; 104d6d1291dSIcenowy Zheng}; 105d6d1291dSIcenowy Zheng 106d6d1291dSIcenowy Zheng&uart0 { 107d6d1291dSIcenowy Zheng pinctrl-names = "default"; 108a4dc7919SMaxime Ripard pinctrl-0 = <&uart0_pa_pins>; 109d6d1291dSIcenowy Zheng status = "okay"; 110d6d1291dSIcenowy Zheng}; 111d6d1291dSIcenowy Zheng 112d6d1291dSIcenowy Zheng&usb_otg { 113d6d1291dSIcenowy Zheng dr_mode = "otg"; 114d6d1291dSIcenowy Zheng status = "okay"; 115d6d1291dSIcenowy Zheng}; 116d6d1291dSIcenowy Zheng 117d6d1291dSIcenowy Zheng&usbphy { 118d6d1291dSIcenowy Zheng /* USB Type-A port's VBUS is always on */ 119d6d1291dSIcenowy Zheng usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ 120d6d1291dSIcenowy Zheng usb0_vbus-supply = <®_usb0_vbus>; 121d6d1291dSIcenowy Zheng status = "okay"; 122d6d1291dSIcenowy Zheng}; 123