1b4b8f2c9SClément Péron// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2cabbaed7SClément Péron// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
3d6d1291dSIcenowy Zheng
4d6d1291dSIcenowy Zheng/dts-v1/;
5d6d1291dSIcenowy Zheng#include "sun50i-h5.dtsi"
6d6d1291dSIcenowy Zheng
7d6d1291dSIcenowy Zheng#include <dt-bindings/gpio/gpio.h>
8d6d1291dSIcenowy Zheng
9d6d1291dSIcenowy Zheng/ {
10d6d1291dSIcenowy Zheng	model = "FriendlyARM NanoPi NEO 2";
11d6d1291dSIcenowy Zheng	compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
12d6d1291dSIcenowy Zheng
13d6d1291dSIcenowy Zheng	aliases {
1444a94c7eSCorentin Labbe		ethernet0 = &emac;
15d6d1291dSIcenowy Zheng		serial0 = &uart0;
16d6d1291dSIcenowy Zheng	};
17d6d1291dSIcenowy Zheng
18d6d1291dSIcenowy Zheng	chosen {
19d6d1291dSIcenowy Zheng		stdout-path = "serial0:115200n8";
20d6d1291dSIcenowy Zheng	};
21d6d1291dSIcenowy Zheng
22d6d1291dSIcenowy Zheng	leds {
23d6d1291dSIcenowy Zheng		compatible = "gpio-leds";
24d6d1291dSIcenowy Zheng
25e299e6ddSMaxime Ripard		led-0 {
26d6d1291dSIcenowy Zheng			label = "nanopi:green:pwr";
27d6d1291dSIcenowy Zheng			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
28d6d1291dSIcenowy Zheng			default-state = "on";
29d6d1291dSIcenowy Zheng		};
30d6d1291dSIcenowy Zheng
31e299e6ddSMaxime Ripard		led-1 {
32d6d1291dSIcenowy Zheng			label = "nanopi:blue:status";
33d6d1291dSIcenowy Zheng			gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
34d6d1291dSIcenowy Zheng		};
35d6d1291dSIcenowy Zheng	};
36d6d1291dSIcenowy Zheng
3763b95687SIcenowy Zheng	reg_gmac_3v3: gmac-3v3 {
3863b95687SIcenowy Zheng		compatible = "regulator-fixed";
3963b95687SIcenowy Zheng		regulator-name = "gmac-3v3";
4063b95687SIcenowy Zheng		regulator-min-microvolt = <3300000>;
4163b95687SIcenowy Zheng		regulator-max-microvolt = <3300000>;
4263b95687SIcenowy Zheng		startup-delay-us = <100000>;
4363b95687SIcenowy Zheng		enable-active-high;
4463b95687SIcenowy Zheng		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
4563b95687SIcenowy Zheng	};
4663b95687SIcenowy Zheng
479907da07SIcenowy Zheng	reg_vcc3v3: vcc3v3 {
489907da07SIcenowy Zheng		compatible = "regulator-fixed";
499907da07SIcenowy Zheng		regulator-name = "vcc3v3";
509907da07SIcenowy Zheng		regulator-min-microvolt = <3300000>;
519907da07SIcenowy Zheng		regulator-max-microvolt = <3300000>;
529907da07SIcenowy Zheng	};
539907da07SIcenowy Zheng
54d6d1291dSIcenowy Zheng	reg_usb0_vbus: usb0-vbus {
55d6d1291dSIcenowy Zheng		compatible = "regulator-fixed";
56d6d1291dSIcenowy Zheng		regulator-name = "usb0-vbus";
57d6d1291dSIcenowy Zheng		regulator-min-microvolt = <5000000>;
58d6d1291dSIcenowy Zheng		regulator-max-microvolt = <5000000>;
59d6d1291dSIcenowy Zheng		enable-active-high;
60d6d1291dSIcenowy Zheng		gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
61d6d1291dSIcenowy Zheng		status = "okay";
62d6d1291dSIcenowy Zheng	};
63d6d1291dSIcenowy Zheng};
64d6d1291dSIcenowy Zheng
65d6d1291dSIcenowy Zheng&ehci0 {
66d6d1291dSIcenowy Zheng	status = "okay";
67d6d1291dSIcenowy Zheng};
68d6d1291dSIcenowy Zheng
69d6d1291dSIcenowy Zheng&ehci3 {
70d6d1291dSIcenowy Zheng	status = "okay";
71d6d1291dSIcenowy Zheng};
72d6d1291dSIcenowy Zheng
7344a94c7eSCorentin Labbe&emac {
7444a94c7eSCorentin Labbe	pinctrl-names = "default";
7544a94c7eSCorentin Labbe	pinctrl-0 = <&emac_rgmii_pins>;
7644a94c7eSCorentin Labbe	phy-supply = <&reg_gmac_3v3>;
7744a94c7eSCorentin Labbe	phy-handle = <&ext_rgmii_phy>;
78*0764e365SClément Bœsch	phy-mode = "rgmii-id";
7944a94c7eSCorentin Labbe	status = "okay";
8044a94c7eSCorentin Labbe};
8144a94c7eSCorentin Labbe
8244a94c7eSCorentin Labbe&external_mdio {
8344a94c7eSCorentin Labbe	ext_rgmii_phy: ethernet-phy@7 {
8444a94c7eSCorentin Labbe		compatible = "ethernet-phy-ieee802.3-c22";
8544a94c7eSCorentin Labbe		reg = <7>;
8644a94c7eSCorentin Labbe	};
8744a94c7eSCorentin Labbe};
8844a94c7eSCorentin Labbe
89d6d1291dSIcenowy Zheng&mmc0 {
90d6d1291dSIcenowy Zheng	vmmc-supply = <&reg_vcc3v3>;
91d6d1291dSIcenowy Zheng	bus-width = <4>;
92d6d1291dSIcenowy Zheng	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
93d6d1291dSIcenowy Zheng	status = "okay";
94d6d1291dSIcenowy Zheng};
95d6d1291dSIcenowy Zheng
96d6d1291dSIcenowy Zheng&ohci0 {
97d6d1291dSIcenowy Zheng	status = "okay";
98d6d1291dSIcenowy Zheng};
99d6d1291dSIcenowy Zheng
100d6d1291dSIcenowy Zheng&ohci3 {
101d6d1291dSIcenowy Zheng	status = "okay";
102d6d1291dSIcenowy Zheng};
103d6d1291dSIcenowy Zheng
104d6d1291dSIcenowy Zheng&uart0 {
105d6d1291dSIcenowy Zheng	pinctrl-names = "default";
106a4dc7919SMaxime Ripard	pinctrl-0 = <&uart0_pa_pins>;
107d6d1291dSIcenowy Zheng	status = "okay";
108d6d1291dSIcenowy Zheng};
109d6d1291dSIcenowy Zheng
110d6d1291dSIcenowy Zheng&usb_otg {
111d6d1291dSIcenowy Zheng	dr_mode = "otg";
112d6d1291dSIcenowy Zheng	status = "okay";
113d6d1291dSIcenowy Zheng};
114d6d1291dSIcenowy Zheng
115d6d1291dSIcenowy Zheng&usbphy {
116d6d1291dSIcenowy Zheng	/* USB Type-A port's VBUS is always on */
117d6d1291dSIcenowy Zheng	usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
118d6d1291dSIcenowy Zheng	usb0_vbus-supply = <&reg_usb0_vbus>;
119d6d1291dSIcenowy Zheng	status = "okay";
120d6d1291dSIcenowy Zheng};
121