1b4b8f2c9SClément Péron// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2cabbaed7SClément Péron// Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz>
3cabbaed7SClément Péron// Based on sun50i-a64-pine64.dts, which is:
4cabbaed7SClément Péron//   Copyright (c) 2016 ARM Ltd.
596219b00SIcenowy Zheng
696219b00SIcenowy Zheng/dts-v1/;
796219b00SIcenowy Zheng
896219b00SIcenowy Zheng#include "sun50i-a64-sopine.dtsi"
996219b00SIcenowy Zheng
1096219b00SIcenowy Zheng/ {
1196219b00SIcenowy Zheng	model = "SoPine with baseboard";
1296219b00SIcenowy Zheng	compatible = "pine64,sopine-baseboard", "pine64,sopine",
1396219b00SIcenowy Zheng		     "allwinner,sun50i-a64";
1496219b00SIcenowy Zheng
1596219b00SIcenowy Zheng	aliases {
1694f44288SCorentin Labbe		ethernet0 = &emac;
1796219b00SIcenowy Zheng		serial0 = &uart0;
1813de0f0aSAlistair Francis		serial1 = &uart1;
1913de0f0aSAlistair Francis		serial2 = &uart2;
2013de0f0aSAlistair Francis		serial3 = &uart3;
2113de0f0aSAlistair Francis		serial4 = &uart4;
2296219b00SIcenowy Zheng	};
2396219b00SIcenowy Zheng
2496219b00SIcenowy Zheng	chosen {
2596219b00SIcenowy Zheng		stdout-path = "serial0:115200n8";
2696219b00SIcenowy Zheng	};
2796219b00SIcenowy Zheng
28f4e4453aSJagan Teki	hdmi-connector {
29f4e4453aSJagan Teki		compatible = "hdmi-connector";
30f4e4453aSJagan Teki		type = "a";
31f4e4453aSJagan Teki
32f4e4453aSJagan Teki		port {
33f4e4453aSJagan Teki			hdmi_con_in: endpoint {
34f4e4453aSJagan Teki				remote-endpoint = <&hdmi_out_con>;
35f4e4453aSJagan Teki			};
36f4e4453aSJagan Teki		};
37f4e4453aSJagan Teki	};
38f4e4453aSJagan Teki
3996219b00SIcenowy Zheng	reg_vcc1v8: vcc1v8 {
4096219b00SIcenowy Zheng		compatible = "regulator-fixed";
4196219b00SIcenowy Zheng		regulator-name = "vcc1v8";
4296219b00SIcenowy Zheng		regulator-min-microvolt = <1800000>;
4396219b00SIcenowy Zheng		regulator-max-microvolt = <1800000>;
4496219b00SIcenowy Zheng	};
4596219b00SIcenowy Zheng};
4696219b00SIcenowy Zheng
475e99c99aSOskari Lemmela&ac_power_supply {
485e99c99aSOskari Lemmela	status = "okay";
495e99c99aSOskari Lemmela};
505e99c99aSOskari Lemmela
515e99c99aSOskari Lemmela&battery_power_supply {
525e99c99aSOskari Lemmela	status = "okay";
535e99c99aSOskari Lemmela};
545e99c99aSOskari Lemmela
55498c21f2SVasily Khoruzhick&codec {
56498c21f2SVasily Khoruzhick	status = "okay";
57498c21f2SVasily Khoruzhick};
58498c21f2SVasily Khoruzhick
59498c21f2SVasily Khoruzhick&codec_analog {
60498c21f2SVasily Khoruzhick	status = "okay";
61498c21f2SVasily Khoruzhick};
62498c21f2SVasily Khoruzhick
63498c21f2SVasily Khoruzhick&dai {
64498c21f2SVasily Khoruzhick	status = "okay";
65498c21f2SVasily Khoruzhick};
66498c21f2SVasily Khoruzhick
67f4e4453aSJagan Teki&de {
68f4e4453aSJagan Teki	status = "okay";
69f4e4453aSJagan Teki};
70f4e4453aSJagan Teki
7196219b00SIcenowy Zheng&ehci0 {
7296219b00SIcenowy Zheng	status = "okay";
7396219b00SIcenowy Zheng};
7496219b00SIcenowy Zheng
7596219b00SIcenowy Zheng&ehci1 {
7696219b00SIcenowy Zheng	status = "okay";
7796219b00SIcenowy Zheng};
7896219b00SIcenowy Zheng
7994f44288SCorentin Labbe&emac {
8094f44288SCorentin Labbe	pinctrl-names = "default";
8194f44288SCorentin Labbe	pinctrl-0 = <&rgmii_pins>;
82*bd5431b2SIcenowy Zheng	phy-mode = "rgmii-txid";
8394f44288SCorentin Labbe	phy-handle = <&ext_rgmii_phy>;
84bdfe4cebSIcenowy Zheng	phy-supply = <&reg_dc1sw>;
8594f44288SCorentin Labbe	status = "okay";
8694f44288SCorentin Labbe};
8794f44288SCorentin Labbe
88f4e4453aSJagan Teki&hdmi {
89f4e4453aSJagan Teki	hvcc-supply = <&reg_dldo1>;
90f4e4453aSJagan Teki	status = "okay";
91f4e4453aSJagan Teki};
92f4e4453aSJagan Teki
93f4e4453aSJagan Teki&hdmi_out {
94f4e4453aSJagan Teki	hdmi_out_con: endpoint {
95f4e4453aSJagan Teki		remote-endpoint = <&hdmi_con_in>;
96f4e4453aSJagan Teki	};
97f4e4453aSJagan Teki};
98f4e4453aSJagan Teki
9994f44288SCorentin Labbe&mdio {
10094f44288SCorentin Labbe	ext_rgmii_phy: ethernet-phy@1 {
10194f44288SCorentin Labbe		compatible = "ethernet-phy-ieee802.3-c22";
10294f44288SCorentin Labbe		reg = <1>;
10394f44288SCorentin Labbe	};
10494f44288SCorentin Labbe};
10594f44288SCorentin Labbe
10696219b00SIcenowy Zheng&mmc2 {
10796219b00SIcenowy Zheng	pinctrl-names = "default";
10896219b00SIcenowy Zheng	pinctrl-0 = <&mmc2_pins>;
1097d556bfcSJagan Teki	vmmc-supply = <&reg_dcdc1>;
11096219b00SIcenowy Zheng	vqmmc-supply = <&reg_vcc1v8>;
11196219b00SIcenowy Zheng	bus-width = <8>;
11296219b00SIcenowy Zheng	non-removable;
11396219b00SIcenowy Zheng	cap-mmc-hw-reset;
1140d66e0b8SAndre Przywara	mmc-hs200-1_8v;
11596219b00SIcenowy Zheng	status = "okay";
11696219b00SIcenowy Zheng};
11796219b00SIcenowy Zheng
11896219b00SIcenowy Zheng&ohci0 {
11996219b00SIcenowy Zheng	status = "okay";
12096219b00SIcenowy Zheng};
12196219b00SIcenowy Zheng
12296219b00SIcenowy Zheng&ohci1 {
12396219b00SIcenowy Zheng	status = "okay";
12496219b00SIcenowy Zheng};
12596219b00SIcenowy Zheng
12678c3cbc8SIcenowy Zheng&reg_dc1sw {
127ccdf3aaaSJernej Skrabec	/*
128ccdf3aaaSJernej Skrabec	 * Ethernet PHY needs 30ms to properly power up and some more
129ccdf3aaaSJernej Skrabec	 * to initialize. 100ms should be plenty of time to finish
130ccdf3aaaSJernej Skrabec	 * whole process.
131ccdf3aaaSJernej Skrabec	 */
132ccdf3aaaSJernej Skrabec	regulator-enable-ramp-delay = <100000>;
13378c3cbc8SIcenowy Zheng	regulator-name = "vcc-phy";
13478c3cbc8SIcenowy Zheng};
13578c3cbc8SIcenowy Zheng
13678c3cbc8SIcenowy Zheng&reg_dldo1 {
13778c3cbc8SIcenowy Zheng	regulator-min-microvolt = <3300000>;
13878c3cbc8SIcenowy Zheng	regulator-max-microvolt = <3300000>;
13978c3cbc8SIcenowy Zheng	regulator-name = "vcc-hdmi";
14078c3cbc8SIcenowy Zheng};
14178c3cbc8SIcenowy Zheng
14278c3cbc8SIcenowy Zheng&reg_dldo2 {
14378c3cbc8SIcenowy Zheng	regulator-min-microvolt = <3300000>;
14478c3cbc8SIcenowy Zheng	regulator-max-microvolt = <3300000>;
14578c3cbc8SIcenowy Zheng	regulator-name = "vcc-mipi";
14678c3cbc8SIcenowy Zheng};
14778c3cbc8SIcenowy Zheng
14878c3cbc8SIcenowy Zheng&reg_dldo4 {
14978c3cbc8SIcenowy Zheng	regulator-min-microvolt = <3300000>;
15078c3cbc8SIcenowy Zheng	regulator-max-microvolt = <3300000>;
15178c3cbc8SIcenowy Zheng	regulator-name = "vcc-wifi";
15278c3cbc8SIcenowy Zheng};
15378c3cbc8SIcenowy Zheng
1545cbef9f9SIcenowy Zheng&simplefb_hdmi {
1555cbef9f9SIcenowy Zheng	vcc-hdmi-supply = <&reg_dldo1>;
1565cbef9f9SIcenowy Zheng};
1575cbef9f9SIcenowy Zheng
158498c21f2SVasily Khoruzhick&sound {
159498c21f2SVasily Khoruzhick	simple-audio-card,aux-devs = <&codec_analog>;
160498c21f2SVasily Khoruzhick	simple-audio-card,widgets = "Microphone", "Microphone Jack",
161498c21f2SVasily Khoruzhick				    "Headphone", "Headphone Jack";
162498c21f2SVasily Khoruzhick	simple-audio-card,routing =
163631e6a35SSamuel Holland			"Left DAC", "DACL",
164631e6a35SSamuel Holland			"Right DAC", "DACR",
165498c21f2SVasily Khoruzhick			"Headphone Jack", "HP",
166631e6a35SSamuel Holland			"ADCL", "Left ADC",
167631e6a35SSamuel Holland			"ADCR", "Right ADC",
168498c21f2SVasily Khoruzhick			"MIC2", "Microphone Jack";
169498c21f2SVasily Khoruzhick	status = "okay";
170498c21f2SVasily Khoruzhick};
171498c21f2SVasily Khoruzhick
17296219b00SIcenowy Zheng&uart0 {
17396219b00SIcenowy Zheng	pinctrl-names = "default";
174d91ebb95SChen-Yu Tsai	pinctrl-0 = <&uart0_pb_pins>;
17596219b00SIcenowy Zheng	status = "okay";
17696219b00SIcenowy Zheng};
17796219b00SIcenowy Zheng
17813de0f0aSAlistair Francis/* On Pi-2 connector */
17913de0f0aSAlistair Francis&uart2 {
18013de0f0aSAlistair Francis	pinctrl-names = "default";
18113de0f0aSAlistair Francis	pinctrl-0 = <&uart2_pins>;
18213de0f0aSAlistair Francis	status = "disabled";
18313de0f0aSAlistair Francis};
18413de0f0aSAlistair Francis
18513de0f0aSAlistair Francis/* On Euler connector */
18613de0f0aSAlistair Francis&uart3 {
18713de0f0aSAlistair Francis	pinctrl-names = "default";
18813de0f0aSAlistair Francis	pinctrl-0 = <&uart3_pins>;
18913de0f0aSAlistair Francis	status = "disabled";
19013de0f0aSAlistair Francis};
19113de0f0aSAlistair Francis
19213de0f0aSAlistair Francis/* On Euler connector, RTS/CTS optional */
19313de0f0aSAlistair Francis&uart4 {
19413de0f0aSAlistair Francis	pinctrl-names = "default";
19513de0f0aSAlistair Francis	pinctrl-0 = <&uart4_pins>;
19613de0f0aSAlistair Francis	status = "disabled";
19713de0f0aSAlistair Francis};
19813de0f0aSAlistair Francis
19996219b00SIcenowy Zheng&usb_otg {
20096219b00SIcenowy Zheng	dr_mode = "host";
20196219b00SIcenowy Zheng	status = "okay";
20296219b00SIcenowy Zheng};
20396219b00SIcenowy Zheng
20496219b00SIcenowy Zheng&usbphy {
20596219b00SIcenowy Zheng	status = "okay";
20696219b00SIcenowy Zheng};
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