1*05c618f3SKrzysztof Kozlowski// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 20dea1794SYangtao Li/* 30dea1794SYangtao Li * Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com> 40dea1794SYangtao Li */ 50dea1794SYangtao Li 60dea1794SYangtao Li#include <dt-bindings/interrupt-controller/arm-gic.h> 70dea1794SYangtao Li#include <dt-bindings/clock/sun50i-a100-ccu.h> 80dea1794SYangtao Li#include <dt-bindings/clock/sun50i-a100-r-ccu.h> 90dea1794SYangtao Li#include <dt-bindings/reset/sun50i-a100-ccu.h> 100dea1794SYangtao Li#include <dt-bindings/reset/sun50i-a100-r-ccu.h> 110dea1794SYangtao Li 120dea1794SYangtao Li/ { 130dea1794SYangtao Li interrupt-parent = <&gic>; 140dea1794SYangtao Li #address-cells = <2>; 150dea1794SYangtao Li #size-cells = <2>; 160dea1794SYangtao Li 170dea1794SYangtao Li cpus { 180dea1794SYangtao Li #address-cells = <1>; 190dea1794SYangtao Li #size-cells = <0>; 200dea1794SYangtao Li 210dea1794SYangtao Li cpu0: cpu@0 { 220dea1794SYangtao Li compatible = "arm,cortex-a53"; 230dea1794SYangtao Li device_type = "cpu"; 240dea1794SYangtao Li reg = <0x0>; 250dea1794SYangtao Li enable-method = "psci"; 260dea1794SYangtao Li }; 270dea1794SYangtao Li 280dea1794SYangtao Li cpu@1 { 290dea1794SYangtao Li compatible = "arm,cortex-a53"; 300dea1794SYangtao Li device_type = "cpu"; 310dea1794SYangtao Li reg = <0x1>; 320dea1794SYangtao Li enable-method = "psci"; 330dea1794SYangtao Li }; 340dea1794SYangtao Li 350dea1794SYangtao Li cpu@2 { 360dea1794SYangtao Li compatible = "arm,cortex-a53"; 370dea1794SYangtao Li device_type = "cpu"; 380dea1794SYangtao Li reg = <0x2>; 390dea1794SYangtao Li enable-method = "psci"; 400dea1794SYangtao Li }; 410dea1794SYangtao Li 420dea1794SYangtao Li cpu@3 { 430dea1794SYangtao Li compatible = "arm,cortex-a53"; 440dea1794SYangtao Li device_type = "cpu"; 450dea1794SYangtao Li reg = <0x3>; 460dea1794SYangtao Li enable-method = "psci"; 470dea1794SYangtao Li }; 480dea1794SYangtao Li }; 490dea1794SYangtao Li 500dea1794SYangtao Li psci { 510dea1794SYangtao Li compatible = "arm,psci-1.0"; 520dea1794SYangtao Li method = "smc"; 530dea1794SYangtao Li }; 540dea1794SYangtao Li 550dea1794SYangtao Li dcxo24M: dcxo24M-clk { 560dea1794SYangtao Li compatible = "fixed-clock"; 570dea1794SYangtao Li clock-frequency = <24000000>; 580dea1794SYangtao Li clock-output-names = "dcxo24M"; 590dea1794SYangtao Li #clock-cells = <0>; 600dea1794SYangtao Li }; 610dea1794SYangtao Li 620dea1794SYangtao Li iosc: internal-osc-clk { 630dea1794SYangtao Li compatible = "fixed-clock"; 640dea1794SYangtao Li clock-frequency = <16000000>; 650dea1794SYangtao Li clock-accuracy = <300000000>; 660dea1794SYangtao Li clock-output-names = "iosc"; 670dea1794SYangtao Li #clock-cells = <0>; 680dea1794SYangtao Li }; 690dea1794SYangtao Li 700dea1794SYangtao Li osc32k: osc32k-clk { 710dea1794SYangtao Li compatible = "fixed-clock"; 720dea1794SYangtao Li clock-frequency = <32768>; 730dea1794SYangtao Li clock-output-names = "osc32k"; 740dea1794SYangtao Li #clock-cells = <0>; 750dea1794SYangtao Li }; 760dea1794SYangtao Li 770dea1794SYangtao Li timer { 780dea1794SYangtao Li compatible = "arm,armv8-timer"; 790dea1794SYangtao Li interrupts = <GIC_PPI 13 800dea1794SYangtao Li (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 810dea1794SYangtao Li <GIC_PPI 14 820dea1794SYangtao Li (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 830dea1794SYangtao Li <GIC_PPI 11 840dea1794SYangtao Li (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 850dea1794SYangtao Li <GIC_PPI 10 860dea1794SYangtao Li (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 870dea1794SYangtao Li }; 880dea1794SYangtao Li 890dea1794SYangtao Li soc { 900dea1794SYangtao Li compatible = "simple-bus"; 910dea1794SYangtao Li #address-cells = <1>; 920dea1794SYangtao Li #size-cells = <1>; 930dea1794SYangtao Li ranges = <0 0 0 0x3fffffff>; 940dea1794SYangtao Li 950dea1794SYangtao Li ccu: clock@3001000 { 960dea1794SYangtao Li compatible = "allwinner,sun50i-a100-ccu"; 970dea1794SYangtao Li reg = <0x03001000 0x1000>; 980dea1794SYangtao Li clocks = <&dcxo24M>, <&osc32k>, <&iosc>; 990dea1794SYangtao Li clock-names = "hosc", "losc", "iosc"; 1000dea1794SYangtao Li #clock-cells = <1>; 1010dea1794SYangtao Li #reset-cells = <1>; 1020dea1794SYangtao Li }; 1030dea1794SYangtao Li 1047072784dSYangtao Li dma: dma-controller@3002000 { 1057072784dSYangtao Li compatible = "allwinner,sun50i-a100-dma"; 1067072784dSYangtao Li reg = <0x03002000 0x1000>; 1077072784dSYangtao Li interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 1087072784dSYangtao Li clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>; 1097072784dSYangtao Li clock-names = "bus", "mbus"; 1107072784dSYangtao Li resets = <&ccu RST_BUS_DMA>; 1117072784dSYangtao Li dma-channels = <8>; 1127072784dSYangtao Li dma-requests = <52>; 1137072784dSYangtao Li #dma-cells = <1>; 1147072784dSYangtao Li }; 1157072784dSYangtao Li 1160dea1794SYangtao Li gic: interrupt-controller@3021000 { 1170dea1794SYangtao Li compatible = "arm,gic-400"; 1180dea1794SYangtao Li reg = <0x03021000 0x1000>, <0x03022000 0x2000>, 1190dea1794SYangtao Li <0x03024000 0x2000>, <0x03026000 0x2000>; 1200dea1794SYangtao Li interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 1210dea1794SYangtao Li IRQ_TYPE_LEVEL_HIGH)>; 1220dea1794SYangtao Li interrupt-controller; 1230dea1794SYangtao Li #interrupt-cells = <3>; 1240dea1794SYangtao Li }; 1250dea1794SYangtao Li 1260dea1794SYangtao Li efuse@3006000 { 1270dea1794SYangtao Li compatible = "allwinner,sun50i-a100-sid", 1280dea1794SYangtao Li "allwinner,sun50i-a64-sid"; 1290dea1794SYangtao Li reg = <0x03006000 0x1000>; 1300dea1794SYangtao Li #address-cells = <1>; 1310dea1794SYangtao Li #size-cells = <1>; 1320dea1794SYangtao Li 1330dea1794SYangtao Li ths_calibration: calib@14 { 1340dea1794SYangtao Li reg = <0x14 8>; 1350dea1794SYangtao Li }; 1360dea1794SYangtao Li }; 1370dea1794SYangtao Li 1380dea1794SYangtao Li pio: pinctrl@300b000 { 1390dea1794SYangtao Li compatible = "allwinner,sun50i-a100-pinctrl"; 1400dea1794SYangtao Li reg = <0x0300b000 0x400>; 1410dea1794SYangtao Li interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1420dea1794SYangtao Li <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1430dea1794SYangtao Li <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1440dea1794SYangtao Li <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1450dea1794SYangtao Li <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1460dea1794SYangtao Li <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1470dea1794SYangtao Li <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 1480dea1794SYangtao Li clocks = <&ccu CLK_APB1>, <&dcxo24M>, <&osc32k>; 1490dea1794SYangtao Li clock-names = "apb", "hosc", "losc"; 1500dea1794SYangtao Li gpio-controller; 1510dea1794SYangtao Li #gpio-cells = <3>; 1520dea1794SYangtao Li interrupt-controller; 1530dea1794SYangtao Li #interrupt-cells = <3>; 1540dea1794SYangtao Li 1550dea1794SYangtao Li uart0_pb_pins: uart0-pb-pins { 1560dea1794SYangtao Li pins = "PB9", "PB10"; 1570dea1794SYangtao Li function = "uart0"; 1580dea1794SYangtao Li }; 1590dea1794SYangtao Li }; 1600dea1794SYangtao Li 1610dea1794SYangtao Li uart0: serial@5000000 { 1620dea1794SYangtao Li compatible = "snps,dw-apb-uart"; 1630dea1794SYangtao Li reg = <0x05000000 0x400>; 1640dea1794SYangtao Li interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 1650dea1794SYangtao Li reg-shift = <2>; 1660dea1794SYangtao Li reg-io-width = <4>; 1670dea1794SYangtao Li clocks = <&ccu CLK_BUS_UART0>; 1680dea1794SYangtao Li resets = <&ccu RST_BUS_UART0>; 1690dea1794SYangtao Li status = "disabled"; 1700dea1794SYangtao Li }; 1710dea1794SYangtao Li 1720dea1794SYangtao Li uart1: serial@5000400 { 1730dea1794SYangtao Li compatible = "snps,dw-apb-uart"; 1740dea1794SYangtao Li reg = <0x05000400 0x400>; 1750dea1794SYangtao Li interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; 1760dea1794SYangtao Li reg-shift = <2>; 1770dea1794SYangtao Li reg-io-width = <4>; 1780dea1794SYangtao Li clocks = <&ccu CLK_BUS_UART1>; 1790dea1794SYangtao Li resets = <&ccu RST_BUS_UART1>; 1800dea1794SYangtao Li status = "disabled"; 1810dea1794SYangtao Li }; 1820dea1794SYangtao Li 1830dea1794SYangtao Li uart2: serial@5000800 { 1840dea1794SYangtao Li compatible = "snps,dw-apb-uart"; 1850dea1794SYangtao Li reg = <0x05000800 0x400>; 1860dea1794SYangtao Li interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 1870dea1794SYangtao Li reg-shift = <2>; 1880dea1794SYangtao Li reg-io-width = <4>; 1890dea1794SYangtao Li clocks = <&ccu CLK_BUS_UART2>; 1900dea1794SYangtao Li resets = <&ccu RST_BUS_UART2>; 1910dea1794SYangtao Li status = "disabled"; 1920dea1794SYangtao Li }; 1930dea1794SYangtao Li 1940dea1794SYangtao Li uart3: serial@5000c00 { 1950dea1794SYangtao Li compatible = "snps,dw-apb-uart"; 1960dea1794SYangtao Li reg = <0x05000c00 0x400>; 1970dea1794SYangtao Li interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 1980dea1794SYangtao Li reg-shift = <2>; 1990dea1794SYangtao Li reg-io-width = <4>; 2000dea1794SYangtao Li clocks = <&ccu CLK_BUS_UART3>; 2010dea1794SYangtao Li resets = <&ccu RST_BUS_UART3>; 2020dea1794SYangtao Li status = "disabled"; 2030dea1794SYangtao Li }; 2040dea1794SYangtao Li 2050dea1794SYangtao Li uart4: serial@5001000 { 2060dea1794SYangtao Li compatible = "snps,dw-apb-uart"; 2070dea1794SYangtao Li reg = <0x05001000 0x400>; 2080dea1794SYangtao Li interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 2090dea1794SYangtao Li reg-shift = <2>; 2100dea1794SYangtao Li reg-io-width = <4>; 2110dea1794SYangtao Li clocks = <&ccu CLK_BUS_UART4>; 2120dea1794SYangtao Li resets = <&ccu RST_BUS_UART4>; 2130dea1794SYangtao Li status = "disabled"; 2140dea1794SYangtao Li }; 2150dea1794SYangtao Li 2160dea1794SYangtao Li i2c0: i2c@5002000 { 2170dea1794SYangtao Li compatible = "allwinner,sun50i-a100-i2c", 218790edb2eSSamuel Holland "allwinner,sun8i-v536-i2c", 2190dea1794SYangtao Li "allwinner,sun6i-a31-i2c"; 2200dea1794SYangtao Li reg = <0x05002000 0x400>; 2210dea1794SYangtao Li interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 2220dea1794SYangtao Li clocks = <&ccu CLK_BUS_I2C0>; 2230dea1794SYangtao Li resets = <&ccu RST_BUS_I2C0>; 2245db5663cSSamuel Holland dmas = <&dma 43>, <&dma 43>; 2255db5663cSSamuel Holland dma-names = "rx", "tx"; 2260dea1794SYangtao Li status = "disabled"; 2270dea1794SYangtao Li #address-cells = <1>; 2280dea1794SYangtao Li #size-cells = <0>; 2290dea1794SYangtao Li }; 2300dea1794SYangtao Li 2310dea1794SYangtao Li i2c1: i2c@5002400 { 2320dea1794SYangtao Li compatible = "allwinner,sun50i-a100-i2c", 233790edb2eSSamuel Holland "allwinner,sun8i-v536-i2c", 2340dea1794SYangtao Li "allwinner,sun6i-a31-i2c"; 2350dea1794SYangtao Li reg = <0x05002400 0x400>; 2360dea1794SYangtao Li interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 2370dea1794SYangtao Li clocks = <&ccu CLK_BUS_I2C1>; 2380dea1794SYangtao Li resets = <&ccu RST_BUS_I2C1>; 2395db5663cSSamuel Holland dmas = <&dma 44>, <&dma 44>; 2405db5663cSSamuel Holland dma-names = "rx", "tx"; 2410dea1794SYangtao Li status = "disabled"; 2420dea1794SYangtao Li #address-cells = <1>; 2430dea1794SYangtao Li #size-cells = <0>; 2440dea1794SYangtao Li }; 2450dea1794SYangtao Li 2460dea1794SYangtao Li i2c2: i2c@5002800 { 2470dea1794SYangtao Li compatible = "allwinner,sun50i-a100-i2c", 248790edb2eSSamuel Holland "allwinner,sun8i-v536-i2c", 2490dea1794SYangtao Li "allwinner,sun6i-a31-i2c"; 2500dea1794SYangtao Li reg = <0x05002800 0x400>; 2510dea1794SYangtao Li interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 2520dea1794SYangtao Li clocks = <&ccu CLK_BUS_I2C2>; 2530dea1794SYangtao Li resets = <&ccu RST_BUS_I2C2>; 2545db5663cSSamuel Holland dmas = <&dma 45>, <&dma 45>; 2555db5663cSSamuel Holland dma-names = "rx", "tx"; 2560dea1794SYangtao Li status = "disabled"; 2570dea1794SYangtao Li #address-cells = <1>; 2580dea1794SYangtao Li #size-cells = <0>; 2590dea1794SYangtao Li }; 2600dea1794SYangtao Li 2610dea1794SYangtao Li i2c3: i2c@5002c00 { 2620dea1794SYangtao Li compatible = "allwinner,sun50i-a100-i2c", 263790edb2eSSamuel Holland "allwinner,sun8i-v536-i2c", 2640dea1794SYangtao Li "allwinner,sun6i-a31-i2c"; 2650dea1794SYangtao Li reg = <0x05002c00 0x400>; 2660dea1794SYangtao Li interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 2670dea1794SYangtao Li clocks = <&ccu CLK_BUS_I2C3>; 2680dea1794SYangtao Li resets = <&ccu RST_BUS_I2C3>; 2695db5663cSSamuel Holland dmas = <&dma 46>, <&dma 46>; 2705db5663cSSamuel Holland dma-names = "rx", "tx"; 2710dea1794SYangtao Li status = "disabled"; 2720dea1794SYangtao Li #address-cells = <1>; 2730dea1794SYangtao Li #size-cells = <0>; 2740dea1794SYangtao Li }; 2750dea1794SYangtao Li 2760dea1794SYangtao Li ths: thermal-sensor@5070400 { 2770dea1794SYangtao Li compatible = "allwinner,sun50i-a100-ths"; 2780dea1794SYangtao Li reg = <0x05070400 0x100>; 2790dea1794SYangtao Li interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 2800dea1794SYangtao Li clocks = <&ccu CLK_BUS_THS>; 2810dea1794SYangtao Li clock-names = "bus"; 2820dea1794SYangtao Li resets = <&ccu RST_BUS_THS>; 2830dea1794SYangtao Li nvmem-cells = <&ths_calibration>; 2840dea1794SYangtao Li nvmem-cell-names = "calibration"; 2850dea1794SYangtao Li #thermal-sensor-cells = <1>; 2860dea1794SYangtao Li }; 2870dea1794SYangtao Li 2880dea1794SYangtao Li r_ccu: clock@7010000 { 2890dea1794SYangtao Li compatible = "allwinner,sun50i-a100-r-ccu"; 2900dea1794SYangtao Li reg = <0x07010000 0x300>; 2910dea1794SYangtao Li clocks = <&dcxo24M>, <&osc32k>, <&iosc>, 2920dea1794SYangtao Li <&ccu CLK_PLL_PERIPH0>; 2930dea1794SYangtao Li clock-names = "hosc", "losc", "iosc", "pll-periph"; 2940dea1794SYangtao Li #clock-cells = <1>; 2950dea1794SYangtao Li #reset-cells = <1>; 2960dea1794SYangtao Li }; 2970dea1794SYangtao Li 2980dea1794SYangtao Li r_intc: interrupt-controller@7010320 { 2990dea1794SYangtao Li compatible = "allwinner,sun50i-a100-nmi", 3000dea1794SYangtao Li "allwinner,sun9i-a80-nmi"; 3010dea1794SYangtao Li interrupt-controller; 3020dea1794SYangtao Li #interrupt-cells = <2>; 3030dea1794SYangtao Li reg = <0x07010320 0xc>; 3040dea1794SYangtao Li interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 3050dea1794SYangtao Li }; 3060dea1794SYangtao Li 3070dea1794SYangtao Li r_pio: pinctrl@7022000 { 3080dea1794SYangtao Li compatible = "allwinner,sun50i-a100-r-pinctrl"; 3090dea1794SYangtao Li reg = <0x07022000 0x400>; 3100dea1794SYangtao Li interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 3110dea1794SYangtao Li clocks = <&r_ccu CLK_R_APB1>, <&dcxo24M>, <&osc32k>; 3120dea1794SYangtao Li clock-names = "apb", "hosc", "losc"; 3130dea1794SYangtao Li gpio-controller; 3140dea1794SYangtao Li #gpio-cells = <3>; 3150dea1794SYangtao Li interrupt-controller; 3160dea1794SYangtao Li #interrupt-cells = <3>; 3170dea1794SYangtao Li 3180dea1794SYangtao Li r_i2c0_pins: r-i2c0-pins { 3190dea1794SYangtao Li pins = "PL0", "PL1"; 3200dea1794SYangtao Li function = "s_i2c0"; 3210dea1794SYangtao Li }; 3220dea1794SYangtao Li 3230dea1794SYangtao Li r_i2c1_pins: r-i2c1-pins { 3240dea1794SYangtao Li pins = "PL8", "PL9"; 3250dea1794SYangtao Li function = "s_i2c1"; 3260dea1794SYangtao Li }; 3270dea1794SYangtao Li }; 3280dea1794SYangtao Li 3290dea1794SYangtao Li r_uart: serial@7080000 { 3300dea1794SYangtao Li compatible = "snps,dw-apb-uart"; 3310dea1794SYangtao Li reg = <0x07080000 0x400>; 3320dea1794SYangtao Li interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 3330dea1794SYangtao Li reg-shift = <2>; 3340dea1794SYangtao Li reg-io-width = <4>; 3350dea1794SYangtao Li clocks = <&r_ccu CLK_R_APB2_UART>; 3360dea1794SYangtao Li resets = <&r_ccu RST_R_APB2_UART>; 3370dea1794SYangtao Li status = "disabled"; 3380dea1794SYangtao Li }; 3390dea1794SYangtao Li 3400dea1794SYangtao Li r_i2c0: i2c@7081400 { 3410dea1794SYangtao Li compatible = "allwinner,sun50i-a100-i2c", 342790edb2eSSamuel Holland "allwinner,sun8i-v536-i2c", 3430dea1794SYangtao Li "allwinner,sun6i-a31-i2c"; 3440dea1794SYangtao Li reg = <0x07081400 0x400>; 3450dea1794SYangtao Li interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 3460dea1794SYangtao Li clocks = <&r_ccu CLK_R_APB2_I2C0>; 3470dea1794SYangtao Li resets = <&r_ccu RST_R_APB2_I2C0>; 3485db5663cSSamuel Holland dmas = <&dma 50>, <&dma 50>; 3495db5663cSSamuel Holland dma-names = "rx", "tx"; 3500dea1794SYangtao Li pinctrl-names = "default"; 3510dea1794SYangtao Li pinctrl-0 = <&r_i2c0_pins>; 3520dea1794SYangtao Li status = "disabled"; 3530dea1794SYangtao Li #address-cells = <1>; 3540dea1794SYangtao Li #size-cells = <0>; 3550dea1794SYangtao Li }; 3560dea1794SYangtao Li 3570dea1794SYangtao Li r_i2c1: i2c@7081800 { 3580dea1794SYangtao Li compatible = "allwinner,sun50i-a100-i2c", 359790edb2eSSamuel Holland "allwinner,sun8i-v536-i2c", 3600dea1794SYangtao Li "allwinner,sun6i-a31-i2c"; 3610dea1794SYangtao Li reg = <0x07081800 0x400>; 3620dea1794SYangtao Li interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 3630dea1794SYangtao Li clocks = <&r_ccu CLK_R_APB2_I2C1>; 3640dea1794SYangtao Li resets = <&r_ccu RST_R_APB2_I2C1>; 3655db5663cSSamuel Holland dmas = <&dma 51>, <&dma 51>; 3665db5663cSSamuel Holland dma-names = "rx", "tx"; 3670dea1794SYangtao Li pinctrl-names = "default"; 3680dea1794SYangtao Li pinctrl-0 = <&r_i2c1_pins>; 3690dea1794SYangtao Li status = "disabled"; 3700dea1794SYangtao Li #address-cells = <1>; 3710dea1794SYangtao Li #size-cells = <0>; 3720dea1794SYangtao Li }; 3730dea1794SYangtao Li }; 3740dea1794SYangtao Li 3750dea1794SYangtao Li thermal-zones { 3765c34c4e4SMaxime Ripard cpu-thermal { 3770dea1794SYangtao Li polling-delay-passive = <0>; 3780dea1794SYangtao Li polling-delay = <0>; 3790dea1794SYangtao Li thermal-sensors = <&ths 0>; 3800dea1794SYangtao Li }; 3810dea1794SYangtao Li 3825c34c4e4SMaxime Ripard ddr-thermal { 3830dea1794SYangtao Li polling-delay-passive = <0>; 3840dea1794SYangtao Li polling-delay = <0>; 3850dea1794SYangtao Li thermal-sensors = <&ths 2>; 3860dea1794SYangtao Li }; 3870dea1794SYangtao Li 3885c34c4e4SMaxime Ripard gpu-thermal { 3890dea1794SYangtao Li polling-delay-passive = <0>; 3900dea1794SYangtao Li polling-delay = <0>; 3910dea1794SYangtao Li thermal-sensors = <&ths 1>; 3920dea1794SYangtao Li }; 3930dea1794SYangtao Li }; 3940dea1794SYangtao Li}; 395