1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2*724ba675SRob Herring/* 3*724ba675SRob Herring * vt8500.dtsi - Device tree file for VIA VT8500 SoC 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> 6*724ba675SRob Herring */ 7*724ba675SRob Herring 8*724ba675SRob Herring/ { 9*724ba675SRob Herring #address-cells = <1>; 10*724ba675SRob Herring #size-cells = <1>; 11*724ba675SRob Herring compatible = "via,vt8500"; 12*724ba675SRob Herring 13*724ba675SRob Herring cpus { 14*724ba675SRob Herring #address-cells = <0>; 15*724ba675SRob Herring #size-cells = <0>; 16*724ba675SRob Herring 17*724ba675SRob Herring cpu { 18*724ba675SRob Herring device_type = "cpu"; 19*724ba675SRob Herring compatible = "arm,arm926ej-s"; 20*724ba675SRob Herring }; 21*724ba675SRob Herring }; 22*724ba675SRob Herring 23*724ba675SRob Herring memory { 24*724ba675SRob Herring device_type = "memory"; 25*724ba675SRob Herring reg = <0x0 0x0>; 26*724ba675SRob Herring }; 27*724ba675SRob Herring 28*724ba675SRob Herring aliases { 29*724ba675SRob Herring serial0 = &uart0; 30*724ba675SRob Herring serial1 = &uart1; 31*724ba675SRob Herring serial2 = &uart2; 32*724ba675SRob Herring serial3 = &uart3; 33*724ba675SRob Herring }; 34*724ba675SRob Herring 35*724ba675SRob Herring soc { 36*724ba675SRob Herring #address-cells = <1>; 37*724ba675SRob Herring #size-cells = <1>; 38*724ba675SRob Herring compatible = "simple-bus"; 39*724ba675SRob Herring ranges; 40*724ba675SRob Herring interrupt-parent = <&intc>; 41*724ba675SRob Herring 42*724ba675SRob Herring intc: interrupt-controller@d8140000 { 43*724ba675SRob Herring compatible = "via,vt8500-intc"; 44*724ba675SRob Herring interrupt-controller; 45*724ba675SRob Herring reg = <0xd8140000 0x10000>; 46*724ba675SRob Herring #interrupt-cells = <1>; 47*724ba675SRob Herring }; 48*724ba675SRob Herring 49*724ba675SRob Herring pinctrl: pinctrl@d8110000 { 50*724ba675SRob Herring compatible = "via,vt8500-pinctrl"; 51*724ba675SRob Herring reg = <0xd8110000 0x10000>; 52*724ba675SRob Herring interrupt-controller; 53*724ba675SRob Herring #interrupt-cells = <2>; 54*724ba675SRob Herring gpio-controller; 55*724ba675SRob Herring #gpio-cells = <2>; 56*724ba675SRob Herring }; 57*724ba675SRob Herring 58*724ba675SRob Herring pmc@d8130000 { 59*724ba675SRob Herring compatible = "via,vt8500-pmc"; 60*724ba675SRob Herring reg = <0xd8130000 0x1000>; 61*724ba675SRob Herring 62*724ba675SRob Herring clocks { 63*724ba675SRob Herring #address-cells = <1>; 64*724ba675SRob Herring #size-cells = <0>; 65*724ba675SRob Herring 66*724ba675SRob Herring ref24: ref24M { 67*724ba675SRob Herring #clock-cells = <0>; 68*724ba675SRob Herring compatible = "fixed-clock"; 69*724ba675SRob Herring clock-frequency = <24000000>; 70*724ba675SRob Herring }; 71*724ba675SRob Herring 72*724ba675SRob Herring clkuart0: uart0 { 73*724ba675SRob Herring #clock-cells = <0>; 74*724ba675SRob Herring compatible = "via,vt8500-device-clock"; 75*724ba675SRob Herring clocks = <&ref24>; 76*724ba675SRob Herring enable-reg = <0x250>; 77*724ba675SRob Herring enable-bit = <1>; 78*724ba675SRob Herring }; 79*724ba675SRob Herring 80*724ba675SRob Herring clkuart1: uart1 { 81*724ba675SRob Herring #clock-cells = <0>; 82*724ba675SRob Herring compatible = "via,vt8500-device-clock"; 83*724ba675SRob Herring clocks = <&ref24>; 84*724ba675SRob Herring enable-reg = <0x250>; 85*724ba675SRob Herring enable-bit = <2>; 86*724ba675SRob Herring }; 87*724ba675SRob Herring 88*724ba675SRob Herring clkuart2: uart2 { 89*724ba675SRob Herring #clock-cells = <0>; 90*724ba675SRob Herring compatible = "via,vt8500-device-clock"; 91*724ba675SRob Herring clocks = <&ref24>; 92*724ba675SRob Herring enable-reg = <0x250>; 93*724ba675SRob Herring enable-bit = <3>; 94*724ba675SRob Herring }; 95*724ba675SRob Herring 96*724ba675SRob Herring clkuart3: uart3 { 97*724ba675SRob Herring #clock-cells = <0>; 98*724ba675SRob Herring compatible = "via,vt8500-device-clock"; 99*724ba675SRob Herring clocks = <&ref24>; 100*724ba675SRob Herring enable-reg = <0x250>; 101*724ba675SRob Herring enable-bit = <4>; 102*724ba675SRob Herring }; 103*724ba675SRob Herring }; 104*724ba675SRob Herring }; 105*724ba675SRob Herring 106*724ba675SRob Herring timer@d8130100 { 107*724ba675SRob Herring compatible = "via,vt8500-timer"; 108*724ba675SRob Herring reg = <0xd8130100 0x28>; 109*724ba675SRob Herring interrupts = <36>; 110*724ba675SRob Herring }; 111*724ba675SRob Herring 112*724ba675SRob Herring ehci@d8007900 { 113*724ba675SRob Herring compatible = "via,vt8500-ehci"; 114*724ba675SRob Herring reg = <0xd8007900 0x200>; 115*724ba675SRob Herring interrupts = <43>; 116*724ba675SRob Herring }; 117*724ba675SRob Herring 118*724ba675SRob Herring uhci@d8007b00 { 119*724ba675SRob Herring compatible = "platform-uhci"; 120*724ba675SRob Herring reg = <0xd8007b00 0x200>; 121*724ba675SRob Herring interrupts = <43>; 122*724ba675SRob Herring }; 123*724ba675SRob Herring 124*724ba675SRob Herring fb: fb@d8050800 { 125*724ba675SRob Herring compatible = "via,vt8500-fb"; 126*724ba675SRob Herring reg = <0xd800e400 0x400>; 127*724ba675SRob Herring interrupts = <12>; 128*724ba675SRob Herring }; 129*724ba675SRob Herring 130*724ba675SRob Herring ge_rops@d8050400 { 131*724ba675SRob Herring compatible = "wm,prizm-ge-rops"; 132*724ba675SRob Herring reg = <0xd8050400 0x100>; 133*724ba675SRob Herring }; 134*724ba675SRob Herring 135*724ba675SRob Herring uart0: serial@d8200000 { 136*724ba675SRob Herring compatible = "via,vt8500-uart"; 137*724ba675SRob Herring reg = <0xd8200000 0x1040>; 138*724ba675SRob Herring interrupts = <32>; 139*724ba675SRob Herring clocks = <&clkuart0>; 140*724ba675SRob Herring status = "disabled"; 141*724ba675SRob Herring }; 142*724ba675SRob Herring 143*724ba675SRob Herring uart1: serial@d82b0000 { 144*724ba675SRob Herring compatible = "via,vt8500-uart"; 145*724ba675SRob Herring reg = <0xd82b0000 0x1040>; 146*724ba675SRob Herring interrupts = <33>; 147*724ba675SRob Herring clocks = <&clkuart1>; 148*724ba675SRob Herring status = "disabled"; 149*724ba675SRob Herring }; 150*724ba675SRob Herring 151*724ba675SRob Herring uart2: serial@d8210000 { 152*724ba675SRob Herring compatible = "via,vt8500-uart"; 153*724ba675SRob Herring reg = <0xd8210000 0x1040>; 154*724ba675SRob Herring interrupts = <47>; 155*724ba675SRob Herring clocks = <&clkuart2>; 156*724ba675SRob Herring status = "disabled"; 157*724ba675SRob Herring }; 158*724ba675SRob Herring 159*724ba675SRob Herring uart3: serial@d82c0000 { 160*724ba675SRob Herring compatible = "via,vt8500-uart"; 161*724ba675SRob Herring reg = <0xd82c0000 0x1040>; 162*724ba675SRob Herring interrupts = <50>; 163*724ba675SRob Herring clocks = <&clkuart3>; 164*724ba675SRob Herring status = "disabled"; 165*724ba675SRob Herring }; 166*724ba675SRob Herring 167*724ba675SRob Herring rtc@d8100000 { 168*724ba675SRob Herring compatible = "via,vt8500-rtc"; 169*724ba675SRob Herring reg = <0xd8100000 0x10000>; 170*724ba675SRob Herring interrupts = <48>; 171*724ba675SRob Herring }; 172*724ba675SRob Herring 173*724ba675SRob Herring ethernet@d8004000 { 174*724ba675SRob Herring compatible = "via,vt8500-rhine"; 175*724ba675SRob Herring reg = <0xd8004000 0x100>; 176*724ba675SRob Herring interrupts = <10>; 177*724ba675SRob Herring }; 178*724ba675SRob Herring }; 179*724ba675SRob Herring}; 180