1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring/dts-v1/; 3*724ba675SRob Herring 4*724ba675SRob Herring#include "dra62x.dtsi" 5*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 6*724ba675SRob Herring 7*724ba675SRob Herring/ { 8*724ba675SRob Herring model = "DRA62x J5 Eco EVM"; 9*724ba675SRob Herring compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148", "ti,dm814"; 10*724ba675SRob Herring 11*724ba675SRob Herring memory@80000000 { 12*724ba675SRob Herring device_type = "memory"; 13*724ba675SRob Herring reg = <0x80000000 0x40000000>; /* 1 GB */ 14*724ba675SRob Herring }; 15*724ba675SRob Herring 16*724ba675SRob Herring /* MIC94060YC6 controlled by SD1_POW pin */ 17*724ba675SRob Herring vmmcsd_fixed: fixedregulator0 { 18*724ba675SRob Herring compatible = "regulator-fixed"; 19*724ba675SRob Herring regulator-name = "vmmcsd_fixed"; 20*724ba675SRob Herring regulator-min-microvolt = <3300000>; 21*724ba675SRob Herring regulator-max-microvolt = <3300000>; 22*724ba675SRob Herring }; 23*724ba675SRob Herring}; 24*724ba675SRob Herring 25*724ba675SRob Herring&cpsw_emac0 { 26*724ba675SRob Herring phy-handle = <ðphy0>; 27*724ba675SRob Herring phy-mode = "rgmii-id"; 28*724ba675SRob Herring}; 29*724ba675SRob Herring 30*724ba675SRob Herring&cpsw_emac1 { 31*724ba675SRob Herring phy-handle = <ðphy1>; 32*724ba675SRob Herring phy-mode = "rgmii-id"; 33*724ba675SRob Herring}; 34*724ba675SRob Herring 35*724ba675SRob Herring&davinci_mdio { 36*724ba675SRob Herring ethphy0: ethernet-phy@0 { 37*724ba675SRob Herring reg = <0>; 38*724ba675SRob Herring }; 39*724ba675SRob Herring 40*724ba675SRob Herring ethphy1: ethernet-phy@1 { 41*724ba675SRob Herring reg = <1>; 42*724ba675SRob Herring }; 43*724ba675SRob Herring}; 44*724ba675SRob Herring 45*724ba675SRob Herring&gpmc { 46*724ba675SRob Herring ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */ 47*724ba675SRob Herring 48*724ba675SRob Herring nand@0,0 { 49*724ba675SRob Herring compatible = "ti,omap2-nand"; 50*724ba675SRob Herring reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 51*724ba675SRob Herring interrupt-parent = <&gpmc>; 52*724ba675SRob Herring interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 53*724ba675SRob Herring <1 IRQ_TYPE_NONE>; /* termcount */ 54*724ba675SRob Herring linux,mtd-name = "micron,mt29f2g16aadwp"; 55*724ba675SRob Herring #address-cells = <1>; 56*724ba675SRob Herring #size-cells = <1>; 57*724ba675SRob Herring ti,nand-ecc-opt = "bch8"; 58*724ba675SRob Herring nand-bus-width = <16>; 59*724ba675SRob Herring gpmc,device-width = <2>; 60*724ba675SRob Herring gpmc,sync-clk-ps = <0>; 61*724ba675SRob Herring gpmc,cs-on-ns = <0>; 62*724ba675SRob Herring gpmc,cs-rd-off-ns = <44>; 63*724ba675SRob Herring gpmc,cs-wr-off-ns = <44>; 64*724ba675SRob Herring gpmc,adv-on-ns = <6>; 65*724ba675SRob Herring gpmc,adv-rd-off-ns = <34>; 66*724ba675SRob Herring gpmc,adv-wr-off-ns = <44>; 67*724ba675SRob Herring gpmc,we-on-ns = <0>; 68*724ba675SRob Herring gpmc,we-off-ns = <40>; 69*724ba675SRob Herring gpmc,oe-on-ns = <0>; 70*724ba675SRob Herring gpmc,oe-off-ns = <54>; 71*724ba675SRob Herring gpmc,access-ns = <64>; 72*724ba675SRob Herring gpmc,rd-cycle-ns = <82>; 73*724ba675SRob Herring gpmc,wr-cycle-ns = <82>; 74*724ba675SRob Herring gpmc,bus-turnaround-ns = <0>; 75*724ba675SRob Herring gpmc,cycle2cycle-delay-ns = <0>; 76*724ba675SRob Herring gpmc,clk-activation-ns = <0>; 77*724ba675SRob Herring gpmc,wr-access-ns = <40>; 78*724ba675SRob Herring gpmc,wr-data-mux-bus-ns = <0>; 79*724ba675SRob Herring partition@0 { 80*724ba675SRob Herring label = "X-Loader"; 81*724ba675SRob Herring reg = <0 0x80000>; 82*724ba675SRob Herring }; 83*724ba675SRob Herring partition@80000 { 84*724ba675SRob Herring label = "U-Boot"; 85*724ba675SRob Herring reg = <0x80000 0x1c0000>; 86*724ba675SRob Herring }; 87*724ba675SRob Herring partition@1c0000 { 88*724ba675SRob Herring label = "Environment"; 89*724ba675SRob Herring reg = <0x240000 0x40000>; 90*724ba675SRob Herring }; 91*724ba675SRob Herring partition@280000 { 92*724ba675SRob Herring label = "Kernel"; 93*724ba675SRob Herring reg = <0x280000 0x500000>; 94*724ba675SRob Herring }; 95*724ba675SRob Herring partition@780000 { 96*724ba675SRob Herring label = "Filesystem"; 97*724ba675SRob Herring reg = <0x780000 0xf880000>; 98*724ba675SRob Herring }; 99*724ba675SRob Herring }; 100*724ba675SRob Herring}; 101*724ba675SRob Herring 102*724ba675SRob Herring&mmc2 { 103*724ba675SRob Herring pinctrl-names = "default"; 104*724ba675SRob Herring pinctrl-0 = <&sd1_pins>; 105*724ba675SRob Herring vmmc-supply = <&vmmcsd_fixed>; 106*724ba675SRob Herring bus-width = <4>; 107*724ba675SRob Herring cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; 108*724ba675SRob Herring}; 109*724ba675SRob Herring 110*724ba675SRob Herring&pincntl { 111*724ba675SRob Herring sd1_pins: sd1-pins { 112*724ba675SRob Herring pinctrl-single,pins = < 113*724ba675SRob Herring DM814X_IOPAD(0x0800, PIN_INPUT | 0x1) /* SD1_CLK */ 114*724ba675SRob Herring DM814X_IOPAD(0x0804, PIN_INPUT_PULLUP | 0x1) /* SD1_CMD */ 115*724ba675SRob Herring DM814X_IOPAD(0x0808, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[0] */ 116*724ba675SRob Herring DM814X_IOPAD(0x080c, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[1] */ 117*724ba675SRob Herring DM814X_IOPAD(0x0810, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[2] */ 118*724ba675SRob Herring DM814X_IOPAD(0x0814, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[3] */ 119*724ba675SRob Herring DM814X_IOPAD(0x0924, PIN_OUTPUT | 0x40) /* SD1_POW */ 120*724ba675SRob Herring DM814X_IOPAD(0x093C, PIN_INPUT_PULLUP | 0x80) /* GP1[6] */ 121*724ba675SRob Herring >; 122*724ba675SRob Herring }; 123*724ba675SRob Herring 124*724ba675SRob Herring usb0_pins: usb0-pins { 125*724ba675SRob Herring pinctrl-single,pins = < 126*724ba675SRob Herring DM814X_IOPAD(0x0c34, PIN_OUTPUT | 0x1) /* USB0_DRVVBUS */ 127*724ba675SRob Herring >; 128*724ba675SRob Herring }; 129*724ba675SRob Herring}; 130*724ba675SRob Herring 131*724ba675SRob Herring/* USB0_ID pin state: SW10[1] = 0 cable detection, SW10[1] = 1 ID grounded */ 132*724ba675SRob Herring&usb0 { 133*724ba675SRob Herring pinctrl-names = "default"; 134*724ba675SRob Herring pinctrl-0 = <&usb0_pins>; 135*724ba675SRob Herring dr_mode = "otg"; 136*724ba675SRob Herring}; 137*724ba675SRob Herring 138*724ba675SRob Herring&usb1_phy { 139*724ba675SRob Herring status = "disabled"; 140*724ba675SRob Herring}; 141*724ba675SRob Herring 142*724ba675SRob Herring&usb1 { 143*724ba675SRob Herring status = "disabled"; 144*724ba675SRob Herring}; 145