1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright (C) STMicroelectronics 2022 - All Rights Reserved 4*724ba675SRob Herring * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics. 5*724ba675SRob Herring */ 6*724ba675SRob Herring 7*724ba675SRob Herring/dts-v1/; 8*724ba675SRob Herring 9*724ba675SRob Herring#include "stm32mp157c-ed1.dts" 10*724ba675SRob Herring#include "stm32mp15-scmi.dtsi" 11*724ba675SRob Herring 12*724ba675SRob Herring/ { 13*724ba675SRob Herring model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter"; 14*724ba675SRob Herring compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157"; 15*724ba675SRob Herring 16*724ba675SRob Herring reserved-memory { 17*724ba675SRob Herring optee@fe000000 { 18*724ba675SRob Herring reg = <0xfe000000 0x2000000>; 19*724ba675SRob Herring no-map; 20*724ba675SRob Herring }; 21*724ba675SRob Herring }; 22*724ba675SRob Herring}; 23*724ba675SRob Herring 24*724ba675SRob Herring&cpu0 { 25*724ba675SRob Herring clocks = <&scmi_clk CK_SCMI_MPU>; 26*724ba675SRob Herring}; 27*724ba675SRob Herring 28*724ba675SRob Herring&cpu1 { 29*724ba675SRob Herring clocks = <&scmi_clk CK_SCMI_MPU>; 30*724ba675SRob Herring}; 31*724ba675SRob Herring 32*724ba675SRob Herring&cryp1 { 33*724ba675SRob Herring clocks = <&scmi_clk CK_SCMI_CRYP1>; 34*724ba675SRob Herring resets = <&scmi_reset RST_SCMI_CRYP1>; 35*724ba675SRob Herring}; 36*724ba675SRob Herring 37*724ba675SRob Herring&dsi { 38*724ba675SRob Herring clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>; 39*724ba675SRob Herring}; 40*724ba675SRob Herring 41*724ba675SRob Herring&gpioz { 42*724ba675SRob Herring clocks = <&scmi_clk CK_SCMI_GPIOZ>; 43*724ba675SRob Herring}; 44*724ba675SRob Herring 45*724ba675SRob Herring&hash1 { 46*724ba675SRob Herring clocks = <&scmi_clk CK_SCMI_HASH1>; 47*724ba675SRob Herring resets = <&scmi_reset RST_SCMI_HASH1>; 48*724ba675SRob Herring}; 49*724ba675SRob Herring 50*724ba675SRob Herring&i2c4 { 51*724ba675SRob Herring clocks = <&scmi_clk CK_SCMI_I2C4>; 52*724ba675SRob Herring resets = <&scmi_reset RST_SCMI_I2C4>; 53*724ba675SRob Herring}; 54*724ba675SRob Herring 55*724ba675SRob Herring&iwdg2 { 56*724ba675SRob Herring clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>; 57*724ba675SRob Herring}; 58*724ba675SRob Herring 59*724ba675SRob Herring&mdma1 { 60*724ba675SRob Herring resets = <&scmi_reset RST_SCMI_MDMA>; 61*724ba675SRob Herring}; 62*724ba675SRob Herring 63*724ba675SRob Herring&m4_rproc { 64*724ba675SRob Herring /delete-property/ st,syscfg-holdboot; 65*724ba675SRob Herring resets = <&scmi_reset RST_SCMI_MCU>, 66*724ba675SRob Herring <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; 67*724ba675SRob Herring reset-names = "mcu_rst", "hold_boot"; 68*724ba675SRob Herring}; 69*724ba675SRob Herring 70*724ba675SRob Herring&rcc { 71*724ba675SRob Herring compatible = "st,stm32mp1-rcc-secure", "syscon"; 72*724ba675SRob Herring clock-names = "hse", "hsi", "csi", "lse", "lsi"; 73*724ba675SRob Herring clocks = <&scmi_clk CK_SCMI_HSE>, 74*724ba675SRob Herring <&scmi_clk CK_SCMI_HSI>, 75*724ba675SRob Herring <&scmi_clk CK_SCMI_CSI>, 76*724ba675SRob Herring <&scmi_clk CK_SCMI_LSE>, 77*724ba675SRob Herring <&scmi_clk CK_SCMI_LSI>; 78*724ba675SRob Herring}; 79*724ba675SRob Herring 80*724ba675SRob Herring&rng1 { 81*724ba675SRob Herring clocks = <&scmi_clk CK_SCMI_RNG1>; 82*724ba675SRob Herring resets = <&scmi_reset RST_SCMI_RNG1>; 83*724ba675SRob Herring}; 84*724ba675SRob Herring 85*724ba675SRob Herring&rtc { 86*724ba675SRob Herring clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>; 87*724ba675SRob Herring}; 88