1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 4*724ba675SRob Herring * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics. 5*724ba675SRob Herring */ 6*724ba675SRob Herring 7*724ba675SRob Herring#include "stm32mp153.dtsi" 8*724ba675SRob Herring 9*724ba675SRob Herring/ { 10*724ba675SRob Herring soc { 11*724ba675SRob Herring gpu: gpu@59000000 { 12*724ba675SRob Herring compatible = "vivante,gc"; 13*724ba675SRob Herring reg = <0x59000000 0x800>; 14*724ba675SRob Herring interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 15*724ba675SRob Herring clocks = <&rcc GPU>, <&rcc GPU_K>; 16*724ba675SRob Herring clock-names = "bus" ,"core"; 17*724ba675SRob Herring resets = <&rcc GPU_R>; 18*724ba675SRob Herring }; 19*724ba675SRob Herring 20*724ba675SRob Herring dsi: dsi@5a000000 { 21*724ba675SRob Herring compatible = "st,stm32-dsi"; 22*724ba675SRob Herring reg = <0x5a000000 0x800>; 23*724ba675SRob Herring clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>; 24*724ba675SRob Herring clock-names = "pclk", "ref", "px_clk"; 25*724ba675SRob Herring resets = <&rcc DSI_R>; 26*724ba675SRob Herring reset-names = "apb"; 27*724ba675SRob Herring status = "disabled"; 28*724ba675SRob Herring }; 29*724ba675SRob Herring }; 30*724ba675SRob Herring}; 31