1724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright (C) Protonic Holland 4724ba675SRob Herring * Author: David Jander <david@protonic.nl> 5724ba675SRob Herring */ 6724ba675SRob Herring/dts-v1/; 7724ba675SRob Herring 8724ba675SRob Herring#include "stm32mp151a-prtt1l.dtsi" 9724ba675SRob Herring 10724ba675SRob Herring/ { 11724ba675SRob Herring model = "Protonic PRTT1C"; 12724ba675SRob Herring compatible = "prt,prtt1c", "st,stm32mp151"; 13724ba675SRob Herring 14724ba675SRob Herring clock_ksz9031: clock-ksz9031 { 15724ba675SRob Herring compatible = "fixed-clock"; 16724ba675SRob Herring #clock-cells = <0>; 17724ba675SRob Herring clock-frequency = <25000000>; 18724ba675SRob Herring }; 19724ba675SRob Herring 20724ba675SRob Herring clock_sja1105: clock-sja1105 { 21724ba675SRob Herring compatible = "fixed-clock"; 22724ba675SRob Herring #clock-cells = <0>; 23724ba675SRob Herring clock-frequency = <25000000>; 24724ba675SRob Herring }; 25724ba675SRob Herring 26*4193b938SOleksij Rempel pse_t1l1: ethernet-pse-1 { 27*4193b938SOleksij Rempel compatible = "podl-pse-regulator"; 28*4193b938SOleksij Rempel pse-supply = <®_t1l1>; 29*4193b938SOleksij Rempel #pse-cells = <0>; 30*4193b938SOleksij Rempel }; 31*4193b938SOleksij Rempel 32*4193b938SOleksij Rempel pse_t1l2: ethernet-pse-2 { 33*4193b938SOleksij Rempel compatible = "podl-pse-regulator"; 34*4193b938SOleksij Rempel pse-supply = <®_t1l2>; 35*4193b938SOleksij Rempel #pse-cells = <0>; 36*4193b938SOleksij Rempel }; 37*4193b938SOleksij Rempel 38724ba675SRob Herring mdio0: mdio { 39724ba675SRob Herring compatible = "virtual,mdio-gpio"; 40724ba675SRob Herring #address-cells = <1>; 41724ba675SRob Herring #size-cells = <0>; 42724ba675SRob Herring gpios = <&gpioc 1 GPIO_ACTIVE_HIGH 43724ba675SRob Herring &gpioa 2 GPIO_ACTIVE_HIGH>; 44724ba675SRob Herring 45724ba675SRob Herring }; 46724ba675SRob Herring 47*4193b938SOleksij Rempel reg_t1l1: regulator-pse-t1l1 { 48*4193b938SOleksij Rempel compatible = "regulator-fixed"; 49*4193b938SOleksij Rempel regulator-name = "pse-t1l1"; 50*4193b938SOleksij Rempel regulator-min-microvolt = <12000000>; 51*4193b938SOleksij Rempel regulator-max-microvolt = <12000000>; 52*4193b938SOleksij Rempel gpio = <&gpiog 13 GPIO_ACTIVE_HIGH>; 53*4193b938SOleksij Rempel enable-active-high; 54*4193b938SOleksij Rempel }; 55*4193b938SOleksij Rempel 56*4193b938SOleksij Rempel reg_t1l2: regulator-pse-t1l2 { 57*4193b938SOleksij Rempel compatible = "regulator-fixed"; 58*4193b938SOleksij Rempel regulator-name = "pse-t1l2"; 59*4193b938SOleksij Rempel regulator-min-microvolt = <12000000>; 60*4193b938SOleksij Rempel regulator-max-microvolt = <12000000>; 61*4193b938SOleksij Rempel gpio = <&gpiog 14 GPIO_ACTIVE_HIGH>; 62*4193b938SOleksij Rempel enable-active-high; 63*4193b938SOleksij Rempel }; 64*4193b938SOleksij Rempel 65724ba675SRob Herring wifi_pwrseq: wifi-pwrseq { 66724ba675SRob Herring compatible = "mmc-pwrseq-simple"; 67724ba675SRob Herring reset-gpios = <&gpiod 8 GPIO_ACTIVE_LOW>; 68724ba675SRob Herring }; 69724ba675SRob Herring}; 70724ba675SRob Herring 71724ba675SRob Herringðernet0 { 72724ba675SRob Herring fixed-link { 73724ba675SRob Herring speed = <100>; 74724ba675SRob Herring full-duplex; 75724ba675SRob Herring }; 76724ba675SRob Herring}; 77724ba675SRob Herring 78724ba675SRob Herring&gpioa { 79724ba675SRob Herring gpio-line-names = 80724ba675SRob Herring "", "", "", "PHY0_nRESET", "PHY0_nINT", "", "", "", 81724ba675SRob Herring "", "", "", "", "", "", "", "SPI1_nSS"; 82724ba675SRob Herring}; 83724ba675SRob Herring 84724ba675SRob Herring&gpiod { 85724ba675SRob Herring gpio-line-names = 86724ba675SRob Herring "", "", "", "", "", "", "", "", 87724ba675SRob Herring "WFM_RESET", "", "", "", "", "", "", ""; 88724ba675SRob Herring}; 89724ba675SRob Herring 90724ba675SRob Herring&gpioe { 91724ba675SRob Herring gpio-line-names = 92724ba675SRob Herring "SDMMC2_nRESET", "", "", "", "", "", "SPI1_nRESET", "", 93724ba675SRob Herring "", "", "", "", "WFM_nIRQ", "", "", ""; 94724ba675SRob Herring}; 95724ba675SRob Herring 96724ba675SRob Herring&gpiog { 97724ba675SRob Herring gpio-line-names = 98724ba675SRob Herring "", "", "", "", "", "", "", "PHY3_nINT", 99724ba675SRob Herring "PHY1_nINT", "PHY3_nRESET", "PHY2_nINT", "PHY2_nRESET", 100724ba675SRob Herring "PHY1_nRESET", "SPE1_PWR", "SPE0_PWR", ""; 101724ba675SRob Herring}; 102724ba675SRob Herring 103724ba675SRob Herring&mdio0 { 104724ba675SRob Herring /* All this DP83TD510E PHYs can't be probed before switch@0 is 105724ba675SRob Herring * probed so we need to use compatible with PHYid 106724ba675SRob Herring */ 107724ba675SRob Herring /* TI DP83TD510E */ 108724ba675SRob Herring t1l0_phy: ethernet-phy@6 { 109724ba675SRob Herring compatible = "ethernet-phy-id2000.0181"; 110724ba675SRob Herring reg = <6>; 111724ba675SRob Herring interrupts-extended = <&gpioa 4 IRQ_TYPE_LEVEL_LOW>; 112724ba675SRob Herring reset-gpios = <&gpioa 3 GPIO_ACTIVE_LOW>; 113724ba675SRob Herring reset-assert-us = <10>; 114724ba675SRob Herring reset-deassert-us = <35>; 115724ba675SRob Herring }; 116724ba675SRob Herring 117724ba675SRob Herring /* TI DP83TD510E */ 118724ba675SRob Herring t1l1_phy: ethernet-phy@7 { 119724ba675SRob Herring compatible = "ethernet-phy-id2000.0181"; 120724ba675SRob Herring reg = <7>; 121724ba675SRob Herring interrupts-extended = <&gpiog 8 IRQ_TYPE_LEVEL_LOW>; 122724ba675SRob Herring reset-gpios = <&gpiog 12 GPIO_ACTIVE_LOW>; 123724ba675SRob Herring reset-assert-us = <10>; 124724ba675SRob Herring reset-deassert-us = <35>; 125*4193b938SOleksij Rempel pses = <&pse_t1l1>; 126724ba675SRob Herring }; 127724ba675SRob Herring 128724ba675SRob Herring /* TI DP83TD510E */ 129724ba675SRob Herring t1l2_phy: ethernet-phy@10 { 130724ba675SRob Herring compatible = "ethernet-phy-id2000.0181"; 131724ba675SRob Herring reg = <10>; 132724ba675SRob Herring interrupts-extended = <&gpiog 10 IRQ_TYPE_LEVEL_LOW>; 133724ba675SRob Herring reset-gpios = <&gpiog 11 GPIO_ACTIVE_LOW>; 134724ba675SRob Herring reset-assert-us = <10>; 135724ba675SRob Herring reset-deassert-us = <35>; 136*4193b938SOleksij Rempel pses = <&pse_t1l2>; 137724ba675SRob Herring }; 138724ba675SRob Herring 139724ba675SRob Herring /* Micrel KSZ9031 */ 140724ba675SRob Herring rj45_phy: ethernet-phy@2 { 141724ba675SRob Herring reg = <2>; 142724ba675SRob Herring interrupts-extended = <&gpiog 7 IRQ_TYPE_LEVEL_LOW>; 143724ba675SRob Herring reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>; 144724ba675SRob Herring reset-assert-us = <10000>; 145724ba675SRob Herring reset-deassert-us = <1000>; 146724ba675SRob Herring 147724ba675SRob Herring clocks = <&clock_ksz9031>; 148724ba675SRob Herring }; 149724ba675SRob Herring}; 150724ba675SRob Herring 151724ba675SRob Herring&qspi { 152724ba675SRob Herring status = "disabled"; 153724ba675SRob Herring}; 154724ba675SRob Herring 155724ba675SRob Herring&sdmmc2 { 156724ba675SRob Herring pinctrl-names = "default", "opendrain", "sleep"; 157724ba675SRob Herring pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; 158724ba675SRob Herring pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; 159724ba675SRob Herring pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; 160724ba675SRob Herring non-removable; 161724ba675SRob Herring no-sd; 162724ba675SRob Herring no-sdio; 163724ba675SRob Herring no-1-8-v; 164724ba675SRob Herring st,neg-edge; 165724ba675SRob Herring bus-width = <8>; 166724ba675SRob Herring vmmc-supply = <®_3v3>; 167724ba675SRob Herring vqmmc-supply = <®_3v3>; 168724ba675SRob Herring status = "okay"; 169724ba675SRob Herring}; 170724ba675SRob Herring 171724ba675SRob Herring&sdmmc2_b4_od_pins_a { 172724ba675SRob Herring pins1 { 173724ba675SRob Herring pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 174724ba675SRob Herring <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */ 175724ba675SRob Herring <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 176724ba675SRob Herring <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */ 177724ba675SRob Herring }; 178724ba675SRob Herring}; 179724ba675SRob Herring 180724ba675SRob Herring&sdmmc2_b4_pins_a { 181724ba675SRob Herring pins1 { 182724ba675SRob Herring pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 183724ba675SRob Herring <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */ 184724ba675SRob Herring <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 185724ba675SRob Herring <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */ 186724ba675SRob Herring <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 187724ba675SRob Herring }; 188724ba675SRob Herring}; 189724ba675SRob Herring 190724ba675SRob Herring&sdmmc2_b4_sleep_pins_a { 191724ba675SRob Herring pins { 192724ba675SRob Herring pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */ 193724ba675SRob Herring <STM32_PINMUX('B', 7, ANALOG)>, /* SDMMC2_D1 */ 194724ba675SRob Herring <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */ 195724ba675SRob Herring <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */ 196724ba675SRob Herring <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */ 197724ba675SRob Herring <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */ 198724ba675SRob Herring }; 199724ba675SRob Herring}; 200724ba675SRob Herring 201724ba675SRob Herring&sdmmc2_d47_pins_a { 202724ba675SRob Herring pins { 203724ba675SRob Herring pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ 204724ba675SRob Herring <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */ 205724ba675SRob Herring <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */ 206724ba675SRob Herring <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */ 207724ba675SRob Herring }; 208724ba675SRob Herring}; 209724ba675SRob Herring 210724ba675SRob Herring&sdmmc2_d47_sleep_pins_a { 211724ba675SRob Herring pins { 212724ba675SRob Herring pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ 213724ba675SRob Herring <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */ 214724ba675SRob Herring <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */ 215724ba675SRob Herring <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */ 216724ba675SRob Herring }; 217724ba675SRob Herring}; 218724ba675SRob Herring 219724ba675SRob Herring&sdmmc3 { 220724ba675SRob Herring pinctrl-names = "default", "opendrain", "sleep"; 221724ba675SRob Herring pinctrl-0 = <&sdmmc3_b4_pins_b>; 222724ba675SRob Herring pinctrl-1 = <&sdmmc3_b4_od_pins_b>; 223724ba675SRob Herring pinctrl-2 = <&sdmmc3_b4_sleep_pins_b>; 224724ba675SRob Herring non-removable; 225724ba675SRob Herring no-1-8-v; 226724ba675SRob Herring st,neg-edge; 227724ba675SRob Herring bus-width = <4>; 228724ba675SRob Herring vmmc-supply = <®_3v3>; 229724ba675SRob Herring vqmmc-supply = <®_3v3>; 230724ba675SRob Herring mmc-pwrseq = <&wifi_pwrseq>; 231724ba675SRob Herring #address-cells = <1>; 232724ba675SRob Herring #size-cells = <0>; 233724ba675SRob Herring status = "okay"; 234724ba675SRob Herring 235724ba675SRob Herring mmc@1 { 236724ba675SRob Herring compatible = "prt,prtt1c-wfm200", "silabs,wf200"; 237724ba675SRob Herring reg = <1>; 238724ba675SRob Herring }; 239724ba675SRob Herring}; 240724ba675SRob Herring 241724ba675SRob Herring&sdmmc3_b4_od_pins_b { 242724ba675SRob Herring pins1 { 243724ba675SRob Herring pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */ 244724ba675SRob Herring <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */ 245724ba675SRob Herring <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ 246724ba675SRob Herring <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */ 247724ba675SRob Herring }; 248724ba675SRob Herring}; 249724ba675SRob Herring 250724ba675SRob Herring&sdmmc3_b4_pins_b { 251724ba675SRob Herring pins1 { 252724ba675SRob Herring pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */ 253724ba675SRob Herring <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */ 254724ba675SRob Herring <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ 255724ba675SRob Herring <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */ 256724ba675SRob Herring <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */ 257724ba675SRob Herring }; 258724ba675SRob Herring}; 259724ba675SRob Herring 260724ba675SRob Herring&sdmmc3_b4_sleep_pins_b { 261724ba675SRob Herring pins { 262724ba675SRob Herring pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* SDMMC3_D0 */ 263724ba675SRob Herring <STM32_PINMUX('D', 4, ANALOG)>, /* SDMMC3_D1 */ 264724ba675SRob Herring <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */ 265724ba675SRob Herring <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */ 266724ba675SRob Herring <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */ 267724ba675SRob Herring <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */ 268724ba675SRob Herring }; 269724ba675SRob Herring}; 270724ba675SRob Herring 271724ba675SRob Herring&spi1 { 272724ba675SRob Herring pinctrl-0 = <&spi1_pins_b>; 273724ba675SRob Herring pinctrl-names = "default"; 274724ba675SRob Herring cs-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; 275724ba675SRob Herring /delete-property/dmas; 276724ba675SRob Herring /delete-property/dma-names; 277724ba675SRob Herring status = "okay"; 278724ba675SRob Herring 279724ba675SRob Herring switch@0 { 280724ba675SRob Herring compatible = "nxp,sja1105q"; 281724ba675SRob Herring reg = <0>; 282724ba675SRob Herring spi-max-frequency = <4000000>; 283724ba675SRob Herring spi-rx-delay-us = <1>; 284724ba675SRob Herring spi-tx-delay-us = <1>; 285724ba675SRob Herring spi-cpha; 286724ba675SRob Herring 287724ba675SRob Herring reset-gpios = <&gpioe 6 GPIO_ACTIVE_LOW>; 288724ba675SRob Herring 289724ba675SRob Herring clocks = <&clock_sja1105>; 290724ba675SRob Herring 291724ba675SRob Herring ports { 292724ba675SRob Herring #address-cells = <1>; 293724ba675SRob Herring #size-cells = <0>; 294724ba675SRob Herring 295724ba675SRob Herring port@0 { 296724ba675SRob Herring reg = <0>; 297724ba675SRob Herring label = "t1l0"; 298724ba675SRob Herring phy-mode = "rmii"; 299724ba675SRob Herring phy-handle = <&t1l0_phy>; 300724ba675SRob Herring }; 301724ba675SRob Herring 302724ba675SRob Herring port@1 { 303724ba675SRob Herring reg = <1>; 304724ba675SRob Herring label = "t1l1"; 305724ba675SRob Herring phy-mode = "rmii"; 306724ba675SRob Herring phy-handle = <&t1l1_phy>; 307724ba675SRob Herring }; 308724ba675SRob Herring 309724ba675SRob Herring port@2 { 310724ba675SRob Herring reg = <2>; 311724ba675SRob Herring label = "t1l2"; 312724ba675SRob Herring phy-mode = "rmii"; 313724ba675SRob Herring phy-handle = <&t1l2_phy>; 314724ba675SRob Herring }; 315724ba675SRob Herring 316724ba675SRob Herring port@3 { 317724ba675SRob Herring reg = <3>; 318724ba675SRob Herring label = "rj45"; 319724ba675SRob Herring phy-handle = <&rj45_phy>; 320724ba675SRob Herring phy-mode = "rgmii-id"; 321724ba675SRob Herring }; 322724ba675SRob Herring 323724ba675SRob Herring port@4 { 324724ba675SRob Herring reg = <4>; 325724ba675SRob Herring label = "cpu"; 326724ba675SRob Herring ethernet = <ðernet0>; 327724ba675SRob Herring phy-mode = "rmii"; 328724ba675SRob Herring 329724ba675SRob Herring fixed-link { 330724ba675SRob Herring speed = <100>; 331724ba675SRob Herring full-duplex; 332724ba675SRob Herring }; 333724ba675SRob Herring }; 334724ba675SRob Herring }; 335724ba675SRob Herring }; 336724ba675SRob Herring}; 337