1724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 4724ba675SRob Herring * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics. 5724ba675SRob Herring */ 6724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h> 7724ba675SRob Herring#include <dt-bindings/clock/stm32mp13-clks.h> 8724ba675SRob Herring#include <dt-bindings/reset/stm32mp13-resets.h> 9724ba675SRob Herring 10724ba675SRob Herring/ { 11724ba675SRob Herring #address-cells = <1>; 12724ba675SRob Herring #size-cells = <1>; 13724ba675SRob Herring 14724ba675SRob Herring cpus { 15724ba675SRob Herring #address-cells = <1>; 16724ba675SRob Herring #size-cells = <0>; 17724ba675SRob Herring 18724ba675SRob Herring cpu0: cpu@0 { 19724ba675SRob Herring compatible = "arm,cortex-a7"; 20724ba675SRob Herring device_type = "cpu"; 21724ba675SRob Herring reg = <0>; 22724ba675SRob Herring }; 23724ba675SRob Herring }; 24724ba675SRob Herring 25724ba675SRob Herring arm-pmu { 26724ba675SRob Herring compatible = "arm,cortex-a7-pmu"; 27724ba675SRob Herring interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 28724ba675SRob Herring interrupt-affinity = <&cpu0>; 29724ba675SRob Herring interrupt-parent = <&intc>; 30724ba675SRob Herring }; 31724ba675SRob Herring 32724ba675SRob Herring firmware { 33724ba675SRob Herring optee { 34724ba675SRob Herring method = "smc"; 35724ba675SRob Herring compatible = "linaro,optee-tz"; 365060e270SEtienne Carriere interrupt-parent = <&intc>; 375060e270SEtienne Carriere interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 38724ba675SRob Herring }; 39724ba675SRob Herring 40724ba675SRob Herring scmi: scmi { 41724ba675SRob Herring compatible = "linaro,scmi-optee"; 42724ba675SRob Herring #address-cells = <1>; 43724ba675SRob Herring #size-cells = <0>; 44724ba675SRob Herring linaro,optee-channel-id = <0>; 45724ba675SRob Herring 46724ba675SRob Herring scmi_clk: protocol@14 { 47724ba675SRob Herring reg = <0x14>; 48724ba675SRob Herring #clock-cells = <1>; 49724ba675SRob Herring }; 50724ba675SRob Herring 51724ba675SRob Herring scmi_reset: protocol@16 { 52724ba675SRob Herring reg = <0x16>; 53724ba675SRob Herring #reset-cells = <1>; 54724ba675SRob Herring }; 55*fb266d2dSEtienne Carriere 56*fb266d2dSEtienne Carriere scmi_voltd: protocol@17 { 57*fb266d2dSEtienne Carriere reg = <0x17>; 58*fb266d2dSEtienne Carriere 59*fb266d2dSEtienne Carriere scmi_regu: regulators { 60*fb266d2dSEtienne Carriere #address-cells = <1>; 61*fb266d2dSEtienne Carriere #size-cells = <0>; 62*fb266d2dSEtienne Carriere 63*fb266d2dSEtienne Carriere scmi_reg11: regulator@0 { 64*fb266d2dSEtienne Carriere reg = <VOLTD_SCMI_REG11>; 65*fb266d2dSEtienne Carriere regulator-name = "reg11"; 66*fb266d2dSEtienne Carriere }; 67*fb266d2dSEtienne Carriere scmi_reg18: regulator@1 { 68*fb266d2dSEtienne Carriere reg = <VOLTD_SCMI_REG18>; 69*fb266d2dSEtienne Carriere regulator-name = "reg18"; 70*fb266d2dSEtienne Carriere }; 71*fb266d2dSEtienne Carriere scmi_usb33: regulator@2 { 72*fb266d2dSEtienne Carriere reg = <VOLTD_SCMI_USB33>; 73*fb266d2dSEtienne Carriere regulator-name = "usb33"; 74*fb266d2dSEtienne Carriere }; 75*fb266d2dSEtienne Carriere }; 76*fb266d2dSEtienne Carriere }; 77724ba675SRob Herring }; 78724ba675SRob Herring }; 79724ba675SRob Herring 80724ba675SRob Herring intc: interrupt-controller@a0021000 { 81724ba675SRob Herring compatible = "arm,cortex-a7-gic"; 82724ba675SRob Herring #interrupt-cells = <3>; 83724ba675SRob Herring interrupt-controller; 84724ba675SRob Herring reg = <0xa0021000 0x1000>, 85724ba675SRob Herring <0xa0022000 0x2000>; 86724ba675SRob Herring }; 87724ba675SRob Herring 88724ba675SRob Herring psci { 89724ba675SRob Herring compatible = "arm,psci-1.0"; 90724ba675SRob Herring method = "smc"; 91724ba675SRob Herring }; 92724ba675SRob Herring 93724ba675SRob Herring timer { 94724ba675SRob Herring compatible = "arm,armv7-timer"; 95724ba675SRob Herring interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 96724ba675SRob Herring <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 97724ba675SRob Herring <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 98724ba675SRob Herring <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 99724ba675SRob Herring interrupt-parent = <&intc>; 100724ba675SRob Herring always-on; 101724ba675SRob Herring }; 102724ba675SRob Herring 103724ba675SRob Herring soc { 104724ba675SRob Herring compatible = "simple-bus"; 105724ba675SRob Herring #address-cells = <1>; 106724ba675SRob Herring #size-cells = <1>; 107724ba675SRob Herring interrupt-parent = <&intc>; 108724ba675SRob Herring ranges; 109724ba675SRob Herring 110724ba675SRob Herring timers2: timer@40000000 { 111724ba675SRob Herring #address-cells = <1>; 112724ba675SRob Herring #size-cells = <0>; 113724ba675SRob Herring compatible = "st,stm32-timers"; 114724ba675SRob Herring reg = <0x40000000 0x400>; 115724ba675SRob Herring interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 116724ba675SRob Herring interrupt-names = "global"; 117724ba675SRob Herring clocks = <&rcc TIM2_K>; 118724ba675SRob Herring clock-names = "int"; 119724ba675SRob Herring dmas = <&dmamux1 18 0x400 0x1>, 120724ba675SRob Herring <&dmamux1 19 0x400 0x1>, 121724ba675SRob Herring <&dmamux1 20 0x400 0x1>, 122724ba675SRob Herring <&dmamux1 21 0x400 0x1>, 123724ba675SRob Herring <&dmamux1 22 0x400 0x1>; 124724ba675SRob Herring dma-names = "ch1", "ch2", "ch3", "ch4", "up"; 125724ba675SRob Herring status = "disabled"; 126724ba675SRob Herring 127724ba675SRob Herring pwm { 128724ba675SRob Herring compatible = "st,stm32-pwm"; 129724ba675SRob Herring #pwm-cells = <3>; 130724ba675SRob Herring status = "disabled"; 131724ba675SRob Herring }; 132724ba675SRob Herring 133724ba675SRob Herring timer@1 { 134724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 135724ba675SRob Herring reg = <1>; 136724ba675SRob Herring status = "disabled"; 137724ba675SRob Herring }; 138724ba675SRob Herring 139724ba675SRob Herring counter { 140724ba675SRob Herring compatible = "st,stm32-timer-counter"; 141724ba675SRob Herring status = "disabled"; 142724ba675SRob Herring }; 143724ba675SRob Herring }; 144724ba675SRob Herring 145724ba675SRob Herring timers3: timer@40001000 { 146724ba675SRob Herring #address-cells = <1>; 147724ba675SRob Herring #size-cells = <0>; 148724ba675SRob Herring compatible = "st,stm32-timers"; 149724ba675SRob Herring reg = <0x40001000 0x400>; 150724ba675SRob Herring interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 151724ba675SRob Herring interrupt-names = "global"; 152724ba675SRob Herring clocks = <&rcc TIM3_K>; 153724ba675SRob Herring clock-names = "int"; 154724ba675SRob Herring dmas = <&dmamux1 23 0x400 0x1>, 155724ba675SRob Herring <&dmamux1 24 0x400 0x1>, 156724ba675SRob Herring <&dmamux1 25 0x400 0x1>, 157724ba675SRob Herring <&dmamux1 26 0x400 0x1>, 158724ba675SRob Herring <&dmamux1 27 0x400 0x1>, 159724ba675SRob Herring <&dmamux1 28 0x400 0x1>; 160724ba675SRob Herring dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig"; 161724ba675SRob Herring status = "disabled"; 162724ba675SRob Herring 163724ba675SRob Herring pwm { 164724ba675SRob Herring compatible = "st,stm32-pwm"; 165724ba675SRob Herring #pwm-cells = <3>; 166724ba675SRob Herring status = "disabled"; 167724ba675SRob Herring }; 168724ba675SRob Herring 169724ba675SRob Herring timer@2 { 170724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 171724ba675SRob Herring reg = <2>; 172724ba675SRob Herring status = "disabled"; 173724ba675SRob Herring }; 174724ba675SRob Herring 175724ba675SRob Herring counter { 176724ba675SRob Herring compatible = "st,stm32-timer-counter"; 177724ba675SRob Herring status = "disabled"; 178724ba675SRob Herring }; 179724ba675SRob Herring }; 180724ba675SRob Herring 181724ba675SRob Herring timers4: timer@40002000 { 182724ba675SRob Herring #address-cells = <1>; 183724ba675SRob Herring #size-cells = <0>; 184724ba675SRob Herring compatible = "st,stm32-timers"; 185724ba675SRob Herring reg = <0x40002000 0x400>; 186724ba675SRob Herring interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 187724ba675SRob Herring interrupt-names = "global"; 188724ba675SRob Herring clocks = <&rcc TIM4_K>; 189724ba675SRob Herring clock-names = "int"; 190724ba675SRob Herring dmas = <&dmamux1 29 0x400 0x1>, 191724ba675SRob Herring <&dmamux1 30 0x400 0x1>, 192724ba675SRob Herring <&dmamux1 31 0x400 0x1>, 193724ba675SRob Herring <&dmamux1 32 0x400 0x1>; 194724ba675SRob Herring dma-names = "ch1", "ch2", "ch3", "up"; 195724ba675SRob Herring status = "disabled"; 196724ba675SRob Herring 197724ba675SRob Herring pwm { 198724ba675SRob Herring compatible = "st,stm32-pwm"; 199724ba675SRob Herring #pwm-cells = <3>; 200724ba675SRob Herring status = "disabled"; 201724ba675SRob Herring }; 202724ba675SRob Herring 203724ba675SRob Herring timer@3 { 204724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 205724ba675SRob Herring reg = <3>; 206724ba675SRob Herring status = "disabled"; 207724ba675SRob Herring }; 208724ba675SRob Herring 209724ba675SRob Herring counter { 210724ba675SRob Herring compatible = "st,stm32-timer-counter"; 211724ba675SRob Herring status = "disabled"; 212724ba675SRob Herring }; 213724ba675SRob Herring }; 214724ba675SRob Herring 215724ba675SRob Herring timers5: timer@40003000 { 216724ba675SRob Herring #address-cells = <1>; 217724ba675SRob Herring #size-cells = <0>; 218724ba675SRob Herring compatible = "st,stm32-timers"; 219724ba675SRob Herring reg = <0x40003000 0x400>; 220724ba675SRob Herring interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 221724ba675SRob Herring interrupt-names = "global"; 222724ba675SRob Herring clocks = <&rcc TIM5_K>; 223724ba675SRob Herring clock-names = "int"; 224724ba675SRob Herring dmas = <&dmamux1 55 0x400 0x1>, 225724ba675SRob Herring <&dmamux1 56 0x400 0x1>, 226724ba675SRob Herring <&dmamux1 57 0x400 0x1>, 227724ba675SRob Herring <&dmamux1 58 0x400 0x1>, 228724ba675SRob Herring <&dmamux1 59 0x400 0x1>, 229724ba675SRob Herring <&dmamux1 60 0x400 0x1>; 230724ba675SRob Herring dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig"; 231724ba675SRob Herring status = "disabled"; 232724ba675SRob Herring 233724ba675SRob Herring pwm { 234724ba675SRob Herring compatible = "st,stm32-pwm"; 235724ba675SRob Herring #pwm-cells = <3>; 236724ba675SRob Herring status = "disabled"; 237724ba675SRob Herring }; 238724ba675SRob Herring 239724ba675SRob Herring timer@4 { 240724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 241724ba675SRob Herring reg = <4>; 242724ba675SRob Herring status = "disabled"; 243724ba675SRob Herring }; 244724ba675SRob Herring 245724ba675SRob Herring counter { 246724ba675SRob Herring compatible = "st,stm32-timer-counter"; 247724ba675SRob Herring status = "disabled"; 248724ba675SRob Herring }; 249724ba675SRob Herring }; 250724ba675SRob Herring 251724ba675SRob Herring timers6: timer@40004000 { 252724ba675SRob Herring #address-cells = <1>; 253724ba675SRob Herring #size-cells = <0>; 254724ba675SRob Herring compatible = "st,stm32-timers"; 255724ba675SRob Herring reg = <0x40004000 0x400>; 256724ba675SRob Herring interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 257724ba675SRob Herring interrupt-names = "global"; 258724ba675SRob Herring clocks = <&rcc TIM6_K>; 259724ba675SRob Herring clock-names = "int"; 260724ba675SRob Herring dmas = <&dmamux1 69 0x400 0x1>; 261724ba675SRob Herring dma-names = "up"; 262724ba675SRob Herring status = "disabled"; 263724ba675SRob Herring 264724ba675SRob Herring timer@5 { 265724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 266724ba675SRob Herring reg = <5>; 267724ba675SRob Herring status = "disabled"; 268724ba675SRob Herring }; 269724ba675SRob Herring }; 270724ba675SRob Herring 271724ba675SRob Herring timers7: timer@40005000 { 272724ba675SRob Herring #address-cells = <1>; 273724ba675SRob Herring #size-cells = <0>; 274724ba675SRob Herring compatible = "st,stm32-timers"; 275724ba675SRob Herring reg = <0x40005000 0x400>; 276724ba675SRob Herring interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 277724ba675SRob Herring interrupt-names = "global"; 278724ba675SRob Herring clocks = <&rcc TIM7_K>; 279724ba675SRob Herring clock-names = "int"; 280724ba675SRob Herring dmas = <&dmamux1 70 0x400 0x1>; 281724ba675SRob Herring dma-names = "up"; 282724ba675SRob Herring status = "disabled"; 283724ba675SRob Herring 284724ba675SRob Herring timer@6 { 285724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 286724ba675SRob Herring reg = <6>; 287724ba675SRob Herring status = "disabled"; 288724ba675SRob Herring }; 289724ba675SRob Herring }; 290724ba675SRob Herring 291724ba675SRob Herring lptimer1: timer@40009000 { 292724ba675SRob Herring #address-cells = <1>; 293724ba675SRob Herring #size-cells = <0>; 294724ba675SRob Herring compatible = "st,stm32-lptimer"; 295724ba675SRob Herring reg = <0x40009000 0x400>; 296724ba675SRob Herring interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>; 297724ba675SRob Herring clocks = <&rcc LPTIM1_K>; 298724ba675SRob Herring clock-names = "mux"; 299724ba675SRob Herring wakeup-source; 300724ba675SRob Herring status = "disabled"; 301724ba675SRob Herring 302724ba675SRob Herring pwm { 303724ba675SRob Herring compatible = "st,stm32-pwm-lp"; 304724ba675SRob Herring #pwm-cells = <3>; 305724ba675SRob Herring status = "disabled"; 306724ba675SRob Herring }; 307724ba675SRob Herring 308724ba675SRob Herring trigger@0 { 309724ba675SRob Herring compatible = "st,stm32-lptimer-trigger"; 310724ba675SRob Herring reg = <0>; 311724ba675SRob Herring status = "disabled"; 312724ba675SRob Herring }; 313724ba675SRob Herring 314724ba675SRob Herring counter { 315724ba675SRob Herring compatible = "st,stm32-lptimer-counter"; 316724ba675SRob Herring status = "disabled"; 317724ba675SRob Herring }; 318724ba675SRob Herring 319724ba675SRob Herring timer { 320724ba675SRob Herring compatible = "st,stm32-lptimer-timer"; 321724ba675SRob Herring status = "disabled"; 322724ba675SRob Herring }; 323724ba675SRob Herring }; 324724ba675SRob Herring 325724ba675SRob Herring i2s2: audio-controller@4000b000 { 326724ba675SRob Herring compatible = "st,stm32h7-i2s"; 327724ba675SRob Herring reg = <0x4000b000 0x400>; 328724ba675SRob Herring #sound-dai-cells = <0>; 329724ba675SRob Herring interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 330724ba675SRob Herring dmas = <&dmamux1 39 0x400 0x01>, 331724ba675SRob Herring <&dmamux1 40 0x400 0x01>; 332724ba675SRob Herring dma-names = "rx", "tx"; 333724ba675SRob Herring status = "disabled"; 334724ba675SRob Herring }; 335724ba675SRob Herring 336724ba675SRob Herring spi2: spi@4000b000 { 337724ba675SRob Herring compatible = "st,stm32h7-spi"; 338724ba675SRob Herring reg = <0x4000b000 0x400>; 339724ba675SRob Herring interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 340724ba675SRob Herring clocks = <&rcc SPI2_K>; 341724ba675SRob Herring resets = <&rcc SPI2_R>; 342724ba675SRob Herring #address-cells = <1>; 343724ba675SRob Herring #size-cells = <0>; 344724ba675SRob Herring dmas = <&dmamux1 39 0x400 0x01>, 345724ba675SRob Herring <&dmamux1 40 0x400 0x01>; 346724ba675SRob Herring dma-names = "rx", "tx"; 347724ba675SRob Herring status = "disabled"; 348724ba675SRob Herring }; 349724ba675SRob Herring 350724ba675SRob Herring i2s3: audio-controller@4000c000 { 351724ba675SRob Herring compatible = "st,stm32h7-i2s"; 352724ba675SRob Herring reg = <0x4000c000 0x400>; 353724ba675SRob Herring #sound-dai-cells = <0>; 354724ba675SRob Herring interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 355724ba675SRob Herring dmas = <&dmamux1 61 0x400 0x01>, 356724ba675SRob Herring <&dmamux1 62 0x400 0x01>; 357724ba675SRob Herring dma-names = "rx", "tx"; 358724ba675SRob Herring status = "disabled"; 359724ba675SRob Herring }; 360724ba675SRob Herring 361724ba675SRob Herring spi3: spi@4000c000 { 362724ba675SRob Herring compatible = "st,stm32h7-spi"; 363724ba675SRob Herring reg = <0x4000c000 0x400>; 364724ba675SRob Herring interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 365724ba675SRob Herring clocks = <&rcc SPI3_K>; 366724ba675SRob Herring resets = <&rcc SPI3_R>; 367724ba675SRob Herring #address-cells = <1>; 368724ba675SRob Herring #size-cells = <0>; 369724ba675SRob Herring dmas = <&dmamux1 61 0x400 0x01>, 370724ba675SRob Herring <&dmamux1 62 0x400 0x01>; 371724ba675SRob Herring dma-names = "rx", "tx"; 372724ba675SRob Herring status = "disabled"; 373724ba675SRob Herring }; 374724ba675SRob Herring 375724ba675SRob Herring spdifrx: audio-controller@4000d000 { 376724ba675SRob Herring compatible = "st,stm32h7-spdifrx"; 377724ba675SRob Herring reg = <0x4000d000 0x400>; 378724ba675SRob Herring #sound-dai-cells = <0>; 379724ba675SRob Herring clocks = <&rcc SPDIF_K>; 380724ba675SRob Herring clock-names = "kclk"; 381724ba675SRob Herring interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 382724ba675SRob Herring dmas = <&dmamux1 93 0x400 0x01>, 383724ba675SRob Herring <&dmamux1 94 0x400 0x01>; 384724ba675SRob Herring dma-names = "rx", "rx-ctrl"; 385724ba675SRob Herring status = "disabled"; 386724ba675SRob Herring }; 387724ba675SRob Herring 388724ba675SRob Herring usart3: serial@4000f000 { 389724ba675SRob Herring compatible = "st,stm32h7-uart"; 390724ba675SRob Herring reg = <0x4000f000 0x400>; 391724ba675SRob Herring interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>; 392724ba675SRob Herring clocks = <&rcc USART3_K>; 393724ba675SRob Herring resets = <&rcc USART3_R>; 394724ba675SRob Herring wakeup-source; 395724ba675SRob Herring dmas = <&dmamux1 45 0x400 0x5>, 396724ba675SRob Herring <&dmamux1 46 0x400 0x1>; 397724ba675SRob Herring dma-names = "rx", "tx"; 398724ba675SRob Herring status = "disabled"; 399724ba675SRob Herring }; 400724ba675SRob Herring 401724ba675SRob Herring uart4: serial@40010000 { 402724ba675SRob Herring compatible = "st,stm32h7-uart"; 403724ba675SRob Herring reg = <0x40010000 0x400>; 404724ba675SRob Herring interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>; 405724ba675SRob Herring clocks = <&rcc UART4_K>; 406724ba675SRob Herring resets = <&rcc UART4_R>; 407724ba675SRob Herring wakeup-source; 408724ba675SRob Herring dmas = <&dmamux1 63 0x400 0x5>, 409724ba675SRob Herring <&dmamux1 64 0x400 0x1>; 410724ba675SRob Herring dma-names = "rx", "tx"; 411724ba675SRob Herring status = "disabled"; 412724ba675SRob Herring }; 413724ba675SRob Herring 414724ba675SRob Herring uart5: serial@40011000 { 415724ba675SRob Herring compatible = "st,stm32h7-uart"; 416724ba675SRob Herring reg = <0x40011000 0x400>; 417724ba675SRob Herring interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>; 418724ba675SRob Herring clocks = <&rcc UART5_K>; 419724ba675SRob Herring resets = <&rcc UART5_R>; 420724ba675SRob Herring wakeup-source; 421724ba675SRob Herring dmas = <&dmamux1 65 0x400 0x5>, 422724ba675SRob Herring <&dmamux1 66 0x400 0x1>; 423724ba675SRob Herring dma-names = "rx", "tx"; 424724ba675SRob Herring status = "disabled"; 425724ba675SRob Herring }; 426724ba675SRob Herring 427724ba675SRob Herring i2c1: i2c@40012000 { 428724ba675SRob Herring compatible = "st,stm32mp13-i2c"; 429724ba675SRob Herring reg = <0x40012000 0x400>; 430724ba675SRob Herring interrupt-names = "event", "error"; 431724ba675SRob Herring interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 432724ba675SRob Herring <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 433724ba675SRob Herring clocks = <&rcc I2C1_K>; 434724ba675SRob Herring resets = <&rcc I2C1_R>; 435724ba675SRob Herring #address-cells = <1>; 436724ba675SRob Herring #size-cells = <0>; 437724ba675SRob Herring dmas = <&dmamux1 33 0x400 0x1>, 438724ba675SRob Herring <&dmamux1 34 0x400 0x1>; 439724ba675SRob Herring dma-names = "rx", "tx"; 440724ba675SRob Herring st,syscfg-fmp = <&syscfg 0x4 0x1>; 441724ba675SRob Herring i2c-analog-filter; 442724ba675SRob Herring status = "disabled"; 443724ba675SRob Herring }; 444724ba675SRob Herring 445724ba675SRob Herring i2c2: i2c@40013000 { 446724ba675SRob Herring compatible = "st,stm32mp13-i2c"; 447724ba675SRob Herring reg = <0x40013000 0x400>; 448724ba675SRob Herring interrupt-names = "event", "error"; 449724ba675SRob Herring interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 450724ba675SRob Herring <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 451724ba675SRob Herring clocks = <&rcc I2C2_K>; 452724ba675SRob Herring resets = <&rcc I2C2_R>; 453724ba675SRob Herring #address-cells = <1>; 454724ba675SRob Herring #size-cells = <0>; 455724ba675SRob Herring dmas = <&dmamux1 35 0x400 0x1>, 456724ba675SRob Herring <&dmamux1 36 0x400 0x1>; 457724ba675SRob Herring dma-names = "rx", "tx"; 458724ba675SRob Herring st,syscfg-fmp = <&syscfg 0x4 0x2>; 459724ba675SRob Herring i2c-analog-filter; 460724ba675SRob Herring status = "disabled"; 461724ba675SRob Herring }; 462724ba675SRob Herring 463724ba675SRob Herring uart7: serial@40018000 { 464724ba675SRob Herring compatible = "st,stm32h7-uart"; 465724ba675SRob Herring reg = <0x40018000 0x400>; 466724ba675SRob Herring interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>; 467724ba675SRob Herring clocks = <&rcc UART7_K>; 468724ba675SRob Herring resets = <&rcc UART7_R>; 469724ba675SRob Herring wakeup-source; 470724ba675SRob Herring dmas = <&dmamux1 79 0x400 0x5>, 471724ba675SRob Herring <&dmamux1 80 0x400 0x1>; 472724ba675SRob Herring dma-names = "rx", "tx"; 473724ba675SRob Herring status = "disabled"; 474724ba675SRob Herring }; 475724ba675SRob Herring 476724ba675SRob Herring uart8: serial@40019000 { 477724ba675SRob Herring compatible = "st,stm32h7-uart"; 478724ba675SRob Herring reg = <0x40019000 0x400>; 479724ba675SRob Herring interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>; 480724ba675SRob Herring clocks = <&rcc UART8_K>; 481724ba675SRob Herring resets = <&rcc UART8_R>; 482724ba675SRob Herring wakeup-source; 483724ba675SRob Herring dmas = <&dmamux1 81 0x400 0x5>, 484724ba675SRob Herring <&dmamux1 82 0x400 0x1>; 485724ba675SRob Herring dma-names = "rx", "tx"; 486724ba675SRob Herring status = "disabled"; 487724ba675SRob Herring }; 488724ba675SRob Herring 489724ba675SRob Herring timers1: timer@44000000 { 490724ba675SRob Herring #address-cells = <1>; 491724ba675SRob Herring #size-cells = <0>; 492724ba675SRob Herring compatible = "st,stm32-timers"; 493724ba675SRob Herring reg = <0x44000000 0x400>; 494724ba675SRob Herring interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 495724ba675SRob Herring <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 496724ba675SRob Herring <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, 497724ba675SRob Herring <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 498724ba675SRob Herring interrupt-names = "brk", "up", "trg-com", "cc"; 499724ba675SRob Herring clocks = <&rcc TIM1_K>; 500724ba675SRob Herring clock-names = "int"; 501724ba675SRob Herring dmas = <&dmamux1 11 0x400 0x1>, 502724ba675SRob Herring <&dmamux1 12 0x400 0x1>, 503724ba675SRob Herring <&dmamux1 13 0x400 0x1>, 504724ba675SRob Herring <&dmamux1 14 0x400 0x1>, 505724ba675SRob Herring <&dmamux1 15 0x400 0x1>, 506724ba675SRob Herring <&dmamux1 16 0x400 0x1>, 507724ba675SRob Herring <&dmamux1 17 0x400 0x1>; 508724ba675SRob Herring dma-names = "ch1", "ch2", "ch3", "ch4", 509724ba675SRob Herring "up", "trig", "com"; 510724ba675SRob Herring status = "disabled"; 511724ba675SRob Herring 512724ba675SRob Herring pwm { 513724ba675SRob Herring compatible = "st,stm32-pwm"; 514724ba675SRob Herring #pwm-cells = <3>; 515724ba675SRob Herring status = "disabled"; 516724ba675SRob Herring }; 517724ba675SRob Herring 518724ba675SRob Herring timer@0 { 519724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 520724ba675SRob Herring reg = <0>; 521724ba675SRob Herring status = "disabled"; 522724ba675SRob Herring }; 523724ba675SRob Herring 524724ba675SRob Herring counter { 525724ba675SRob Herring compatible = "st,stm32-timer-counter"; 526724ba675SRob Herring status = "disabled"; 527724ba675SRob Herring }; 528724ba675SRob Herring }; 529724ba675SRob Herring 530724ba675SRob Herring timers8: timer@44001000 { 531724ba675SRob Herring #address-cells = <1>; 532724ba675SRob Herring #size-cells = <0>; 533724ba675SRob Herring compatible = "st,stm32-timers"; 534724ba675SRob Herring reg = <0x44001000 0x400>; 535724ba675SRob Herring interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 536724ba675SRob Herring <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 537724ba675SRob Herring <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 538724ba675SRob Herring <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 539724ba675SRob Herring interrupt-names = "brk", "up", "trg-com", "cc"; 540724ba675SRob Herring clocks = <&rcc TIM8_K>; 541724ba675SRob Herring clock-names = "int"; 542724ba675SRob Herring dmas = <&dmamux1 47 0x400 0x1>, 543724ba675SRob Herring <&dmamux1 48 0x400 0x1>, 544724ba675SRob Herring <&dmamux1 49 0x400 0x1>, 545724ba675SRob Herring <&dmamux1 50 0x400 0x1>, 546724ba675SRob Herring <&dmamux1 51 0x400 0x1>, 547724ba675SRob Herring <&dmamux1 52 0x400 0x1>, 548724ba675SRob Herring <&dmamux1 53 0x400 0x1>; 549724ba675SRob Herring dma-names = "ch1", "ch2", "ch3", "ch4", 550724ba675SRob Herring "up", "trig", "com"; 551724ba675SRob Herring status = "disabled"; 552724ba675SRob Herring 553724ba675SRob Herring pwm { 554724ba675SRob Herring compatible = "st,stm32-pwm"; 555724ba675SRob Herring #pwm-cells = <3>; 556724ba675SRob Herring status = "disabled"; 557724ba675SRob Herring }; 558724ba675SRob Herring 559724ba675SRob Herring timer@7 { 560724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 561724ba675SRob Herring reg = <7>; 562724ba675SRob Herring status = "disabled"; 563724ba675SRob Herring }; 564724ba675SRob Herring 565724ba675SRob Herring counter { 566724ba675SRob Herring compatible = "st,stm32-timer-counter"; 567724ba675SRob Herring status = "disabled"; 568724ba675SRob Herring }; 569724ba675SRob Herring }; 570724ba675SRob Herring 571724ba675SRob Herring usart6: serial@44003000 { 572724ba675SRob Herring compatible = "st,stm32h7-uart"; 573724ba675SRob Herring reg = <0x44003000 0x400>; 574724ba675SRob Herring interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>; 575724ba675SRob Herring clocks = <&rcc USART6_K>; 576724ba675SRob Herring resets = <&rcc USART6_R>; 577724ba675SRob Herring wakeup-source; 578724ba675SRob Herring dmas = <&dmamux1 71 0x400 0x5>, 579724ba675SRob Herring <&dmamux1 72 0x400 0x1>; 580724ba675SRob Herring dma-names = "rx", "tx"; 581724ba675SRob Herring status = "disabled"; 582724ba675SRob Herring }; 583724ba675SRob Herring 584724ba675SRob Herring i2s1: audio-controller@44004000 { 585724ba675SRob Herring compatible = "st,stm32h7-i2s"; 586724ba675SRob Herring reg = <0x44004000 0x400>; 587724ba675SRob Herring #sound-dai-cells = <0>; 588724ba675SRob Herring interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 589724ba675SRob Herring dmas = <&dmamux1 37 0x400 0x01>, 590724ba675SRob Herring <&dmamux1 38 0x400 0x01>; 591724ba675SRob Herring dma-names = "rx", "tx"; 592724ba675SRob Herring status = "disabled"; 593724ba675SRob Herring }; 594724ba675SRob Herring 595724ba675SRob Herring spi1: spi@44004000 { 596724ba675SRob Herring compatible = "st,stm32h7-spi"; 597724ba675SRob Herring reg = <0x44004000 0x400>; 598724ba675SRob Herring interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 599724ba675SRob Herring clocks = <&rcc SPI1_K>; 600724ba675SRob Herring resets = <&rcc SPI1_R>; 601724ba675SRob Herring #address-cells = <1>; 602724ba675SRob Herring #size-cells = <0>; 603724ba675SRob Herring dmas = <&dmamux1 37 0x400 0x01>, 604724ba675SRob Herring <&dmamux1 38 0x400 0x01>; 605724ba675SRob Herring dma-names = "rx", "tx"; 606724ba675SRob Herring status = "disabled"; 607724ba675SRob Herring }; 608724ba675SRob Herring 609724ba675SRob Herring sai1: sai@4400a000 { 610724ba675SRob Herring compatible = "st,stm32h7-sai"; 611724ba675SRob Herring reg = <0x4400a000 0x4>, <0x4400a3f0 0x10>; 612724ba675SRob Herring ranges = <0 0x4400a000 0x400>; 613724ba675SRob Herring #address-cells = <1>; 614724ba675SRob Herring #size-cells = <1>; 615724ba675SRob Herring interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 616724ba675SRob Herring resets = <&rcc SAI1_R>; 617724ba675SRob Herring status = "disabled"; 618724ba675SRob Herring 619724ba675SRob Herring sai1a: audio-controller@4400a004 { 620724ba675SRob Herring compatible = "st,stm32-sai-sub-a"; 621724ba675SRob Herring reg = <0x4 0x20>; 622724ba675SRob Herring #sound-dai-cells = <0>; 623724ba675SRob Herring clocks = <&rcc SAI1_K>; 624724ba675SRob Herring clock-names = "sai_ck"; 625724ba675SRob Herring dmas = <&dmamux1 87 0x400 0x01>; 626724ba675SRob Herring status = "disabled"; 627724ba675SRob Herring }; 628724ba675SRob Herring 629724ba675SRob Herring sai1b: audio-controller@4400a024 { 630724ba675SRob Herring compatible = "st,stm32-sai-sub-b"; 631724ba675SRob Herring reg = <0x24 0x20>; 632724ba675SRob Herring #sound-dai-cells = <0>; 633724ba675SRob Herring clocks = <&rcc SAI1_K>; 634724ba675SRob Herring clock-names = "sai_ck"; 635724ba675SRob Herring dmas = <&dmamux1 88 0x400 0x01>; 636724ba675SRob Herring status = "disabled"; 637724ba675SRob Herring }; 638724ba675SRob Herring }; 639724ba675SRob Herring 640724ba675SRob Herring sai2: sai@4400b000 { 641724ba675SRob Herring compatible = "st,stm32h7-sai"; 642724ba675SRob Herring reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>; 643724ba675SRob Herring ranges = <0 0x4400b000 0x400>; 644724ba675SRob Herring #address-cells = <1>; 645724ba675SRob Herring #size-cells = <1>; 646724ba675SRob Herring interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 647724ba675SRob Herring resets = <&rcc SAI2_R>; 648724ba675SRob Herring status = "disabled"; 649724ba675SRob Herring 650724ba675SRob Herring sai2a: audio-controller@4400b004 { 651724ba675SRob Herring compatible = "st,stm32-sai-sub-a"; 652724ba675SRob Herring reg = <0x4 0x20>; 653724ba675SRob Herring #sound-dai-cells = <0>; 654724ba675SRob Herring clocks = <&rcc SAI2_K>; 655724ba675SRob Herring clock-names = "sai_ck"; 656724ba675SRob Herring dmas = <&dmamux1 89 0x400 0x01>; 657724ba675SRob Herring status = "disabled"; 658724ba675SRob Herring }; 659724ba675SRob Herring 660724ba675SRob Herring sai2b: audio-controller@4400b024 { 661724ba675SRob Herring compatible = "st,stm32-sai-sub-b"; 662724ba675SRob Herring reg = <0x24 0x20>; 663724ba675SRob Herring #sound-dai-cells = <0>; 664724ba675SRob Herring clocks = <&rcc SAI2_K>; 665724ba675SRob Herring clock-names = "sai_ck"; 666724ba675SRob Herring dmas = <&dmamux1 90 0x400 0x01>; 667724ba675SRob Herring status = "disabled"; 668724ba675SRob Herring }; 669724ba675SRob Herring }; 670724ba675SRob Herring 671724ba675SRob Herring dfsdm: dfsdm@4400d000 { 672724ba675SRob Herring compatible = "st,stm32mp1-dfsdm"; 673724ba675SRob Herring reg = <0x4400d000 0x800>; 674724ba675SRob Herring clocks = <&rcc DFSDM_K>; 675724ba675SRob Herring clock-names = "dfsdm"; 676724ba675SRob Herring #address-cells = <1>; 677724ba675SRob Herring #size-cells = <0>; 678724ba675SRob Herring status = "disabled"; 679724ba675SRob Herring 680724ba675SRob Herring dfsdm0: filter@0 { 681724ba675SRob Herring compatible = "st,stm32-dfsdm-adc"; 682724ba675SRob Herring reg = <0>; 683724ba675SRob Herring #io-channel-cells = <1>; 684724ba675SRob Herring interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 685724ba675SRob Herring dmas = <&dmamux1 101 0x400 0x01>; 686724ba675SRob Herring dma-names = "rx"; 687724ba675SRob Herring status = "disabled"; 688724ba675SRob Herring }; 689724ba675SRob Herring 690724ba675SRob Herring dfsdm1: filter@1 { 691724ba675SRob Herring compatible = "st,stm32-dfsdm-adc"; 692724ba675SRob Herring reg = <1>; 693724ba675SRob Herring #io-channel-cells = <1>; 694724ba675SRob Herring interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 695724ba675SRob Herring dmas = <&dmamux1 102 0x400 0x01>; 696724ba675SRob Herring dma-names = "rx"; 697724ba675SRob Herring status = "disabled"; 698724ba675SRob Herring }; 699724ba675SRob Herring }; 700724ba675SRob Herring 701724ba675SRob Herring dma1: dma-controller@48000000 { 702724ba675SRob Herring compatible = "st,stm32-dma"; 703724ba675SRob Herring reg = <0x48000000 0x400>; 704724ba675SRob Herring interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 705724ba675SRob Herring <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 706724ba675SRob Herring <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 707724ba675SRob Herring <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 708724ba675SRob Herring <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 709724ba675SRob Herring <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 710724ba675SRob Herring <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 711724ba675SRob Herring <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 712724ba675SRob Herring clocks = <&rcc DMA1>; 713724ba675SRob Herring resets = <&rcc DMA1_R>; 714724ba675SRob Herring #dma-cells = <4>; 715724ba675SRob Herring st,mem2mem; 716724ba675SRob Herring dma-requests = <8>; 717724ba675SRob Herring }; 718724ba675SRob Herring 719724ba675SRob Herring dma2: dma-controller@48001000 { 720724ba675SRob Herring compatible = "st,stm32-dma"; 721724ba675SRob Herring reg = <0x48001000 0x400>; 722724ba675SRob Herring interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 723724ba675SRob Herring <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 724724ba675SRob Herring <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 725724ba675SRob Herring <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 726724ba675SRob Herring <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 727724ba675SRob Herring <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 728724ba675SRob Herring <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 729724ba675SRob Herring <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 730724ba675SRob Herring clocks = <&rcc DMA2>; 731724ba675SRob Herring resets = <&rcc DMA2_R>; 732724ba675SRob Herring #dma-cells = <4>; 733724ba675SRob Herring st,mem2mem; 734724ba675SRob Herring dma-requests = <8>; 735724ba675SRob Herring }; 736724ba675SRob Herring 737724ba675SRob Herring dmamux1: dma-router@48002000 { 738724ba675SRob Herring compatible = "st,stm32h7-dmamux"; 739724ba675SRob Herring reg = <0x48002000 0x40>; 740724ba675SRob Herring clocks = <&rcc DMAMUX1>; 741724ba675SRob Herring resets = <&rcc DMAMUX1_R>; 742724ba675SRob Herring #dma-cells = <3>; 743724ba675SRob Herring dma-masters = <&dma1 &dma2>; 744724ba675SRob Herring dma-requests = <128>; 745724ba675SRob Herring dma-channels = <16>; 746724ba675SRob Herring }; 747724ba675SRob Herring 748724ba675SRob Herring adc_2: adc@48004000 { 749724ba675SRob Herring compatible = "st,stm32mp13-adc-core"; 750724ba675SRob Herring reg = <0x48004000 0x400>; 751724ba675SRob Herring interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 752724ba675SRob Herring clocks = <&rcc ADC2>, <&rcc ADC2_K>; 753724ba675SRob Herring clock-names = "bus", "adc"; 754724ba675SRob Herring interrupt-controller; 755724ba675SRob Herring #interrupt-cells = <1>; 756724ba675SRob Herring #address-cells = <1>; 757724ba675SRob Herring #size-cells = <0>; 758724ba675SRob Herring status = "disabled"; 759724ba675SRob Herring 760724ba675SRob Herring adc2: adc@0 { 761724ba675SRob Herring compatible = "st,stm32mp13-adc"; 762724ba675SRob Herring #io-channel-cells = <1>; 763724ba675SRob Herring #address-cells = <1>; 764724ba675SRob Herring #size-cells = <0>; 765724ba675SRob Herring reg = <0x0>; 766724ba675SRob Herring interrupt-parent = <&adc_2>; 767724ba675SRob Herring interrupts = <0>; 768724ba675SRob Herring dmas = <&dmamux1 10 0x400 0x80000001>; 769724ba675SRob Herring dma-names = "rx"; 770724ba675SRob Herring status = "disabled"; 771724ba675SRob Herring 772724ba675SRob Herring channel@13 { 773724ba675SRob Herring reg = <13>; 774724ba675SRob Herring label = "vrefint"; 775724ba675SRob Herring }; 776724ba675SRob Herring channel@14 { 777724ba675SRob Herring reg = <14>; 778724ba675SRob Herring label = "vddcore"; 779724ba675SRob Herring }; 780724ba675SRob Herring channel@16 { 781724ba675SRob Herring reg = <16>; 782724ba675SRob Herring label = "vddcpu"; 783724ba675SRob Herring }; 784724ba675SRob Herring channel@17 { 785724ba675SRob Herring reg = <17>; 786724ba675SRob Herring label = "vddq_ddr"; 787724ba675SRob Herring }; 788724ba675SRob Herring }; 789724ba675SRob Herring }; 790724ba675SRob Herring 791724ba675SRob Herring usbotg_hs: usb@49000000 { 792724ba675SRob Herring compatible = "st,stm32mp15-hsotg", "snps,dwc2"; 793724ba675SRob Herring reg = <0x49000000 0x40000>; 794724ba675SRob Herring clocks = <&rcc USBO_K>; 795724ba675SRob Herring clock-names = "otg"; 796724ba675SRob Herring resets = <&rcc USBO_R>; 797724ba675SRob Herring reset-names = "dwc2"; 798724ba675SRob Herring interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 799724ba675SRob Herring g-rx-fifo-size = <512>; 800724ba675SRob Herring g-np-tx-fifo-size = <32>; 801724ba675SRob Herring g-tx-fifo-size = <256 16 16 16 16 16 16 16>; 802724ba675SRob Herring dr_mode = "otg"; 803724ba675SRob Herring otg-rev = <0x200>; 804*fb266d2dSEtienne Carriere usb33d-supply = <&scmi_usb33>; 805724ba675SRob Herring status = "disabled"; 806724ba675SRob Herring }; 807724ba675SRob Herring 808724ba675SRob Herring usart1: serial@4c000000 { 809724ba675SRob Herring compatible = "st,stm32h7-uart"; 810724ba675SRob Herring reg = <0x4c000000 0x400>; 811724ba675SRob Herring interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>; 812724ba675SRob Herring clocks = <&rcc USART1_K>; 813724ba675SRob Herring resets = <&rcc USART1_R>; 814724ba675SRob Herring wakeup-source; 815724ba675SRob Herring dmas = <&dmamux1 41 0x400 0x5>, 816724ba675SRob Herring <&dmamux1 42 0x400 0x1>; 817724ba675SRob Herring dma-names = "rx", "tx"; 818724ba675SRob Herring status = "disabled"; 819724ba675SRob Herring }; 820724ba675SRob Herring 821724ba675SRob Herring usart2: serial@4c001000 { 822724ba675SRob Herring compatible = "st,stm32h7-uart"; 823724ba675SRob Herring reg = <0x4c001000 0x400>; 824724ba675SRob Herring interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>; 825724ba675SRob Herring clocks = <&rcc USART2_K>; 826724ba675SRob Herring resets = <&rcc USART2_R>; 827724ba675SRob Herring wakeup-source; 828724ba675SRob Herring dmas = <&dmamux1 43 0x400 0x5>, 829724ba675SRob Herring <&dmamux1 44 0x400 0x1>; 830724ba675SRob Herring dma-names = "rx", "tx"; 831724ba675SRob Herring status = "disabled"; 832724ba675SRob Herring }; 833724ba675SRob Herring 834724ba675SRob Herring i2s4: audio-controller@4c002000 { 835724ba675SRob Herring compatible = "st,stm32h7-i2s"; 836724ba675SRob Herring reg = <0x4c002000 0x400>; 837724ba675SRob Herring #sound-dai-cells = <0>; 838724ba675SRob Herring interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 839724ba675SRob Herring dmas = <&dmamux1 83 0x400 0x01>, 840724ba675SRob Herring <&dmamux1 84 0x400 0x01>; 841724ba675SRob Herring dma-names = "rx", "tx"; 842724ba675SRob Herring status = "disabled"; 843724ba675SRob Herring }; 844724ba675SRob Herring 845724ba675SRob Herring spi4: spi@4c002000 { 846724ba675SRob Herring compatible = "st,stm32h7-spi"; 847724ba675SRob Herring reg = <0x4c002000 0x400>; 848724ba675SRob Herring interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 849724ba675SRob Herring clocks = <&rcc SPI4_K>; 850724ba675SRob Herring resets = <&rcc SPI4_R>; 851724ba675SRob Herring #address-cells = <1>; 852724ba675SRob Herring #size-cells = <0>; 853724ba675SRob Herring dmas = <&dmamux1 83 0x400 0x01>, 854724ba675SRob Herring <&dmamux1 84 0x400 0x01>; 855724ba675SRob Herring dma-names = "rx", "tx"; 856724ba675SRob Herring status = "disabled"; 857724ba675SRob Herring }; 858724ba675SRob Herring 859724ba675SRob Herring spi5: spi@4c003000 { 860724ba675SRob Herring compatible = "st,stm32h7-spi"; 861724ba675SRob Herring reg = <0x4c003000 0x400>; 862724ba675SRob Herring interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 863724ba675SRob Herring clocks = <&rcc SPI5_K>; 864724ba675SRob Herring resets = <&rcc SPI5_R>; 865724ba675SRob Herring #address-cells = <1>; 866724ba675SRob Herring #size-cells = <0>; 867724ba675SRob Herring dmas = <&dmamux1 85 0x400 0x01>, 868724ba675SRob Herring <&dmamux1 86 0x400 0x01>; 869724ba675SRob Herring dma-names = "rx", "tx"; 870724ba675SRob Herring status = "disabled"; 871724ba675SRob Herring }; 872724ba675SRob Herring 873724ba675SRob Herring i2c3: i2c@4c004000 { 874724ba675SRob Herring compatible = "st,stm32mp13-i2c"; 875724ba675SRob Herring reg = <0x4c004000 0x400>; 876724ba675SRob Herring interrupt-names = "event", "error"; 877724ba675SRob Herring interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, 878724ba675SRob Herring <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 879724ba675SRob Herring clocks = <&rcc I2C3_K>; 880724ba675SRob Herring resets = <&rcc I2C3_R>; 881724ba675SRob Herring #address-cells = <1>; 882724ba675SRob Herring #size-cells = <0>; 883724ba675SRob Herring dmas = <&dmamux1 73 0x400 0x1>, 884724ba675SRob Herring <&dmamux1 74 0x400 0x1>; 885724ba675SRob Herring dma-names = "rx", "tx"; 886724ba675SRob Herring st,syscfg-fmp = <&syscfg 0x4 0x4>; 887724ba675SRob Herring i2c-analog-filter; 888724ba675SRob Herring status = "disabled"; 889724ba675SRob Herring }; 890724ba675SRob Herring 891724ba675SRob Herring i2c4: i2c@4c005000 { 892724ba675SRob Herring compatible = "st,stm32mp13-i2c"; 893724ba675SRob Herring reg = <0x4c005000 0x400>; 894724ba675SRob Herring interrupt-names = "event", "error"; 895724ba675SRob Herring interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 896724ba675SRob Herring <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 897724ba675SRob Herring clocks = <&rcc I2C4_K>; 898724ba675SRob Herring resets = <&rcc I2C4_R>; 899724ba675SRob Herring #address-cells = <1>; 900724ba675SRob Herring #size-cells = <0>; 901724ba675SRob Herring dmas = <&dmamux1 75 0x400 0x1>, 902724ba675SRob Herring <&dmamux1 76 0x400 0x1>; 903724ba675SRob Herring dma-names = "rx", "tx"; 904724ba675SRob Herring st,syscfg-fmp = <&syscfg 0x4 0x8>; 905724ba675SRob Herring i2c-analog-filter; 906724ba675SRob Herring status = "disabled"; 907724ba675SRob Herring }; 908724ba675SRob Herring 909724ba675SRob Herring i2c5: i2c@4c006000 { 910724ba675SRob Herring compatible = "st,stm32mp13-i2c"; 911724ba675SRob Herring reg = <0x4c006000 0x400>; 912724ba675SRob Herring interrupt-names = "event", "error"; 913724ba675SRob Herring interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 914724ba675SRob Herring <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 915724ba675SRob Herring clocks = <&rcc I2C5_K>; 916724ba675SRob Herring resets = <&rcc I2C5_R>; 917724ba675SRob Herring #address-cells = <1>; 918724ba675SRob Herring #size-cells = <0>; 919724ba675SRob Herring dmas = <&dmamux1 115 0x400 0x1>, 920724ba675SRob Herring <&dmamux1 116 0x400 0x1>; 921724ba675SRob Herring dma-names = "rx", "tx"; 922724ba675SRob Herring st,syscfg-fmp = <&syscfg 0x4 0x10>; 923724ba675SRob Herring i2c-analog-filter; 924724ba675SRob Herring status = "disabled"; 925724ba675SRob Herring }; 926724ba675SRob Herring 927724ba675SRob Herring timers12: timer@4c007000 { 928724ba675SRob Herring #address-cells = <1>; 929724ba675SRob Herring #size-cells = <0>; 930724ba675SRob Herring compatible = "st,stm32-timers"; 931724ba675SRob Herring reg = <0x4c007000 0x400>; 932724ba675SRob Herring interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 933724ba675SRob Herring interrupt-names = "global"; 934724ba675SRob Herring clocks = <&rcc TIM12_K>; 935724ba675SRob Herring clock-names = "int"; 936724ba675SRob Herring status = "disabled"; 937724ba675SRob Herring 938724ba675SRob Herring pwm { 939724ba675SRob Herring compatible = "st,stm32-pwm"; 940724ba675SRob Herring #pwm-cells = <3>; 941724ba675SRob Herring status = "disabled"; 942724ba675SRob Herring }; 943724ba675SRob Herring 944724ba675SRob Herring timer@11 { 945724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 946724ba675SRob Herring reg = <11>; 947724ba675SRob Herring status = "disabled"; 948724ba675SRob Herring }; 949724ba675SRob Herring }; 950724ba675SRob Herring 951724ba675SRob Herring timers13: timer@4c008000 { 952724ba675SRob Herring #address-cells = <1>; 953724ba675SRob Herring #size-cells = <0>; 954724ba675SRob Herring compatible = "st,stm32-timers"; 955724ba675SRob Herring reg = <0x4c008000 0x400>; 956724ba675SRob Herring interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 957724ba675SRob Herring interrupt-names = "global"; 958724ba675SRob Herring clocks = <&rcc TIM13_K>; 959724ba675SRob Herring clock-names = "int"; 960724ba675SRob Herring status = "disabled"; 961724ba675SRob Herring 962724ba675SRob Herring pwm { 963724ba675SRob Herring compatible = "st,stm32-pwm"; 964724ba675SRob Herring #pwm-cells = <3>; 965724ba675SRob Herring status = "disabled"; 966724ba675SRob Herring }; 967724ba675SRob Herring 968724ba675SRob Herring timer@12 { 969724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 970724ba675SRob Herring reg = <12>; 971724ba675SRob Herring status = "disabled"; 972724ba675SRob Herring }; 973724ba675SRob Herring }; 974724ba675SRob Herring 975724ba675SRob Herring timers14: timer@4c009000 { 976724ba675SRob Herring #address-cells = <1>; 977724ba675SRob Herring #size-cells = <0>; 978724ba675SRob Herring compatible = "st,stm32-timers"; 979724ba675SRob Herring reg = <0x4c009000 0x400>; 980724ba675SRob Herring interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 981724ba675SRob Herring interrupt-names = "global"; 982724ba675SRob Herring clocks = <&rcc TIM14_K>; 983724ba675SRob Herring clock-names = "int"; 984724ba675SRob Herring status = "disabled"; 985724ba675SRob Herring 986724ba675SRob Herring pwm { 987724ba675SRob Herring compatible = "st,stm32-pwm"; 988724ba675SRob Herring #pwm-cells = <3>; 989724ba675SRob Herring status = "disabled"; 990724ba675SRob Herring }; 991724ba675SRob Herring 992724ba675SRob Herring timer@13 { 993724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 994724ba675SRob Herring reg = <13>; 995724ba675SRob Herring status = "disabled"; 996724ba675SRob Herring }; 997724ba675SRob Herring }; 998724ba675SRob Herring 999724ba675SRob Herring timers15: timer@4c00a000 { 1000724ba675SRob Herring #address-cells = <1>; 1001724ba675SRob Herring #size-cells = <0>; 1002724ba675SRob Herring compatible = "st,stm32-timers"; 1003724ba675SRob Herring reg = <0x4c00a000 0x400>; 1004724ba675SRob Herring interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 1005724ba675SRob Herring interrupt-names = "global"; 1006724ba675SRob Herring clocks = <&rcc TIM15_K>; 1007724ba675SRob Herring clock-names = "int"; 1008724ba675SRob Herring dmas = <&dmamux1 105 0x400 0x1>, 1009724ba675SRob Herring <&dmamux1 106 0x400 0x1>, 1010724ba675SRob Herring <&dmamux1 107 0x400 0x1>, 1011724ba675SRob Herring <&dmamux1 108 0x400 0x1>; 1012724ba675SRob Herring dma-names = "ch1", "up", "trig", "com"; 1013724ba675SRob Herring status = "disabled"; 1014724ba675SRob Herring 1015724ba675SRob Herring pwm { 1016724ba675SRob Herring compatible = "st,stm32-pwm"; 1017724ba675SRob Herring #pwm-cells = <3>; 1018724ba675SRob Herring status = "disabled"; 1019724ba675SRob Herring }; 1020724ba675SRob Herring 1021724ba675SRob Herring timer@14 { 1022724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 1023724ba675SRob Herring reg = <14>; 1024724ba675SRob Herring status = "disabled"; 1025724ba675SRob Herring }; 1026724ba675SRob Herring }; 1027724ba675SRob Herring 1028724ba675SRob Herring timers16: timer@4c00b000 { 1029724ba675SRob Herring #address-cells = <1>; 1030724ba675SRob Herring #size-cells = <0>; 1031724ba675SRob Herring compatible = "st,stm32-timers"; 1032724ba675SRob Herring reg = <0x4c00b000 0x400>; 1033724ba675SRob Herring interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1034724ba675SRob Herring interrupt-names = "global"; 1035724ba675SRob Herring clocks = <&rcc TIM16_K>; 1036724ba675SRob Herring clock-names = "int"; 1037724ba675SRob Herring dmas = <&dmamux1 109 0x400 0x1>, 1038724ba675SRob Herring <&dmamux1 110 0x400 0x1>; 1039724ba675SRob Herring dma-names = "ch1", "up"; 1040724ba675SRob Herring status = "disabled"; 1041724ba675SRob Herring 1042724ba675SRob Herring pwm { 1043724ba675SRob Herring compatible = "st,stm32-pwm"; 1044724ba675SRob Herring #pwm-cells = <3>; 1045724ba675SRob Herring status = "disabled"; 1046724ba675SRob Herring }; 1047724ba675SRob Herring 1048724ba675SRob Herring timer@15 { 1049724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 1050724ba675SRob Herring reg = <15>; 1051724ba675SRob Herring status = "disabled"; 1052724ba675SRob Herring }; 1053724ba675SRob Herring }; 1054724ba675SRob Herring 1055724ba675SRob Herring timers17: timer@4c00c000 { 1056724ba675SRob Herring #address-cells = <1>; 1057724ba675SRob Herring #size-cells = <0>; 1058724ba675SRob Herring compatible = "st,stm32-timers"; 1059724ba675SRob Herring reg = <0x4c00c000 0x400>; 1060724ba675SRob Herring interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 1061724ba675SRob Herring interrupt-names = "global"; 1062724ba675SRob Herring clocks = <&rcc TIM17_K>; 1063724ba675SRob Herring clock-names = "int"; 1064724ba675SRob Herring dmas = <&dmamux1 111 0x400 0x1>, 1065724ba675SRob Herring <&dmamux1 112 0x400 0x1>; 1066724ba675SRob Herring dma-names = "ch1", "up"; 1067724ba675SRob Herring status = "disabled"; 1068724ba675SRob Herring 1069724ba675SRob Herring pwm { 1070724ba675SRob Herring compatible = "st,stm32-pwm"; 1071724ba675SRob Herring #pwm-cells = <3>; 1072724ba675SRob Herring status = "disabled"; 1073724ba675SRob Herring }; 1074724ba675SRob Herring 1075724ba675SRob Herring timer@16 { 1076724ba675SRob Herring compatible = "st,stm32h7-timer-trigger"; 1077724ba675SRob Herring reg = <16>; 1078724ba675SRob Herring status = "disabled"; 1079724ba675SRob Herring }; 1080724ba675SRob Herring }; 1081724ba675SRob Herring 1082724ba675SRob Herring rcc: rcc@50000000 { 1083724ba675SRob Herring compatible = "st,stm32mp13-rcc", "syscon"; 1084724ba675SRob Herring reg = <0x50000000 0x1000>; 1085724ba675SRob Herring #clock-cells = <1>; 1086724ba675SRob Herring #reset-cells = <1>; 1087724ba675SRob Herring clock-names = "hse", "hsi", "csi", "lse", "lsi"; 1088724ba675SRob Herring clocks = <&scmi_clk CK_SCMI_HSE>, 1089724ba675SRob Herring <&scmi_clk CK_SCMI_HSI>, 1090724ba675SRob Herring <&scmi_clk CK_SCMI_CSI>, 1091724ba675SRob Herring <&scmi_clk CK_SCMI_LSE>, 1092724ba675SRob Herring <&scmi_clk CK_SCMI_LSI>; 1093724ba675SRob Herring }; 1094724ba675SRob Herring 1095724ba675SRob Herring exti: interrupt-controller@5000d000 { 1096724ba675SRob Herring compatible = "st,stm32mp13-exti", "syscon"; 1097724ba675SRob Herring interrupt-controller; 1098724ba675SRob Herring #interrupt-cells = <2>; 1099724ba675SRob Herring reg = <0x5000d000 0x400>; 1100724ba675SRob Herring }; 1101724ba675SRob Herring 1102724ba675SRob Herring syscfg: syscon@50020000 { 1103724ba675SRob Herring compatible = "st,stm32mp157-syscfg", "syscon"; 1104724ba675SRob Herring reg = <0x50020000 0x400>; 1105724ba675SRob Herring clocks = <&rcc SYSCFG>; 1106724ba675SRob Herring }; 1107724ba675SRob Herring 1108724ba675SRob Herring lptimer2: timer@50021000 { 1109724ba675SRob Herring #address-cells = <1>; 1110724ba675SRob Herring #size-cells = <0>; 1111724ba675SRob Herring compatible = "st,stm32-lptimer"; 1112724ba675SRob Herring reg = <0x50021000 0x400>; 1113724ba675SRob Herring interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>; 1114724ba675SRob Herring clocks = <&rcc LPTIM2_K>; 1115724ba675SRob Herring clock-names = "mux"; 1116724ba675SRob Herring wakeup-source; 1117724ba675SRob Herring status = "disabled"; 1118724ba675SRob Herring 1119724ba675SRob Herring pwm { 1120724ba675SRob Herring compatible = "st,stm32-pwm-lp"; 1121724ba675SRob Herring #pwm-cells = <3>; 1122724ba675SRob Herring status = "disabled"; 1123724ba675SRob Herring }; 1124724ba675SRob Herring 1125724ba675SRob Herring trigger@1 { 1126724ba675SRob Herring compatible = "st,stm32-lptimer-trigger"; 1127724ba675SRob Herring reg = <1>; 1128724ba675SRob Herring status = "disabled"; 1129724ba675SRob Herring }; 1130724ba675SRob Herring 1131724ba675SRob Herring counter { 1132724ba675SRob Herring compatible = "st,stm32-lptimer-counter"; 1133724ba675SRob Herring status = "disabled"; 1134724ba675SRob Herring }; 1135724ba675SRob Herring 1136724ba675SRob Herring timer { 1137724ba675SRob Herring compatible = "st,stm32-lptimer-timer"; 1138724ba675SRob Herring status = "disabled"; 1139724ba675SRob Herring }; 1140724ba675SRob Herring }; 1141724ba675SRob Herring 1142724ba675SRob Herring lptimer3: timer@50022000 { 1143724ba675SRob Herring #address-cells = <1>; 1144724ba675SRob Herring #size-cells = <0>; 1145724ba675SRob Herring compatible = "st,stm32-lptimer"; 1146724ba675SRob Herring reg = <0x50022000 0x400>; 1147724ba675SRob Herring interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>; 1148724ba675SRob Herring clocks = <&rcc LPTIM3_K>; 1149724ba675SRob Herring clock-names = "mux"; 1150724ba675SRob Herring wakeup-source; 1151724ba675SRob Herring status = "disabled"; 1152724ba675SRob Herring 1153724ba675SRob Herring pwm { 1154724ba675SRob Herring compatible = "st,stm32-pwm-lp"; 1155724ba675SRob Herring #pwm-cells = <3>; 1156724ba675SRob Herring status = "disabled"; 1157724ba675SRob Herring }; 1158724ba675SRob Herring 1159724ba675SRob Herring trigger@2 { 1160724ba675SRob Herring compatible = "st,stm32-lptimer-trigger"; 1161724ba675SRob Herring reg = <2>; 1162724ba675SRob Herring status = "disabled"; 1163724ba675SRob Herring }; 1164724ba675SRob Herring 1165724ba675SRob Herring timer { 1166724ba675SRob Herring compatible = "st,stm32-lptimer-timer"; 1167724ba675SRob Herring status = "disabled"; 1168724ba675SRob Herring }; 1169724ba675SRob Herring }; 1170724ba675SRob Herring 1171724ba675SRob Herring lptimer4: timer@50023000 { 1172724ba675SRob Herring compatible = "st,stm32-lptimer"; 1173724ba675SRob Herring reg = <0x50023000 0x400>; 1174724ba675SRob Herring interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>; 1175724ba675SRob Herring clocks = <&rcc LPTIM4_K>; 1176724ba675SRob Herring clock-names = "mux"; 1177724ba675SRob Herring wakeup-source; 1178724ba675SRob Herring status = "disabled"; 1179724ba675SRob Herring 1180724ba675SRob Herring pwm { 1181724ba675SRob Herring compatible = "st,stm32-pwm-lp"; 1182724ba675SRob Herring #pwm-cells = <3>; 1183724ba675SRob Herring status = "disabled"; 1184724ba675SRob Herring }; 1185724ba675SRob Herring 1186724ba675SRob Herring timer { 1187724ba675SRob Herring compatible = "st,stm32-lptimer-timer"; 1188724ba675SRob Herring status = "disabled"; 1189724ba675SRob Herring }; 1190724ba675SRob Herring }; 1191724ba675SRob Herring 1192724ba675SRob Herring lptimer5: timer@50024000 { 1193724ba675SRob Herring compatible = "st,stm32-lptimer"; 1194724ba675SRob Herring reg = <0x50024000 0x400>; 1195724ba675SRob Herring interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>; 1196724ba675SRob Herring clocks = <&rcc LPTIM5_K>; 1197724ba675SRob Herring clock-names = "mux"; 1198724ba675SRob Herring wakeup-source; 1199724ba675SRob Herring status = "disabled"; 1200724ba675SRob Herring 1201724ba675SRob Herring pwm { 1202724ba675SRob Herring compatible = "st,stm32-pwm-lp"; 1203724ba675SRob Herring #pwm-cells = <3>; 1204724ba675SRob Herring status = "disabled"; 1205724ba675SRob Herring }; 1206724ba675SRob Herring 1207724ba675SRob Herring timer { 1208724ba675SRob Herring compatible = "st,stm32-lptimer-timer"; 1209724ba675SRob Herring status = "disabled"; 1210724ba675SRob Herring }; 1211724ba675SRob Herring }; 1212724ba675SRob Herring 1213724ba675SRob Herring mdma: dma-controller@58000000 { 1214724ba675SRob Herring compatible = "st,stm32h7-mdma"; 1215724ba675SRob Herring reg = <0x58000000 0x1000>; 1216724ba675SRob Herring interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 1217724ba675SRob Herring clocks = <&rcc MDMA>; 1218724ba675SRob Herring #dma-cells = <5>; 1219724ba675SRob Herring dma-channels = <32>; 1220724ba675SRob Herring dma-requests = <48>; 1221724ba675SRob Herring }; 1222724ba675SRob Herring 1223724ba675SRob Herring fmc: memory-controller@58002000 { 1224724ba675SRob Herring compatible = "st,stm32mp1-fmc2-ebi"; 1225724ba675SRob Herring reg = <0x58002000 0x1000>; 1226724ba675SRob Herring ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ 1227724ba675SRob Herring <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ 1228724ba675SRob Herring <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ 1229724ba675SRob Herring <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ 1230724ba675SRob Herring <4 0 0x80000000 0x10000000>; /* NAND */ 1231724ba675SRob Herring #address-cells = <2>; 1232724ba675SRob Herring #size-cells = <1>; 1233724ba675SRob Herring clocks = <&rcc FMC_K>; 1234724ba675SRob Herring resets = <&rcc FMC_R>; 1235724ba675SRob Herring status = "disabled"; 1236724ba675SRob Herring 1237724ba675SRob Herring nand-controller@4,0 { 1238724ba675SRob Herring compatible = "st,stm32mp1-fmc2-nfc"; 1239724ba675SRob Herring reg = <4 0x00000000 0x1000>, 1240724ba675SRob Herring <4 0x08010000 0x1000>, 1241724ba675SRob Herring <4 0x08020000 0x1000>, 1242724ba675SRob Herring <4 0x01000000 0x1000>, 1243724ba675SRob Herring <4 0x09010000 0x1000>, 1244724ba675SRob Herring <4 0x09020000 0x1000>; 1245724ba675SRob Herring #address-cells = <1>; 1246724ba675SRob Herring #size-cells = <0>; 1247724ba675SRob Herring interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 1248724ba675SRob Herring dmas = <&mdma 24 0x2 0x12000a02 0x0 0x0>, 1249724ba675SRob Herring <&mdma 24 0x2 0x12000a08 0x0 0x0>, 1250724ba675SRob Herring <&mdma 25 0x2 0x12000a0a 0x0 0x0>; 1251724ba675SRob Herring dma-names = "tx", "rx", "ecc"; 1252724ba675SRob Herring status = "disabled"; 1253724ba675SRob Herring }; 1254724ba675SRob Herring }; 1255724ba675SRob Herring 1256724ba675SRob Herring qspi: spi@58003000 { 1257724ba675SRob Herring compatible = "st,stm32f469-qspi"; 1258724ba675SRob Herring reg = <0x58003000 0x1000>, <0x70000000 0x10000000>; 1259724ba675SRob Herring reg-names = "qspi", "qspi_mm"; 1260724ba675SRob Herring #address-cells = <1>; 1261724ba675SRob Herring #size-cells = <0>; 1262724ba675SRob Herring interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 1263724ba675SRob Herring dmas = <&mdma 26 0x2 0x10100002 0x0 0x0>, 1264724ba675SRob Herring <&mdma 26 0x2 0x10100008 0x0 0x0>; 1265724ba675SRob Herring dma-names = "tx", "rx"; 1266724ba675SRob Herring clocks = <&rcc QSPI_K>; 1267724ba675SRob Herring resets = <&rcc QSPI_R>; 1268724ba675SRob Herring status = "disabled"; 1269724ba675SRob Herring }; 1270724ba675SRob Herring 1271724ba675SRob Herring sdmmc1: mmc@58005000 { 1272724ba675SRob Herring compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; 1273724ba675SRob Herring arm,primecell-periphid = <0x20253180>; 1274724ba675SRob Herring reg = <0x58005000 0x1000>, <0x58006000 0x1000>; 1275724ba675SRob Herring interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 1276724ba675SRob Herring clocks = <&rcc SDMMC1_K>; 1277724ba675SRob Herring clock-names = "apb_pclk"; 1278724ba675SRob Herring resets = <&rcc SDMMC1_R>; 1279724ba675SRob Herring cap-sd-highspeed; 1280724ba675SRob Herring cap-mmc-highspeed; 1281724ba675SRob Herring max-frequency = <130000000>; 1282724ba675SRob Herring status = "disabled"; 1283724ba675SRob Herring }; 1284724ba675SRob Herring 1285724ba675SRob Herring sdmmc2: mmc@58007000 { 1286724ba675SRob Herring compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; 1287724ba675SRob Herring arm,primecell-periphid = <0x20253180>; 1288724ba675SRob Herring reg = <0x58007000 0x1000>, <0x58008000 0x1000>; 1289724ba675SRob Herring interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1290724ba675SRob Herring clocks = <&rcc SDMMC2_K>; 1291724ba675SRob Herring clock-names = "apb_pclk"; 1292724ba675SRob Herring resets = <&rcc SDMMC2_R>; 1293724ba675SRob Herring cap-sd-highspeed; 1294724ba675SRob Herring cap-mmc-highspeed; 1295724ba675SRob Herring max-frequency = <130000000>; 1296724ba675SRob Herring status = "disabled"; 1297724ba675SRob Herring }; 1298724ba675SRob Herring 1299724ba675SRob Herring usbh_ohci: usb@5800c000 { 1300724ba675SRob Herring compatible = "generic-ohci"; 1301724ba675SRob Herring reg = <0x5800c000 0x1000>; 1302724ba675SRob Herring clocks = <&usbphyc>, <&rcc USBH>; 1303724ba675SRob Herring resets = <&rcc USBH_R>; 1304724ba675SRob Herring interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 1305724ba675SRob Herring status = "disabled"; 1306724ba675SRob Herring }; 1307724ba675SRob Herring 1308724ba675SRob Herring usbh_ehci: usb@5800d000 { 1309724ba675SRob Herring compatible = "generic-ehci"; 1310724ba675SRob Herring reg = <0x5800d000 0x1000>; 1311724ba675SRob Herring clocks = <&usbphyc>, <&rcc USBH>; 1312724ba675SRob Herring resets = <&rcc USBH_R>; 1313724ba675SRob Herring interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 1314724ba675SRob Herring companion = <&usbh_ohci>; 1315724ba675SRob Herring status = "disabled"; 1316724ba675SRob Herring }; 1317724ba675SRob Herring 1318724ba675SRob Herring iwdg2: watchdog@5a002000 { 1319724ba675SRob Herring compatible = "st,stm32mp1-iwdg"; 1320724ba675SRob Herring reg = <0x5a002000 0x400>; 1321724ba675SRob Herring clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>; 1322724ba675SRob Herring clock-names = "pclk", "lsi"; 1323724ba675SRob Herring status = "disabled"; 1324724ba675SRob Herring }; 1325724ba675SRob Herring 1326724ba675SRob Herring usbphyc: usbphyc@5a006000 { 1327724ba675SRob Herring #address-cells = <1>; 1328724ba675SRob Herring #size-cells = <0>; 1329724ba675SRob Herring #clock-cells = <0>; 1330724ba675SRob Herring compatible = "st,stm32mp1-usbphyc"; 1331724ba675SRob Herring reg = <0x5a006000 0x1000>; 1332724ba675SRob Herring clocks = <&rcc USBPHY_K>; 1333724ba675SRob Herring resets = <&rcc USBPHY_R>; 1334*fb266d2dSEtienne Carriere vdda1v1-supply = <&scmi_reg11>; 1335*fb266d2dSEtienne Carriere vdda1v8-supply = <&scmi_reg18>; 1336724ba675SRob Herring status = "disabled"; 1337724ba675SRob Herring 1338724ba675SRob Herring usbphyc_port0: usb-phy@0 { 1339724ba675SRob Herring #phy-cells = <0>; 1340724ba675SRob Herring reg = <0>; 1341724ba675SRob Herring }; 1342724ba675SRob Herring 1343724ba675SRob Herring usbphyc_port1: usb-phy@1 { 1344724ba675SRob Herring #phy-cells = <1>; 1345724ba675SRob Herring reg = <1>; 1346724ba675SRob Herring }; 1347724ba675SRob Herring }; 1348724ba675SRob Herring 1349724ba675SRob Herring rtc: rtc@5c004000 { 1350724ba675SRob Herring compatible = "st,stm32mp1-rtc"; 1351724ba675SRob Herring reg = <0x5c004000 0x400>; 1352724ba675SRob Herring interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>; 1353724ba675SRob Herring clocks = <&scmi_clk CK_SCMI_RTCAPB>, 1354724ba675SRob Herring <&scmi_clk CK_SCMI_RTC>; 1355724ba675SRob Herring clock-names = "pclk", "rtc_ck"; 1356724ba675SRob Herring status = "disabled"; 1357724ba675SRob Herring }; 1358724ba675SRob Herring 1359724ba675SRob Herring bsec: efuse@5c005000 { 1360724ba675SRob Herring compatible = "st,stm32mp13-bsec"; 1361724ba675SRob Herring reg = <0x5c005000 0x400>; 1362724ba675SRob Herring #address-cells = <1>; 1363724ba675SRob Herring #size-cells = <1>; 1364724ba675SRob Herring 1365724ba675SRob Herring part_number_otp: part_number_otp@4 { 1366724ba675SRob Herring reg = <0x4 0x2>; 1367724ba675SRob Herring bits = <0 12>; 1368724ba675SRob Herring }; 1369724ba675SRob Herring ts_cal1: calib@5c { 1370724ba675SRob Herring reg = <0x5c 0x2>; 1371724ba675SRob Herring }; 1372724ba675SRob Herring ts_cal2: calib@5e { 1373724ba675SRob Herring reg = <0x5e 0x2>; 1374724ba675SRob Herring }; 1375724ba675SRob Herring }; 1376724ba675SRob Herring 1377724ba675SRob Herring /* 1378724ba675SRob Herring * Break node order to solve dependency probe issue between 1379724ba675SRob Herring * pinctrl and exti. 1380724ba675SRob Herring */ 1381724ba675SRob Herring pinctrl: pinctrl@50002000 { 1382724ba675SRob Herring #address-cells = <1>; 1383724ba675SRob Herring #size-cells = <1>; 1384724ba675SRob Herring compatible = "st,stm32mp135-pinctrl"; 1385724ba675SRob Herring ranges = <0 0x50002000 0x8400>; 1386724ba675SRob Herring interrupt-parent = <&exti>; 1387724ba675SRob Herring st,syscfg = <&exti 0x60 0xff>; 1388724ba675SRob Herring 1389724ba675SRob Herring gpioa: gpio@50002000 { 1390724ba675SRob Herring gpio-controller; 1391724ba675SRob Herring #gpio-cells = <2>; 1392724ba675SRob Herring interrupt-controller; 1393724ba675SRob Herring #interrupt-cells = <2>; 1394724ba675SRob Herring reg = <0x0 0x400>; 1395724ba675SRob Herring clocks = <&rcc GPIOA>; 1396724ba675SRob Herring st,bank-name = "GPIOA"; 1397724ba675SRob Herring ngpios = <16>; 1398724ba675SRob Herring gpio-ranges = <&pinctrl 0 0 16>; 1399724ba675SRob Herring }; 1400724ba675SRob Herring 1401724ba675SRob Herring gpiob: gpio@50003000 { 1402724ba675SRob Herring gpio-controller; 1403724ba675SRob Herring #gpio-cells = <2>; 1404724ba675SRob Herring interrupt-controller; 1405724ba675SRob Herring #interrupt-cells = <2>; 1406724ba675SRob Herring reg = <0x1000 0x400>; 1407724ba675SRob Herring clocks = <&rcc GPIOB>; 1408724ba675SRob Herring st,bank-name = "GPIOB"; 1409724ba675SRob Herring ngpios = <16>; 1410724ba675SRob Herring gpio-ranges = <&pinctrl 0 16 16>; 1411724ba675SRob Herring }; 1412724ba675SRob Herring 1413724ba675SRob Herring gpioc: gpio@50004000 { 1414724ba675SRob Herring gpio-controller; 1415724ba675SRob Herring #gpio-cells = <2>; 1416724ba675SRob Herring interrupt-controller; 1417724ba675SRob Herring #interrupt-cells = <2>; 1418724ba675SRob Herring reg = <0x2000 0x400>; 1419724ba675SRob Herring clocks = <&rcc GPIOC>; 1420724ba675SRob Herring st,bank-name = "GPIOC"; 1421724ba675SRob Herring ngpios = <16>; 1422724ba675SRob Herring gpio-ranges = <&pinctrl 0 32 16>; 1423724ba675SRob Herring }; 1424724ba675SRob Herring 1425724ba675SRob Herring gpiod: gpio@50005000 { 1426724ba675SRob Herring gpio-controller; 1427724ba675SRob Herring #gpio-cells = <2>; 1428724ba675SRob Herring interrupt-controller; 1429724ba675SRob Herring #interrupt-cells = <2>; 1430724ba675SRob Herring reg = <0x3000 0x400>; 1431724ba675SRob Herring clocks = <&rcc GPIOD>; 1432724ba675SRob Herring st,bank-name = "GPIOD"; 1433724ba675SRob Herring ngpios = <16>; 1434724ba675SRob Herring gpio-ranges = <&pinctrl 0 48 16>; 1435724ba675SRob Herring }; 1436724ba675SRob Herring 1437724ba675SRob Herring gpioe: gpio@50006000 { 1438724ba675SRob Herring gpio-controller; 1439724ba675SRob Herring #gpio-cells = <2>; 1440724ba675SRob Herring interrupt-controller; 1441724ba675SRob Herring #interrupt-cells = <2>; 1442724ba675SRob Herring reg = <0x4000 0x400>; 1443724ba675SRob Herring clocks = <&rcc GPIOE>; 1444724ba675SRob Herring st,bank-name = "GPIOE"; 1445724ba675SRob Herring ngpios = <16>; 1446724ba675SRob Herring gpio-ranges = <&pinctrl 0 64 16>; 1447724ba675SRob Herring }; 1448724ba675SRob Herring 1449724ba675SRob Herring gpiof: gpio@50007000 { 1450724ba675SRob Herring gpio-controller; 1451724ba675SRob Herring #gpio-cells = <2>; 1452724ba675SRob Herring interrupt-controller; 1453724ba675SRob Herring #interrupt-cells = <2>; 1454724ba675SRob Herring reg = <0x5000 0x400>; 1455724ba675SRob Herring clocks = <&rcc GPIOF>; 1456724ba675SRob Herring st,bank-name = "GPIOF"; 1457724ba675SRob Herring ngpios = <16>; 1458724ba675SRob Herring gpio-ranges = <&pinctrl 0 80 16>; 1459724ba675SRob Herring }; 1460724ba675SRob Herring 1461724ba675SRob Herring gpiog: gpio@50008000 { 1462724ba675SRob Herring gpio-controller; 1463724ba675SRob Herring #gpio-cells = <2>; 1464724ba675SRob Herring interrupt-controller; 1465724ba675SRob Herring #interrupt-cells = <2>; 1466724ba675SRob Herring reg = <0x6000 0x400>; 1467724ba675SRob Herring clocks = <&rcc GPIOG>; 1468724ba675SRob Herring st,bank-name = "GPIOG"; 1469724ba675SRob Herring ngpios = <16>; 1470724ba675SRob Herring gpio-ranges = <&pinctrl 0 96 16>; 1471724ba675SRob Herring }; 1472724ba675SRob Herring 1473724ba675SRob Herring gpioh: gpio@50009000 { 1474724ba675SRob Herring gpio-controller; 1475724ba675SRob Herring #gpio-cells = <2>; 1476724ba675SRob Herring interrupt-controller; 1477724ba675SRob Herring #interrupt-cells = <2>; 1478724ba675SRob Herring reg = <0x7000 0x400>; 1479724ba675SRob Herring clocks = <&rcc GPIOH>; 1480724ba675SRob Herring st,bank-name = "GPIOH"; 1481724ba675SRob Herring ngpios = <15>; 1482724ba675SRob Herring gpio-ranges = <&pinctrl 0 112 15>; 1483724ba675SRob Herring }; 1484724ba675SRob Herring 1485724ba675SRob Herring gpioi: gpio@5000a000 { 1486724ba675SRob Herring gpio-controller; 1487724ba675SRob Herring #gpio-cells = <2>; 1488724ba675SRob Herring interrupt-controller; 1489724ba675SRob Herring #interrupt-cells = <2>; 1490724ba675SRob Herring reg = <0x8000 0x400>; 1491724ba675SRob Herring clocks = <&rcc GPIOI>; 1492724ba675SRob Herring st,bank-name = "GPIOI"; 1493724ba675SRob Herring ngpios = <8>; 1494724ba675SRob Herring gpio-ranges = <&pinctrl 0 128 8>; 1495724ba675SRob Herring }; 1496724ba675SRob Herring }; 1497724ba675SRob Herring }; 1498724ba675SRob Herring}; 1499