1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright (C) 2014 STMicroelectronics Limited. 4*724ba675SRob Herring * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 5*724ba675SRob Herring */ 6*724ba675SRob Herring#include "st-pincfg.h" 7*724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h> 8*724ba675SRob Herring/ { 9*724ba675SRob Herring 10*724ba675SRob Herring aliases { 11*724ba675SRob Herring /* 0-5: PIO_SBC */ 12*724ba675SRob Herring gpio0 = &pio0; 13*724ba675SRob Herring gpio1 = &pio1; 14*724ba675SRob Herring gpio2 = &pio2; 15*724ba675SRob Herring gpio3 = &pio3; 16*724ba675SRob Herring gpio4 = &pio4; 17*724ba675SRob Herring gpio5 = &pio5; 18*724ba675SRob Herring /* 10-19: PIO_FRONT0 */ 19*724ba675SRob Herring gpio6 = &pio10; 20*724ba675SRob Herring gpio7 = &pio11; 21*724ba675SRob Herring gpio8 = &pio12; 22*724ba675SRob Herring gpio9 = &pio13; 23*724ba675SRob Herring gpio10 = &pio14; 24*724ba675SRob Herring gpio11 = &pio15; 25*724ba675SRob Herring gpio12 = &pio16; 26*724ba675SRob Herring gpio13 = &pio17; 27*724ba675SRob Herring gpio14 = &pio18; 28*724ba675SRob Herring gpio15 = &pio19; 29*724ba675SRob Herring /* 20: PIO_FRONT1 */ 30*724ba675SRob Herring gpio16 = &pio20; 31*724ba675SRob Herring /* 30-35: PIO_REAR */ 32*724ba675SRob Herring gpio17 = &pio30; 33*724ba675SRob Herring gpio18 = &pio31; 34*724ba675SRob Herring gpio19 = &pio32; 35*724ba675SRob Herring gpio20 = &pio33; 36*724ba675SRob Herring gpio21 = &pio34; 37*724ba675SRob Herring gpio22 = &pio35; 38*724ba675SRob Herring /* 40-42: PIO_FLASH */ 39*724ba675SRob Herring gpio23 = &pio40; 40*724ba675SRob Herring gpio24 = &pio41; 41*724ba675SRob Herring gpio25 = &pio42; 42*724ba675SRob Herring }; 43*724ba675SRob Herring 44*724ba675SRob Herring soc { 45*724ba675SRob Herring pin-controller-sbc@961f080 { 46*724ba675SRob Herring #address-cells = <1>; 47*724ba675SRob Herring #size-cells = <1>; 48*724ba675SRob Herring compatible = "st,stih407-sbc-pinctrl"; 49*724ba675SRob Herring st,syscfg = <&syscfg_sbc>; 50*724ba675SRob Herring reg = <0x0961f080 0x4>; 51*724ba675SRob Herring reg-names = "irqmux"; 52*724ba675SRob Herring interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 53*724ba675SRob Herring interrupt-names = "irqmux"; 54*724ba675SRob Herring ranges = <0 0x09610000 0x6000>; 55*724ba675SRob Herring 56*724ba675SRob Herring pio0: gpio@9610000 { 57*724ba675SRob Herring gpio-controller; 58*724ba675SRob Herring #gpio-cells = <2>; 59*724ba675SRob Herring interrupt-controller; 60*724ba675SRob Herring #interrupt-cells = <2>; 61*724ba675SRob Herring reg = <0x0 0x100>; 62*724ba675SRob Herring st,bank-name = "PIO0"; 63*724ba675SRob Herring }; 64*724ba675SRob Herring pio1: gpio@9611000 { 65*724ba675SRob Herring gpio-controller; 66*724ba675SRob Herring #gpio-cells = <2>; 67*724ba675SRob Herring interrupt-controller; 68*724ba675SRob Herring #interrupt-cells = <2>; 69*724ba675SRob Herring reg = <0x1000 0x100>; 70*724ba675SRob Herring st,bank-name = "PIO1"; 71*724ba675SRob Herring }; 72*724ba675SRob Herring pio2: gpio@9612000 { 73*724ba675SRob Herring gpio-controller; 74*724ba675SRob Herring #gpio-cells = <2>; 75*724ba675SRob Herring interrupt-controller; 76*724ba675SRob Herring #interrupt-cells = <2>; 77*724ba675SRob Herring reg = <0x2000 0x100>; 78*724ba675SRob Herring st,bank-name = "PIO2"; 79*724ba675SRob Herring }; 80*724ba675SRob Herring pio3: gpio@9613000 { 81*724ba675SRob Herring gpio-controller; 82*724ba675SRob Herring #gpio-cells = <2>; 83*724ba675SRob Herring interrupt-controller; 84*724ba675SRob Herring #interrupt-cells = <2>; 85*724ba675SRob Herring reg = <0x3000 0x100>; 86*724ba675SRob Herring st,bank-name = "PIO3"; 87*724ba675SRob Herring }; 88*724ba675SRob Herring pio4: gpio@9614000 { 89*724ba675SRob Herring gpio-controller; 90*724ba675SRob Herring #gpio-cells = <2>; 91*724ba675SRob Herring interrupt-controller; 92*724ba675SRob Herring #interrupt-cells = <2>; 93*724ba675SRob Herring reg = <0x4000 0x100>; 94*724ba675SRob Herring st,bank-name = "PIO4"; 95*724ba675SRob Herring }; 96*724ba675SRob Herring 97*724ba675SRob Herring pio5: gpio@9615000 { 98*724ba675SRob Herring gpio-controller; 99*724ba675SRob Herring #gpio-cells = <2>; 100*724ba675SRob Herring interrupt-controller; 101*724ba675SRob Herring #interrupt-cells = <2>; 102*724ba675SRob Herring reg = <0x5000 0x100>; 103*724ba675SRob Herring st,bank-name = "PIO5"; 104*724ba675SRob Herring st,retime-pin-mask = <0x3f>; 105*724ba675SRob Herring }; 106*724ba675SRob Herring 107*724ba675SRob Herring cec0 { 108*724ba675SRob Herring pinctrl_cec0_default: cec0-default { 109*724ba675SRob Herring st,pins { 110*724ba675SRob Herring hdmi_cec = <&pio2 4 ALT1 BIDIR>; 111*724ba675SRob Herring }; 112*724ba675SRob Herring }; 113*724ba675SRob Herring }; 114*724ba675SRob Herring 115*724ba675SRob Herring rc { 116*724ba675SRob Herring pinctrl_ir: ir0 { 117*724ba675SRob Herring st,pins { 118*724ba675SRob Herring ir = <&pio4 0 ALT2 IN>; 119*724ba675SRob Herring }; 120*724ba675SRob Herring }; 121*724ba675SRob Herring 122*724ba675SRob Herring pinctrl_uhf: uhf0 { 123*724ba675SRob Herring st,pins { 124*724ba675SRob Herring ir = <&pio4 1 ALT2 IN>; 125*724ba675SRob Herring }; 126*724ba675SRob Herring }; 127*724ba675SRob Herring 128*724ba675SRob Herring pinctrl_tx: tx0 { 129*724ba675SRob Herring st,pins { 130*724ba675SRob Herring tx = <&pio4 2 ALT2 OUT>; 131*724ba675SRob Herring }; 132*724ba675SRob Herring }; 133*724ba675SRob Herring 134*724ba675SRob Herring pinctrl_tx_od: tx_od0 { 135*724ba675SRob Herring st,pins { 136*724ba675SRob Herring tx_od = <&pio4 3 ALT2 OUT>; 137*724ba675SRob Herring }; 138*724ba675SRob Herring }; 139*724ba675SRob Herring }; 140*724ba675SRob Herring 141*724ba675SRob Herring /* SBC_ASC0 - UART10 */ 142*724ba675SRob Herring sbc_serial0 { 143*724ba675SRob Herring pinctrl_sbc_serial0: sbc_serial0-0 { 144*724ba675SRob Herring st,pins { 145*724ba675SRob Herring tx = <&pio3 4 ALT1 OUT>; 146*724ba675SRob Herring rx = <&pio3 5 ALT1 IN>; 147*724ba675SRob Herring }; 148*724ba675SRob Herring }; 149*724ba675SRob Herring }; 150*724ba675SRob Herring /* SBC_ASC1 - UART11 */ 151*724ba675SRob Herring sbc_serial1 { 152*724ba675SRob Herring pinctrl_sbc_serial1: sbc_serial1-0 { 153*724ba675SRob Herring st,pins { 154*724ba675SRob Herring tx = <&pio2 6 ALT3 OUT>; 155*724ba675SRob Herring rx = <&pio2 7 ALT3 IN>; 156*724ba675SRob Herring }; 157*724ba675SRob Herring }; 158*724ba675SRob Herring }; 159*724ba675SRob Herring 160*724ba675SRob Herring i2c10 { 161*724ba675SRob Herring pinctrl_i2c10_default: i2c10-default { 162*724ba675SRob Herring st,pins { 163*724ba675SRob Herring sda = <&pio4 6 ALT1 BIDIR>; 164*724ba675SRob Herring scl = <&pio4 5 ALT1 BIDIR>; 165*724ba675SRob Herring }; 166*724ba675SRob Herring }; 167*724ba675SRob Herring }; 168*724ba675SRob Herring 169*724ba675SRob Herring i2c11 { 170*724ba675SRob Herring pinctrl_i2c11_default: i2c11-default { 171*724ba675SRob Herring st,pins { 172*724ba675SRob Herring sda = <&pio5 1 ALT1 BIDIR>; 173*724ba675SRob Herring scl = <&pio5 0 ALT1 BIDIR>; 174*724ba675SRob Herring }; 175*724ba675SRob Herring }; 176*724ba675SRob Herring }; 177*724ba675SRob Herring 178*724ba675SRob Herring keyscan { 179*724ba675SRob Herring pinctrl_keyscan: keyscan { 180*724ba675SRob Herring st,pins { 181*724ba675SRob Herring keyin0 = <&pio4 0 ALT6 IN>; 182*724ba675SRob Herring keyin1 = <&pio4 5 ALT4 IN>; 183*724ba675SRob Herring keyin2 = <&pio0 4 ALT2 IN>; 184*724ba675SRob Herring keyin3 = <&pio2 6 ALT2 IN>; 185*724ba675SRob Herring 186*724ba675SRob Herring keyout0 = <&pio4 6 ALT4 OUT>; 187*724ba675SRob Herring keyout1 = <&pio1 7 ALT2 OUT>; 188*724ba675SRob Herring keyout2 = <&pio0 6 ALT2 OUT>; 189*724ba675SRob Herring keyout3 = <&pio2 7 ALT2 OUT>; 190*724ba675SRob Herring }; 191*724ba675SRob Herring }; 192*724ba675SRob Herring }; 193*724ba675SRob Herring 194*724ba675SRob Herring gmac1 { 195*724ba675SRob Herring /* 196*724ba675SRob Herring * Almost all the boards based on STiH407 SoC have an embedded 197*724ba675SRob Herring * switch where the mdio/mdc have been used for managing the SMI 198*724ba675SRob Herring * iface via I2C. For this reason these lines can be allocated 199*724ba675SRob Herring * by using dedicated configuration (in case of there will be a 200*724ba675SRob Herring * standard PHY transceiver on-board). 201*724ba675SRob Herring */ 202*724ba675SRob Herring pinctrl_rgmii1: rgmii1-0 { 203*724ba675SRob Herring st,pins { 204*724ba675SRob Herring 205*724ba675SRob Herring txd0 = <&pio0 0 ALT1 OUT DE_IO 0 CLK_A>; 206*724ba675SRob Herring txd1 = <&pio0 1 ALT1 OUT DE_IO 0 CLK_A>; 207*724ba675SRob Herring txd2 = <&pio0 2 ALT1 OUT DE_IO 0 CLK_A>; 208*724ba675SRob Herring txd3 = <&pio0 3 ALT1 OUT DE_IO 0 CLK_A>; 209*724ba675SRob Herring txen = <&pio0 5 ALT1 OUT DE_IO 0 CLK_A>; 210*724ba675SRob Herring txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>; 211*724ba675SRob Herring rxd0 = <&pio1 4 ALT1 IN DE_IO 0 CLK_A>; 212*724ba675SRob Herring rxd1 = <&pio1 5 ALT1 IN DE_IO 0 CLK_A>; 213*724ba675SRob Herring rxd2 = <&pio1 6 ALT1 IN DE_IO 0 CLK_A>; 214*724ba675SRob Herring rxd3 = <&pio1 7 ALT1 IN DE_IO 0 CLK_A>; 215*724ba675SRob Herring rxdv = <&pio2 0 ALT1 IN DE_IO 0 CLK_A>; 216*724ba675SRob Herring rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>; 217*724ba675SRob Herring clk125 = <&pio3 7 ALT4 IN NICLK 0 CLK_A>; 218*724ba675SRob Herring phyclk = <&pio2 3 ALT4 OUT NICLK 1250 CLK_B>; 219*724ba675SRob Herring }; 220*724ba675SRob Herring }; 221*724ba675SRob Herring 222*724ba675SRob Herring pinctrl_rgmii1_mdio: rgmii1-mdio { 223*724ba675SRob Herring st,pins { 224*724ba675SRob Herring mdio = <&pio1 0 ALT1 OUT BYPASS 0>; 225*724ba675SRob Herring mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>; 226*724ba675SRob Herring mdint = <&pio1 3 ALT1 IN BYPASS 0>; 227*724ba675SRob Herring }; 228*724ba675SRob Herring }; 229*724ba675SRob Herring 230*724ba675SRob Herring pinctrl_rgmii1_mdio_1: rgmii1-mdio-1 { 231*724ba675SRob Herring st,pins { 232*724ba675SRob Herring mdio = <&pio1 0 ALT1 OUT BYPASS 0>; 233*724ba675SRob Herring mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>; 234*724ba675SRob Herring }; 235*724ba675SRob Herring }; 236*724ba675SRob Herring 237*724ba675SRob Herring pinctrl_mii1: mii1 { 238*724ba675SRob Herring st,pins { 239*724ba675SRob Herring txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 240*724ba675SRob Herring txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 241*724ba675SRob Herring txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 242*724ba675SRob Herring txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 243*724ba675SRob Herring txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 244*724ba675SRob Herring txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 245*724ba675SRob Herring txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>; 246*724ba675SRob Herring col = <&pio0 7 ALT1 IN BYPASS 1000>; 247*724ba675SRob Herring 248*724ba675SRob Herring mdio = <&pio1 0 ALT1 OUT BYPASS 1500>; 249*724ba675SRob Herring mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>; 250*724ba675SRob Herring crs = <&pio1 2 ALT1 IN BYPASS 1000>; 251*724ba675SRob Herring mdint = <&pio1 3 ALT1 IN BYPASS 0>; 252*724ba675SRob Herring rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; 253*724ba675SRob Herring rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>; 254*724ba675SRob Herring rxd2 = <&pio1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>; 255*724ba675SRob Herring rxd3 = <&pio1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>; 256*724ba675SRob Herring 257*724ba675SRob Herring rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; 258*724ba675SRob Herring rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; 259*724ba675SRob Herring rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>; 260*724ba675SRob Herring phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>; 261*724ba675SRob Herring }; 262*724ba675SRob Herring }; 263*724ba675SRob Herring 264*724ba675SRob Herring pinctrl_rmii1: rmii1-0 { 265*724ba675SRob Herring st,pins { 266*724ba675SRob Herring txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 267*724ba675SRob Herring txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 268*724ba675SRob Herring txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 269*724ba675SRob Herring mdio = <&pio1 0 ALT1 OUT BYPASS 0>; 270*724ba675SRob Herring mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>; 271*724ba675SRob Herring mdint = <&pio1 3 ALT1 IN BYPASS 0>; 272*724ba675SRob Herring rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_B>; 273*724ba675SRob Herring rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_B>; 274*724ba675SRob Herring rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_B>; 275*724ba675SRob Herring rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; 276*724ba675SRob Herring }; 277*724ba675SRob Herring }; 278*724ba675SRob Herring 279*724ba675SRob Herring pinctrl_rmii1_phyclk: rmii1_phyclk { 280*724ba675SRob Herring st,pins { 281*724ba675SRob Herring phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>; 282*724ba675SRob Herring }; 283*724ba675SRob Herring }; 284*724ba675SRob Herring 285*724ba675SRob Herring pinctrl_rmii1_phyclk_ext: rmii1_phyclk_ext { 286*724ba675SRob Herring st,pins { 287*724ba675SRob Herring phyclk = <&pio2 3 ALT2 IN NICLK 0 CLK_A>; 288*724ba675SRob Herring }; 289*724ba675SRob Herring }; 290*724ba675SRob Herring }; 291*724ba675SRob Herring 292*724ba675SRob Herring pwm1 { 293*724ba675SRob Herring pinctrl_pwm1_chan0_default: pwm1-0-default { 294*724ba675SRob Herring st,pins { 295*724ba675SRob Herring pwm-out = <&pio3 0 ALT1 OUT>; 296*724ba675SRob Herring pwm-capturein = <&pio3 2 ALT1 IN>; 297*724ba675SRob Herring }; 298*724ba675SRob Herring }; 299*724ba675SRob Herring pinctrl_pwm1_chan1_default: pwm1-1-default { 300*724ba675SRob Herring st,pins { 301*724ba675SRob Herring pwm-capturein = <&pio4 3 ALT1 IN>; 302*724ba675SRob Herring pwm-out = <&pio4 4 ALT1 OUT>; 303*724ba675SRob Herring }; 304*724ba675SRob Herring }; 305*724ba675SRob Herring pinctrl_pwm1_chan2_default: pwm1-2-default { 306*724ba675SRob Herring st,pins { 307*724ba675SRob Herring pwm-out = <&pio4 6 ALT3 OUT>; 308*724ba675SRob Herring }; 309*724ba675SRob Herring }; 310*724ba675SRob Herring pinctrl_pwm1_chan3_default: pwm1-3-default { 311*724ba675SRob Herring st,pins { 312*724ba675SRob Herring pwm-out = <&pio4 7 ALT3 OUT>; 313*724ba675SRob Herring }; 314*724ba675SRob Herring }; 315*724ba675SRob Herring }; 316*724ba675SRob Herring 317*724ba675SRob Herring spi10 { 318*724ba675SRob Herring pinctrl_spi10_default: spi10-4w-alt1-0 { 319*724ba675SRob Herring st,pins { 320*724ba675SRob Herring mtsr = <&pio4 6 ALT1 OUT>; 321*724ba675SRob Herring mrst = <&pio4 7 ALT1 IN>; 322*724ba675SRob Herring scl = <&pio4 5 ALT1 OUT>; 323*724ba675SRob Herring }; 324*724ba675SRob Herring }; 325*724ba675SRob Herring 326*724ba675SRob Herring pinctrl_spi10_3w_alt1_0: spi10-3w-alt1-0 { 327*724ba675SRob Herring st,pins { 328*724ba675SRob Herring mtsr = <&pio4 6 ALT1 BIDIR_PU>; 329*724ba675SRob Herring scl = <&pio4 5 ALT1 OUT>; 330*724ba675SRob Herring }; 331*724ba675SRob Herring }; 332*724ba675SRob Herring }; 333*724ba675SRob Herring 334*724ba675SRob Herring spi11 { 335*724ba675SRob Herring pinctrl_spi11_default: spi11-4w-alt2-0 { 336*724ba675SRob Herring st,pins { 337*724ba675SRob Herring mtsr = <&pio3 1 ALT2 OUT>; 338*724ba675SRob Herring mrst = <&pio3 0 ALT2 IN>; 339*724ba675SRob Herring scl = <&pio3 2 ALT2 OUT>; 340*724ba675SRob Herring }; 341*724ba675SRob Herring }; 342*724ba675SRob Herring 343*724ba675SRob Herring pinctrl_spi11_3w_alt2_0: spi11-3w-alt2-0 { 344*724ba675SRob Herring st,pins { 345*724ba675SRob Herring mtsr = <&pio3 1 ALT2 BIDIR_PU>; 346*724ba675SRob Herring scl = <&pio3 2 ALT2 OUT>; 347*724ba675SRob Herring }; 348*724ba675SRob Herring }; 349*724ba675SRob Herring }; 350*724ba675SRob Herring 351*724ba675SRob Herring spi12 { 352*724ba675SRob Herring pinctrl_spi12_default: spi12-4w-alt2-0 { 353*724ba675SRob Herring st,pins { 354*724ba675SRob Herring mtsr = <&pio3 6 ALT2 OUT>; 355*724ba675SRob Herring mrst = <&pio3 4 ALT2 IN>; 356*724ba675SRob Herring scl = <&pio3 7 ALT2 OUT>; 357*724ba675SRob Herring }; 358*724ba675SRob Herring }; 359*724ba675SRob Herring 360*724ba675SRob Herring pinctrl_spi12_3w_alt2_0: spi12-3w-alt2-0 { 361*724ba675SRob Herring st,pins { 362*724ba675SRob Herring mtsr = <&pio3 6 ALT2 BIDIR_PU>; 363*724ba675SRob Herring scl = <&pio3 7 ALT2 OUT>; 364*724ba675SRob Herring }; 365*724ba675SRob Herring }; 366*724ba675SRob Herring }; 367*724ba675SRob Herring }; 368*724ba675SRob Herring 369*724ba675SRob Herring pin-controller-front0@920f080 { 370*724ba675SRob Herring #address-cells = <1>; 371*724ba675SRob Herring #size-cells = <1>; 372*724ba675SRob Herring compatible = "st,stih407-front-pinctrl"; 373*724ba675SRob Herring st,syscfg = <&syscfg_front>; 374*724ba675SRob Herring reg = <0x0920f080 0x4>; 375*724ba675SRob Herring reg-names = "irqmux"; 376*724ba675SRob Herring interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 377*724ba675SRob Herring interrupt-names = "irqmux"; 378*724ba675SRob Herring ranges = <0 0x09200000 0x10000>; 379*724ba675SRob Herring 380*724ba675SRob Herring pio10: pio@9200000 { 381*724ba675SRob Herring gpio-controller; 382*724ba675SRob Herring #gpio-cells = <2>; 383*724ba675SRob Herring interrupt-controller; 384*724ba675SRob Herring #interrupt-cells = <2>; 385*724ba675SRob Herring reg = <0x0 0x100>; 386*724ba675SRob Herring st,bank-name = "PIO10"; 387*724ba675SRob Herring }; 388*724ba675SRob Herring pio11: pio@9201000 { 389*724ba675SRob Herring gpio-controller; 390*724ba675SRob Herring #gpio-cells = <2>; 391*724ba675SRob Herring interrupt-controller; 392*724ba675SRob Herring #interrupt-cells = <2>; 393*724ba675SRob Herring reg = <0x1000 0x100>; 394*724ba675SRob Herring st,bank-name = "PIO11"; 395*724ba675SRob Herring }; 396*724ba675SRob Herring pio12: pio@9202000 { 397*724ba675SRob Herring gpio-controller; 398*724ba675SRob Herring #gpio-cells = <2>; 399*724ba675SRob Herring interrupt-controller; 400*724ba675SRob Herring #interrupt-cells = <2>; 401*724ba675SRob Herring reg = <0x2000 0x100>; 402*724ba675SRob Herring st,bank-name = "PIO12"; 403*724ba675SRob Herring }; 404*724ba675SRob Herring pio13: pio@9203000 { 405*724ba675SRob Herring gpio-controller; 406*724ba675SRob Herring #gpio-cells = <2>; 407*724ba675SRob Herring interrupt-controller; 408*724ba675SRob Herring #interrupt-cells = <2>; 409*724ba675SRob Herring reg = <0x3000 0x100>; 410*724ba675SRob Herring st,bank-name = "PIO13"; 411*724ba675SRob Herring }; 412*724ba675SRob Herring pio14: pio@9204000 { 413*724ba675SRob Herring gpio-controller; 414*724ba675SRob Herring #gpio-cells = <2>; 415*724ba675SRob Herring interrupt-controller; 416*724ba675SRob Herring #interrupt-cells = <2>; 417*724ba675SRob Herring reg = <0x4000 0x100>; 418*724ba675SRob Herring st,bank-name = "PIO14"; 419*724ba675SRob Herring }; 420*724ba675SRob Herring pio15: pio@9205000 { 421*724ba675SRob Herring gpio-controller; 422*724ba675SRob Herring #gpio-cells = <2>; 423*724ba675SRob Herring interrupt-controller; 424*724ba675SRob Herring #interrupt-cells = <2>; 425*724ba675SRob Herring reg = <0x5000 0x100>; 426*724ba675SRob Herring st,bank-name = "PIO15"; 427*724ba675SRob Herring }; 428*724ba675SRob Herring pio16: pio@9206000 { 429*724ba675SRob Herring gpio-controller; 430*724ba675SRob Herring #gpio-cells = <2>; 431*724ba675SRob Herring interrupt-controller; 432*724ba675SRob Herring #interrupt-cells = <2>; 433*724ba675SRob Herring reg = <0x6000 0x100>; 434*724ba675SRob Herring st,bank-name = "PIO16"; 435*724ba675SRob Herring }; 436*724ba675SRob Herring pio17: pio@9207000 { 437*724ba675SRob Herring gpio-controller; 438*724ba675SRob Herring #gpio-cells = <2>; 439*724ba675SRob Herring interrupt-controller; 440*724ba675SRob Herring #interrupt-cells = <2>; 441*724ba675SRob Herring reg = <0x7000 0x100>; 442*724ba675SRob Herring st,bank-name = "PIO17"; 443*724ba675SRob Herring }; 444*724ba675SRob Herring pio18: pio@9208000 { 445*724ba675SRob Herring gpio-controller; 446*724ba675SRob Herring #gpio-cells = <2>; 447*724ba675SRob Herring interrupt-controller; 448*724ba675SRob Herring #interrupt-cells = <2>; 449*724ba675SRob Herring reg = <0x8000 0x100>; 450*724ba675SRob Herring st,bank-name = "PIO18"; 451*724ba675SRob Herring }; 452*724ba675SRob Herring pio19: pio@9209000 { 453*724ba675SRob Herring gpio-controller; 454*724ba675SRob Herring #gpio-cells = <2>; 455*724ba675SRob Herring interrupt-controller; 456*724ba675SRob Herring #interrupt-cells = <2>; 457*724ba675SRob Herring reg = <0x9000 0x100>; 458*724ba675SRob Herring st,bank-name = "PIO19"; 459*724ba675SRob Herring }; 460*724ba675SRob Herring 461*724ba675SRob Herring /* Comms */ 462*724ba675SRob Herring serial0 { 463*724ba675SRob Herring pinctrl_serial0: serial0-0 { 464*724ba675SRob Herring st,pins { 465*724ba675SRob Herring tx = <&pio17 0 ALT1 OUT>; 466*724ba675SRob Herring rx = <&pio17 1 ALT1 IN>; 467*724ba675SRob Herring }; 468*724ba675SRob Herring }; 469*724ba675SRob Herring pinctrl_serial0_hw_flowctrl: serial0-0_hw_flowctrl { 470*724ba675SRob Herring st,pins { 471*724ba675SRob Herring tx = <&pio17 0 ALT1 OUT>; 472*724ba675SRob Herring rx = <&pio17 1 ALT1 IN>; 473*724ba675SRob Herring cts = <&pio17 2 ALT1 IN>; 474*724ba675SRob Herring rts = <&pio17 3 ALT1 OUT>; 475*724ba675SRob Herring }; 476*724ba675SRob Herring }; 477*724ba675SRob Herring }; 478*724ba675SRob Herring 479*724ba675SRob Herring serial1 { 480*724ba675SRob Herring pinctrl_serial1: serial1-0 { 481*724ba675SRob Herring st,pins { 482*724ba675SRob Herring tx = <&pio16 0 ALT1 OUT>; 483*724ba675SRob Herring rx = <&pio16 1 ALT1 IN>; 484*724ba675SRob Herring }; 485*724ba675SRob Herring }; 486*724ba675SRob Herring }; 487*724ba675SRob Herring 488*724ba675SRob Herring serial2 { 489*724ba675SRob Herring pinctrl_serial2: serial2-0 { 490*724ba675SRob Herring st,pins { 491*724ba675SRob Herring tx = <&pio15 0 ALT1 OUT>; 492*724ba675SRob Herring rx = <&pio15 1 ALT1 IN>; 493*724ba675SRob Herring }; 494*724ba675SRob Herring }; 495*724ba675SRob Herring }; 496*724ba675SRob Herring 497*724ba675SRob Herring mmc1 { 498*724ba675SRob Herring pinctrl_sd1: sd1-0 { 499*724ba675SRob Herring st,pins { 500*724ba675SRob Herring sd_clk = <&pio19 3 ALT5 BIDIR NICLK 0 CLK_B>; 501*724ba675SRob Herring sd_cmd = <&pio19 2 ALT5 BIDIR_PU BYPASS 0>; 502*724ba675SRob Herring sd_dat0 = <&pio19 4 ALT5 BIDIR_PU BYPASS 0>; 503*724ba675SRob Herring sd_dat1 = <&pio19 5 ALT5 BIDIR_PU BYPASS 0>; 504*724ba675SRob Herring sd_dat2 = <&pio19 6 ALT5 BIDIR_PU BYPASS 0>; 505*724ba675SRob Herring sd_dat3 = <&pio19 7 ALT5 BIDIR_PU BYPASS 0>; 506*724ba675SRob Herring sd_led = <&pio16 6 ALT6 OUT>; 507*724ba675SRob Herring sd_pwren = <&pio16 7 ALT6 OUT>; 508*724ba675SRob Herring sd_cd = <&pio19 0 ALT6 IN>; 509*724ba675SRob Herring sd_wp = <&pio19 1 ALT6 IN>; 510*724ba675SRob Herring }; 511*724ba675SRob Herring }; 512*724ba675SRob Herring }; 513*724ba675SRob Herring 514*724ba675SRob Herring 515*724ba675SRob Herring i2c0 { 516*724ba675SRob Herring pinctrl_i2c0_default: i2c0-default { 517*724ba675SRob Herring st,pins { 518*724ba675SRob Herring sda = <&pio10 6 ALT2 BIDIR>; 519*724ba675SRob Herring scl = <&pio10 5 ALT2 BIDIR>; 520*724ba675SRob Herring }; 521*724ba675SRob Herring }; 522*724ba675SRob Herring }; 523*724ba675SRob Herring 524*724ba675SRob Herring i2c1 { 525*724ba675SRob Herring pinctrl_i2c1_default: i2c1-default { 526*724ba675SRob Herring st,pins { 527*724ba675SRob Herring sda = <&pio11 1 ALT2 BIDIR>; 528*724ba675SRob Herring scl = <&pio11 0 ALT2 BIDIR>; 529*724ba675SRob Herring }; 530*724ba675SRob Herring }; 531*724ba675SRob Herring }; 532*724ba675SRob Herring 533*724ba675SRob Herring i2c2 { 534*724ba675SRob Herring pinctrl_i2c2_default: i2c2-default { 535*724ba675SRob Herring st,pins { 536*724ba675SRob Herring sda = <&pio15 6 ALT2 BIDIR>; 537*724ba675SRob Herring scl = <&pio15 5 ALT2 BIDIR>; 538*724ba675SRob Herring }; 539*724ba675SRob Herring }; 540*724ba675SRob Herring 541*724ba675SRob Herring pinctrl_i2c2_alt2_1: i2c2-alt2-1 { 542*724ba675SRob Herring st,pins { 543*724ba675SRob Herring sda = <&pio12 6 ALT2 BIDIR>; 544*724ba675SRob Herring scl = <&pio12 5 ALT2 BIDIR>; 545*724ba675SRob Herring }; 546*724ba675SRob Herring }; 547*724ba675SRob Herring }; 548*724ba675SRob Herring 549*724ba675SRob Herring i2c3 { 550*724ba675SRob Herring pinctrl_i2c3_default: i2c3-alt1-0 { 551*724ba675SRob Herring st,pins { 552*724ba675SRob Herring sda = <&pio18 6 ALT1 BIDIR>; 553*724ba675SRob Herring scl = <&pio18 5 ALT1 BIDIR>; 554*724ba675SRob Herring }; 555*724ba675SRob Herring }; 556*724ba675SRob Herring pinctrl_i2c3_alt1_1: i2c3-alt1-1 { 557*724ba675SRob Herring st,pins { 558*724ba675SRob Herring sda = <&pio17 7 ALT1 BIDIR>; 559*724ba675SRob Herring scl = <&pio17 6 ALT1 BIDIR>; 560*724ba675SRob Herring }; 561*724ba675SRob Herring }; 562*724ba675SRob Herring pinctrl_i2c3_alt3_0: i2c3-alt3-0 { 563*724ba675SRob Herring st,pins { 564*724ba675SRob Herring sda = <&pio13 6 ALT3 BIDIR>; 565*724ba675SRob Herring scl = <&pio13 5 ALT3 BIDIR>; 566*724ba675SRob Herring }; 567*724ba675SRob Herring }; 568*724ba675SRob Herring }; 569*724ba675SRob Herring 570*724ba675SRob Herring spi0 { 571*724ba675SRob Herring pinctrl_spi0_default: spi0-4w-alt2-0 { 572*724ba675SRob Herring st,pins { 573*724ba675SRob Herring mtsr = <&pio10 6 ALT2 OUT>; 574*724ba675SRob Herring mrst = <&pio10 7 ALT2 IN>; 575*724ba675SRob Herring scl = <&pio10 5 ALT2 OUT>; 576*724ba675SRob Herring }; 577*724ba675SRob Herring }; 578*724ba675SRob Herring 579*724ba675SRob Herring pinctrl_spi0_3w_alt2_0: spi0-3w-alt2-0 { 580*724ba675SRob Herring st,pins { 581*724ba675SRob Herring mtsr = <&pio10 6 ALT2 BIDIR_PU>; 582*724ba675SRob Herring scl = <&pio10 5 ALT2 OUT>; 583*724ba675SRob Herring }; 584*724ba675SRob Herring }; 585*724ba675SRob Herring 586*724ba675SRob Herring pinctrl_spi0_4w_alt1_0: spi0-4w-alt1-0 { 587*724ba675SRob Herring st,pins { 588*724ba675SRob Herring mtsr = <&pio19 7 ALT1 OUT>; 589*724ba675SRob Herring mrst = <&pio19 5 ALT1 IN>; 590*724ba675SRob Herring scl = <&pio19 6 ALT1 OUT>; 591*724ba675SRob Herring }; 592*724ba675SRob Herring }; 593*724ba675SRob Herring 594*724ba675SRob Herring pinctrl_spi0_3w_alt1_0: spi0-3w-alt1-0 { 595*724ba675SRob Herring st,pins { 596*724ba675SRob Herring mtsr = <&pio19 7 ALT1 BIDIR_PU>; 597*724ba675SRob Herring scl = <&pio19 6 ALT1 OUT>; 598*724ba675SRob Herring }; 599*724ba675SRob Herring }; 600*724ba675SRob Herring }; 601*724ba675SRob Herring 602*724ba675SRob Herring spi1 { 603*724ba675SRob Herring pinctrl_spi1_default: spi1-4w-alt2-0 { 604*724ba675SRob Herring st,pins { 605*724ba675SRob Herring mtsr = <&pio11 1 ALT2 OUT>; 606*724ba675SRob Herring mrst = <&pio11 2 ALT2 IN>; 607*724ba675SRob Herring scl = <&pio11 0 ALT2 OUT>; 608*724ba675SRob Herring }; 609*724ba675SRob Herring }; 610*724ba675SRob Herring 611*724ba675SRob Herring pinctrl_spi1_3w_alt2_0: spi1-3w-alt2-0 { 612*724ba675SRob Herring st,pins { 613*724ba675SRob Herring mtsr = <&pio11 1 ALT2 BIDIR_PU>; 614*724ba675SRob Herring scl = <&pio11 0 ALT2 OUT>; 615*724ba675SRob Herring }; 616*724ba675SRob Herring }; 617*724ba675SRob Herring 618*724ba675SRob Herring pinctrl_spi1_4w_alt1_0: spi1-4w-alt1-0 { 619*724ba675SRob Herring st,pins { 620*724ba675SRob Herring mtsr = <&pio14 3 ALT1 OUT>; 621*724ba675SRob Herring mrst = <&pio14 4 ALT1 IN>; 622*724ba675SRob Herring scl = <&pio14 2 ALT1 OUT>; 623*724ba675SRob Herring }; 624*724ba675SRob Herring }; 625*724ba675SRob Herring 626*724ba675SRob Herring pinctrl_spi1_3w_alt1_0: spi1-3w-alt1-0 { 627*724ba675SRob Herring st,pins { 628*724ba675SRob Herring mtsr = <&pio14 3 ALT1 BIDIR_PU>; 629*724ba675SRob Herring scl = <&pio14 2 ALT1 OUT>; 630*724ba675SRob Herring }; 631*724ba675SRob Herring }; 632*724ba675SRob Herring }; 633*724ba675SRob Herring 634*724ba675SRob Herring spi2 { 635*724ba675SRob Herring pinctrl_spi2_default: spi2-4w-alt2-0 { 636*724ba675SRob Herring st,pins { 637*724ba675SRob Herring mtsr = <&pio12 6 ALT2 OUT>; 638*724ba675SRob Herring mrst = <&pio12 7 ALT2 IN>; 639*724ba675SRob Herring scl = <&pio12 5 ALT2 OUT>; 640*724ba675SRob Herring }; 641*724ba675SRob Herring }; 642*724ba675SRob Herring 643*724ba675SRob Herring pinctrl_spi2_3w_alt2_0: spi2-3w-alt2-0 { 644*724ba675SRob Herring st,pins { 645*724ba675SRob Herring mtsr = <&pio12 6 ALT2 BIDIR_PU>; 646*724ba675SRob Herring scl = <&pio12 5 ALT2 OUT>; 647*724ba675SRob Herring }; 648*724ba675SRob Herring }; 649*724ba675SRob Herring 650*724ba675SRob Herring pinctrl_spi2_4w_alt1_0: spi2-4w-alt1-0 { 651*724ba675SRob Herring st,pins { 652*724ba675SRob Herring mtsr = <&pio14 6 ALT1 OUT>; 653*724ba675SRob Herring mrst = <&pio14 7 ALT1 IN>; 654*724ba675SRob Herring scl = <&pio14 5 ALT1 OUT>; 655*724ba675SRob Herring }; 656*724ba675SRob Herring }; 657*724ba675SRob Herring 658*724ba675SRob Herring pinctrl_spi2_3w_alt1_0: spi2-3w-alt1-0 { 659*724ba675SRob Herring st,pins { 660*724ba675SRob Herring mtsr = <&pio14 6 ALT1 BIDIR_PU>; 661*724ba675SRob Herring scl = <&pio14 5 ALT1 OUT>; 662*724ba675SRob Herring }; 663*724ba675SRob Herring }; 664*724ba675SRob Herring 665*724ba675SRob Herring pinctrl_spi2_4w_alt2_1: spi2-4w-alt2-1 { 666*724ba675SRob Herring st,pins { 667*724ba675SRob Herring mtsr = <&pio15 6 ALT2 OUT>; 668*724ba675SRob Herring mrst = <&pio15 7 ALT2 IN>; 669*724ba675SRob Herring scl = <&pio15 5 ALT2 OUT>; 670*724ba675SRob Herring }; 671*724ba675SRob Herring }; 672*724ba675SRob Herring 673*724ba675SRob Herring pinctrl_spi2_3w_alt2_1: spi2-3w-alt2-1 { 674*724ba675SRob Herring st,pins { 675*724ba675SRob Herring mtsr = <&pio15 6 ALT2 BIDIR_PU>; 676*724ba675SRob Herring scl = <&pio15 5 ALT2 OUT>; 677*724ba675SRob Herring }; 678*724ba675SRob Herring }; 679*724ba675SRob Herring }; 680*724ba675SRob Herring 681*724ba675SRob Herring spi3 { 682*724ba675SRob Herring pinctrl_spi3_default: spi3-4w-alt3-0 { 683*724ba675SRob Herring st,pins { 684*724ba675SRob Herring mtsr = <&pio13 6 ALT3 OUT>; 685*724ba675SRob Herring mrst = <&pio13 7 ALT3 IN>; 686*724ba675SRob Herring scl = <&pio13 5 ALT3 OUT>; 687*724ba675SRob Herring }; 688*724ba675SRob Herring }; 689*724ba675SRob Herring 690*724ba675SRob Herring pinctrl_spi3_3w_alt3_0: spi3-3w-alt3-0 { 691*724ba675SRob Herring st,pins { 692*724ba675SRob Herring mtsr = <&pio13 6 ALT3 BIDIR_PU>; 693*724ba675SRob Herring scl = <&pio13 5 ALT3 OUT>; 694*724ba675SRob Herring }; 695*724ba675SRob Herring }; 696*724ba675SRob Herring 697*724ba675SRob Herring pinctrl_spi3_4w_alt1_0: spi3-4w-alt1-0 { 698*724ba675SRob Herring st,pins { 699*724ba675SRob Herring mtsr = <&pio17 7 ALT1 OUT>; 700*724ba675SRob Herring mrst = <&pio17 5 ALT1 IN>; 701*724ba675SRob Herring scl = <&pio17 6 ALT1 OUT>; 702*724ba675SRob Herring }; 703*724ba675SRob Herring }; 704*724ba675SRob Herring 705*724ba675SRob Herring pinctrl_spi3_3w_alt1_0: spi3-3w-alt1-0 { 706*724ba675SRob Herring st,pins { 707*724ba675SRob Herring mtsr = <&pio17 7 ALT1 BIDIR_PU>; 708*724ba675SRob Herring scl = <&pio17 6 ALT1 OUT>; 709*724ba675SRob Herring }; 710*724ba675SRob Herring }; 711*724ba675SRob Herring 712*724ba675SRob Herring pinctrl_spi3_4w_alt1_1: spi3-4w-alt1-1 { 713*724ba675SRob Herring st,pins { 714*724ba675SRob Herring mtsr = <&pio18 6 ALT1 OUT>; 715*724ba675SRob Herring mrst = <&pio18 7 ALT1 IN>; 716*724ba675SRob Herring scl = <&pio18 5 ALT1 OUT>; 717*724ba675SRob Herring }; 718*724ba675SRob Herring }; 719*724ba675SRob Herring 720*724ba675SRob Herring pinctrl_spi3_3w_alt1_1: spi3-3w-alt1-1 { 721*724ba675SRob Herring st,pins { 722*724ba675SRob Herring mtsr = <&pio18 6 ALT1 BIDIR_PU>; 723*724ba675SRob Herring scl = <&pio18 5 ALT1 OUT>; 724*724ba675SRob Herring }; 725*724ba675SRob Herring }; 726*724ba675SRob Herring }; 727*724ba675SRob Herring 728*724ba675SRob Herring tsin0 { 729*724ba675SRob Herring pinctrl_tsin0_parallel: tsin0_parallel { 730*724ba675SRob Herring st,pins { 731*724ba675SRob Herring DATA7 = <&pio10 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; 732*724ba675SRob Herring DATA6 = <&pio10 5 ALT1 IN SE_NICLK_IO 0 CLK_A>; 733*724ba675SRob Herring DATA5 = <&pio10 6 ALT1 IN SE_NICLK_IO 0 CLK_A>; 734*724ba675SRob Herring DATA4 = <&pio10 7 ALT1 IN SE_NICLK_IO 0 CLK_A>; 735*724ba675SRob Herring DATA3 = <&pio11 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; 736*724ba675SRob Herring DATA2 = <&pio11 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; 737*724ba675SRob Herring DATA1 = <&pio11 2 ALT1 IN SE_NICLK_IO 0 CLK_A>; 738*724ba675SRob Herring DATA0 = <&pio11 3 ALT1 IN SE_NICLK_IO 0 CLK_A>; 739*724ba675SRob Herring CLKIN = <&pio10 3 ALT1 IN CLKNOTDATA 0 CLK_A>; 740*724ba675SRob Herring VALID = <&pio10 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; 741*724ba675SRob Herring ERROR = <&pio10 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; 742*724ba675SRob Herring PKCLK = <&pio10 2 ALT1 IN SE_NICLK_IO 0 CLK_A>; 743*724ba675SRob Herring }; 744*724ba675SRob Herring }; 745*724ba675SRob Herring pinctrl_tsin0_serial: tsin0_serial { 746*724ba675SRob Herring st,pins { 747*724ba675SRob Herring DATA7 = <&pio10 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; 748*724ba675SRob Herring CLKIN = <&pio10 3 ALT1 IN CLKNOTDATA 0 CLK_A>; 749*724ba675SRob Herring VALID = <&pio10 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; 750*724ba675SRob Herring ERROR = <&pio10 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; 751*724ba675SRob Herring PKCLK = <&pio10 2 ALT1 IN SE_NICLK_IO 0 CLK_A>; 752*724ba675SRob Herring }; 753*724ba675SRob Herring }; 754*724ba675SRob Herring }; 755*724ba675SRob Herring 756*724ba675SRob Herring tsin1 { 757*724ba675SRob Herring pinctrl_tsin1_parallel: tsin1_parallel { 758*724ba675SRob Herring st,pins { 759*724ba675SRob Herring DATA7 = <&pio12 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; 760*724ba675SRob Herring DATA6 = <&pio12 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; 761*724ba675SRob Herring DATA5 = <&pio12 2 ALT1 IN SE_NICLK_IO 0 CLK_A>; 762*724ba675SRob Herring DATA4 = <&pio12 3 ALT1 IN SE_NICLK_IO 0 CLK_A>; 763*724ba675SRob Herring DATA3 = <&pio12 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; 764*724ba675SRob Herring DATA2 = <&pio12 5 ALT1 IN SE_NICLK_IO 0 CLK_A>; 765*724ba675SRob Herring DATA1 = <&pio12 6 ALT1 IN SE_NICLK_IO 0 CLK_A>; 766*724ba675SRob Herring DATA0 = <&pio12 7 ALT1 IN SE_NICLK_IO 0 CLK_A>; 767*724ba675SRob Herring CLKIN = <&pio11 7 ALT1 IN CLKNOTDATA 0 CLK_A>; 768*724ba675SRob Herring VALID = <&pio11 5 ALT1 IN SE_NICLK_IO 0 CLK_A>; 769*724ba675SRob Herring ERROR = <&pio11 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; 770*724ba675SRob Herring PKCLK = <&pio11 6 ALT1 IN SE_NICLK_IO 0 CLK_A>; 771*724ba675SRob Herring }; 772*724ba675SRob Herring }; 773*724ba675SRob Herring pinctrl_tsin1_serial: tsin1_serial { 774*724ba675SRob Herring st,pins { 775*724ba675SRob Herring DATA7 = <&pio12 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; 776*724ba675SRob Herring CLKIN = <&pio11 7 ALT1 IN CLKNOTDATA 0 CLK_A>; 777*724ba675SRob Herring VALID = <&pio11 5 ALT1 IN SE_NICLK_IO 0 CLK_A>; 778*724ba675SRob Herring ERROR = <&pio11 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; 779*724ba675SRob Herring PKCLK = <&pio11 6 ALT1 IN SE_NICLK_IO 0 CLK_A>; 780*724ba675SRob Herring }; 781*724ba675SRob Herring }; 782*724ba675SRob Herring }; 783*724ba675SRob Herring 784*724ba675SRob Herring tsin2 { 785*724ba675SRob Herring pinctrl_tsin2_parallel: tsin2_parallel { 786*724ba675SRob Herring st,pins { 787*724ba675SRob Herring DATA7 = <&pio13 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; 788*724ba675SRob Herring DATA6 = <&pio13 5 ALT2 IN SE_NICLK_IO 0 CLK_B>; 789*724ba675SRob Herring DATA5 = <&pio13 6 ALT2 IN SE_NICLK_IO 0 CLK_B>; 790*724ba675SRob Herring DATA4 = <&pio13 7 ALT2 IN SE_NICLK_IO 0 CLK_B>; 791*724ba675SRob Herring DATA3 = <&pio14 0 ALT2 IN SE_NICLK_IO 0 CLK_A>; 792*724ba675SRob Herring DATA2 = <&pio14 1 ALT2 IN SE_NICLK_IO 0 CLK_B>; 793*724ba675SRob Herring DATA1 = <&pio14 2 ALT2 IN SE_NICLK_IO 0 CLK_A>; 794*724ba675SRob Herring DATA0 = <&pio14 3 ALT2 IN SE_NICLK_IO 0 CLK_A>; 795*724ba675SRob Herring CLKIN = <&pio13 3 ALT1 IN CLKNOTDATA 0 CLK_A>; 796*724ba675SRob Herring VALID = <&pio13 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; 797*724ba675SRob Herring ERROR = <&pio13 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; 798*724ba675SRob Herring PKCLK = <&pio13 2 ALT1 IN SE_NICLK_IO 0 CLK_A>; 799*724ba675SRob Herring }; 800*724ba675SRob Herring }; 801*724ba675SRob Herring pinctrl_tsin2_serial: tsin2_serial { 802*724ba675SRob Herring st,pins { 803*724ba675SRob Herring DATA7 = <&pio13 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; 804*724ba675SRob Herring CLKIN = <&pio13 3 ALT1 IN CLKNOTDATA 0 CLK_A>; 805*724ba675SRob Herring VALID = <&pio13 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; 806*724ba675SRob Herring ERROR = <&pio13 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; 807*724ba675SRob Herring PKCLK = <&pio13 2 ALT1 IN SE_NICLK_IO 0 CLK_A>; 808*724ba675SRob Herring }; 809*724ba675SRob Herring }; 810*724ba675SRob Herring }; 811*724ba675SRob Herring 812*724ba675SRob Herring tsin3 { 813*724ba675SRob Herring pinctrl_tsin3_serial: tsin3_serial { 814*724ba675SRob Herring st,pins { 815*724ba675SRob Herring DATA7 = <&pio14 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; 816*724ba675SRob Herring CLKIN = <&pio14 0 ALT1 IN CLKNOTDATA 0 CLK_A>; 817*724ba675SRob Herring VALID = <&pio13 6 ALT1 IN SE_NICLK_IO 0 CLK_A>; 818*724ba675SRob Herring ERROR = <&pio13 5 ALT1 IN SE_NICLK_IO 0 CLK_A>; 819*724ba675SRob Herring PKCLK = <&pio13 7 ALT1 IN SE_NICLK_IO 0 CLK_A>; 820*724ba675SRob Herring }; 821*724ba675SRob Herring }; 822*724ba675SRob Herring }; 823*724ba675SRob Herring 824*724ba675SRob Herring tsin4 { 825*724ba675SRob Herring pinctrl_tsin4_serial_alt3: tsin4_serial_alt3 { 826*724ba675SRob Herring st,pins { 827*724ba675SRob Herring DATA7 = <&pio14 6 ALT3 IN SE_NICLK_IO 0 CLK_A>; 828*724ba675SRob Herring CLKIN = <&pio14 5 ALT3 IN CLKNOTDATA 0 CLK_A>; 829*724ba675SRob Herring VALID = <&pio14 3 ALT3 IN SE_NICLK_IO 0 CLK_B>; 830*724ba675SRob Herring ERROR = <&pio14 2 ALT3 IN SE_NICLK_IO 0 CLK_B>; 831*724ba675SRob Herring PKCLK = <&pio14 4 ALT3 IN SE_NICLK_IO 0 CLK_A>; 832*724ba675SRob Herring }; 833*724ba675SRob Herring }; 834*724ba675SRob Herring }; 835*724ba675SRob Herring 836*724ba675SRob Herring tsin5 { 837*724ba675SRob Herring pinctrl_tsin5_serial_alt1: tsin5_serial_alt1 { 838*724ba675SRob Herring st,pins { 839*724ba675SRob Herring DATA7 = <&pio18 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; 840*724ba675SRob Herring CLKIN = <&pio18 3 ALT1 IN CLKNOTDATA 0 CLK_A>; 841*724ba675SRob Herring VALID = <&pio18 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; 842*724ba675SRob Herring ERROR = <&pio18 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; 843*724ba675SRob Herring PKCLK = <&pio18 2 ALT1 IN SE_NICLK_IO 0 CLK_A>; 844*724ba675SRob Herring }; 845*724ba675SRob Herring }; 846*724ba675SRob Herring pinctrl_tsin5_serial_alt2: tsin5_serial_alt2 { 847*724ba675SRob Herring st,pins { 848*724ba675SRob Herring DATA7 = <&pio19 4 ALT2 IN SE_NICLK_IO 0 CLK_A>; 849*724ba675SRob Herring CLKIN = <&pio19 3 ALT2 IN CLKNOTDATA 0 CLK_A>; 850*724ba675SRob Herring VALID = <&pio19 1 ALT2 IN SE_NICLK_IO 0 CLK_A>; 851*724ba675SRob Herring ERROR = <&pio19 0 ALT2 IN SE_NICLK_IO 0 CLK_A>; 852*724ba675SRob Herring PKCLK = <&pio19 2 ALT2 IN SE_NICLK_IO 0 CLK_A>; 853*724ba675SRob Herring }; 854*724ba675SRob Herring }; 855*724ba675SRob Herring }; 856*724ba675SRob Herring 857*724ba675SRob Herring tsout0 { 858*724ba675SRob Herring pinctrl_tsout0_parallel: tsout0_parallel { 859*724ba675SRob Herring st,pins { 860*724ba675SRob Herring DATA7 = <&pio12 0 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 861*724ba675SRob Herring DATA6 = <&pio12 1 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 862*724ba675SRob Herring DATA5 = <&pio12 2 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 863*724ba675SRob Herring DATA4 = <&pio12 3 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 864*724ba675SRob Herring DATA3 = <&pio12 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 865*724ba675SRob Herring DATA2 = <&pio12 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 866*724ba675SRob Herring DATA1 = <&pio12 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 867*724ba675SRob Herring DATA0 = <&pio12 7 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 868*724ba675SRob Herring CLKIN = <&pio11 7 ALT3 OUT NICLK 0 CLK_A>; 869*724ba675SRob Herring VALID = <&pio11 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 870*724ba675SRob Herring ERROR = <&pio11 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 871*724ba675SRob Herring PKCLK = <&pio11 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 872*724ba675SRob Herring }; 873*724ba675SRob Herring }; 874*724ba675SRob Herring pinctrl_tsout0_serial: tsout0_serial { 875*724ba675SRob Herring st,pins { 876*724ba675SRob Herring DATA7 = <&pio12 0 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 877*724ba675SRob Herring CLKIN = <&pio11 7 ALT3 OUT NICLK 0 CLK_A>; 878*724ba675SRob Herring VALID = <&pio11 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 879*724ba675SRob Herring ERROR = <&pio11 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 880*724ba675SRob Herring PKCLK = <&pio11 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>; 881*724ba675SRob Herring }; 882*724ba675SRob Herring }; 883*724ba675SRob Herring }; 884*724ba675SRob Herring 885*724ba675SRob Herring tsout1 { 886*724ba675SRob Herring pinctrl_tsout1_serial: tsout1_serial { 887*724ba675SRob Herring st,pins { 888*724ba675SRob Herring DATA7 = <&pio19 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 889*724ba675SRob Herring CLKIN = <&pio19 3 ALT1 OUT NICLK 0 CLK_A>; 890*724ba675SRob Herring VALID = <&pio19 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 891*724ba675SRob Herring ERROR = <&pio19 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 892*724ba675SRob Herring PKCLK = <&pio19 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 893*724ba675SRob Herring }; 894*724ba675SRob Herring }; 895*724ba675SRob Herring }; 896*724ba675SRob Herring 897*724ba675SRob Herring mtsin0 { 898*724ba675SRob Herring pinctrl_mtsin0_parallel: mtsin0_parallel { 899*724ba675SRob Herring st,pins { 900*724ba675SRob Herring DATA7 = <&pio10 4 ALT3 IN SE_NICLK_IO 0 CLK_A>; 901*724ba675SRob Herring DATA6 = <&pio10 5 ALT3 IN SE_NICLK_IO 0 CLK_A>; 902*724ba675SRob Herring DATA5 = <&pio10 6 ALT3 IN SE_NICLK_IO 0 CLK_A>; 903*724ba675SRob Herring DATA4 = <&pio10 7 ALT3 IN SE_NICLK_IO 0 CLK_A>; 904*724ba675SRob Herring DATA3 = <&pio11 0 ALT3 IN SE_NICLK_IO 0 CLK_A>; 905*724ba675SRob Herring DATA2 = <&pio11 1 ALT3 IN SE_NICLK_IO 0 CLK_A>; 906*724ba675SRob Herring DATA1 = <&pio11 2 ALT3 IN SE_NICLK_IO 0 CLK_A>; 907*724ba675SRob Herring DATA0 = <&pio11 3 ALT3 IN SE_NICLK_IO 0 CLK_A>; 908*724ba675SRob Herring CLKIN = <&pio10 3 ALT3 IN CLKNOTDATA 0 CLK_A>; 909*724ba675SRob Herring VALID = <&pio10 1 ALT3 IN SE_NICLK_IO 0 CLK_A>; 910*724ba675SRob Herring ERROR = <&pio10 0 ALT3 IN SE_NICLK_IO 0 CLK_A>; 911*724ba675SRob Herring PKCLK = <&pio10 2 ALT3 IN SE_NICLK_IO 0 CLK_A>; 912*724ba675SRob Herring }; 913*724ba675SRob Herring }; 914*724ba675SRob Herring }; 915*724ba675SRob Herring 916*724ba675SRob Herring systrace { 917*724ba675SRob Herring pinctrl_systrace_default: systrace-default { 918*724ba675SRob Herring st,pins { 919*724ba675SRob Herring trc_data0 = <&pio11 3 ALT5 OUT>; 920*724ba675SRob Herring trc_data1 = <&pio11 4 ALT5 OUT>; 921*724ba675SRob Herring trc_data2 = <&pio11 5 ALT5 OUT>; 922*724ba675SRob Herring trc_data3 = <&pio11 6 ALT5 OUT>; 923*724ba675SRob Herring trc_clk = <&pio11 7 ALT5 OUT>; 924*724ba675SRob Herring }; 925*724ba675SRob Herring }; 926*724ba675SRob Herring }; 927*724ba675SRob Herring }; 928*724ba675SRob Herring 929*724ba675SRob Herring pin-controller-front1@921f080 { 930*724ba675SRob Herring #address-cells = <1>; 931*724ba675SRob Herring #size-cells = <1>; 932*724ba675SRob Herring compatible = "st,stih407-front-pinctrl"; 933*724ba675SRob Herring st,syscfg = <&syscfg_front>; 934*724ba675SRob Herring reg = <0x0921f080 0x4>; 935*724ba675SRob Herring reg-names = "irqmux"; 936*724ba675SRob Herring interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 937*724ba675SRob Herring interrupt-names = "irqmux"; 938*724ba675SRob Herring ranges = <0 0x09210000 0x10000>; 939*724ba675SRob Herring 940*724ba675SRob Herring pio20: pio@9210000 { 941*724ba675SRob Herring gpio-controller; 942*724ba675SRob Herring #gpio-cells = <2>; 943*724ba675SRob Herring interrupt-controller; 944*724ba675SRob Herring #interrupt-cells = <2>; 945*724ba675SRob Herring reg = <0x0 0x100>; 946*724ba675SRob Herring st,bank-name = "PIO20"; 947*724ba675SRob Herring }; 948*724ba675SRob Herring 949*724ba675SRob Herring tsin4 { 950*724ba675SRob Herring pinctrl_tsin4_serial_alt1: tsin4_serial_alt1 { 951*724ba675SRob Herring st,pins { 952*724ba675SRob Herring DATA7 = <&pio20 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; 953*724ba675SRob Herring CLKIN = <&pio20 3 ALT1 IN CLKNOTDATA 0 CLK_A>; 954*724ba675SRob Herring VALID = <&pio20 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; 955*724ba675SRob Herring ERROR = <&pio20 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; 956*724ba675SRob Herring PKCLK = <&pio20 2 ALT1 IN SE_NICLK_IO 0 CLK_A>; 957*724ba675SRob Herring }; 958*724ba675SRob Herring }; 959*724ba675SRob Herring }; 960*724ba675SRob Herring }; 961*724ba675SRob Herring 962*724ba675SRob Herring pin-controller-rear@922f080 { 963*724ba675SRob Herring #address-cells = <1>; 964*724ba675SRob Herring #size-cells = <1>; 965*724ba675SRob Herring compatible = "st,stih407-rear-pinctrl"; 966*724ba675SRob Herring st,syscfg = <&syscfg_rear>; 967*724ba675SRob Herring reg = <0x0922f080 0x4>; 968*724ba675SRob Herring reg-names = "irqmux"; 969*724ba675SRob Herring interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 970*724ba675SRob Herring interrupt-names = "irqmux"; 971*724ba675SRob Herring ranges = <0 0x09220000 0x6000>; 972*724ba675SRob Herring 973*724ba675SRob Herring pio30: gpio@9220000 { 974*724ba675SRob Herring gpio-controller; 975*724ba675SRob Herring #gpio-cells = <2>; 976*724ba675SRob Herring interrupt-controller; 977*724ba675SRob Herring #interrupt-cells = <2>; 978*724ba675SRob Herring reg = <0x0 0x100>; 979*724ba675SRob Herring st,bank-name = "PIO30"; 980*724ba675SRob Herring }; 981*724ba675SRob Herring pio31: gpio@9221000 { 982*724ba675SRob Herring gpio-controller; 983*724ba675SRob Herring #gpio-cells = <2>; 984*724ba675SRob Herring interrupt-controller; 985*724ba675SRob Herring #interrupt-cells = <2>; 986*724ba675SRob Herring reg = <0x1000 0x100>; 987*724ba675SRob Herring st,bank-name = "PIO31"; 988*724ba675SRob Herring }; 989*724ba675SRob Herring pio32: gpio@9222000 { 990*724ba675SRob Herring gpio-controller; 991*724ba675SRob Herring #gpio-cells = <2>; 992*724ba675SRob Herring interrupt-controller; 993*724ba675SRob Herring #interrupt-cells = <2>; 994*724ba675SRob Herring reg = <0x2000 0x100>; 995*724ba675SRob Herring st,bank-name = "PIO32"; 996*724ba675SRob Herring }; 997*724ba675SRob Herring pio33: gpio@9223000 { 998*724ba675SRob Herring gpio-controller; 999*724ba675SRob Herring #gpio-cells = <2>; 1000*724ba675SRob Herring interrupt-controller; 1001*724ba675SRob Herring #interrupt-cells = <2>; 1002*724ba675SRob Herring reg = <0x3000 0x100>; 1003*724ba675SRob Herring st,bank-name = "PIO33"; 1004*724ba675SRob Herring }; 1005*724ba675SRob Herring pio34: gpio@9224000 { 1006*724ba675SRob Herring gpio-controller; 1007*724ba675SRob Herring #gpio-cells = <2>; 1008*724ba675SRob Herring interrupt-controller; 1009*724ba675SRob Herring #interrupt-cells = <2>; 1010*724ba675SRob Herring reg = <0x4000 0x100>; 1011*724ba675SRob Herring st,bank-name = "PIO34"; 1012*724ba675SRob Herring }; 1013*724ba675SRob Herring pio35: gpio@9225000 { 1014*724ba675SRob Herring gpio-controller; 1015*724ba675SRob Herring #gpio-cells = <2>; 1016*724ba675SRob Herring interrupt-controller; 1017*724ba675SRob Herring #interrupt-cells = <2>; 1018*724ba675SRob Herring reg = <0x5000 0x100>; 1019*724ba675SRob Herring st,bank-name = "PIO35"; 1020*724ba675SRob Herring st,retime-pin-mask = <0x7f>; 1021*724ba675SRob Herring }; 1022*724ba675SRob Herring 1023*724ba675SRob Herring i2c4 { 1024*724ba675SRob Herring pinctrl_i2c4_default: i2c4-default { 1025*724ba675SRob Herring st,pins { 1026*724ba675SRob Herring sda = <&pio30 1 ALT1 BIDIR>; 1027*724ba675SRob Herring scl = <&pio30 0 ALT1 BIDIR>; 1028*724ba675SRob Herring }; 1029*724ba675SRob Herring }; 1030*724ba675SRob Herring }; 1031*724ba675SRob Herring 1032*724ba675SRob Herring i2c5 { 1033*724ba675SRob Herring pinctrl_i2c5_default: i2c5-default { 1034*724ba675SRob Herring st,pins { 1035*724ba675SRob Herring sda = <&pio34 4 ALT1 BIDIR>; 1036*724ba675SRob Herring scl = <&pio34 3 ALT1 BIDIR>; 1037*724ba675SRob Herring }; 1038*724ba675SRob Herring }; 1039*724ba675SRob Herring }; 1040*724ba675SRob Herring 1041*724ba675SRob Herring usb3 { 1042*724ba675SRob Herring pinctrl_usb3: usb3-2 { 1043*724ba675SRob Herring st,pins { 1044*724ba675SRob Herring usb-oc-detect = <&pio35 4 ALT1 IN>; 1045*724ba675SRob Herring usb-pwr-enable = <&pio35 5 ALT1 OUT>; 1046*724ba675SRob Herring usb-vbus-valid = <&pio35 6 ALT1 IN>; 1047*724ba675SRob Herring }; 1048*724ba675SRob Herring }; 1049*724ba675SRob Herring }; 1050*724ba675SRob Herring 1051*724ba675SRob Herring pwm0 { 1052*724ba675SRob Herring pinctrl_pwm0_chan0_default: pwm0-0-default { 1053*724ba675SRob Herring st,pins { 1054*724ba675SRob Herring pwm-capturein = <&pio31 0 ALT1 IN>; 1055*724ba675SRob Herring pwm-out = <&pio31 1 ALT1 OUT>; 1056*724ba675SRob Herring }; 1057*724ba675SRob Herring }; 1058*724ba675SRob Herring }; 1059*724ba675SRob Herring 1060*724ba675SRob Herring spi4 { 1061*724ba675SRob Herring pinctrl_spi4_default: spi4-4w-alt1-0 { 1062*724ba675SRob Herring st,pins { 1063*724ba675SRob Herring mtsr = <&pio30 1 ALT1 OUT>; 1064*724ba675SRob Herring mrst = <&pio30 2 ALT1 IN>; 1065*724ba675SRob Herring scl = <&pio30 0 ALT1 OUT>; 1066*724ba675SRob Herring }; 1067*724ba675SRob Herring }; 1068*724ba675SRob Herring 1069*724ba675SRob Herring pinctrl_spi4_3w_alt1_0: spi4-3w-alt1-0 { 1070*724ba675SRob Herring st,pins { 1071*724ba675SRob Herring mtsr = <&pio30 1 ALT1 BIDIR_PU>; 1072*724ba675SRob Herring scl = <&pio30 0 ALT1 OUT>; 1073*724ba675SRob Herring }; 1074*724ba675SRob Herring }; 1075*724ba675SRob Herring 1076*724ba675SRob Herring pinctrl_spi4_4w_alt3_0: spi4-4w-alt3-0 { 1077*724ba675SRob Herring st,pins { 1078*724ba675SRob Herring mtsr = <&pio34 1 ALT3 OUT>; 1079*724ba675SRob Herring mrst = <&pio34 2 ALT3 IN>; 1080*724ba675SRob Herring scl = <&pio34 0 ALT3 OUT>; 1081*724ba675SRob Herring }; 1082*724ba675SRob Herring }; 1083*724ba675SRob Herring 1084*724ba675SRob Herring pinctrl_spi4_3w_alt3_0: spi4-3w-alt3-0 { 1085*724ba675SRob Herring st,pins { 1086*724ba675SRob Herring mtsr = <&pio34 1 ALT3 BIDIR_PU>; 1087*724ba675SRob Herring scl = <&pio34 0 ALT3 OUT>; 1088*724ba675SRob Herring }; 1089*724ba675SRob Herring }; 1090*724ba675SRob Herring }; 1091*724ba675SRob Herring 1092*724ba675SRob Herring i2s_out { 1093*724ba675SRob Herring pinctrl_i2s_8ch_out: i2s_8ch_out { 1094*724ba675SRob Herring st,pins { 1095*724ba675SRob Herring mclk = <&pio33 5 ALT1 OUT>; 1096*724ba675SRob Herring lrclk = <&pio33 7 ALT1 OUT>; 1097*724ba675SRob Herring sclk = <&pio33 6 ALT1 OUT>; 1098*724ba675SRob Herring data0 = <&pio33 4 ALT1 OUT>; 1099*724ba675SRob Herring data1 = <&pio34 0 ALT1 OUT>; 1100*724ba675SRob Herring data2 = <&pio34 1 ALT1 OUT>; 1101*724ba675SRob Herring data3 = <&pio34 2 ALT1 OUT>; 1102*724ba675SRob Herring }; 1103*724ba675SRob Herring }; 1104*724ba675SRob Herring 1105*724ba675SRob Herring pinctrl_i2s_2ch_out: i2s_2ch_out { 1106*724ba675SRob Herring st,pins { 1107*724ba675SRob Herring mclk = <&pio33 5 ALT1 OUT>; 1108*724ba675SRob Herring lrclk = <&pio33 7 ALT1 OUT>; 1109*724ba675SRob Herring sclk = <&pio33 6 ALT1 OUT>; 1110*724ba675SRob Herring data0 = <&pio33 4 ALT1 OUT>; 1111*724ba675SRob Herring }; 1112*724ba675SRob Herring }; 1113*724ba675SRob Herring }; 1114*724ba675SRob Herring 1115*724ba675SRob Herring i2s_in { 1116*724ba675SRob Herring pinctrl_i2s_8ch_in: i2s_8ch_in { 1117*724ba675SRob Herring st,pins { 1118*724ba675SRob Herring mclk = <&pio32 5 ALT1 IN>; 1119*724ba675SRob Herring lrclk = <&pio32 7 ALT1 IN>; 1120*724ba675SRob Herring sclk = <&pio32 6 ALT1 IN>; 1121*724ba675SRob Herring data0 = <&pio32 4 ALT1 IN>; 1122*724ba675SRob Herring data1 = <&pio33 0 ALT1 IN>; 1123*724ba675SRob Herring data2 = <&pio33 1 ALT1 IN>; 1124*724ba675SRob Herring data3 = <&pio33 2 ALT1 IN>; 1125*724ba675SRob Herring data4 = <&pio33 3 ALT1 IN>; 1126*724ba675SRob Herring }; 1127*724ba675SRob Herring }; 1128*724ba675SRob Herring 1129*724ba675SRob Herring pinctrl_i2s_2ch_in: i2s_2ch_in { 1130*724ba675SRob Herring st,pins { 1131*724ba675SRob Herring mclk = <&pio32 5 ALT1 IN>; 1132*724ba675SRob Herring lrclk = <&pio32 7 ALT1 IN>; 1133*724ba675SRob Herring sclk = <&pio32 6 ALT1 IN>; 1134*724ba675SRob Herring data0 = <&pio32 4 ALT1 IN>; 1135*724ba675SRob Herring }; 1136*724ba675SRob Herring }; 1137*724ba675SRob Herring }; 1138*724ba675SRob Herring 1139*724ba675SRob Herring spdif_out { 1140*724ba675SRob Herring pinctrl_spdif_out: spdif_out { 1141*724ba675SRob Herring st,pins { 1142*724ba675SRob Herring spdif_out = <&pio34 7 ALT1 OUT>; 1143*724ba675SRob Herring }; 1144*724ba675SRob Herring }; 1145*724ba675SRob Herring }; 1146*724ba675SRob Herring 1147*724ba675SRob Herring serial3 { 1148*724ba675SRob Herring pinctrl_serial3: serial3-0 { 1149*724ba675SRob Herring st,pins { 1150*724ba675SRob Herring tx = <&pio31 3 ALT1 OUT>; 1151*724ba675SRob Herring rx = <&pio31 4 ALT1 IN>; 1152*724ba675SRob Herring }; 1153*724ba675SRob Herring }; 1154*724ba675SRob Herring }; 1155*724ba675SRob Herring }; 1156*724ba675SRob Herring 1157*724ba675SRob Herring pin-controller-flash@923f080 { 1158*724ba675SRob Herring #address-cells = <1>; 1159*724ba675SRob Herring #size-cells = <1>; 1160*724ba675SRob Herring compatible = "st,stih407-flash-pinctrl"; 1161*724ba675SRob Herring st,syscfg = <&syscfg_flash>; 1162*724ba675SRob Herring reg = <0x0923f080 0x4>; 1163*724ba675SRob Herring reg-names = "irqmux"; 1164*724ba675SRob Herring interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 1165*724ba675SRob Herring interrupt-names = "irqmux"; 1166*724ba675SRob Herring ranges = <0 0x09230000 0x3000>; 1167*724ba675SRob Herring 1168*724ba675SRob Herring pio40: gpio@9230000 { 1169*724ba675SRob Herring gpio-controller; 1170*724ba675SRob Herring #gpio-cells = <2>; 1171*724ba675SRob Herring interrupt-controller; 1172*724ba675SRob Herring #interrupt-cells = <2>; 1173*724ba675SRob Herring reg = <0 0x100>; 1174*724ba675SRob Herring st,bank-name = "PIO40"; 1175*724ba675SRob Herring }; 1176*724ba675SRob Herring pio41: gpio@9231000 { 1177*724ba675SRob Herring gpio-controller; 1178*724ba675SRob Herring #gpio-cells = <2>; 1179*724ba675SRob Herring interrupt-controller; 1180*724ba675SRob Herring #interrupt-cells = <2>; 1181*724ba675SRob Herring reg = <0x1000 0x100>; 1182*724ba675SRob Herring st,bank-name = "PIO41"; 1183*724ba675SRob Herring }; 1184*724ba675SRob Herring pio42: gpio@9232000 { 1185*724ba675SRob Herring gpio-controller; 1186*724ba675SRob Herring #gpio-cells = <2>; 1187*724ba675SRob Herring interrupt-controller; 1188*724ba675SRob Herring #interrupt-cells = <2>; 1189*724ba675SRob Herring reg = <0x2000 0x100>; 1190*724ba675SRob Herring st,bank-name = "PIO42"; 1191*724ba675SRob Herring }; 1192*724ba675SRob Herring 1193*724ba675SRob Herring mmc0 { 1194*724ba675SRob Herring pinctrl_mmc0: mmc0-0 { 1195*724ba675SRob Herring st,pins { 1196*724ba675SRob Herring emmc_clk = <&pio40 6 ALT1 BIDIR>; 1197*724ba675SRob Herring emmc_cmd = <&pio40 7 ALT1 BIDIR_PU>; 1198*724ba675SRob Herring emmc_d0 = <&pio41 0 ALT1 BIDIR_PU>; 1199*724ba675SRob Herring emmc_d1 = <&pio41 1 ALT1 BIDIR_PU>; 1200*724ba675SRob Herring emmc_d2 = <&pio41 2 ALT1 BIDIR_PU>; 1201*724ba675SRob Herring emmc_d3 = <&pio41 3 ALT1 BIDIR_PU>; 1202*724ba675SRob Herring emmc_d4 = <&pio41 4 ALT1 BIDIR_PU>; 1203*724ba675SRob Herring emmc_d5 = <&pio41 5 ALT1 BIDIR_PU>; 1204*724ba675SRob Herring emmc_d6 = <&pio41 6 ALT1 BIDIR_PU>; 1205*724ba675SRob Herring emmc_d7 = <&pio41 7 ALT1 BIDIR_PU>; 1206*724ba675SRob Herring }; 1207*724ba675SRob Herring }; 1208*724ba675SRob Herring pinctrl_sd0: sd0-0 { 1209*724ba675SRob Herring st,pins { 1210*724ba675SRob Herring sd_clk = <&pio40 6 ALT1 BIDIR>; 1211*724ba675SRob Herring sd_cmd = <&pio40 7 ALT1 BIDIR_PU>; 1212*724ba675SRob Herring sd_dat0 = <&pio41 0 ALT1 BIDIR_PU>; 1213*724ba675SRob Herring sd_dat1 = <&pio41 1 ALT1 BIDIR_PU>; 1214*724ba675SRob Herring sd_dat2 = <&pio41 2 ALT1 BIDIR_PU>; 1215*724ba675SRob Herring sd_dat3 = <&pio41 3 ALT1 BIDIR_PU>; 1216*724ba675SRob Herring sd_led = <&pio42 0 ALT2 OUT>; 1217*724ba675SRob Herring sd_pwren = <&pio42 2 ALT2 OUT>; 1218*724ba675SRob Herring sd_vsel = <&pio42 3 ALT2 OUT>; 1219*724ba675SRob Herring sd_cd = <&pio42 4 ALT2 IN>; 1220*724ba675SRob Herring sd_wp = <&pio42 5 ALT2 IN>; 1221*724ba675SRob Herring }; 1222*724ba675SRob Herring }; 1223*724ba675SRob Herring }; 1224*724ba675SRob Herring 1225*724ba675SRob Herring fsm { 1226*724ba675SRob Herring pinctrl_fsm: fsm { 1227*724ba675SRob Herring st,pins { 1228*724ba675SRob Herring spi-fsm-clk = <&pio40 1 ALT1 OUT>; 1229*724ba675SRob Herring spi-fsm-cs = <&pio40 0 ALT1 OUT>; 1230*724ba675SRob Herring spi-fsm-mosi = <&pio40 2 ALT1 OUT>; 1231*724ba675SRob Herring spi-fsm-miso = <&pio40 3 ALT1 IN>; 1232*724ba675SRob Herring spi-fsm-hol = <&pio40 5 ALT1 OUT>; 1233*724ba675SRob Herring spi-fsm-wp = <&pio40 4 ALT1 OUT>; 1234*724ba675SRob Herring }; 1235*724ba675SRob Herring }; 1236*724ba675SRob Herring }; 1237*724ba675SRob Herring 1238*724ba675SRob Herring nand { 1239*724ba675SRob Herring pinctrl_nand: nand { 1240*724ba675SRob Herring st,pins { 1241*724ba675SRob Herring nand_cs1 = <&pio40 6 ALT3 OUT>; 1242*724ba675SRob Herring nand_cs0 = <&pio40 7 ALT3 OUT>; 1243*724ba675SRob Herring nand_d0 = <&pio41 0 ALT3 BIDIR>; 1244*724ba675SRob Herring nand_d1 = <&pio41 1 ALT3 BIDIR>; 1245*724ba675SRob Herring nand_d2 = <&pio41 2 ALT3 BIDIR>; 1246*724ba675SRob Herring nand_d3 = <&pio41 3 ALT3 BIDIR>; 1247*724ba675SRob Herring nand_d4 = <&pio41 4 ALT3 BIDIR>; 1248*724ba675SRob Herring nand_d5 = <&pio41 5 ALT3 BIDIR>; 1249*724ba675SRob Herring nand_d6 = <&pio41 6 ALT3 BIDIR>; 1250*724ba675SRob Herring nand_d7 = <&pio41 7 ALT3 BIDIR>; 1251*724ba675SRob Herring nand_we = <&pio42 0 ALT3 OUT>; 1252*724ba675SRob Herring nand_dqs = <&pio42 1 ALT3 OUT>; 1253*724ba675SRob Herring nand_ale = <&pio42 2 ALT3 OUT>; 1254*724ba675SRob Herring nand_cle = <&pio42 3 ALT3 OUT>; 1255*724ba675SRob Herring nand_rnb = <&pio42 4 ALT3 IN>; 1256*724ba675SRob Herring nand_oe = <&pio42 5 ALT3 OUT>; 1257*724ba675SRob Herring }; 1258*724ba675SRob Herring }; 1259*724ba675SRob Herring }; 1260*724ba675SRob Herring }; 1261*724ba675SRob Herring }; 1262*724ba675SRob Herring}; 1263