1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright 2013 Linaro Ltd. 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring#include "ste-nomadik-pinctrl.dtsi" 7*724ba675SRob Herring 8*724ba675SRob Herring&pinctrl { 9*724ba675SRob Herring /* Settings for all UART default and sleep states */ 10*724ba675SRob Herring uart0 { 11*724ba675SRob Herring u0_a_1_default: u0_a_1_default { 12*724ba675SRob Herring default_mux { 13*724ba675SRob Herring function = "u0"; 14*724ba675SRob Herring groups = "u0_a_1"; 15*724ba675SRob Herring }; 16*724ba675SRob Herring default_cfg1 { 17*724ba675SRob Herring pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */ 18*724ba675SRob Herring ste,config = <&in_pu>; 19*724ba675SRob Herring }; 20*724ba675SRob Herring default_cfg2 { 21*724ba675SRob Herring pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */ 22*724ba675SRob Herring ste,config = <&out_hi>; 23*724ba675SRob Herring }; 24*724ba675SRob Herring }; 25*724ba675SRob Herring 26*724ba675SRob Herring u0_a_1_sleep: u0_a_1_sleep { 27*724ba675SRob Herring sleep_cfg1 { 28*724ba675SRob Herring pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */ 29*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 30*724ba675SRob Herring }; 31*724ba675SRob Herring sleep_cfg2 { 32*724ba675SRob Herring pins = "GPIO1_AJ3"; /* RTS */ 33*724ba675SRob Herring ste,config = <&slpm_out_hi_wkup_pdis>; 34*724ba675SRob Herring }; 35*724ba675SRob Herring sleep_cfg3 { 36*724ba675SRob Herring pins = "GPIO3_AH3"; /* TXD */ 37*724ba675SRob Herring ste,config = <&slpm_out_wkup_pdis>; 38*724ba675SRob Herring }; 39*724ba675SRob Herring }; 40*724ba675SRob Herring }; 41*724ba675SRob Herring 42*724ba675SRob Herring uart1 { 43*724ba675SRob Herring u1rxtx_a_1_default: u1rxtx_a_1_default { 44*724ba675SRob Herring default_mux { 45*724ba675SRob Herring function = "u1"; 46*724ba675SRob Herring groups = "u1rxtx_a_1"; 47*724ba675SRob Herring }; 48*724ba675SRob Herring default_cfg1 { 49*724ba675SRob Herring pins = "GPIO4_AH6"; /* RXD */ 50*724ba675SRob Herring ste,config = <&in_pu>; 51*724ba675SRob Herring }; 52*724ba675SRob Herring default_cfg2 { 53*724ba675SRob Herring pins = "GPIO5_AG6"; /* TXD */ 54*724ba675SRob Herring ste,config = <&out_hi>; 55*724ba675SRob Herring }; 56*724ba675SRob Herring }; 57*724ba675SRob Herring 58*724ba675SRob Herring u1rxtx_a_1_sleep: u1rxtx_a_1_sleep { 59*724ba675SRob Herring sleep_cfg1 { 60*724ba675SRob Herring pins = "GPIO4_AH6"; /* RXD */ 61*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 62*724ba675SRob Herring }; 63*724ba675SRob Herring sleep_cfg2 { 64*724ba675SRob Herring pins = "GPIO5_AG6"; /* TXD */ 65*724ba675SRob Herring ste,config = <&slpm_out_wkup_pdis>; 66*724ba675SRob Herring }; 67*724ba675SRob Herring }; 68*724ba675SRob Herring 69*724ba675SRob Herring u1ctsrts_a_1_default: u1ctsrts_a_1_default { 70*724ba675SRob Herring default_mux { 71*724ba675SRob Herring function = "u1"; 72*724ba675SRob Herring groups = "u1ctsrts_a_1"; 73*724ba675SRob Herring }; 74*724ba675SRob Herring default_cfg1 { 75*724ba675SRob Herring pins = "GPIO6_AF6"; /* CTS */ 76*724ba675SRob Herring ste,config = <&in_pu>; 77*724ba675SRob Herring }; 78*724ba675SRob Herring default_cfg2 { 79*724ba675SRob Herring pins = "GPIO7_AG5"; /* RTS */ 80*724ba675SRob Herring ste,config = <&out_hi>; 81*724ba675SRob Herring }; 82*724ba675SRob Herring }; 83*724ba675SRob Herring 84*724ba675SRob Herring u1ctsrts_a_1_sleep: u1ctsrts_a_1_sleep { 85*724ba675SRob Herring sleep_cfg1 { 86*724ba675SRob Herring pins = "GPIO6_AF6"; /* CTS */ 87*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 88*724ba675SRob Herring }; 89*724ba675SRob Herring sleep_cfg2 { 90*724ba675SRob Herring pins = "GPIO7_AG5"; /* RTS */ 91*724ba675SRob Herring ste,config = <&slpm_out_hi_wkup_pdis>; 92*724ba675SRob Herring }; 93*724ba675SRob Herring }; 94*724ba675SRob Herring }; 95*724ba675SRob Herring 96*724ba675SRob Herring uart2 { 97*724ba675SRob Herring u2rxtx_c_1_default: u2rxtx_c_1_default { 98*724ba675SRob Herring default_mux { 99*724ba675SRob Herring function = "u2"; 100*724ba675SRob Herring groups = "u2rxtx_c_1"; 101*724ba675SRob Herring }; 102*724ba675SRob Herring default_cfg1 { 103*724ba675SRob Herring pins = "GPIO29_W2"; /* RXD */ 104*724ba675SRob Herring ste,config = <&in_pu>; 105*724ba675SRob Herring }; 106*724ba675SRob Herring default_cfg2 { 107*724ba675SRob Herring pins = "GPIO30_W3"; /* TXD */ 108*724ba675SRob Herring ste,config = <&out_hi>; 109*724ba675SRob Herring }; 110*724ba675SRob Herring }; 111*724ba675SRob Herring 112*724ba675SRob Herring u2rxtx_c_1_sleep: u2rxtx_c_1_sleep { 113*724ba675SRob Herring sleep_cfg1 { 114*724ba675SRob Herring pins = "GPIO29_W2"; /* RXD */ 115*724ba675SRob Herring ste,config = <&in_wkup_pdis>; 116*724ba675SRob Herring }; 117*724ba675SRob Herring sleep_cfg2 { 118*724ba675SRob Herring pins = "GPIO30_W3"; /* TXD */ 119*724ba675SRob Herring ste,config = <&out_wkup_pdis>; 120*724ba675SRob Herring }; 121*724ba675SRob Herring }; 122*724ba675SRob Herring }; 123*724ba675SRob Herring 124*724ba675SRob Herring /* Settings for all I2C default and sleep states */ 125*724ba675SRob Herring i2c0 { 126*724ba675SRob Herring i2c0_a_1_default: i2c0_a_1_default { 127*724ba675SRob Herring default_mux { 128*724ba675SRob Herring function = "i2c0"; 129*724ba675SRob Herring groups = "i2c0_a_1"; 130*724ba675SRob Herring }; 131*724ba675SRob Herring default_cfg1 { 132*724ba675SRob Herring pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */ 133*724ba675SRob Herring ste,config = <&in_nopull>; 134*724ba675SRob Herring }; 135*724ba675SRob Herring }; 136*724ba675SRob Herring 137*724ba675SRob Herring i2c0_a_1_sleep: i2c0_a_1_sleep { 138*724ba675SRob Herring sleep_cfg1 { 139*724ba675SRob Herring pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */ 140*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 141*724ba675SRob Herring }; 142*724ba675SRob Herring }; 143*724ba675SRob Herring }; 144*724ba675SRob Herring 145*724ba675SRob Herring i2c1 { 146*724ba675SRob Herring i2c1_b_2_default: i2c1_b_2_default { 147*724ba675SRob Herring default_mux { 148*724ba675SRob Herring function = "i2c1"; 149*724ba675SRob Herring groups = "i2c1_b_2"; 150*724ba675SRob Herring }; 151*724ba675SRob Herring default_cfg1 { 152*724ba675SRob Herring pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */ 153*724ba675SRob Herring ste,config = <&in_nopull>; 154*724ba675SRob Herring }; 155*724ba675SRob Herring }; 156*724ba675SRob Herring 157*724ba675SRob Herring i2c1_b_2_sleep: i2c1_b_2_sleep { 158*724ba675SRob Herring sleep_cfg1 { 159*724ba675SRob Herring pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */ 160*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 161*724ba675SRob Herring }; 162*724ba675SRob Herring }; 163*724ba675SRob Herring }; 164*724ba675SRob Herring 165*724ba675SRob Herring i2c2 { 166*724ba675SRob Herring i2c2_b_1_default: i2c2_b_1_default { 167*724ba675SRob Herring default_mux { 168*724ba675SRob Herring function = "i2c2"; 169*724ba675SRob Herring groups = "i2c2_b_1"; 170*724ba675SRob Herring }; 171*724ba675SRob Herring default_cfg1 { 172*724ba675SRob Herring pins = "GPIO8_AD5", "GPIO9_AE4"; /* SDA/SCL */ 173*724ba675SRob Herring ste,config = <&in_nopull>; 174*724ba675SRob Herring }; 175*724ba675SRob Herring }; 176*724ba675SRob Herring 177*724ba675SRob Herring i2c2_b_1_sleep: i2c2_b_1_sleep { 178*724ba675SRob Herring sleep_cfg1 { 179*724ba675SRob Herring pins = "GPIO8_AD5", "GPIO9_AE4"; /* SDA/SCL */ 180*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 181*724ba675SRob Herring }; 182*724ba675SRob Herring }; 183*724ba675SRob Herring 184*724ba675SRob Herring i2c2_b_2_default: i2c2_b_2_default { 185*724ba675SRob Herring default_mux { 186*724ba675SRob Herring function = "i2c2"; 187*724ba675SRob Herring groups = "i2c2_b_2"; 188*724ba675SRob Herring }; 189*724ba675SRob Herring default_cfg1 { 190*724ba675SRob Herring pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */ 191*724ba675SRob Herring ste,config = <&in_nopull>; 192*724ba675SRob Herring }; 193*724ba675SRob Herring }; 194*724ba675SRob Herring 195*724ba675SRob Herring i2c2_b_2_sleep: i2c2_b_2_sleep { 196*724ba675SRob Herring sleep_cfg1 { 197*724ba675SRob Herring pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */ 198*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 199*724ba675SRob Herring }; 200*724ba675SRob Herring }; 201*724ba675SRob Herring }; 202*724ba675SRob Herring 203*724ba675SRob Herring i2c3 { 204*724ba675SRob Herring i2c3_c_2_default: i2c3_c_2_default { 205*724ba675SRob Herring default_mux { 206*724ba675SRob Herring function = "i2c3"; 207*724ba675SRob Herring groups = "i2c3_c_2"; 208*724ba675SRob Herring }; 209*724ba675SRob Herring default_cfg1 { 210*724ba675SRob Herring pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */ 211*724ba675SRob Herring ste,config = <&in_nopull>; 212*724ba675SRob Herring }; 213*724ba675SRob Herring }; 214*724ba675SRob Herring 215*724ba675SRob Herring i2c3_c_2_sleep: i2c3_c_2_sleep { 216*724ba675SRob Herring sleep_cfg1 { 217*724ba675SRob Herring pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */ 218*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 219*724ba675SRob Herring }; 220*724ba675SRob Herring }; 221*724ba675SRob Herring }; 222*724ba675SRob Herring 223*724ba675SRob Herring /* 224*724ba675SRob Herring * Activating I2C4 will conflict with UART1 about the same pins so do not 225*724ba675SRob Herring * enable I2C4 and UART1 at the same time. 226*724ba675SRob Herring */ 227*724ba675SRob Herring i2c4 { 228*724ba675SRob Herring i2c4_b_1_default: i2c4_b_1_default { 229*724ba675SRob Herring default_mux { 230*724ba675SRob Herring function = "i2c4"; 231*724ba675SRob Herring groups = "i2c4_b_1"; 232*724ba675SRob Herring }; 233*724ba675SRob Herring default_cfg1 { 234*724ba675SRob Herring pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */ 235*724ba675SRob Herring ste,config = <&in_nopull>; 236*724ba675SRob Herring }; 237*724ba675SRob Herring }; 238*724ba675SRob Herring 239*724ba675SRob Herring i2c4_b_1_sleep: i2c4_b_1_sleep { 240*724ba675SRob Herring sleep_cfg1 { 241*724ba675SRob Herring pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */ 242*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 243*724ba675SRob Herring }; 244*724ba675SRob Herring }; 245*724ba675SRob Herring }; 246*724ba675SRob Herring 247*724ba675SRob Herring /* Settings for all MMC/SD/SDIO default and sleep states */ 248*724ba675SRob Herring sdi0 { 249*724ba675SRob Herring /* This is the external SD card slot, 4 bits wide */ 250*724ba675SRob Herring mc0_a_1_default: mc0_a_1_default { 251*724ba675SRob Herring default_mux { 252*724ba675SRob Herring function = "mc0"; 253*724ba675SRob Herring groups = "mc0_a_1"; 254*724ba675SRob Herring }; 255*724ba675SRob Herring default_cfg1 { 256*724ba675SRob Herring pins = 257*724ba675SRob Herring "GPIO18_AC2", /* CMDDIR */ 258*724ba675SRob Herring "GPIO19_AC1", /* DAT0DIR */ 259*724ba675SRob Herring "GPIO20_AB4"; /* DAT2DIR */ 260*724ba675SRob Herring ste,config = <&out_hi>; 261*724ba675SRob Herring }; 262*724ba675SRob Herring default_cfg2 { 263*724ba675SRob Herring pins = "GPIO22_AA3"; /* FBCLK */ 264*724ba675SRob Herring ste,config = <&in_nopull>; 265*724ba675SRob Herring }; 266*724ba675SRob Herring default_cfg3 { 267*724ba675SRob Herring pins = "GPIO23_AA4"; /* CLK */ 268*724ba675SRob Herring ste,config = <&out_lo>; 269*724ba675SRob Herring }; 270*724ba675SRob Herring default_cfg4 { 271*724ba675SRob Herring pins = 272*724ba675SRob Herring "GPIO24_AB2", /* CMD */ 273*724ba675SRob Herring "GPIO25_Y4", /* DAT0 */ 274*724ba675SRob Herring "GPIO26_Y2", /* DAT1 */ 275*724ba675SRob Herring "GPIO27_AA2", /* DAT2 */ 276*724ba675SRob Herring "GPIO28_AA1"; /* DAT3 */ 277*724ba675SRob Herring ste,config = <&in_pu>; 278*724ba675SRob Herring }; 279*724ba675SRob Herring }; 280*724ba675SRob Herring 281*724ba675SRob Herring mc0_a_1_sleep: mc0_a_1_sleep { 282*724ba675SRob Herring sleep_cfg1 { 283*724ba675SRob Herring pins = 284*724ba675SRob Herring "GPIO18_AC2", /* CMDDIR */ 285*724ba675SRob Herring "GPIO19_AC1", /* DAT0DIR */ 286*724ba675SRob Herring "GPIO20_AB4"; /* DAT2DIR */ 287*724ba675SRob Herring ste,config = <&slpm_out_hi_wkup_pdis>; 288*724ba675SRob Herring }; 289*724ba675SRob Herring sleep_cfg2 { 290*724ba675SRob Herring pins = 291*724ba675SRob Herring "GPIO22_AA3", /* FBCLK */ 292*724ba675SRob Herring "GPIO24_AB2", /* CMD */ 293*724ba675SRob Herring "GPIO25_Y4", /* DAT0 */ 294*724ba675SRob Herring "GPIO26_Y2", /* DAT1 */ 295*724ba675SRob Herring "GPIO27_AA2", /* DAT2 */ 296*724ba675SRob Herring "GPIO28_AA1"; /* DAT3 */ 297*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 298*724ba675SRob Herring }; 299*724ba675SRob Herring sleep_cfg3 { 300*724ba675SRob Herring pins = "GPIO23_AA4"; /* CLK */ 301*724ba675SRob Herring ste,config = <&slpm_out_lo_wkup_pdis>; 302*724ba675SRob Herring }; 303*724ba675SRob Herring }; 304*724ba675SRob Herring 305*724ba675SRob Herring mc0_a_2_default: mc0_a_2_default { 306*724ba675SRob Herring default_mux { 307*724ba675SRob Herring function = "mc0"; 308*724ba675SRob Herring groups = "mc0_a_2"; 309*724ba675SRob Herring }; 310*724ba675SRob Herring default_cfg1 { 311*724ba675SRob Herring pins = "GPIO22_AA3"; /* FBCLK */ 312*724ba675SRob Herring ste,config = <&in_nopull>; 313*724ba675SRob Herring }; 314*724ba675SRob Herring default_cfg2 { 315*724ba675SRob Herring pins = "GPIO23_AA4"; /* CLK */ 316*724ba675SRob Herring ste,config = <&out_lo>; 317*724ba675SRob Herring }; 318*724ba675SRob Herring default_cfg3 { 319*724ba675SRob Herring pins = 320*724ba675SRob Herring "GPIO24_AB2", /* CMD */ 321*724ba675SRob Herring "GPIO25_Y4", /* DAT0 */ 322*724ba675SRob Herring "GPIO26_Y2", /* DAT1 */ 323*724ba675SRob Herring "GPIO27_AA2", /* DAT2 */ 324*724ba675SRob Herring "GPIO28_AA1"; /* DAT3 */ 325*724ba675SRob Herring ste,config = <&in_pu>; 326*724ba675SRob Herring }; 327*724ba675SRob Herring }; 328*724ba675SRob Herring 329*724ba675SRob Herring mc0_a_2_sleep: mc0_a_2_sleep { 330*724ba675SRob Herring sleep_cfg1 { 331*724ba675SRob Herring pins = 332*724ba675SRob Herring "GPIO22_AA3", /* FBCLK */ 333*724ba675SRob Herring "GPIO24_AB2", /* CMD */ 334*724ba675SRob Herring "GPIO25_Y4", /* DAT0 */ 335*724ba675SRob Herring "GPIO26_Y2", /* DAT1 */ 336*724ba675SRob Herring "GPIO27_AA2", /* DAT2 */ 337*724ba675SRob Herring "GPIO28_AA1"; /* DAT3 */ 338*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 339*724ba675SRob Herring }; 340*724ba675SRob Herring sleep_cfg2 { 341*724ba675SRob Herring pins = "GPIO23_AA4"; /* CLK */ 342*724ba675SRob Herring ste,config = <&slpm_out_lo_wkup_pdis>; 343*724ba675SRob Herring }; 344*724ba675SRob Herring }; 345*724ba675SRob Herring }; 346*724ba675SRob Herring 347*724ba675SRob Herring sdi1 { 348*724ba675SRob Herring /* This is the WLAN SDIO 4 bits wide */ 349*724ba675SRob Herring mc1_a_1_default: mc1_a_1_default { 350*724ba675SRob Herring default_mux { 351*724ba675SRob Herring function = "mc1"; 352*724ba675SRob Herring groups = "mc1_a_1"; 353*724ba675SRob Herring }; 354*724ba675SRob Herring default_cfg1 { 355*724ba675SRob Herring pins = "GPIO208_AH16"; /* CLK */ 356*724ba675SRob Herring ste,config = <&out_lo>; 357*724ba675SRob Herring }; 358*724ba675SRob Herring default_cfg2 { 359*724ba675SRob Herring pins = "GPIO209_AG15"; /* FBCLK */ 360*724ba675SRob Herring ste,config = <&in_nopull>; 361*724ba675SRob Herring }; 362*724ba675SRob Herring default_cfg3 { 363*724ba675SRob Herring pins = 364*724ba675SRob Herring "GPIO210_AJ15", /* CMD */ 365*724ba675SRob Herring "GPIO211_AG14", /* DAT0 */ 366*724ba675SRob Herring "GPIO212_AF13", /* DAT1 */ 367*724ba675SRob Herring "GPIO213_AG13", /* DAT2 */ 368*724ba675SRob Herring "GPIO214_AH15"; /* DAT3 */ 369*724ba675SRob Herring ste,config = <&in_pu>; 370*724ba675SRob Herring }; 371*724ba675SRob Herring }; 372*724ba675SRob Herring 373*724ba675SRob Herring mc1_a_1_sleep: mc1_a_1_sleep { 374*724ba675SRob Herring sleep_cfg1 { 375*724ba675SRob Herring pins = "GPIO208_AH16"; /* CLK */ 376*724ba675SRob Herring ste,config = <&slpm_out_lo_wkup_pdis>; 377*724ba675SRob Herring }; 378*724ba675SRob Herring sleep_cfg2 { 379*724ba675SRob Herring pins = 380*724ba675SRob Herring "GPIO209_AG15", /* FBCLK */ 381*724ba675SRob Herring "GPIO210_AJ15", /* CMD */ 382*724ba675SRob Herring "GPIO211_AG14", /* DAT0 */ 383*724ba675SRob Herring "GPIO212_AF13", /* DAT1 */ 384*724ba675SRob Herring "GPIO213_AG13", /* DAT2 */ 385*724ba675SRob Herring "GPIO214_AH15"; /* DAT3 */ 386*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 387*724ba675SRob Herring }; 388*724ba675SRob Herring }; 389*724ba675SRob Herring 390*724ba675SRob Herring mc1_a_2_default: mc1_a_2_default { 391*724ba675SRob Herring default_mux { 392*724ba675SRob Herring function = "mc1"; 393*724ba675SRob Herring groups = "mc1_a_2"; 394*724ba675SRob Herring }; 395*724ba675SRob Herring default_cfg1 { 396*724ba675SRob Herring pins = "GPIO208_AH16"; /* CLK */ 397*724ba675SRob Herring ste,config = <&out_lo>; 398*724ba675SRob Herring }; 399*724ba675SRob Herring default_cfg2 { 400*724ba675SRob Herring pins = 401*724ba675SRob Herring "GPIO210_AJ15", /* CMD */ 402*724ba675SRob Herring "GPIO211_AG14", /* DAT0 */ 403*724ba675SRob Herring "GPIO212_AF13", /* DAT1 */ 404*724ba675SRob Herring "GPIO213_AG13", /* DAT2 */ 405*724ba675SRob Herring "GPIO214_AH15"; /* DAT3 */ 406*724ba675SRob Herring ste,config = <&in_pu>; 407*724ba675SRob Herring }; 408*724ba675SRob Herring }; 409*724ba675SRob Herring 410*724ba675SRob Herring mc1_a_2_sleep: mc1_a_2_sleep { 411*724ba675SRob Herring sleep_cfg1 { 412*724ba675SRob Herring pins = "GPIO208_AH16"; /* CLK */ 413*724ba675SRob Herring ste,config = <&slpm_out_lo_wkup_pdis>; 414*724ba675SRob Herring }; 415*724ba675SRob Herring sleep_cfg2 { 416*724ba675SRob Herring pins = 417*724ba675SRob Herring "GPIO210_AJ15", /* CMD */ 418*724ba675SRob Herring "GPIO211_AG14", /* DAT0 */ 419*724ba675SRob Herring "GPIO212_AF13", /* DAT1 */ 420*724ba675SRob Herring "GPIO213_AG13", /* DAT2 */ 421*724ba675SRob Herring "GPIO214_AH15"; /* DAT3 */ 422*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 423*724ba675SRob Herring }; 424*724ba675SRob Herring }; 425*724ba675SRob Herring }; 426*724ba675SRob Herring 427*724ba675SRob Herring sdi2 { 428*724ba675SRob Herring /* This is the eMMC 8 bits wide, usually PoP eMMC */ 429*724ba675SRob Herring mc2_a_1_default: mc2_a_1_default { 430*724ba675SRob Herring default_mux { 431*724ba675SRob Herring function = "mc2"; 432*724ba675SRob Herring groups = "mc2_a_1"; 433*724ba675SRob Herring }; 434*724ba675SRob Herring default_cfg1 { 435*724ba675SRob Herring pins = "GPIO128_A5"; /* CLK */ 436*724ba675SRob Herring ste,config = <&out_lo>; 437*724ba675SRob Herring }; 438*724ba675SRob Herring default_cfg2 { 439*724ba675SRob Herring pins = "GPIO130_C8"; /* FBCLK */ 440*724ba675SRob Herring ste,config = <&in_nopull>; 441*724ba675SRob Herring }; 442*724ba675SRob Herring default_cfg3 { 443*724ba675SRob Herring pins = 444*724ba675SRob Herring "GPIO129_B4", /* CMD */ 445*724ba675SRob Herring "GPIO131_A12", /* DAT0 */ 446*724ba675SRob Herring "GPIO132_C10", /* DAT1 */ 447*724ba675SRob Herring "GPIO133_B10", /* DAT2 */ 448*724ba675SRob Herring "GPIO134_B9", /* DAT3 */ 449*724ba675SRob Herring "GPIO135_A9", /* DAT4 */ 450*724ba675SRob Herring "GPIO136_C7", /* DAT5 */ 451*724ba675SRob Herring "GPIO137_A7", /* DAT6 */ 452*724ba675SRob Herring "GPIO138_C5"; /* DAT7 */ 453*724ba675SRob Herring ste,config = <&in_pu>; 454*724ba675SRob Herring }; 455*724ba675SRob Herring }; 456*724ba675SRob Herring 457*724ba675SRob Herring mc2_a_1_sleep: mc2_a_1_sleep { 458*724ba675SRob Herring sleep_cfg1 { 459*724ba675SRob Herring pins = "GPIO128_A5"; /* CLK */ 460*724ba675SRob Herring ste,config = <&out_lo_wkup_pdis>; 461*724ba675SRob Herring }; 462*724ba675SRob Herring sleep_cfg2 { 463*724ba675SRob Herring pins = 464*724ba675SRob Herring "GPIO130_C8", /* FBCLK */ 465*724ba675SRob Herring "GPIO129_B4"; /* CMD */ 466*724ba675SRob Herring ste,config = <&in_wkup_pdis_en>; 467*724ba675SRob Herring }; 468*724ba675SRob Herring sleep_cfg3 { 469*724ba675SRob Herring pins = 470*724ba675SRob Herring "GPIO131_A12", /* DAT0 */ 471*724ba675SRob Herring "GPIO132_C10", /* DAT1 */ 472*724ba675SRob Herring "GPIO133_B10", /* DAT2 */ 473*724ba675SRob Herring "GPIO134_B9", /* DAT3 */ 474*724ba675SRob Herring "GPIO135_A9", /* DAT4 */ 475*724ba675SRob Herring "GPIO136_C7", /* DAT5 */ 476*724ba675SRob Herring "GPIO137_A7", /* DAT6 */ 477*724ba675SRob Herring "GPIO138_C5"; /* DAT7 */ 478*724ba675SRob Herring ste,config = <&in_wkup_pdis>; 479*724ba675SRob Herring }; 480*724ba675SRob Herring }; 481*724ba675SRob Herring }; 482*724ba675SRob Herring 483*724ba675SRob Herring sdi4 { 484*724ba675SRob Herring /* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */ 485*724ba675SRob Herring mc4_a_1_default: mc4_a_1_default { 486*724ba675SRob Herring default_mux { 487*724ba675SRob Herring function = "mc4"; 488*724ba675SRob Herring groups = "mc4_a_1"; 489*724ba675SRob Herring }; 490*724ba675SRob Herring default_cfg1 { 491*724ba675SRob Herring pins = "GPIO203_AE23"; /* CLK */ 492*724ba675SRob Herring ste,config = <&out_lo>; 493*724ba675SRob Herring }; 494*724ba675SRob Herring default_cfg2 { 495*724ba675SRob Herring pins = "GPIO202_AF25"; /* FBCLK */ 496*724ba675SRob Herring ste,config = <&in_nopull>; 497*724ba675SRob Herring }; 498*724ba675SRob Herring default_cfg3 { 499*724ba675SRob Herring pins = 500*724ba675SRob Herring "GPIO201_AF24", /* CMD */ 501*724ba675SRob Herring "GPIO200_AH26", /* DAT0 */ 502*724ba675SRob Herring "GPIO199_AH23", /* DAT1 */ 503*724ba675SRob Herring "GPIO198_AG25", /* DAT2 */ 504*724ba675SRob Herring "GPIO197_AH24", /* DAT3 */ 505*724ba675SRob Herring "GPIO207_AJ23", /* DAT4 */ 506*724ba675SRob Herring "GPIO206_AG24", /* DAT5 */ 507*724ba675SRob Herring "GPIO205_AG23", /* DAT6 */ 508*724ba675SRob Herring "GPIO204_AF23"; /* DAT7 */ 509*724ba675SRob Herring ste,config = <&in_pu>; 510*724ba675SRob Herring }; 511*724ba675SRob Herring }; 512*724ba675SRob Herring 513*724ba675SRob Herring mc4_a_1_sleep: mc4_a_1_sleep { 514*724ba675SRob Herring sleep_cfg1 { 515*724ba675SRob Herring pins = "GPIO203_AE23"; /* CLK */ 516*724ba675SRob Herring ste,config = <&out_lo_wkup_pdis>; 517*724ba675SRob Herring }; 518*724ba675SRob Herring sleep_cfg2 { 519*724ba675SRob Herring pins = 520*724ba675SRob Herring "GPIO202_AF25", /* FBCLK */ 521*724ba675SRob Herring "GPIO201_AF24", /* CMD */ 522*724ba675SRob Herring "GPIO200_AH26", /* DAT0 */ 523*724ba675SRob Herring "GPIO199_AH23", /* DAT1 */ 524*724ba675SRob Herring "GPIO198_AG25", /* DAT2 */ 525*724ba675SRob Herring "GPIO197_AH24", /* DAT3 */ 526*724ba675SRob Herring "GPIO207_AJ23", /* DAT4 */ 527*724ba675SRob Herring "GPIO206_AG24", /* DAT5 */ 528*724ba675SRob Herring "GPIO205_AG23", /* DAT6 */ 529*724ba675SRob Herring "GPIO204_AF23"; /* DAT7 */ 530*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis>; 531*724ba675SRob Herring }; 532*724ba675SRob Herring }; 533*724ba675SRob Herring }; 534*724ba675SRob Herring 535*724ba675SRob Herring /* 536*724ba675SRob Herring * Multi-rate serial ports (MSPs) - MSP3 output is internal and 537*724ba675SRob Herring * cannot be muxed onto any pins. 538*724ba675SRob Herring */ 539*724ba675SRob Herring msp0 { 540*724ba675SRob Herring msp0txrxtfstck_a_1_default: msp0txrxtfstck_a_1_default { 541*724ba675SRob Herring default_msp0_mux { 542*724ba675SRob Herring function = "msp0"; 543*724ba675SRob Herring groups = "msp0txrx_a_1", "msp0tfstck_a_1"; 544*724ba675SRob Herring }; 545*724ba675SRob Herring default_msp0_cfg { 546*724ba675SRob Herring pins = 547*724ba675SRob Herring "GPIO12_AC4", /* TXD */ 548*724ba675SRob Herring "GPIO15_AC3", /* RXD */ 549*724ba675SRob Herring "GPIO13_AF3", /* TFS */ 550*724ba675SRob Herring "GPIO14_AE3"; /* TCK */ 551*724ba675SRob Herring ste,config = <&in_nopull>; 552*724ba675SRob Herring }; 553*724ba675SRob Herring }; 554*724ba675SRob Herring }; 555*724ba675SRob Herring 556*724ba675SRob Herring msp1 { 557*724ba675SRob Herring msp1txrx_a_1_default: msp1txrx_a_1_default { 558*724ba675SRob Herring default_mux { 559*724ba675SRob Herring function = "msp1"; 560*724ba675SRob Herring groups = "msp1txrx_a_1", "msp1_a_1"; 561*724ba675SRob Herring }; 562*724ba675SRob Herring default_cfg1 { 563*724ba675SRob Herring pins = "GPIO33_AF2"; 564*724ba675SRob Herring ste,config = <&out_lo>; 565*724ba675SRob Herring }; 566*724ba675SRob Herring default_cfg2 { 567*724ba675SRob Herring pins = 568*724ba675SRob Herring "GPIO34_AE1", 569*724ba675SRob Herring "GPIO35_AE2", 570*724ba675SRob Herring "GPIO36_AG2"; 571*724ba675SRob Herring ste,config = <&in_nopull>; 572*724ba675SRob Herring }; 573*724ba675SRob Herring }; 574*724ba675SRob Herring }; 575*724ba675SRob Herring 576*724ba675SRob Herring msp2 { 577*724ba675SRob Herring msp2_a_1_default: msp2_a_1_default { 578*724ba675SRob Herring /* MSP2 usually used for HDMI audio */ 579*724ba675SRob Herring default_mux { 580*724ba675SRob Herring function = "msp2"; 581*724ba675SRob Herring groups = "msp2_a_1"; 582*724ba675SRob Herring }; 583*724ba675SRob Herring default_cfg1 { 584*724ba675SRob Herring pins = 585*724ba675SRob Herring "GPIO193_AH27", /* TXD */ 586*724ba675SRob Herring "GPIO194_AF27", /* TCK */ 587*724ba675SRob Herring "GPIO195_AG28"; /* TFS */ 588*724ba675SRob Herring ste,config = <&in_pd>; 589*724ba675SRob Herring }; 590*724ba675SRob Herring default_cfg2 { 591*724ba675SRob Herring pins = "GPIO196_AG26"; /* RXD */ 592*724ba675SRob Herring ste,config = <&out_lo>; 593*724ba675SRob Herring }; 594*724ba675SRob Herring }; 595*724ba675SRob Herring }; 596*724ba675SRob Herring 597*724ba675SRob Herring musb { 598*724ba675SRob Herring usb_a_1_default: usb_a_1_default { 599*724ba675SRob Herring default_mux { 600*724ba675SRob Herring function = "usb"; 601*724ba675SRob Herring groups = "usb_a_1"; 602*724ba675SRob Herring }; 603*724ba675SRob Herring default_cfg1 { 604*724ba675SRob Herring pins = 605*724ba675SRob Herring "GPIO256_AF28", /* NXT */ 606*724ba675SRob Herring "GPIO258_AD29", /* XCLK */ 607*724ba675SRob Herring "GPIO259_AC29", /* DIR */ 608*724ba675SRob Herring "GPIO260_AD28", /* DAT7 */ 609*724ba675SRob Herring "GPIO261_AD26", /* DAT6 */ 610*724ba675SRob Herring "GPIO262_AE26", /* DAT5 */ 611*724ba675SRob Herring "GPIO263_AG29", /* DAT4 */ 612*724ba675SRob Herring "GPIO264_AE27", /* DAT3 */ 613*724ba675SRob Herring "GPIO265_AD27", /* DAT2 */ 614*724ba675SRob Herring "GPIO266_AC28", /* DAT1 */ 615*724ba675SRob Herring "GPIO267_AC27"; /* DAT0 */ 616*724ba675SRob Herring ste,config = <&in_nopull>; 617*724ba675SRob Herring }; 618*724ba675SRob Herring default_cfg2 { 619*724ba675SRob Herring pins = "GPIO257_AE29"; /* STP */ 620*724ba675SRob Herring ste,config = <&out_hi>; 621*724ba675SRob Herring }; 622*724ba675SRob Herring }; 623*724ba675SRob Herring 624*724ba675SRob Herring usb_a_1_sleep: usb_a_1_sleep { 625*724ba675SRob Herring sleep_cfg1 { 626*724ba675SRob Herring pins = 627*724ba675SRob Herring "GPIO256_AF28", /* NXT */ 628*724ba675SRob Herring "GPIO258_AD29", /* XCLK */ 629*724ba675SRob Herring "GPIO259_AC29"; /* DIR */ 630*724ba675SRob Herring ste,config = <&slpm_wkup_pdis_en>; 631*724ba675SRob Herring }; 632*724ba675SRob Herring sleep_cfg2 { 633*724ba675SRob Herring pins = "GPIO257_AE29"; /* STP */ 634*724ba675SRob Herring ste,config = <&slpm_out_hi_wkup_pdis>; 635*724ba675SRob Herring }; 636*724ba675SRob Herring sleep_cfg3 { 637*724ba675SRob Herring pins = 638*724ba675SRob Herring "GPIO260_AD28", /* DAT7 */ 639*724ba675SRob Herring "GPIO261_AD26", /* DAT6 */ 640*724ba675SRob Herring "GPIO262_AE26", /* DAT5 */ 641*724ba675SRob Herring "GPIO263_AG29", /* DAT4 */ 642*724ba675SRob Herring "GPIO264_AE27", /* DAT3 */ 643*724ba675SRob Herring "GPIO265_AD27", /* DAT2 */ 644*724ba675SRob Herring "GPIO266_AC28", /* DAT1 */ 645*724ba675SRob Herring "GPIO267_AC27"; /* DAT0 */ 646*724ba675SRob Herring ste,config = <&slpm_in_wkup_pdis_en>; 647*724ba675SRob Herring }; 648*724ba675SRob Herring }; 649*724ba675SRob Herring }; 650*724ba675SRob Herring}; 651