1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Copyright 2012 Stefan Roese <sr@denx.de>
4*724ba675SRob Herring */
5*724ba675SRob Herring
6*724ba675SRob Herring/ {
7*724ba675SRob Herring	#address-cells = <1>;
8*724ba675SRob Herring	#size-cells = <1>;
9*724ba675SRob Herring	compatible = "st,spear600";
10*724ba675SRob Herring
11*724ba675SRob Herring	cpus {
12*724ba675SRob Herring		#address-cells = <0>;
13*724ba675SRob Herring		#size-cells = <0>;
14*724ba675SRob Herring
15*724ba675SRob Herring		cpu {
16*724ba675SRob Herring			compatible = "arm,arm926ej-s";
17*724ba675SRob Herring			device_type = "cpu";
18*724ba675SRob Herring		};
19*724ba675SRob Herring	};
20*724ba675SRob Herring
21*724ba675SRob Herring	memory {
22*724ba675SRob Herring		device_type = "memory";
23*724ba675SRob Herring		reg = <0 0x40000000>;
24*724ba675SRob Herring	};
25*724ba675SRob Herring
26*724ba675SRob Herring	ahb {
27*724ba675SRob Herring		#address-cells = <1>;
28*724ba675SRob Herring		#size-cells = <1>;
29*724ba675SRob Herring		compatible = "simple-bus";
30*724ba675SRob Herring		ranges = <0xd0000000 0xd0000000 0x30000000>;
31*724ba675SRob Herring
32*724ba675SRob Herring		vic0: interrupt-controller@f1100000 {
33*724ba675SRob Herring			compatible = "arm,pl190-vic";
34*724ba675SRob Herring			interrupt-controller;
35*724ba675SRob Herring			reg = <0xf1100000 0x1000>;
36*724ba675SRob Herring			#interrupt-cells = <1>;
37*724ba675SRob Herring		};
38*724ba675SRob Herring
39*724ba675SRob Herring		vic1: interrupt-controller@f1000000 {
40*724ba675SRob Herring			compatible = "arm,pl190-vic";
41*724ba675SRob Herring			interrupt-controller;
42*724ba675SRob Herring			reg = <0xf1000000 0x1000>;
43*724ba675SRob Herring			#interrupt-cells = <1>;
44*724ba675SRob Herring		};
45*724ba675SRob Herring
46*724ba675SRob Herring		clcd: clcd@fc200000 {
47*724ba675SRob Herring			compatible = "arm,pl110", "arm,primecell";
48*724ba675SRob Herring			reg = <0xfc200000 0x1000>;
49*724ba675SRob Herring			interrupt-parent = <&vic1>;
50*724ba675SRob Herring			interrupts = <13>;
51*724ba675SRob Herring			status = "disabled";
52*724ba675SRob Herring		};
53*724ba675SRob Herring
54*724ba675SRob Herring		dmac: dma@fc400000 {
55*724ba675SRob Herring			compatible = "arm,pl080", "arm,primecell";
56*724ba675SRob Herring			reg = <0xfc400000 0x1000>;
57*724ba675SRob Herring			interrupt-parent = <&vic1>;
58*724ba675SRob Herring			interrupts = <10>;
59*724ba675SRob Herring			status = "disabled";
60*724ba675SRob Herring		};
61*724ba675SRob Herring
62*724ba675SRob Herring		gmac: ethernet@e0800000 {
63*724ba675SRob Herring			compatible = "st,spear600-gmac";
64*724ba675SRob Herring			reg = <0xe0800000 0x8000>;
65*724ba675SRob Herring			interrupt-parent = <&vic1>;
66*724ba675SRob Herring			interrupts = <24 23>;
67*724ba675SRob Herring			interrupt-names = "macirq", "eth_wake_irq";
68*724ba675SRob Herring			phy-mode = "gmii";
69*724ba675SRob Herring			status = "disabled";
70*724ba675SRob Herring		};
71*724ba675SRob Herring
72*724ba675SRob Herring		fsmc: flash@d1800000 {
73*724ba675SRob Herring			compatible = "st,spear600-fsmc-nand";
74*724ba675SRob Herring			#address-cells = <1>;
75*724ba675SRob Herring			#size-cells = <1>;
76*724ba675SRob Herring			reg = <0xd1800000 0x1000	/* FSMC Register */
77*724ba675SRob Herring			       0xd2000000 0x0010	/* NAND Base DATA */
78*724ba675SRob Herring			       0xd2020000 0x0010	/* NAND Base ADDR */
79*724ba675SRob Herring			       0xd2010000 0x0010>;	/* NAND Base CMD */
80*724ba675SRob Herring			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
81*724ba675SRob Herring			status = "disabled";
82*724ba675SRob Herring		};
83*724ba675SRob Herring
84*724ba675SRob Herring		smi: flash@fc000000 {
85*724ba675SRob Herring			compatible = "st,spear600-smi";
86*724ba675SRob Herring			#address-cells = <1>;
87*724ba675SRob Herring			#size-cells = <1>;
88*724ba675SRob Herring			reg = <0xfc000000 0x1000>;
89*724ba675SRob Herring			interrupt-parent = <&vic1>;
90*724ba675SRob Herring			interrupts = <12>;
91*724ba675SRob Herring			status = "disabled";
92*724ba675SRob Herring		};
93*724ba675SRob Herring
94*724ba675SRob Herring		ehci_usb0: ehci@e1800000 {
95*724ba675SRob Herring			compatible = "st,spear600-ehci", "usb-ehci";
96*724ba675SRob Herring			reg = <0xe1800000 0x1000>;
97*724ba675SRob Herring			interrupt-parent = <&vic1>;
98*724ba675SRob Herring			interrupts = <27>;
99*724ba675SRob Herring			status = "disabled";
100*724ba675SRob Herring		};
101*724ba675SRob Herring
102*724ba675SRob Herring		ehci_usb1: ehci@e2000000 {
103*724ba675SRob Herring			compatible = "st,spear600-ehci", "usb-ehci";
104*724ba675SRob Herring			reg = <0xe2000000 0x1000>;
105*724ba675SRob Herring			interrupt-parent = <&vic1>;
106*724ba675SRob Herring			interrupts = <29>;
107*724ba675SRob Herring			status = "disabled";
108*724ba675SRob Herring		};
109*724ba675SRob Herring
110*724ba675SRob Herring		ohci_usb0: ohci@e1900000 {
111*724ba675SRob Herring			compatible = "st,spear600-ohci", "usb-ohci";
112*724ba675SRob Herring			reg = <0xe1900000 0x1000>;
113*724ba675SRob Herring			interrupt-parent = <&vic1>;
114*724ba675SRob Herring			interrupts = <26>;
115*724ba675SRob Herring			status = "disabled";
116*724ba675SRob Herring		};
117*724ba675SRob Herring
118*724ba675SRob Herring		ohci_usb1: ohci@e2100000 {
119*724ba675SRob Herring			compatible = "st,spear600-ohci", "usb-ohci";
120*724ba675SRob Herring			reg = <0xe2100000 0x1000>;
121*724ba675SRob Herring			interrupt-parent = <&vic1>;
122*724ba675SRob Herring			interrupts = <28>;
123*724ba675SRob Herring			status = "disabled";
124*724ba675SRob Herring		};
125*724ba675SRob Herring
126*724ba675SRob Herring		apb {
127*724ba675SRob Herring			#address-cells = <1>;
128*724ba675SRob Herring			#size-cells = <1>;
129*724ba675SRob Herring			compatible = "simple-bus";
130*724ba675SRob Herring			ranges = <0xd0000000 0xd0000000 0x30000000>;
131*724ba675SRob Herring
132*724ba675SRob Herring			uart0: serial@d0000000 {
133*724ba675SRob Herring				compatible = "arm,pl011", "arm,primecell";
134*724ba675SRob Herring				reg = <0xd0000000 0x1000>;
135*724ba675SRob Herring				interrupt-parent = <&vic0>;
136*724ba675SRob Herring				interrupts = <24>;
137*724ba675SRob Herring				status = "disabled";
138*724ba675SRob Herring			};
139*724ba675SRob Herring
140*724ba675SRob Herring			uart1: serial@d0080000 {
141*724ba675SRob Herring				compatible = "arm,pl011", "arm,primecell";
142*724ba675SRob Herring				reg = <0xd0080000 0x1000>;
143*724ba675SRob Herring				interrupt-parent = <&vic0>;
144*724ba675SRob Herring				interrupts = <25>;
145*724ba675SRob Herring				status = "disabled";
146*724ba675SRob Herring			};
147*724ba675SRob Herring
148*724ba675SRob Herring			/* local/cpu GPIO */
149*724ba675SRob Herring			gpio0: gpio@f0100000 {
150*724ba675SRob Herring				#gpio-cells = <2>;
151*724ba675SRob Herring				compatible = "arm,pl061", "arm,primecell";
152*724ba675SRob Herring				gpio-controller;
153*724ba675SRob Herring				reg = <0xf0100000 0x1000>;
154*724ba675SRob Herring				interrupt-parent = <&vic0>;
155*724ba675SRob Herring				interrupts = <18>;
156*724ba675SRob Herring			};
157*724ba675SRob Herring
158*724ba675SRob Herring			/* basic GPIO */
159*724ba675SRob Herring			gpio1: gpio@fc980000 {
160*724ba675SRob Herring				#gpio-cells = <2>;
161*724ba675SRob Herring				compatible = "arm,pl061", "arm,primecell";
162*724ba675SRob Herring				gpio-controller;
163*724ba675SRob Herring				reg = <0xfc980000 0x1000>;
164*724ba675SRob Herring				interrupt-parent = <&vic1>;
165*724ba675SRob Herring				interrupts = <19>;
166*724ba675SRob Herring			};
167*724ba675SRob Herring
168*724ba675SRob Herring			/* appl GPIO */
169*724ba675SRob Herring			gpio2: gpio@d8100000 {
170*724ba675SRob Herring				#gpio-cells = <2>;
171*724ba675SRob Herring				compatible = "arm,pl061", "arm,primecell";
172*724ba675SRob Herring				gpio-controller;
173*724ba675SRob Herring				reg = <0xd8100000 0x1000>;
174*724ba675SRob Herring				interrupt-parent = <&vic1>;
175*724ba675SRob Herring				interrupts = <4>;
176*724ba675SRob Herring			};
177*724ba675SRob Herring
178*724ba675SRob Herring			i2c: i2c@d0200000 {
179*724ba675SRob Herring				#address-cells = <1>;
180*724ba675SRob Herring				#size-cells = <0>;
181*724ba675SRob Herring				compatible = "snps,designware-i2c";
182*724ba675SRob Herring				reg = <0xd0200000 0x1000>;
183*724ba675SRob Herring				interrupt-parent = <&vic0>;
184*724ba675SRob Herring				interrupts = <28>;
185*724ba675SRob Herring				status = "disabled";
186*724ba675SRob Herring			};
187*724ba675SRob Herring
188*724ba675SRob Herring			rtc: rtc@fc900000 {
189*724ba675SRob Herring				compatible = "st,spear600-rtc";
190*724ba675SRob Herring				reg = <0xfc900000 0x1000>;
191*724ba675SRob Herring				interrupt-parent = <&vic0>;
192*724ba675SRob Herring				interrupts = <10>;
193*724ba675SRob Herring				status = "disabled";
194*724ba675SRob Herring			};
195*724ba675SRob Herring
196*724ba675SRob Herring			timer@f0000000 {
197*724ba675SRob Herring				compatible = "st,spear-timer";
198*724ba675SRob Herring				reg = <0xf0000000 0x400>;
199*724ba675SRob Herring				interrupt-parent = <&vic0>;
200*724ba675SRob Herring				interrupts = <16>;
201*724ba675SRob Herring			};
202*724ba675SRob Herring
203*724ba675SRob Herring			adc: adc@d820b000 {
204*724ba675SRob Herring				compatible = "st,spear600-adc";
205*724ba675SRob Herring				reg = <0xd820b000 0x1000>;
206*724ba675SRob Herring				interrupt-parent = <&vic1>;
207*724ba675SRob Herring				interrupts = <6>;
208*724ba675SRob Herring				status = "disabled";
209*724ba675SRob Herring			};
210*724ba675SRob Herring
211*724ba675SRob Herring			ssp1: spi@d0100000 {
212*724ba675SRob Herring				compatible = "arm,pl022", "arm,primecell";
213*724ba675SRob Herring				reg = <0xd0100000 0x1000>;
214*724ba675SRob Herring				#address-cells = <1>;
215*724ba675SRob Herring				#size-cells = <0>;
216*724ba675SRob Herring				interrupt-parent = <&vic0>;
217*724ba675SRob Herring				interrupts = <26>;
218*724ba675SRob Herring				status = "disabled";
219*724ba675SRob Herring			};
220*724ba675SRob Herring
221*724ba675SRob Herring			ssp2: spi@d0180000 {
222*724ba675SRob Herring				compatible = "arm,pl022", "arm,primecell";
223*724ba675SRob Herring				reg = <0xd0180000 0x1000>;
224*724ba675SRob Herring				#address-cells = <1>;
225*724ba675SRob Herring				#size-cells = <0>;
226*724ba675SRob Herring				interrupt-parent = <&vic0>;
227*724ba675SRob Herring				interrupts = <27>;
228*724ba675SRob Herring				status = "disabled";
229*724ba675SRob Herring			};
230*724ba675SRob Herring
231*724ba675SRob Herring			ssp3: spi@d8180000 {
232*724ba675SRob Herring				compatible = "arm,pl022", "arm,primecell";
233*724ba675SRob Herring				reg = <0xd8180000 0x1000>;
234*724ba675SRob Herring				#address-cells = <1>;
235*724ba675SRob Herring				#size-cells = <0>;
236*724ba675SRob Herring				interrupt-parent = <&vic1>;
237*724ba675SRob Herring				interrupts = <5>;
238*724ba675SRob Herring				status = "disabled";
239*724ba675SRob Herring			};
240*724ba675SRob Herring		};
241*724ba675SRob Herring	};
242*724ba675SRob Herring};
243