1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2*724ba675SRob Herring/* 3*724ba675SRob Herring * DTS file for SPEAr320 SoC 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright 2012 Viresh Kumar <vireshk@kernel.org> 6*724ba675SRob Herring */ 7*724ba675SRob Herring 8*724ba675SRob Herring/include/ "spear3xx.dtsi" 9*724ba675SRob Herring 10*724ba675SRob Herring/ { 11*724ba675SRob Herring ahb { 12*724ba675SRob Herring #address-cells = <1>; 13*724ba675SRob Herring #size-cells = <1>; 14*724ba675SRob Herring compatible = "simple-bus"; 15*724ba675SRob Herring ranges = <0x40000000 0x40000000 0x80000000 16*724ba675SRob Herring 0xd0000000 0xd0000000 0x30000000>; 17*724ba675SRob Herring 18*724ba675SRob Herring pinmux: pinmux@b3000000 { 19*724ba675SRob Herring compatible = "st,spear320-pinmux"; 20*724ba675SRob Herring reg = <0xb3000000 0x1000>; 21*724ba675SRob Herring #gpio-range-cells = <3>; 22*724ba675SRob Herring }; 23*724ba675SRob Herring 24*724ba675SRob Herring clcd@90000000 { 25*724ba675SRob Herring compatible = "arm,pl110", "arm,primecell"; 26*724ba675SRob Herring reg = <0x90000000 0x1000>; 27*724ba675SRob Herring interrupts = <8>; 28*724ba675SRob Herring interrupt-parent = <&shirq>; 29*724ba675SRob Herring status = "disabled"; 30*724ba675SRob Herring }; 31*724ba675SRob Herring 32*724ba675SRob Herring fsmc: flash@4c000000 { 33*724ba675SRob Herring compatible = "st,spear600-fsmc-nand"; 34*724ba675SRob Herring #address-cells = <1>; 35*724ba675SRob Herring #size-cells = <1>; 36*724ba675SRob Herring reg = <0x4c000000 0x1000 /* FSMC Register */ 37*724ba675SRob Herring 0x50000000 0x0010 /* NAND Base DATA */ 38*724ba675SRob Herring 0x50020000 0x0010 /* NAND Base ADDR */ 39*724ba675SRob Herring 0x50010000 0x0010>; /* NAND Base CMD */ 40*724ba675SRob Herring reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; 41*724ba675SRob Herring status = "disabled"; 42*724ba675SRob Herring }; 43*724ba675SRob Herring 44*724ba675SRob Herring sdhci@70000000 { 45*724ba675SRob Herring compatible = "st,sdhci-spear"; 46*724ba675SRob Herring reg = <0x70000000 0x100>; 47*724ba675SRob Herring interrupts = <10>; 48*724ba675SRob Herring interrupt-parent = <&shirq>; 49*724ba675SRob Herring status = "disabled"; 50*724ba675SRob Herring }; 51*724ba675SRob Herring 52*724ba675SRob Herring shirq: interrupt-controller@b3000000 { 53*724ba675SRob Herring compatible = "st,spear320-shirq"; 54*724ba675SRob Herring reg = <0xb3000000 0x1000>; 55*724ba675SRob Herring interrupts = <30 28 29 1>; 56*724ba675SRob Herring #interrupt-cells = <1>; 57*724ba675SRob Herring interrupt-controller; 58*724ba675SRob Herring }; 59*724ba675SRob Herring 60*724ba675SRob Herring spi1: spi@a5000000 { 61*724ba675SRob Herring compatible = "arm,pl022", "arm,primecell"; 62*724ba675SRob Herring reg = <0xa5000000 0x1000>; 63*724ba675SRob Herring interrupts = <15>; 64*724ba675SRob Herring interrupt-parent = <&shirq>; 65*724ba675SRob Herring #address-cells = <1>; 66*724ba675SRob Herring #size-cells = <0>; 67*724ba675SRob Herring status = "disabled"; 68*724ba675SRob Herring }; 69*724ba675SRob Herring 70*724ba675SRob Herring spi2: spi@a6000000 { 71*724ba675SRob Herring compatible = "arm,pl022", "arm,primecell"; 72*724ba675SRob Herring reg = <0xa6000000 0x1000>; 73*724ba675SRob Herring interrupts = <16>; 74*724ba675SRob Herring interrupt-parent = <&shirq>; 75*724ba675SRob Herring #address-cells = <1>; 76*724ba675SRob Herring #size-cells = <0>; 77*724ba675SRob Herring status = "disabled"; 78*724ba675SRob Herring }; 79*724ba675SRob Herring 80*724ba675SRob Herring pwm: pwm@a8000000 { 81*724ba675SRob Herring compatible = "st,spear-pwm"; 82*724ba675SRob Herring reg = <0xa8000000 0x1000>; 83*724ba675SRob Herring #pwm-cells = <2>; 84*724ba675SRob Herring status = "disabled"; 85*724ba675SRob Herring }; 86*724ba675SRob Herring 87*724ba675SRob Herring apb { 88*724ba675SRob Herring #address-cells = <1>; 89*724ba675SRob Herring #size-cells = <1>; 90*724ba675SRob Herring compatible = "simple-bus"; 91*724ba675SRob Herring ranges = <0xa0000000 0xa0000000 0x20000000 92*724ba675SRob Herring 0xd0000000 0xd0000000 0x30000000>; 93*724ba675SRob Herring 94*724ba675SRob Herring i2c1: i2c@a7000000 { 95*724ba675SRob Herring #address-cells = <1>; 96*724ba675SRob Herring #size-cells = <0>; 97*724ba675SRob Herring compatible = "snps,designware-i2c"; 98*724ba675SRob Herring reg = <0xa7000000 0x1000>; 99*724ba675SRob Herring interrupts = <21>; 100*724ba675SRob Herring interrupt-parent = <&shirq>; 101*724ba675SRob Herring status = "disabled"; 102*724ba675SRob Herring }; 103*724ba675SRob Herring 104*724ba675SRob Herring serial@a3000000 { 105*724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 106*724ba675SRob Herring reg = <0xa3000000 0x1000>; 107*724ba675SRob Herring interrupts = <13>; 108*724ba675SRob Herring interrupt-parent = <&shirq>; 109*724ba675SRob Herring status = "disabled"; 110*724ba675SRob Herring }; 111*724ba675SRob Herring 112*724ba675SRob Herring serial@a4000000 { 113*724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 114*724ba675SRob Herring reg = <0xa4000000 0x1000>; 115*724ba675SRob Herring interrupts = <14>; 116*724ba675SRob Herring interrupt-parent = <&shirq>; 117*724ba675SRob Herring status = "disabled"; 118*724ba675SRob Herring }; 119*724ba675SRob Herring 120*724ba675SRob Herring gpiopinctrl: gpio@b3000000 { 121*724ba675SRob Herring compatible = "st,spear-plgpio"; 122*724ba675SRob Herring reg = <0xb3000000 0x1000>; 123*724ba675SRob Herring regmap = <&pinmux>; 124*724ba675SRob Herring #interrupt-cells = <1>; 125*724ba675SRob Herring interrupt-controller; 126*724ba675SRob Herring gpio-controller; 127*724ba675SRob Herring #gpio-cells = <2>; 128*724ba675SRob Herring gpio-ranges = <&pinmux 0 0 102>; 129*724ba675SRob Herring status = "disabled"; 130*724ba675SRob Herring 131*724ba675SRob Herring st-plgpio,ngpio = <102>; 132*724ba675SRob Herring st-plgpio,enb-reg = <0x24>; 133*724ba675SRob Herring st-plgpio,wdata-reg = <0x34>; 134*724ba675SRob Herring st-plgpio,dir-reg = <0x44>; 135*724ba675SRob Herring st-plgpio,ie-reg = <0x64>; 136*724ba675SRob Herring st-plgpio,rdata-reg = <0x54>; 137*724ba675SRob Herring st-plgpio,mis-reg = <0x84>; 138*724ba675SRob Herring st-plgpio,eit-reg = <0x94>; 139*724ba675SRob Herring }; 140*724ba675SRob Herring }; 141*724ba675SRob Herring }; 142*724ba675SRob Herring}; 143