1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later
2*724ba675SRob Herring/*
3*724ba675SRob Herring * DTS file for SPEAr310 SoC
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herring/include/ "spear3xx.dtsi"
9*724ba675SRob Herring
10*724ba675SRob Herring/ {
11*724ba675SRob Herring	ahb {
12*724ba675SRob Herring		#address-cells = <1>;
13*724ba675SRob Herring		#size-cells = <1>;
14*724ba675SRob Herring		compatible = "simple-bus";
15*724ba675SRob Herring		ranges = <0x40000000 0x40000000 0x10000000
16*724ba675SRob Herring			  0xb0000000 0xb0000000 0x10000000
17*724ba675SRob Herring			  0xd0000000 0xd0000000 0x30000000>;
18*724ba675SRob Herring
19*724ba675SRob Herring		pinmux: pinmux@b4000000 {
20*724ba675SRob Herring			compatible = "st,spear310-pinmux";
21*724ba675SRob Herring			reg = <0xb4000000 0x1000>;
22*724ba675SRob Herring			#gpio-range-cells = <3>;
23*724ba675SRob Herring		};
24*724ba675SRob Herring
25*724ba675SRob Herring		fsmc: flash@44000000 {
26*724ba675SRob Herring			compatible = "st,spear600-fsmc-nand";
27*724ba675SRob Herring			#address-cells = <1>;
28*724ba675SRob Herring			#size-cells = <1>;
29*724ba675SRob Herring			reg = <0x44000000 0x1000	/* FSMC Register */
30*724ba675SRob Herring			       0x40000000 0x0010	/* NAND Base DATA */
31*724ba675SRob Herring			       0x40020000 0x0010	/* NAND Base ADDR */
32*724ba675SRob Herring			       0x40010000 0x0010>;	/* NAND Base CMD */
33*724ba675SRob Herring			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
34*724ba675SRob Herring			status = "disabled";
35*724ba675SRob Herring		};
36*724ba675SRob Herring
37*724ba675SRob Herring		shirq: interrupt-controller@b4000000 {
38*724ba675SRob Herring			compatible = "st,spear310-shirq";
39*724ba675SRob Herring			reg = <0xb4000000 0x1000>;
40*724ba675SRob Herring			interrupts = <28 29 30 1>;
41*724ba675SRob Herring			#interrupt-cells = <1>;
42*724ba675SRob Herring			interrupt-controller;
43*724ba675SRob Herring		};
44*724ba675SRob Herring
45*724ba675SRob Herring		apb {
46*724ba675SRob Herring			#address-cells = <1>;
47*724ba675SRob Herring			#size-cells = <1>;
48*724ba675SRob Herring			compatible = "simple-bus";
49*724ba675SRob Herring			ranges = <0xb0000000 0xb0000000 0x10000000
50*724ba675SRob Herring				  0xd0000000 0xd0000000 0x30000000>;
51*724ba675SRob Herring
52*724ba675SRob Herring			serial@b2000000 {
53*724ba675SRob Herring				compatible = "arm,pl011", "arm,primecell";
54*724ba675SRob Herring				reg = <0xb2000000 0x1000>;
55*724ba675SRob Herring				interrupts = <8>;
56*724ba675SRob Herring				interrupt-parent = <&shirq>;
57*724ba675SRob Herring				status = "disabled";
58*724ba675SRob Herring			};
59*724ba675SRob Herring
60*724ba675SRob Herring			serial@b2080000 {
61*724ba675SRob Herring				compatible = "arm,pl011", "arm,primecell";
62*724ba675SRob Herring				reg = <0xb2080000 0x1000>;
63*724ba675SRob Herring				interrupts = <9>;
64*724ba675SRob Herring				interrupt-parent = <&shirq>;
65*724ba675SRob Herring				status = "disabled";
66*724ba675SRob Herring			};
67*724ba675SRob Herring
68*724ba675SRob Herring			serial@b2100000 {
69*724ba675SRob Herring				compatible = "arm,pl011", "arm,primecell";
70*724ba675SRob Herring				reg = <0xb2100000 0x1000>;
71*724ba675SRob Herring				interrupts = <10>;
72*724ba675SRob Herring				interrupt-parent = <&shirq>;
73*724ba675SRob Herring				status = "disabled";
74*724ba675SRob Herring			};
75*724ba675SRob Herring
76*724ba675SRob Herring			serial@b2180000 {
77*724ba675SRob Herring				compatible = "arm,pl011", "arm,primecell";
78*724ba675SRob Herring				reg = <0xb2180000 0x1000>;
79*724ba675SRob Herring				interrupts = <11>;
80*724ba675SRob Herring				interrupt-parent = <&shirq>;
81*724ba675SRob Herring				status = "disabled";
82*724ba675SRob Herring			};
83*724ba675SRob Herring
84*724ba675SRob Herring			serial@b2200000 {
85*724ba675SRob Herring				compatible = "arm,pl011", "arm,primecell";
86*724ba675SRob Herring				reg = <0xb2200000 0x1000>;
87*724ba675SRob Herring				interrupts = <12>;
88*724ba675SRob Herring				interrupt-parent = <&shirq>;
89*724ba675SRob Herring				status = "disabled";
90*724ba675SRob Herring			};
91*724ba675SRob Herring
92*724ba675SRob Herring			gpiopinctrl: gpio@b4000000 {
93*724ba675SRob Herring				compatible = "st,spear-plgpio";
94*724ba675SRob Herring				reg = <0xb4000000 0x1000>;
95*724ba675SRob Herring				regmap = <&pinmux>;
96*724ba675SRob Herring				#interrupt-cells = <1>;
97*724ba675SRob Herring				interrupt-controller;
98*724ba675SRob Herring				gpio-controller;
99*724ba675SRob Herring				#gpio-cells = <2>;
100*724ba675SRob Herring				gpio-ranges = <&pinmux 0 0 102>;
101*724ba675SRob Herring				status = "disabled";
102*724ba675SRob Herring
103*724ba675SRob Herring				st-plgpio,ngpio = <102>;
104*724ba675SRob Herring				st-plgpio,enb-reg = <0x10>;
105*724ba675SRob Herring				st-plgpio,wdata-reg = <0x20>;
106*724ba675SRob Herring				st-plgpio,dir-reg = <0x30>;
107*724ba675SRob Herring				st-plgpio,ie-reg = <0x50>;
108*724ba675SRob Herring				st-plgpio,rdata-reg = <0x40>;
109*724ba675SRob Herring				st-plgpio,mis-reg = <0x60>;
110*724ba675SRob Herring			};
111*724ba675SRob Herring		};
112*724ba675SRob Herring	};
113*724ba675SRob Herring};
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