1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2*724ba675SRob Herring/* 3*724ba675SRob Herring * DTS file for SPEAr300 SoC 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright 2012 Viresh Kumar <vireshk@kernel.org> 6*724ba675SRob Herring */ 7*724ba675SRob Herring 8*724ba675SRob Herring/include/ "spear3xx.dtsi" 9*724ba675SRob Herring 10*724ba675SRob Herring/ { 11*724ba675SRob Herring ahb { 12*724ba675SRob Herring #address-cells = <1>; 13*724ba675SRob Herring #size-cells = <1>; 14*724ba675SRob Herring compatible = "simple-bus"; 15*724ba675SRob Herring ranges = <0x60000000 0x60000000 0x50000000 16*724ba675SRob Herring 0xd0000000 0xd0000000 0x30000000>; 17*724ba675SRob Herring 18*724ba675SRob Herring pinmux@99000000 { 19*724ba675SRob Herring compatible = "st,spear300-pinmux"; 20*724ba675SRob Herring reg = <0x99000000 0x1000>; 21*724ba675SRob Herring }; 22*724ba675SRob Herring 23*724ba675SRob Herring clcd@60000000 { 24*724ba675SRob Herring compatible = "arm,pl110", "arm,primecell"; 25*724ba675SRob Herring reg = <0x60000000 0x1000>; 26*724ba675SRob Herring interrupts = <30>; 27*724ba675SRob Herring status = "disabled"; 28*724ba675SRob Herring }; 29*724ba675SRob Herring 30*724ba675SRob Herring fsmc: flash@94000000 { 31*724ba675SRob Herring compatible = "st,spear600-fsmc-nand"; 32*724ba675SRob Herring #address-cells = <1>; 33*724ba675SRob Herring #size-cells = <1>; 34*724ba675SRob Herring reg = <0x94000000 0x1000 /* FSMC Register */ 35*724ba675SRob Herring 0x80000000 0x0010 /* NAND Base DATA */ 36*724ba675SRob Herring 0x80020000 0x0010 /* NAND Base ADDR */ 37*724ba675SRob Herring 0x80010000 0x0010>; /* NAND Base CMD */ 38*724ba675SRob Herring reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; 39*724ba675SRob Herring status = "disabled"; 40*724ba675SRob Herring }; 41*724ba675SRob Herring 42*724ba675SRob Herring sdhci@70000000 { 43*724ba675SRob Herring compatible = "st,sdhci-spear"; 44*724ba675SRob Herring reg = <0x70000000 0x100>; 45*724ba675SRob Herring interrupts = <1>; 46*724ba675SRob Herring status = "disabled"; 47*724ba675SRob Herring }; 48*724ba675SRob Herring 49*724ba675SRob Herring shirq: interrupt-controller@50000000 { 50*724ba675SRob Herring compatible = "st,spear300-shirq"; 51*724ba675SRob Herring reg = <0x50000000 0x1000>; 52*724ba675SRob Herring interrupts = <28>; 53*724ba675SRob Herring #interrupt-cells = <1>; 54*724ba675SRob Herring interrupt-controller; 55*724ba675SRob Herring }; 56*724ba675SRob Herring 57*724ba675SRob Herring apb { 58*724ba675SRob Herring #address-cells = <1>; 59*724ba675SRob Herring #size-cells = <1>; 60*724ba675SRob Herring compatible = "simple-bus"; 61*724ba675SRob Herring ranges = <0xa0000000 0xa0000000 0x10000000 62*724ba675SRob Herring 0xd0000000 0xd0000000 0x30000000>; 63*724ba675SRob Herring 64*724ba675SRob Herring gpio1: gpio@a9000000 { 65*724ba675SRob Herring #gpio-cells = <2>; 66*724ba675SRob Herring compatible = "arm,pl061", "arm,primecell"; 67*724ba675SRob Herring gpio-controller; 68*724ba675SRob Herring reg = <0xa9000000 0x1000>; 69*724ba675SRob Herring interrupts = <8>; 70*724ba675SRob Herring interrupt-parent = <&shirq>; 71*724ba675SRob Herring status = "disabled"; 72*724ba675SRob Herring }; 73*724ba675SRob Herring 74*724ba675SRob Herring kbd@a0000000 { 75*724ba675SRob Herring compatible = "st,spear300-kbd"; 76*724ba675SRob Herring reg = <0xa0000000 0x1000>; 77*724ba675SRob Herring interrupts = <7>; 78*724ba675SRob Herring interrupt-parent = <&shirq>; 79*724ba675SRob Herring status = "disabled"; 80*724ba675SRob Herring }; 81*724ba675SRob Herring }; 82*724ba675SRob Herring }; 83*724ba675SRob Herring}; 84