1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Samsung's Exynos5 SoC series common device tree source
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
6*724ba675SRob Herring *		http://www.samsung.com
7*724ba675SRob Herring *
8*724ba675SRob Herring * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular
9*724ba675SRob Herring * SoCs from Exynos5 series can include this file and provide values for SoCs
10*724ba675SRob Herring * specific bindings.
11*724ba675SRob Herring */
12*724ba675SRob Herring
13*724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h>
14*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h>
15*724ba675SRob Herring
16*724ba675SRob Herring/ {
17*724ba675SRob Herring	interrupt-parent = <&gic>;
18*724ba675SRob Herring	#address-cells = <1>;
19*724ba675SRob Herring	#size-cells = <1>;
20*724ba675SRob Herring
21*724ba675SRob Herring	aliases {
22*724ba675SRob Herring		i2c0 = &i2c_0;
23*724ba675SRob Herring		i2c1 = &i2c_1;
24*724ba675SRob Herring		i2c2 = &i2c_2;
25*724ba675SRob Herring		i2c3 = &i2c_3;
26*724ba675SRob Herring		serial0 = &serial_0;
27*724ba675SRob Herring		serial1 = &serial_1;
28*724ba675SRob Herring		serial2 = &serial_2;
29*724ba675SRob Herring		serial3 = &serial_3;
30*724ba675SRob Herring	};
31*724ba675SRob Herring
32*724ba675SRob Herring	soc: soc {
33*724ba675SRob Herring		compatible = "simple-bus";
34*724ba675SRob Herring		#address-cells = <1>;
35*724ba675SRob Herring		#size-cells = <1>;
36*724ba675SRob Herring		ranges;
37*724ba675SRob Herring
38*724ba675SRob Herring		chipid: chipid@10000000 {
39*724ba675SRob Herring			compatible = "samsung,exynos4210-chipid";
40*724ba675SRob Herring			reg = <0x10000000 0x100>;
41*724ba675SRob Herring		};
42*724ba675SRob Herring
43*724ba675SRob Herring		sromc: memory-controller@12250000 {
44*724ba675SRob Herring			compatible = "samsung,exynos4210-srom";
45*724ba675SRob Herring			reg = <0x12250000 0x14>;
46*724ba675SRob Herring		};
47*724ba675SRob Herring
48*724ba675SRob Herring		combiner: interrupt-controller@10440000 {
49*724ba675SRob Herring			compatible = "samsung,exynos4210-combiner";
50*724ba675SRob Herring			#interrupt-cells = <2>;
51*724ba675SRob Herring			interrupt-controller;
52*724ba675SRob Herring			samsung,combiner-nr = <32>;
53*724ba675SRob Herring			reg = <0x10440000 0x1000>;
54*724ba675SRob Herring			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
55*724ba675SRob Herring				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
56*724ba675SRob Herring				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
57*724ba675SRob Herring				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
58*724ba675SRob Herring				     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
59*724ba675SRob Herring				     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
60*724ba675SRob Herring				     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
61*724ba675SRob Herring				     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
62*724ba675SRob Herring				     <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
63*724ba675SRob Herring				     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
64*724ba675SRob Herring				     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
65*724ba675SRob Herring				     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
66*724ba675SRob Herring				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
67*724ba675SRob Herring				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
68*724ba675SRob Herring				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
69*724ba675SRob Herring				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
70*724ba675SRob Herring				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
71*724ba675SRob Herring				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
72*724ba675SRob Herring				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
73*724ba675SRob Herring				     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
74*724ba675SRob Herring				     <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
75*724ba675SRob Herring				     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
76*724ba675SRob Herring				     <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
77*724ba675SRob Herring				     <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
78*724ba675SRob Herring				     <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
79*724ba675SRob Herring				     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
80*724ba675SRob Herring				     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
81*724ba675SRob Herring				     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
82*724ba675SRob Herring				     <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
83*724ba675SRob Herring				     <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
84*724ba675SRob Herring				     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
85*724ba675SRob Herring				     <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
86*724ba675SRob Herring		};
87*724ba675SRob Herring
88*724ba675SRob Herring		gic: interrupt-controller@10481000 {
89*724ba675SRob Herring			compatible = "arm,gic-400", "arm,cortex-a15-gic";
90*724ba675SRob Herring			#interrupt-cells = <3>;
91*724ba675SRob Herring			interrupt-controller;
92*724ba675SRob Herring			reg = <0x10481000 0x1000>,
93*724ba675SRob Herring				<0x10482000 0x2000>,
94*724ba675SRob Herring				<0x10484000 0x2000>,
95*724ba675SRob Herring				<0x10486000 0x2000>;
96*724ba675SRob Herring			interrupts = <GIC_PPI 9
97*724ba675SRob Herring					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
98*724ba675SRob Herring		};
99*724ba675SRob Herring
100*724ba675SRob Herring		sysreg_system_controller: syscon@10050000 {
101*724ba675SRob Herring			compatible = "samsung,exynos5-sysreg", "syscon";
102*724ba675SRob Herring			reg = <0x10050000 0x5000>;
103*724ba675SRob Herring		};
104*724ba675SRob Herring
105*724ba675SRob Herring		serial_0: serial@12c00000 {
106*724ba675SRob Herring			compatible = "samsung,exynos4210-uart";
107*724ba675SRob Herring			reg = <0x12c00000 0x100>;
108*724ba675SRob Herring			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
109*724ba675SRob Herring		};
110*724ba675SRob Herring
111*724ba675SRob Herring		serial_1: serial@12c10000 {
112*724ba675SRob Herring			compatible = "samsung,exynos4210-uart";
113*724ba675SRob Herring			reg = <0x12c10000 0x100>;
114*724ba675SRob Herring			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
115*724ba675SRob Herring		};
116*724ba675SRob Herring
117*724ba675SRob Herring		serial_2: serial@12c20000 {
118*724ba675SRob Herring			compatible = "samsung,exynos4210-uart";
119*724ba675SRob Herring			reg = <0x12c20000 0x100>;
120*724ba675SRob Herring			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
121*724ba675SRob Herring		};
122*724ba675SRob Herring
123*724ba675SRob Herring		serial_3: serial@12c30000 {
124*724ba675SRob Herring			compatible = "samsung,exynos4210-uart";
125*724ba675SRob Herring			reg = <0x12c30000 0x100>;
126*724ba675SRob Herring			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
127*724ba675SRob Herring		};
128*724ba675SRob Herring
129*724ba675SRob Herring		i2c_0: i2c@12c60000 {
130*724ba675SRob Herring			compatible = "samsung,s3c2440-i2c";
131*724ba675SRob Herring			reg = <0x12c60000 0x100>;
132*724ba675SRob Herring			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
133*724ba675SRob Herring			#address-cells = <1>;
134*724ba675SRob Herring			#size-cells = <0>;
135*724ba675SRob Herring			samsung,sysreg-phandle = <&sysreg_system_controller>;
136*724ba675SRob Herring			status = "disabled";
137*724ba675SRob Herring		};
138*724ba675SRob Herring
139*724ba675SRob Herring		i2c_1: i2c@12c70000 {
140*724ba675SRob Herring			compatible = "samsung,s3c2440-i2c";
141*724ba675SRob Herring			reg = <0x12c70000 0x100>;
142*724ba675SRob Herring			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
143*724ba675SRob Herring			#address-cells = <1>;
144*724ba675SRob Herring			#size-cells = <0>;
145*724ba675SRob Herring			samsung,sysreg-phandle = <&sysreg_system_controller>;
146*724ba675SRob Herring			status = "disabled";
147*724ba675SRob Herring		};
148*724ba675SRob Herring
149*724ba675SRob Herring		i2c_2: i2c@12c80000 {
150*724ba675SRob Herring			compatible = "samsung,s3c2440-i2c";
151*724ba675SRob Herring			reg = <0x12c80000 0x100>;
152*724ba675SRob Herring			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
153*724ba675SRob Herring			#address-cells = <1>;
154*724ba675SRob Herring			#size-cells = <0>;
155*724ba675SRob Herring			samsung,sysreg-phandle = <&sysreg_system_controller>;
156*724ba675SRob Herring			status = "disabled";
157*724ba675SRob Herring		};
158*724ba675SRob Herring
159*724ba675SRob Herring		i2c_3: i2c@12c90000 {
160*724ba675SRob Herring			compatible = "samsung,s3c2440-i2c";
161*724ba675SRob Herring			reg = <0x12c90000 0x100>;
162*724ba675SRob Herring			interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
163*724ba675SRob Herring			#address-cells = <1>;
164*724ba675SRob Herring			#size-cells = <0>;
165*724ba675SRob Herring			samsung,sysreg-phandle = <&sysreg_system_controller>;
166*724ba675SRob Herring			status = "disabled";
167*724ba675SRob Herring		};
168*724ba675SRob Herring
169*724ba675SRob Herring		pwm: pwm@12dd0000 {
170*724ba675SRob Herring			compatible = "samsung,exynos4210-pwm";
171*724ba675SRob Herring			reg = <0x12dd0000 0x100>;
172*724ba675SRob Herring			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
173*724ba675SRob Herring				     <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
174*724ba675SRob Herring				     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
175*724ba675SRob Herring				     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
176*724ba675SRob Herring				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
177*724ba675SRob Herring			samsung,pwm-outputs = <0>, <1>, <2>, <3>;
178*724ba675SRob Herring			#pwm-cells = <3>;
179*724ba675SRob Herring		};
180*724ba675SRob Herring
181*724ba675SRob Herring		rtc: rtc@101e0000 {
182*724ba675SRob Herring			compatible = "samsung,s3c6410-rtc";
183*724ba675SRob Herring			reg = <0x101e0000 0x100>;
184*724ba675SRob Herring			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
185*724ba675SRob Herring				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
186*724ba675SRob Herring			status = "disabled";
187*724ba675SRob Herring		};
188*724ba675SRob Herring
189*724ba675SRob Herring		fimd: fimd@14400000 {
190*724ba675SRob Herring			compatible = "samsung,exynos5250-fimd";
191*724ba675SRob Herring			interrupt-parent = <&combiner>;
192*724ba675SRob Herring			reg = <0x14400000 0x40000>;
193*724ba675SRob Herring			interrupt-names = "fifo", "vsync", "lcd_sys";
194*724ba675SRob Herring			interrupts = <18 4>, <18 5>, <18 6>;
195*724ba675SRob Herring			samsung,sysreg = <&sysreg_system_controller>;
196*724ba675SRob Herring			status = "disabled";
197*724ba675SRob Herring		};
198*724ba675SRob Herring
199*724ba675SRob Herring		dp: dp-controller@145b0000 {
200*724ba675SRob Herring			compatible = "samsung,exynos5-dp";
201*724ba675SRob Herring			reg = <0x145b0000 0x1000>;
202*724ba675SRob Herring			interrupts = <10 3>;
203*724ba675SRob Herring			interrupt-parent = <&combiner>;
204*724ba675SRob Herring			status = "disabled";
205*724ba675SRob Herring		};
206*724ba675SRob Herring
207*724ba675SRob Herring		sss: sss@10830000 {
208*724ba675SRob Herring			compatible = "samsung,exynos4210-secss";
209*724ba675SRob Herring			reg = <0x10830000 0x300>;
210*724ba675SRob Herring			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
211*724ba675SRob Herring		};
212*724ba675SRob Herring
213*724ba675SRob Herring		prng: rng@10830400 {
214*724ba675SRob Herring			compatible = "samsung,exynos5250-prng";
215*724ba675SRob Herring			reg = <0x10830400 0x200>;
216*724ba675SRob Herring		};
217*724ba675SRob Herring
218*724ba675SRob Herring		trng: rng@10830600 {
219*724ba675SRob Herring			compatible = "samsung,exynos5250-trng";
220*724ba675SRob Herring			reg = <0x10830600 0x100>;
221*724ba675SRob Herring		};
222*724ba675SRob Herring
223*724ba675SRob Herring		g2d: g2d@10850000 {
224*724ba675SRob Herring			compatible = "samsung,exynos5250-g2d";
225*724ba675SRob Herring			reg = <0x10850000 0x1000>;
226*724ba675SRob Herring			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
227*724ba675SRob Herring			status = "disabled";
228*724ba675SRob Herring		};
229*724ba675SRob Herring	};
230*724ba675SRob Herring};
231