1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2724ba675SRob Herring/* 3724ba675SRob Herring * Samsung's Exynos4 SoC series common device tree source 4724ba675SRob Herring * 5724ba675SRob Herring * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 6724ba675SRob Herring * http://www.samsung.com 7724ba675SRob Herring * Copyright (c) 2010-2011 Linaro Ltd. 8724ba675SRob Herring * www.linaro.org 9724ba675SRob Herring * 10724ba675SRob Herring * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular 11724ba675SRob Herring * SoCs from Exynos4 series can include this file and provide values for SoCs 12724ba675SRob Herring * specific bindings. 13724ba675SRob Herring * 14724ba675SRob Herring * Note: This file does not include device nodes for all the controllers in 15724ba675SRob Herring * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional 16724ba675SRob Herring * nodes can be added to this file. 17724ba675SRob Herring */ 18724ba675SRob Herring 19724ba675SRob Herring#include <dt-bindings/clock/exynos4.h> 20724ba675SRob Herring#include <dt-bindings/clock/exynos-audss-clk.h> 21724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h> 22724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 23724ba675SRob Herring 24724ba675SRob Herring/ { 25724ba675SRob Herring interrupt-parent = <&gic>; 26724ba675SRob Herring #address-cells = <1>; 27724ba675SRob Herring #size-cells = <1>; 28724ba675SRob Herring 29724ba675SRob Herring aliases { 30724ba675SRob Herring spi0 = &spi_0; 31724ba675SRob Herring spi1 = &spi_1; 32724ba675SRob Herring spi2 = &spi_2; 33724ba675SRob Herring i2c0 = &i2c_0; 34724ba675SRob Herring i2c1 = &i2c_1; 35724ba675SRob Herring i2c2 = &i2c_2; 36724ba675SRob Herring i2c3 = &i2c_3; 37724ba675SRob Herring i2c4 = &i2c_4; 38724ba675SRob Herring i2c5 = &i2c_5; 39724ba675SRob Herring i2c6 = &i2c_6; 40724ba675SRob Herring i2c7 = &i2c_7; 41724ba675SRob Herring i2c8 = &i2c_8; 42724ba675SRob Herring csis0 = &csis_0; 43724ba675SRob Herring csis1 = &csis_1; 44724ba675SRob Herring fimc0 = &fimc_0; 45724ba675SRob Herring fimc1 = &fimc_1; 46724ba675SRob Herring fimc2 = &fimc_2; 47724ba675SRob Herring fimc3 = &fimc_3; 48724ba675SRob Herring serial0 = &serial_0; 49724ba675SRob Herring serial1 = &serial_1; 50724ba675SRob Herring serial2 = &serial_2; 51724ba675SRob Herring serial3 = &serial_3; 52724ba675SRob Herring }; 53724ba675SRob Herring 54724ba675SRob Herring pmu: pmu { 55724ba675SRob Herring compatible = "arm,cortex-a9-pmu"; 56724ba675SRob Herring interrupt-parent = <&combiner>; 57724ba675SRob Herring status = "disabled"; 58724ba675SRob Herring }; 59724ba675SRob Herring 60724ba675SRob Herring soc: soc { 61724ba675SRob Herring compatible = "simple-bus"; 62724ba675SRob Herring #address-cells = <1>; 63724ba675SRob Herring #size-cells = <1>; 64724ba675SRob Herring ranges; 65724ba675SRob Herring 66724ba675SRob Herring clock_audss: clock-controller@3810000 { 67724ba675SRob Herring compatible = "samsung,exynos4210-audss-clock"; 68724ba675SRob Herring reg = <0x03810000 0x0c>; 69724ba675SRob Herring #clock-cells = <1>; 70724ba675SRob Herring clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>, 71724ba675SRob Herring <&clock CLK_SCLK_AUDIO0>, 72724ba675SRob Herring <&clock CLK_SCLK_AUDIO0>; 73724ba675SRob Herring clock-names = "pll_ref", "pll_in", "sclk_audio", 74724ba675SRob Herring "sclk_pcm_in"; 75724ba675SRob Herring }; 76724ba675SRob Herring 77724ba675SRob Herring i2s0: i2s@3830000 { 78724ba675SRob Herring compatible = "samsung,s5pv210-i2s"; 79724ba675SRob Herring reg = <0x03830000 0x100>; 80724ba675SRob Herring clocks = <&clock_audss EXYNOS_I2S_BUS>, 81724ba675SRob Herring <&clock_audss EXYNOS_DOUT_AUD_BUS>, 82724ba675SRob Herring <&clock_audss EXYNOS_SCLK_I2S>; 83724ba675SRob Herring clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; 84724ba675SRob Herring #clock-cells = <1>; 85724ba675SRob Herring clock-output-names = "i2s_cdclk0"; 86724ba675SRob Herring dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>; 87724ba675SRob Herring dma-names = "tx", "rx", "tx-sec"; 88724ba675SRob Herring samsung,idma-addr = <0x03000000>; 89724ba675SRob Herring #sound-dai-cells = <1>; 90724ba675SRob Herring status = "disabled"; 91724ba675SRob Herring }; 92724ba675SRob Herring 93724ba675SRob Herring chipid@10000000 { 94724ba675SRob Herring compatible = "samsung,exynos4210-chipid"; 95724ba675SRob Herring reg = <0x10000000 0x100>; 96724ba675SRob Herring }; 97724ba675SRob Herring 98724ba675SRob Herring scu: snoop-control-unit@10500000 { 99724ba675SRob Herring compatible = "arm,cortex-a9-scu"; 100724ba675SRob Herring reg = <0x10500000 0x2000>; 101724ba675SRob Herring }; 102724ba675SRob Herring 103724ba675SRob Herring memory-controller@12570000 { 104724ba675SRob Herring compatible = "samsung,exynos4210-srom"; 105724ba675SRob Herring reg = <0x12570000 0x14>; 106724ba675SRob Herring }; 107724ba675SRob Herring 108724ba675SRob Herring pd_mfc: power-domain@10023c40 { 109724ba675SRob Herring compatible = "samsung,exynos4210-pd"; 110724ba675SRob Herring reg = <0x10023c40 0x20>; 111724ba675SRob Herring #power-domain-cells = <0>; 112724ba675SRob Herring label = "MFC"; 113724ba675SRob Herring }; 114724ba675SRob Herring 115724ba675SRob Herring pd_g3d: power-domain@10023c60 { 116724ba675SRob Herring compatible = "samsung,exynos4210-pd"; 117724ba675SRob Herring reg = <0x10023c60 0x20>; 118724ba675SRob Herring #power-domain-cells = <0>; 119724ba675SRob Herring label = "G3D"; 120724ba675SRob Herring }; 121724ba675SRob Herring 122724ba675SRob Herring pd_lcd0: power-domain@10023c80 { 123724ba675SRob Herring compatible = "samsung,exynos4210-pd"; 124724ba675SRob Herring reg = <0x10023c80 0x20>; 125724ba675SRob Herring #power-domain-cells = <0>; 126724ba675SRob Herring label = "LCD0"; 127724ba675SRob Herring }; 128724ba675SRob Herring 129724ba675SRob Herring pd_tv: power-domain@10023c20 { 130724ba675SRob Herring compatible = "samsung,exynos4210-pd"; 131724ba675SRob Herring reg = <0x10023c20 0x20>; 132724ba675SRob Herring #power-domain-cells = <0>; 133724ba675SRob Herring power-domains = <&pd_lcd0>; 134724ba675SRob Herring label = "TV"; 135724ba675SRob Herring }; 136724ba675SRob Herring 137724ba675SRob Herring pd_cam: power-domain@10023c00 { 138724ba675SRob Herring compatible = "samsung,exynos4210-pd"; 139724ba675SRob Herring reg = <0x10023c00 0x20>; 140724ba675SRob Herring #power-domain-cells = <0>; 141724ba675SRob Herring label = "CAM"; 142724ba675SRob Herring }; 143724ba675SRob Herring 144724ba675SRob Herring pd_gps: power-domain@10023ce0 { 145724ba675SRob Herring compatible = "samsung,exynos4210-pd"; 146724ba675SRob Herring reg = <0x10023ce0 0x20>; 147724ba675SRob Herring #power-domain-cells = <0>; 148724ba675SRob Herring label = "GPS"; 149724ba675SRob Herring }; 150724ba675SRob Herring 151724ba675SRob Herring pd_gps_alive: power-domain@10023d00 { 152724ba675SRob Herring compatible = "samsung,exynos4210-pd"; 153724ba675SRob Herring reg = <0x10023d00 0x20>; 154724ba675SRob Herring #power-domain-cells = <0>; 155724ba675SRob Herring label = "GPS alive"; 156724ba675SRob Herring }; 157724ba675SRob Herring 158724ba675SRob Herring gic: interrupt-controller@10490000 { 159724ba675SRob Herring compatible = "arm,cortex-a9-gic"; 160724ba675SRob Herring #interrupt-cells = <3>; 161724ba675SRob Herring interrupt-controller; 162724ba675SRob Herring reg = <0x10490000 0x10000>, <0x10480000 0x10000>; 163724ba675SRob Herring }; 164724ba675SRob Herring 165724ba675SRob Herring combiner: interrupt-controller@10440000 { 166724ba675SRob Herring compatible = "samsung,exynos4210-combiner"; 167724ba675SRob Herring #interrupt-cells = <2>; 168724ba675SRob Herring interrupt-controller; 169724ba675SRob Herring reg = <0x10440000 0x1000>; 170724ba675SRob Herring }; 171724ba675SRob Herring 172724ba675SRob Herring sys_reg: syscon@10010000 { 173724ba675SRob Herring compatible = "samsung,exynos4-sysreg", "syscon"; 174724ba675SRob Herring reg = <0x10010000 0x400>; 175724ba675SRob Herring }; 176724ba675SRob Herring 177724ba675SRob Herring pmu_system_controller: system-controller@10020000 { 178724ba675SRob Herring compatible = "samsung,exynos4210-pmu", "simple-mfd", "syscon"; 179724ba675SRob Herring reg = <0x10020000 0x4000>; 180724ba675SRob Herring interrupt-controller; 181724ba675SRob Herring #interrupt-cells = <3>; 182724ba675SRob Herring interrupt-parent = <&gic>; 183724ba675SRob Herring 184724ba675SRob Herring mipi_phy: mipi-phy { 185724ba675SRob Herring compatible = "samsung,s5pv210-mipi-video-phy"; 186724ba675SRob Herring #phy-cells = <1>; 187724ba675SRob Herring }; 188724ba675SRob Herring }; 189724ba675SRob Herring 190724ba675SRob Herring dsi_0: dsi@11c80000 { 191724ba675SRob Herring compatible = "samsung,exynos4210-mipi-dsi"; 192724ba675SRob Herring reg = <0x11c80000 0x10000>; 193724ba675SRob Herring interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 194724ba675SRob Herring power-domains = <&pd_lcd0>; 195724ba675SRob Herring phys = <&mipi_phy 1>; 196724ba675SRob Herring phy-names = "dsim"; 197724ba675SRob Herring clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>; 198724ba675SRob Herring clock-names = "bus_clk", "sclk_mipi"; 199724ba675SRob Herring status = "disabled"; 200724ba675SRob Herring #address-cells = <1>; 201724ba675SRob Herring #size-cells = <0>; 202724ba675SRob Herring }; 203724ba675SRob Herring 204724ba675SRob Herring camera: camera@11800000 { 205724ba675SRob Herring compatible = "samsung,fimc"; 206*6f7e8d39SKrzysztof Kozlowski ranges = <0x0 0x11800000 0xa0000>; 207724ba675SRob Herring status = "disabled"; 208724ba675SRob Herring #address-cells = <1>; 209724ba675SRob Herring #size-cells = <1>; 210724ba675SRob Herring #clock-cells = <1>; 211724ba675SRob Herring clock-output-names = "cam_a_clkout", "cam_b_clkout"; 212724ba675SRob Herring 213*6f7e8d39SKrzysztof Kozlowski fimc_0: fimc@0 { 214724ba675SRob Herring compatible = "samsung,exynos4210-fimc"; 215*6f7e8d39SKrzysztof Kozlowski reg = <0x0 0x1000>; 216724ba675SRob Herring interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 217724ba675SRob Herring clocks = <&clock CLK_FIMC0>, 218724ba675SRob Herring <&clock CLK_SCLK_FIMC0>; 219724ba675SRob Herring clock-names = "fimc", "sclk_fimc"; 220724ba675SRob Herring power-domains = <&pd_cam>; 221724ba675SRob Herring samsung,sysreg = <&sys_reg>; 222724ba675SRob Herring iommus = <&sysmmu_fimc0>; 223724ba675SRob Herring status = "disabled"; 224724ba675SRob Herring }; 225724ba675SRob Herring 226*6f7e8d39SKrzysztof Kozlowski fimc_1: fimc@10000 { 227724ba675SRob Herring compatible = "samsung,exynos4210-fimc"; 228*6f7e8d39SKrzysztof Kozlowski reg = <0x00010000 0x1000>; 229724ba675SRob Herring interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 230724ba675SRob Herring clocks = <&clock CLK_FIMC1>, 231724ba675SRob Herring <&clock CLK_SCLK_FIMC1>; 232724ba675SRob Herring clock-names = "fimc", "sclk_fimc"; 233724ba675SRob Herring power-domains = <&pd_cam>; 234724ba675SRob Herring samsung,sysreg = <&sys_reg>; 235724ba675SRob Herring iommus = <&sysmmu_fimc1>; 236724ba675SRob Herring status = "disabled"; 237724ba675SRob Herring }; 238724ba675SRob Herring 239*6f7e8d39SKrzysztof Kozlowski fimc_2: fimc@20000 { 240724ba675SRob Herring compatible = "samsung,exynos4210-fimc"; 241*6f7e8d39SKrzysztof Kozlowski reg = <0x00020000 0x1000>; 242724ba675SRob Herring interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 243724ba675SRob Herring clocks = <&clock CLK_FIMC2>, 244724ba675SRob Herring <&clock CLK_SCLK_FIMC2>; 245724ba675SRob Herring clock-names = "fimc", "sclk_fimc"; 246724ba675SRob Herring power-domains = <&pd_cam>; 247724ba675SRob Herring samsung,sysreg = <&sys_reg>; 248724ba675SRob Herring iommus = <&sysmmu_fimc2>; 249724ba675SRob Herring status = "disabled"; 250724ba675SRob Herring }; 251724ba675SRob Herring 252*6f7e8d39SKrzysztof Kozlowski fimc_3: fimc@30000 { 253724ba675SRob Herring compatible = "samsung,exynos4210-fimc"; 254*6f7e8d39SKrzysztof Kozlowski reg = <0x00030000 0x1000>; 255724ba675SRob Herring interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 256724ba675SRob Herring clocks = <&clock CLK_FIMC3>, 257724ba675SRob Herring <&clock CLK_SCLK_FIMC3>; 258724ba675SRob Herring clock-names = "fimc", "sclk_fimc"; 259724ba675SRob Herring power-domains = <&pd_cam>; 260724ba675SRob Herring samsung,sysreg = <&sys_reg>; 261724ba675SRob Herring iommus = <&sysmmu_fimc3>; 262724ba675SRob Herring status = "disabled"; 263724ba675SRob Herring }; 264724ba675SRob Herring 265*6f7e8d39SKrzysztof Kozlowski csis_0: csis@80000 { 266724ba675SRob Herring compatible = "samsung,exynos4210-csis"; 267*6f7e8d39SKrzysztof Kozlowski reg = <0x00080000 0x4000>; 268724ba675SRob Herring interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 269724ba675SRob Herring clocks = <&clock CLK_CSIS0>, 270724ba675SRob Herring <&clock CLK_SCLK_CSIS0>; 271724ba675SRob Herring clock-names = "csis", "sclk_csis"; 272724ba675SRob Herring bus-width = <4>; 273724ba675SRob Herring power-domains = <&pd_cam>; 274724ba675SRob Herring phys = <&mipi_phy 0>; 275724ba675SRob Herring phy-names = "csis"; 276724ba675SRob Herring status = "disabled"; 277724ba675SRob Herring #address-cells = <1>; 278724ba675SRob Herring #size-cells = <0>; 279724ba675SRob Herring }; 280724ba675SRob Herring 281*6f7e8d39SKrzysztof Kozlowski csis_1: csis@90000 { 282724ba675SRob Herring compatible = "samsung,exynos4210-csis"; 283*6f7e8d39SKrzysztof Kozlowski reg = <0x00090000 0x4000>; 284724ba675SRob Herring interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 285724ba675SRob Herring clocks = <&clock CLK_CSIS1>, 286724ba675SRob Herring <&clock CLK_SCLK_CSIS1>; 287724ba675SRob Herring clock-names = "csis", "sclk_csis"; 288724ba675SRob Herring bus-width = <2>; 289724ba675SRob Herring power-domains = <&pd_cam>; 290724ba675SRob Herring phys = <&mipi_phy 2>; 291724ba675SRob Herring phy-names = "csis"; 292724ba675SRob Herring status = "disabled"; 293724ba675SRob Herring #address-cells = <1>; 294724ba675SRob Herring #size-cells = <0>; 295724ba675SRob Herring }; 296724ba675SRob Herring }; 297724ba675SRob Herring 298724ba675SRob Herring rtc: rtc@10070000 { 299724ba675SRob Herring compatible = "samsung,s3c6410-rtc"; 300724ba675SRob Herring reg = <0x10070000 0x100>; 301724ba675SRob Herring interrupt-parent = <&pmu_system_controller>; 302724ba675SRob Herring interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 303724ba675SRob Herring <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 304724ba675SRob Herring clocks = <&clock CLK_RTC>; 305724ba675SRob Herring clock-names = "rtc"; 306724ba675SRob Herring status = "disabled"; 307724ba675SRob Herring }; 308724ba675SRob Herring 309724ba675SRob Herring keypad: keypad@100a0000 { 310724ba675SRob Herring compatible = "samsung,s5pv210-keypad"; 311724ba675SRob Herring reg = <0x100a0000 0x100>; 312724ba675SRob Herring interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 313724ba675SRob Herring clocks = <&clock CLK_KEYIF>; 314724ba675SRob Herring clock-names = "keypad"; 315724ba675SRob Herring status = "disabled"; 316724ba675SRob Herring }; 317724ba675SRob Herring 318724ba675SRob Herring sdhci_0: mmc@12510000 { 319724ba675SRob Herring compatible = "samsung,exynos4210-sdhci"; 320724ba675SRob Herring reg = <0x12510000 0x100>; 321724ba675SRob Herring interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 322724ba675SRob Herring clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>; 323724ba675SRob Herring clock-names = "hsmmc", "mmc_busclk.2"; 324724ba675SRob Herring status = "disabled"; 325724ba675SRob Herring }; 326724ba675SRob Herring 327724ba675SRob Herring sdhci_1: mmc@12520000 { 328724ba675SRob Herring compatible = "samsung,exynos4210-sdhci"; 329724ba675SRob Herring reg = <0x12520000 0x100>; 330724ba675SRob Herring interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 331724ba675SRob Herring clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>; 332724ba675SRob Herring clock-names = "hsmmc", "mmc_busclk.2"; 333724ba675SRob Herring status = "disabled"; 334724ba675SRob Herring }; 335724ba675SRob Herring 336724ba675SRob Herring sdhci_2: mmc@12530000 { 337724ba675SRob Herring compatible = "samsung,exynos4210-sdhci"; 338724ba675SRob Herring reg = <0x12530000 0x100>; 339724ba675SRob Herring interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 340724ba675SRob Herring clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>; 341724ba675SRob Herring clock-names = "hsmmc", "mmc_busclk.2"; 342724ba675SRob Herring status = "disabled"; 343724ba675SRob Herring }; 344724ba675SRob Herring 345724ba675SRob Herring sdhci_3: mmc@12540000 { 346724ba675SRob Herring compatible = "samsung,exynos4210-sdhci"; 347724ba675SRob Herring reg = <0x12540000 0x100>; 348724ba675SRob Herring interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 349724ba675SRob Herring clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>; 350724ba675SRob Herring clock-names = "hsmmc", "mmc_busclk.2"; 351724ba675SRob Herring status = "disabled"; 352724ba675SRob Herring }; 353724ba675SRob Herring 354724ba675SRob Herring exynos_usbphy: usb-phy@125b0000 { 355724ba675SRob Herring compatible = "samsung,exynos4210-usb2-phy"; 356724ba675SRob Herring reg = <0x125b0000 0x100>; 357724ba675SRob Herring samsung,pmureg-phandle = <&pmu_system_controller>; 358724ba675SRob Herring clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>; 359724ba675SRob Herring clock-names = "phy", "ref"; 360724ba675SRob Herring #phy-cells = <1>; 361724ba675SRob Herring status = "disabled"; 362724ba675SRob Herring }; 363724ba675SRob Herring 364724ba675SRob Herring hsotg: usb@12480000 { 365724ba675SRob Herring compatible = "samsung,s3c6400-hsotg"; 366724ba675SRob Herring reg = <0x12480000 0x20000>; 367724ba675SRob Herring interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 368724ba675SRob Herring clocks = <&clock CLK_USB_DEVICE>; 369724ba675SRob Herring clock-names = "otg"; 370724ba675SRob Herring phys = <&exynos_usbphy 0>; 371724ba675SRob Herring phy-names = "usb2-phy"; 372724ba675SRob Herring status = "disabled"; 373724ba675SRob Herring }; 374724ba675SRob Herring 375724ba675SRob Herring ehci: usb@12580000 { 376724ba675SRob Herring compatible = "samsung,exynos4210-ehci"; 377724ba675SRob Herring reg = <0x12580000 0x100>; 378724ba675SRob Herring interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 379724ba675SRob Herring clocks = <&clock CLK_USB_HOST>; 380724ba675SRob Herring clock-names = "usbhost"; 381724ba675SRob Herring status = "disabled"; 382724ba675SRob Herring phys = <&exynos_usbphy 1>, <&exynos_usbphy 2>, <&exynos_usbphy 3>; 383724ba675SRob Herring phy-names = "host", "hsic0", "hsic1"; 384724ba675SRob Herring }; 385724ba675SRob Herring 386724ba675SRob Herring ohci: usb@12590000 { 387724ba675SRob Herring compatible = "samsung,exynos4210-ohci"; 388724ba675SRob Herring reg = <0x12590000 0x100>; 389724ba675SRob Herring interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 390724ba675SRob Herring clocks = <&clock CLK_USB_HOST>; 391724ba675SRob Herring clock-names = "usbhost"; 392724ba675SRob Herring status = "disabled"; 393724ba675SRob Herring phys = <&exynos_usbphy 1>; 394724ba675SRob Herring phy-names = "host"; 395724ba675SRob Herring }; 396724ba675SRob Herring 397724ba675SRob Herring gpu: gpu@13000000 { 398724ba675SRob Herring compatible = "samsung,exynos4210-mali", "arm,mali-400"; 399724ba675SRob Herring reg = <0x13000000 0x10000>; 400724ba675SRob Herring /* 401724ba675SRob Herring * CLK_G3D is not actually bus clock but a IP-level clock. 402724ba675SRob Herring * The bus clock is not described in hardware manual. 403724ba675SRob Herring */ 404724ba675SRob Herring clocks = <&clock CLK_G3D>, 405724ba675SRob Herring <&clock CLK_SCLK_G3D>; 406724ba675SRob Herring clock-names = "bus", "core"; 407724ba675SRob Herring power-domains = <&pd_g3d>; 408724ba675SRob Herring status = "disabled"; 409724ba675SRob Herring }; 410724ba675SRob Herring 411724ba675SRob Herring i2s1: i2s@13960000 { 412724ba675SRob Herring compatible = "samsung,s3c6410-i2s"; 413724ba675SRob Herring reg = <0x13960000 0x100>; 414724ba675SRob Herring clocks = <&clock CLK_I2S1>; 415724ba675SRob Herring clock-names = "iis"; 416724ba675SRob Herring #clock-cells = <1>; 417724ba675SRob Herring clock-output-names = "i2s_cdclk1"; 418724ba675SRob Herring dmas = <&pdma1 12>, <&pdma1 11>; 419724ba675SRob Herring dma-names = "tx", "rx"; 420724ba675SRob Herring #sound-dai-cells = <1>; 421724ba675SRob Herring status = "disabled"; 422724ba675SRob Herring }; 423724ba675SRob Herring 424724ba675SRob Herring i2s2: i2s@13970000 { 425724ba675SRob Herring compatible = "samsung,s3c6410-i2s"; 426724ba675SRob Herring reg = <0x13970000 0x100>; 427724ba675SRob Herring clocks = <&clock CLK_I2S2>; 428724ba675SRob Herring clock-names = "iis"; 429724ba675SRob Herring #clock-cells = <1>; 430724ba675SRob Herring clock-output-names = "i2s_cdclk2"; 431724ba675SRob Herring dmas = <&pdma0 14>, <&pdma0 13>; 432724ba675SRob Herring dma-names = "tx", "rx"; 433724ba675SRob Herring #sound-dai-cells = <1>; 434724ba675SRob Herring status = "disabled"; 435724ba675SRob Herring }; 436724ba675SRob Herring 437724ba675SRob Herring mfc: codec@13400000 { 438724ba675SRob Herring compatible = "samsung,mfc-v5"; 439724ba675SRob Herring reg = <0x13400000 0x10000>; 440724ba675SRob Herring interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 441724ba675SRob Herring power-domains = <&pd_mfc>; 442724ba675SRob Herring clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>; 443724ba675SRob Herring clock-names = "mfc", "sclk_mfc"; 444724ba675SRob Herring iommus = <&sysmmu_mfc_l>, <&sysmmu_mfc_r>; 445724ba675SRob Herring iommu-names = "left", "right"; 446724ba675SRob Herring }; 447724ba675SRob Herring 448724ba675SRob Herring serial_0: serial@13800000 { 449724ba675SRob Herring compatible = "samsung,exynos4210-uart"; 450724ba675SRob Herring reg = <0x13800000 0x100>; 451724ba675SRob Herring interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 452724ba675SRob Herring clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; 453724ba675SRob Herring clock-names = "uart", "clk_uart_baud0"; 454724ba675SRob Herring dmas = <&pdma0 15>, <&pdma0 16>; 455724ba675SRob Herring dma-names = "rx", "tx"; 456724ba675SRob Herring status = "disabled"; 457724ba675SRob Herring }; 458724ba675SRob Herring 459724ba675SRob Herring serial_1: serial@13810000 { 460724ba675SRob Herring compatible = "samsung,exynos4210-uart"; 461724ba675SRob Herring reg = <0x13810000 0x100>; 462724ba675SRob Herring interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 463724ba675SRob Herring clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; 464724ba675SRob Herring clock-names = "uart", "clk_uart_baud0"; 465724ba675SRob Herring dmas = <&pdma1 15>, <&pdma1 16>; 466724ba675SRob Herring dma-names = "rx", "tx"; 467724ba675SRob Herring status = "disabled"; 468724ba675SRob Herring }; 469724ba675SRob Herring 470724ba675SRob Herring serial_2: serial@13820000 { 471724ba675SRob Herring compatible = "samsung,exynos4210-uart"; 472724ba675SRob Herring reg = <0x13820000 0x100>; 473724ba675SRob Herring interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; 474724ba675SRob Herring clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; 475724ba675SRob Herring clock-names = "uart", "clk_uart_baud0"; 476724ba675SRob Herring dmas = <&pdma0 17>, <&pdma0 18>; 477724ba675SRob Herring dma-names = "rx", "tx"; 478724ba675SRob Herring status = "disabled"; 479724ba675SRob Herring }; 480724ba675SRob Herring 481724ba675SRob Herring serial_3: serial@13830000 { 482724ba675SRob Herring compatible = "samsung,exynos4210-uart"; 483724ba675SRob Herring reg = <0x13830000 0x100>; 484724ba675SRob Herring interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 485724ba675SRob Herring clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; 486724ba675SRob Herring clock-names = "uart", "clk_uart_baud0"; 487724ba675SRob Herring dmas = <&pdma1 17>, <&pdma1 18>; 488724ba675SRob Herring dma-names = "rx", "tx"; 489724ba675SRob Herring status = "disabled"; 490724ba675SRob Herring }; 491724ba675SRob Herring 492724ba675SRob Herring i2c_0: i2c@13860000 { 493724ba675SRob Herring #address-cells = <1>; 494724ba675SRob Herring #size-cells = <0>; 495724ba675SRob Herring compatible = "samsung,s3c2440-i2c"; 496724ba675SRob Herring reg = <0x13860000 0x100>; 497724ba675SRob Herring interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 498724ba675SRob Herring clocks = <&clock CLK_I2C0>; 499724ba675SRob Herring clock-names = "i2c"; 500724ba675SRob Herring pinctrl-names = "default"; 501724ba675SRob Herring pinctrl-0 = <&i2c0_bus>; 502724ba675SRob Herring status = "disabled"; 503724ba675SRob Herring }; 504724ba675SRob Herring 505724ba675SRob Herring i2c_1: i2c@13870000 { 506724ba675SRob Herring #address-cells = <1>; 507724ba675SRob Herring #size-cells = <0>; 508724ba675SRob Herring compatible = "samsung,s3c2440-i2c"; 509724ba675SRob Herring reg = <0x13870000 0x100>; 510724ba675SRob Herring interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 511724ba675SRob Herring clocks = <&clock CLK_I2C1>; 512724ba675SRob Herring clock-names = "i2c"; 513724ba675SRob Herring pinctrl-names = "default"; 514724ba675SRob Herring pinctrl-0 = <&i2c1_bus>; 515724ba675SRob Herring status = "disabled"; 516724ba675SRob Herring }; 517724ba675SRob Herring 518724ba675SRob Herring i2c_2: i2c@13880000 { 519724ba675SRob Herring #address-cells = <1>; 520724ba675SRob Herring #size-cells = <0>; 521724ba675SRob Herring compatible = "samsung,s3c2440-i2c"; 522724ba675SRob Herring reg = <0x13880000 0x100>; 523724ba675SRob Herring interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 524724ba675SRob Herring clocks = <&clock CLK_I2C2>; 525724ba675SRob Herring clock-names = "i2c"; 526724ba675SRob Herring pinctrl-names = "default"; 527724ba675SRob Herring pinctrl-0 = <&i2c2_bus>; 528724ba675SRob Herring status = "disabled"; 529724ba675SRob Herring }; 530724ba675SRob Herring 531724ba675SRob Herring i2c_3: i2c@13890000 { 532724ba675SRob Herring #address-cells = <1>; 533724ba675SRob Herring #size-cells = <0>; 534724ba675SRob Herring compatible = "samsung,s3c2440-i2c"; 535724ba675SRob Herring reg = <0x13890000 0x100>; 536724ba675SRob Herring interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 537724ba675SRob Herring clocks = <&clock CLK_I2C3>; 538724ba675SRob Herring clock-names = "i2c"; 539724ba675SRob Herring pinctrl-names = "default"; 540724ba675SRob Herring pinctrl-0 = <&i2c3_bus>; 541724ba675SRob Herring status = "disabled"; 542724ba675SRob Herring }; 543724ba675SRob Herring 544724ba675SRob Herring i2c_4: i2c@138a0000 { 545724ba675SRob Herring #address-cells = <1>; 546724ba675SRob Herring #size-cells = <0>; 547724ba675SRob Herring compatible = "samsung,s3c2440-i2c"; 548724ba675SRob Herring reg = <0x138a0000 0x100>; 549724ba675SRob Herring interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 550724ba675SRob Herring clocks = <&clock CLK_I2C4>; 551724ba675SRob Herring clock-names = "i2c"; 552724ba675SRob Herring pinctrl-names = "default"; 553724ba675SRob Herring pinctrl-0 = <&i2c4_bus>; 554724ba675SRob Herring status = "disabled"; 555724ba675SRob Herring }; 556724ba675SRob Herring 557724ba675SRob Herring i2c_5: i2c@138b0000 { 558724ba675SRob Herring #address-cells = <1>; 559724ba675SRob Herring #size-cells = <0>; 560724ba675SRob Herring compatible = "samsung,s3c2440-i2c"; 561724ba675SRob Herring reg = <0x138b0000 0x100>; 562724ba675SRob Herring interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 563724ba675SRob Herring clocks = <&clock CLK_I2C5>; 564724ba675SRob Herring clock-names = "i2c"; 565724ba675SRob Herring pinctrl-names = "default"; 566724ba675SRob Herring pinctrl-0 = <&i2c5_bus>; 567724ba675SRob Herring status = "disabled"; 568724ba675SRob Herring }; 569724ba675SRob Herring 570724ba675SRob Herring i2c_6: i2c@138c0000 { 571724ba675SRob Herring #address-cells = <1>; 572724ba675SRob Herring #size-cells = <0>; 573724ba675SRob Herring compatible = "samsung,s3c2440-i2c"; 574724ba675SRob Herring reg = <0x138c0000 0x100>; 575724ba675SRob Herring interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 576724ba675SRob Herring clocks = <&clock CLK_I2C6>; 577724ba675SRob Herring clock-names = "i2c"; 578724ba675SRob Herring pinctrl-names = "default"; 579724ba675SRob Herring pinctrl-0 = <&i2c6_bus>; 580724ba675SRob Herring status = "disabled"; 581724ba675SRob Herring }; 582724ba675SRob Herring 583724ba675SRob Herring i2c_7: i2c@138d0000 { 584724ba675SRob Herring #address-cells = <1>; 585724ba675SRob Herring #size-cells = <0>; 586724ba675SRob Herring compatible = "samsung,s3c2440-i2c"; 587724ba675SRob Herring reg = <0x138d0000 0x100>; 588724ba675SRob Herring interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 589724ba675SRob Herring clocks = <&clock CLK_I2C7>; 590724ba675SRob Herring clock-names = "i2c"; 591724ba675SRob Herring pinctrl-names = "default"; 592724ba675SRob Herring pinctrl-0 = <&i2c7_bus>; 593724ba675SRob Herring status = "disabled"; 594724ba675SRob Herring }; 595724ba675SRob Herring 596724ba675SRob Herring i2c_8: i2c@138e0000 { 597724ba675SRob Herring #address-cells = <1>; 598724ba675SRob Herring #size-cells = <0>; 599724ba675SRob Herring compatible = "samsung,s3c2440-hdmiphy-i2c"; 600724ba675SRob Herring reg = <0x138e0000 0x100>; 601724ba675SRob Herring interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 602724ba675SRob Herring clocks = <&clock CLK_I2C_HDMI>; 603724ba675SRob Herring clock-names = "i2c"; 604724ba675SRob Herring status = "disabled"; 605724ba675SRob Herring 606724ba675SRob Herring hdmi_i2c_phy: hdmi-phy@38 { 607724ba675SRob Herring compatible = "samsung,exynos4210-hdmiphy"; 608724ba675SRob Herring reg = <0x38>; 609724ba675SRob Herring }; 610724ba675SRob Herring }; 611724ba675SRob Herring 612724ba675SRob Herring spi_0: spi@13920000 { 613724ba675SRob Herring compatible = "samsung,exynos4210-spi"; 614724ba675SRob Herring reg = <0x13920000 0x100>; 615724ba675SRob Herring interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 616724ba675SRob Herring dmas = <&pdma0 7>, <&pdma0 6>; 617724ba675SRob Herring dma-names = "tx", "rx"; 618724ba675SRob Herring #address-cells = <1>; 619724ba675SRob Herring #size-cells = <0>; 620724ba675SRob Herring clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>; 621724ba675SRob Herring clock-names = "spi", "spi_busclk0"; 622724ba675SRob Herring pinctrl-names = "default"; 623724ba675SRob Herring pinctrl-0 = <&spi0_bus>; 624724ba675SRob Herring status = "disabled"; 625724ba675SRob Herring }; 626724ba675SRob Herring 627724ba675SRob Herring spi_1: spi@13930000 { 628724ba675SRob Herring compatible = "samsung,exynos4210-spi"; 629724ba675SRob Herring reg = <0x13930000 0x100>; 630724ba675SRob Herring interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 631724ba675SRob Herring dmas = <&pdma1 7>, <&pdma1 6>; 632724ba675SRob Herring dma-names = "tx", "rx"; 633724ba675SRob Herring #address-cells = <1>; 634724ba675SRob Herring #size-cells = <0>; 635724ba675SRob Herring clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>; 636724ba675SRob Herring clock-names = "spi", "spi_busclk0"; 637724ba675SRob Herring pinctrl-names = "default"; 638724ba675SRob Herring pinctrl-0 = <&spi1_bus>; 639724ba675SRob Herring status = "disabled"; 640724ba675SRob Herring }; 641724ba675SRob Herring 642724ba675SRob Herring spi_2: spi@13940000 { 643724ba675SRob Herring compatible = "samsung,exynos4210-spi"; 644724ba675SRob Herring reg = <0x13940000 0x100>; 645724ba675SRob Herring interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 646724ba675SRob Herring dmas = <&pdma0 9>, <&pdma0 8>; 647724ba675SRob Herring dma-names = "tx", "rx"; 648724ba675SRob Herring #address-cells = <1>; 649724ba675SRob Herring #size-cells = <0>; 650724ba675SRob Herring clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>; 651724ba675SRob Herring clock-names = "spi", "spi_busclk0"; 652724ba675SRob Herring pinctrl-names = "default"; 653724ba675SRob Herring pinctrl-0 = <&spi2_bus>; 654724ba675SRob Herring status = "disabled"; 655724ba675SRob Herring }; 656724ba675SRob Herring 657724ba675SRob Herring pwm: pwm@139d0000 { 658724ba675SRob Herring compatible = "samsung,exynos4210-pwm"; 659724ba675SRob Herring reg = <0x139d0000 0x1000>; 660724ba675SRob Herring interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 661724ba675SRob Herring <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 662724ba675SRob Herring <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 663724ba675SRob Herring <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 664724ba675SRob Herring <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 665724ba675SRob Herring clocks = <&clock CLK_PWM>; 666724ba675SRob Herring clock-names = "timers"; 667724ba675SRob Herring #pwm-cells = <3>; 668724ba675SRob Herring status = "disabled"; 669724ba675SRob Herring }; 670724ba675SRob Herring 671724ba675SRob Herring pdma0: dma-controller@12680000 { 672724ba675SRob Herring compatible = "arm,pl330", "arm,primecell"; 673724ba675SRob Herring reg = <0x12680000 0x1000>; 674724ba675SRob Herring interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 675724ba675SRob Herring clocks = <&clock CLK_PDMA0>; 676724ba675SRob Herring clock-names = "apb_pclk"; 677724ba675SRob Herring #dma-cells = <1>; 678724ba675SRob Herring }; 679724ba675SRob Herring 680724ba675SRob Herring pdma1: dma-controller@12690000 { 681724ba675SRob Herring compatible = "arm,pl330", "arm,primecell"; 682724ba675SRob Herring reg = <0x12690000 0x1000>; 683724ba675SRob Herring interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 684724ba675SRob Herring clocks = <&clock CLK_PDMA1>; 685724ba675SRob Herring clock-names = "apb_pclk"; 686724ba675SRob Herring #dma-cells = <1>; 687724ba675SRob Herring }; 688724ba675SRob Herring 689724ba675SRob Herring mdma1: dma-controller@12850000 { 690724ba675SRob Herring compatible = "arm,pl330", "arm,primecell"; 691724ba675SRob Herring reg = <0x12850000 0x1000>; 692724ba675SRob Herring interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 693724ba675SRob Herring clocks = <&clock CLK_MDMA>; 694724ba675SRob Herring clock-names = "apb_pclk"; 695724ba675SRob Herring #dma-cells = <1>; 696724ba675SRob Herring }; 697724ba675SRob Herring 698724ba675SRob Herring fimd: fimd@11c00000 { 699724ba675SRob Herring compatible = "samsung,exynos4210-fimd"; 700724ba675SRob Herring interrupt-parent = <&combiner>; 701724ba675SRob Herring reg = <0x11c00000 0x20000>; 702724ba675SRob Herring interrupt-names = "fifo", "vsync", "lcd_sys"; 703724ba675SRob Herring interrupts = <11 0>, <11 1>, <11 2>; 704724ba675SRob Herring clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>; 705724ba675SRob Herring clock-names = "sclk_fimd", "fimd"; 706724ba675SRob Herring power-domains = <&pd_lcd0>; 707724ba675SRob Herring iommus = <&sysmmu_fimd0>; 708724ba675SRob Herring samsung,sysreg = <&sys_reg>; 709724ba675SRob Herring status = "disabled"; 710724ba675SRob Herring }; 711724ba675SRob Herring 712724ba675SRob Herring tmu: tmu@100c0000 { 713724ba675SRob Herring interrupt-parent = <&combiner>; 714724ba675SRob Herring reg = <0x100c0000 0x100>; 715724ba675SRob Herring interrupts = <2 4>; 716724ba675SRob Herring status = "disabled"; 717724ba675SRob Herring #thermal-sensor-cells = <0>; 718724ba675SRob Herring }; 719724ba675SRob Herring 720724ba675SRob Herring jpeg_codec: jpeg-codec@11840000 { 721724ba675SRob Herring compatible = "samsung,exynos4210-jpeg"; 722724ba675SRob Herring reg = <0x11840000 0x1000>; 723724ba675SRob Herring interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; 724724ba675SRob Herring clocks = <&clock CLK_JPEG>; 725724ba675SRob Herring clock-names = "jpeg"; 726724ba675SRob Herring power-domains = <&pd_cam>; 727724ba675SRob Herring iommus = <&sysmmu_jpeg>; 728724ba675SRob Herring }; 729724ba675SRob Herring 730724ba675SRob Herring rotator: rotator@12810000 { 731724ba675SRob Herring compatible = "samsung,exynos4210-rotator"; 732724ba675SRob Herring reg = <0x12810000 0x64>; 733724ba675SRob Herring interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 734724ba675SRob Herring clocks = <&clock CLK_ROTATOR>; 735724ba675SRob Herring clock-names = "rotator"; 736724ba675SRob Herring iommus = <&sysmmu_rotator>; 737724ba675SRob Herring }; 738724ba675SRob Herring 739724ba675SRob Herring hdmi: hdmi@12d00000 { 740724ba675SRob Herring compatible = "samsung,exynos4210-hdmi"; 741724ba675SRob Herring reg = <0x12d00000 0x70000>; 742724ba675SRob Herring interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 743724ba675SRob Herring clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", 744724ba675SRob Herring "sclk_hdmiphy", "mout_hdmi"; 745724ba675SRob Herring clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, 746724ba675SRob Herring <&clock CLK_SCLK_PIXEL>, 747724ba675SRob Herring <&clock CLK_SCLK_HDMIPHY>, 748724ba675SRob Herring <&clock CLK_MOUT_HDMI>; 749724ba675SRob Herring phy = <&hdmi_i2c_phy>; 750724ba675SRob Herring power-domains = <&pd_tv>; 751724ba675SRob Herring samsung,syscon-phandle = <&pmu_system_controller>; 752724ba675SRob Herring #sound-dai-cells = <0>; 753724ba675SRob Herring status = "disabled"; 754724ba675SRob Herring }; 755724ba675SRob Herring 756724ba675SRob Herring hdmicec: cec@100b0000 { 757724ba675SRob Herring compatible = "samsung,s5p-cec"; 758724ba675SRob Herring reg = <0x100b0000 0x200>; 759724ba675SRob Herring interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 760724ba675SRob Herring clocks = <&clock CLK_HDMI_CEC>; 761724ba675SRob Herring clock-names = "hdmicec"; 762724ba675SRob Herring samsung,syscon-phandle = <&pmu_system_controller>; 763724ba675SRob Herring hdmi-phandle = <&hdmi>; 764724ba675SRob Herring pinctrl-names = "default"; 765724ba675SRob Herring pinctrl-0 = <&hdmi_cec>; 766724ba675SRob Herring status = "disabled"; 767724ba675SRob Herring }; 768724ba675SRob Herring 769724ba675SRob Herring mixer: mixer@12c10000 { 770724ba675SRob Herring compatible = "samsung,exynos4210-mixer"; 771724ba675SRob Herring interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 772724ba675SRob Herring reg = <0x12c10000 0x2100>, <0x12c00000 0x300>; 773724ba675SRob Herring power-domains = <&pd_tv>; 774724ba675SRob Herring iommus = <&sysmmu_tv>; 775724ba675SRob Herring status = "disabled"; 776724ba675SRob Herring }; 777724ba675SRob Herring 778724ba675SRob Herring ppmu_dmc0: ppmu@106a0000 { 779724ba675SRob Herring compatible = "samsung,exynos-ppmu"; 780724ba675SRob Herring reg = <0x106a0000 0x2000>; 781724ba675SRob Herring clocks = <&clock CLK_PPMUDMC0>; 782724ba675SRob Herring clock-names = "ppmu"; 783724ba675SRob Herring status = "disabled"; 784724ba675SRob Herring }; 785724ba675SRob Herring 786724ba675SRob Herring ppmu_dmc1: ppmu@106b0000 { 787724ba675SRob Herring compatible = "samsung,exynos-ppmu"; 788724ba675SRob Herring reg = <0x106b0000 0x2000>; 789724ba675SRob Herring clocks = <&clock CLK_PPMUDMC1>; 790724ba675SRob Herring clock-names = "ppmu"; 791724ba675SRob Herring status = "disabled"; 792724ba675SRob Herring }; 793724ba675SRob Herring 794724ba675SRob Herring ppmu_cpu: ppmu@106c0000 { 795724ba675SRob Herring compatible = "samsung,exynos-ppmu"; 796724ba675SRob Herring reg = <0x106c0000 0x2000>; 797724ba675SRob Herring clocks = <&clock CLK_PPMUCPU>; 798724ba675SRob Herring clock-names = "ppmu"; 799724ba675SRob Herring status = "disabled"; 800724ba675SRob Herring }; 801724ba675SRob Herring 802724ba675SRob Herring ppmu_rightbus: ppmu@112a0000 { 803724ba675SRob Herring compatible = "samsung,exynos-ppmu"; 804724ba675SRob Herring reg = <0x112a0000 0x2000>; 805724ba675SRob Herring clocks = <&clock CLK_PPMURIGHT>; 806724ba675SRob Herring clock-names = "ppmu"; 807724ba675SRob Herring status = "disabled"; 808724ba675SRob Herring }; 809724ba675SRob Herring 810724ba675SRob Herring ppmu_leftbus: ppmu@116a0000 { 811724ba675SRob Herring compatible = "samsung,exynos-ppmu"; 812724ba675SRob Herring reg = <0x116a0000 0x2000>; 813724ba675SRob Herring clocks = <&clock CLK_PPMULEFT>; 814724ba675SRob Herring clock-names = "ppmu"; 815724ba675SRob Herring status = "disabled"; 816724ba675SRob Herring }; 817724ba675SRob Herring 818724ba675SRob Herring ppmu_camif: ppmu@11ac0000 { 819724ba675SRob Herring compatible = "samsung,exynos-ppmu"; 820724ba675SRob Herring reg = <0x11ac0000 0x2000>; 821724ba675SRob Herring clocks = <&clock CLK_PPMUCAMIF>; 822724ba675SRob Herring clock-names = "ppmu"; 823724ba675SRob Herring status = "disabled"; 824724ba675SRob Herring }; 825724ba675SRob Herring 826724ba675SRob Herring ppmu_lcd0: ppmu@11e40000 { 827724ba675SRob Herring compatible = "samsung,exynos-ppmu"; 828724ba675SRob Herring reg = <0x11e40000 0x2000>; 829724ba675SRob Herring clocks = <&clock CLK_PPMULCD0>; 830724ba675SRob Herring clock-names = "ppmu"; 831724ba675SRob Herring status = "disabled"; 832724ba675SRob Herring }; 833724ba675SRob Herring 834724ba675SRob Herring ppmu_fsys: ppmu@12630000 { 835724ba675SRob Herring compatible = "samsung,exynos-ppmu"; 836724ba675SRob Herring reg = <0x12630000 0x2000>; 837724ba675SRob Herring status = "disabled"; 838724ba675SRob Herring }; 839724ba675SRob Herring 840724ba675SRob Herring ppmu_image: ppmu@12aa0000 { 841724ba675SRob Herring compatible = "samsung,exynos-ppmu"; 842724ba675SRob Herring reg = <0x12aa0000 0x2000>; 843724ba675SRob Herring clocks = <&clock CLK_PPMUIMAGE>; 844724ba675SRob Herring clock-names = "ppmu"; 845724ba675SRob Herring status = "disabled"; 846724ba675SRob Herring }; 847724ba675SRob Herring 848724ba675SRob Herring ppmu_tv: ppmu@12e40000 { 849724ba675SRob Herring compatible = "samsung,exynos-ppmu"; 850724ba675SRob Herring reg = <0x12e40000 0x2000>; 851724ba675SRob Herring clocks = <&clock CLK_PPMUTV>; 852724ba675SRob Herring clock-names = "ppmu"; 853724ba675SRob Herring status = "disabled"; 854724ba675SRob Herring }; 855724ba675SRob Herring 856724ba675SRob Herring ppmu_g3d: ppmu@13220000 { 857724ba675SRob Herring compatible = "samsung,exynos-ppmu"; 858724ba675SRob Herring reg = <0x13220000 0x2000>; 859724ba675SRob Herring clocks = <&clock CLK_PPMUG3D>; 860724ba675SRob Herring clock-names = "ppmu"; 861724ba675SRob Herring status = "disabled"; 862724ba675SRob Herring }; 863724ba675SRob Herring 864724ba675SRob Herring ppmu_mfc_left: ppmu@13660000 { 865724ba675SRob Herring compatible = "samsung,exynos-ppmu"; 866724ba675SRob Herring reg = <0x13660000 0x2000>; 867724ba675SRob Herring clocks = <&clock CLK_PPMUMFC_L>; 868724ba675SRob Herring clock-names = "ppmu"; 869724ba675SRob Herring status = "disabled"; 870724ba675SRob Herring }; 871724ba675SRob Herring 872724ba675SRob Herring ppmu_mfc_right: ppmu@13670000 { 873724ba675SRob Herring compatible = "samsung,exynos-ppmu"; 874724ba675SRob Herring reg = <0x13670000 0x2000>; 875724ba675SRob Herring clocks = <&clock CLK_PPMUMFC_R>; 876724ba675SRob Herring clock-names = "ppmu"; 877724ba675SRob Herring status = "disabled"; 878724ba675SRob Herring }; 879724ba675SRob Herring 880724ba675SRob Herring sysmmu_mfc_l: sysmmu@13620000 { 881724ba675SRob Herring compatible = "samsung,exynos-sysmmu"; 882724ba675SRob Herring reg = <0x13620000 0x1000>; 883724ba675SRob Herring interrupt-parent = <&combiner>; 884724ba675SRob Herring interrupts = <5 5>; 885724ba675SRob Herring clock-names = "sysmmu", "master"; 886724ba675SRob Herring clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>; 887724ba675SRob Herring power-domains = <&pd_mfc>; 888724ba675SRob Herring #iommu-cells = <0>; 889724ba675SRob Herring }; 890724ba675SRob Herring 891724ba675SRob Herring sysmmu_mfc_r: sysmmu@13630000 { 892724ba675SRob Herring compatible = "samsung,exynos-sysmmu"; 893724ba675SRob Herring reg = <0x13630000 0x1000>; 894724ba675SRob Herring interrupt-parent = <&combiner>; 895724ba675SRob Herring interrupts = <5 6>; 896724ba675SRob Herring clock-names = "sysmmu", "master"; 897724ba675SRob Herring clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>; 898724ba675SRob Herring power-domains = <&pd_mfc>; 899724ba675SRob Herring #iommu-cells = <0>; 900724ba675SRob Herring }; 901724ba675SRob Herring 902724ba675SRob Herring sysmmu_tv: sysmmu@12e20000 { 903724ba675SRob Herring compatible = "samsung,exynos-sysmmu"; 904724ba675SRob Herring reg = <0x12e20000 0x1000>; 905724ba675SRob Herring interrupt-parent = <&combiner>; 906724ba675SRob Herring interrupts = <5 4>; 907724ba675SRob Herring clock-names = "sysmmu", "master"; 908724ba675SRob Herring clocks = <&clock CLK_SMMU_TV>, <&clock CLK_MIXER>; 909724ba675SRob Herring power-domains = <&pd_tv>; 910724ba675SRob Herring #iommu-cells = <0>; 911724ba675SRob Herring }; 912724ba675SRob Herring 913724ba675SRob Herring sysmmu_fimc0: sysmmu@11a20000 { 914724ba675SRob Herring compatible = "samsung,exynos-sysmmu"; 915724ba675SRob Herring reg = <0x11a20000 0x1000>; 916724ba675SRob Herring interrupt-parent = <&combiner>; 917724ba675SRob Herring interrupts = <4 2>; 918724ba675SRob Herring clock-names = "sysmmu", "master"; 919724ba675SRob Herring clocks = <&clock CLK_SMMU_FIMC0>, <&clock CLK_FIMC0>; 920724ba675SRob Herring power-domains = <&pd_cam>; 921724ba675SRob Herring #iommu-cells = <0>; 922724ba675SRob Herring }; 923724ba675SRob Herring 924724ba675SRob Herring sysmmu_fimc1: sysmmu@11a30000 { 925724ba675SRob Herring compatible = "samsung,exynos-sysmmu"; 926724ba675SRob Herring reg = <0x11a30000 0x1000>; 927724ba675SRob Herring interrupt-parent = <&combiner>; 928724ba675SRob Herring interrupts = <4 3>; 929724ba675SRob Herring clock-names = "sysmmu", "master"; 930724ba675SRob Herring clocks = <&clock CLK_SMMU_FIMC1>, <&clock CLK_FIMC1>; 931724ba675SRob Herring power-domains = <&pd_cam>; 932724ba675SRob Herring #iommu-cells = <0>; 933724ba675SRob Herring }; 934724ba675SRob Herring 935724ba675SRob Herring sysmmu_fimc2: sysmmu@11a40000 { 936724ba675SRob Herring compatible = "samsung,exynos-sysmmu"; 937724ba675SRob Herring reg = <0x11a40000 0x1000>; 938724ba675SRob Herring interrupt-parent = <&combiner>; 939724ba675SRob Herring interrupts = <4 4>; 940724ba675SRob Herring clock-names = "sysmmu", "master"; 941724ba675SRob Herring clocks = <&clock CLK_SMMU_FIMC2>, <&clock CLK_FIMC2>; 942724ba675SRob Herring power-domains = <&pd_cam>; 943724ba675SRob Herring #iommu-cells = <0>; 944724ba675SRob Herring }; 945724ba675SRob Herring 946724ba675SRob Herring sysmmu_fimc3: sysmmu@11a50000 { 947724ba675SRob Herring compatible = "samsung,exynos-sysmmu"; 948724ba675SRob Herring reg = <0x11a50000 0x1000>; 949724ba675SRob Herring interrupt-parent = <&combiner>; 950724ba675SRob Herring interrupts = <4 5>; 951724ba675SRob Herring clock-names = "sysmmu", "master"; 952724ba675SRob Herring clocks = <&clock CLK_SMMU_FIMC3>, <&clock CLK_FIMC3>; 953724ba675SRob Herring power-domains = <&pd_cam>; 954724ba675SRob Herring #iommu-cells = <0>; 955724ba675SRob Herring }; 956724ba675SRob Herring 957724ba675SRob Herring sysmmu_jpeg: sysmmu@11a60000 { 958724ba675SRob Herring compatible = "samsung,exynos-sysmmu"; 959724ba675SRob Herring reg = <0x11a60000 0x1000>; 960724ba675SRob Herring interrupt-parent = <&combiner>; 961724ba675SRob Herring interrupts = <4 6>; 962724ba675SRob Herring clock-names = "sysmmu", "master"; 963724ba675SRob Herring clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>; 964724ba675SRob Herring power-domains = <&pd_cam>; 965724ba675SRob Herring #iommu-cells = <0>; 966724ba675SRob Herring }; 967724ba675SRob Herring 968724ba675SRob Herring sysmmu_rotator: sysmmu@12a30000 { 969724ba675SRob Herring compatible = "samsung,exynos-sysmmu"; 970724ba675SRob Herring reg = <0x12a30000 0x1000>; 971724ba675SRob Herring interrupt-parent = <&combiner>; 972724ba675SRob Herring interrupts = <5 0>; 973724ba675SRob Herring clock-names = "sysmmu", "master"; 974724ba675SRob Herring clocks = <&clock CLK_SMMU_ROTATOR>, 975724ba675SRob Herring <&clock CLK_ROTATOR>; 976724ba675SRob Herring #iommu-cells = <0>; 977724ba675SRob Herring }; 978724ba675SRob Herring 979724ba675SRob Herring sysmmu_fimd0: sysmmu@11e20000 { 980724ba675SRob Herring compatible = "samsung,exynos-sysmmu"; 981724ba675SRob Herring reg = <0x11e20000 0x1000>; 982724ba675SRob Herring interrupt-parent = <&combiner>; 983724ba675SRob Herring interrupts = <5 2>; 984724ba675SRob Herring clock-names = "sysmmu", "master"; 985724ba675SRob Herring clocks = <&clock CLK_SMMU_FIMD0>, <&clock CLK_FIMD0>; 986724ba675SRob Herring power-domains = <&pd_lcd0>; 987724ba675SRob Herring #iommu-cells = <0>; 988724ba675SRob Herring }; 989724ba675SRob Herring 990724ba675SRob Herring sss: sss@10830000 { 991724ba675SRob Herring compatible = "samsung,exynos4210-secss"; 992724ba675SRob Herring reg = <0x10830000 0x300>; 993724ba675SRob Herring interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 994724ba675SRob Herring clocks = <&clock CLK_SSS>; 995724ba675SRob Herring clock-names = "secss"; 996724ba675SRob Herring }; 997724ba675SRob Herring 998724ba675SRob Herring prng: rng@10830400 { 999724ba675SRob Herring compatible = "samsung,exynos4-rng"; 1000724ba675SRob Herring reg = <0x10830400 0x200>; 1001724ba675SRob Herring clocks = <&clock CLK_SSS>; 1002724ba675SRob Herring clock-names = "secss"; 1003724ba675SRob Herring }; 1004724ba675SRob Herring }; 1005724ba675SRob Herring}; 1006724ba675SRob Herring 1007724ba675SRob Herring#include "exynos-syscon-restart.dtsi" 1008