1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Google Veyron Minnie Rev 0+ board device tree source
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright 2015 Google, Inc
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herring/dts-v1/;
9*724ba675SRob Herring#include "rk3288-veyron-chromebook.dtsi"
10*724ba675SRob Herring#include "rk3288-veyron-broadcom-bluetooth.dtsi"
11*724ba675SRob Herring
12*724ba675SRob Herring/ {
13*724ba675SRob Herring	model = "Google Minnie";
14*724ba675SRob Herring	compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
15*724ba675SRob Herring		     "google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
16*724ba675SRob Herring		     "google,veyron-minnie-rev0", "google,veyron-minnie",
17*724ba675SRob Herring		     "google,veyron", "rockchip,rk3288";
18*724ba675SRob Herring
19*724ba675SRob Herring	volume_buttons: volume-buttons {
20*724ba675SRob Herring		compatible = "gpio-keys";
21*724ba675SRob Herring		pinctrl-names = "default";
22*724ba675SRob Herring		pinctrl-0 = <&volum_down_l &volum_up_l>;
23*724ba675SRob Herring
24*724ba675SRob Herring		key-volum-down {
25*724ba675SRob Herring			label = "Volum_down";
26*724ba675SRob Herring			gpios = <&gpio5 RK_PB3 GPIO_ACTIVE_LOW>;
27*724ba675SRob Herring			linux,code = <KEY_VOLUMEDOWN>;
28*724ba675SRob Herring			debounce-interval = <100>;
29*724ba675SRob Herring		};
30*724ba675SRob Herring
31*724ba675SRob Herring		key-volum-up {
32*724ba675SRob Herring			label = "Volum_up";
33*724ba675SRob Herring			gpios = <&gpio5 RK_PB2 GPIO_ACTIVE_LOW>;
34*724ba675SRob Herring			linux,code = <KEY_VOLUMEUP>;
35*724ba675SRob Herring			debounce-interval = <100>;
36*724ba675SRob Herring		};
37*724ba675SRob Herring	};
38*724ba675SRob Herring};
39*724ba675SRob Herring
40*724ba675SRob Herring&backlight {
41*724ba675SRob Herring	/* Minnie panel PWM must be >= 1%, so start non-zero brightness at 3 */
42*724ba675SRob Herring	brightness-levels = <3 255>;
43*724ba675SRob Herring	num-interpolated-steps = <252>;
44*724ba675SRob Herring};
45*724ba675SRob Herring
46*724ba675SRob Herring&i2c_tunnel {
47*724ba675SRob Herring	battery: bq27500@55 {
48*724ba675SRob Herring		compatible = "ti,bq27500";
49*724ba675SRob Herring		reg = <0x55>;
50*724ba675SRob Herring	};
51*724ba675SRob Herring};
52*724ba675SRob Herring
53*724ba675SRob Herring&i2c3 {
54*724ba675SRob Herring	status = "okay";
55*724ba675SRob Herring
56*724ba675SRob Herring	clock-frequency = <400000>;
57*724ba675SRob Herring	i2c-scl-falling-time-ns = <50>;
58*724ba675SRob Herring	i2c-scl-rising-time-ns = <300>;
59*724ba675SRob Herring
60*724ba675SRob Herring	touchscreen@10 {
61*724ba675SRob Herring		compatible = "elan,ekth3500";
62*724ba675SRob Herring		reg = <0x10>;
63*724ba675SRob Herring		interrupt-parent = <&gpio2>;
64*724ba675SRob Herring		interrupts = <RK_PB6 IRQ_TYPE_EDGE_FALLING>;
65*724ba675SRob Herring		pinctrl-names = "default";
66*724ba675SRob Herring		pinctrl-0 = <&touch_int &touch_rst>;
67*724ba675SRob Herring		reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
68*724ba675SRob Herring		vcc33-supply = <&vcc33_touch>;
69*724ba675SRob Herring		vccio-supply = <&vcc33_touch>;
70*724ba675SRob Herring	};
71*724ba675SRob Herring};
72*724ba675SRob Herring
73*724ba675SRob Herring&panel {
74*724ba675SRob Herring	compatible = "auo,b101ean01";
75*724ba675SRob Herring
76*724ba675SRob Herring	/delete-node/ panel-timing;
77*724ba675SRob Herring
78*724ba675SRob Herring	panel-timing {
79*724ba675SRob Herring		clock-frequency = <66666667>;
80*724ba675SRob Herring		hactive = <1280>;
81*724ba675SRob Herring		hfront-porch = <18>;
82*724ba675SRob Herring		hback-porch = <21>;
83*724ba675SRob Herring		hsync-len = <32>;
84*724ba675SRob Herring		vactive = <800>;
85*724ba675SRob Herring		vfront-porch = <4>;
86*724ba675SRob Herring		vback-porch = <8>;
87*724ba675SRob Herring		vsync-len = <18>;
88*724ba675SRob Herring	};
89*724ba675SRob Herring};
90*724ba675SRob Herring
91*724ba675SRob Herring&rk808 {
92*724ba675SRob Herring	pinctrl-names = "default";
93*724ba675SRob Herring	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
94*724ba675SRob Herring
95*724ba675SRob Herring	regulators {
96*724ba675SRob Herring		vcc33_touch: LDO_REG2 {
97*724ba675SRob Herring			regulator-min-microvolt = <3300000>;
98*724ba675SRob Herring			regulator-max-microvolt = <3300000>;
99*724ba675SRob Herring			regulator-name = "vcc33_touch";
100*724ba675SRob Herring			regulator-state-mem {
101*724ba675SRob Herring				regulator-off-in-suspend;
102*724ba675SRob Herring			};
103*724ba675SRob Herring		};
104*724ba675SRob Herring
105*724ba675SRob Herring		vcc5v_touch: SWITCH_REG2 {
106*724ba675SRob Herring			regulator-name = "vcc5v_touch";
107*724ba675SRob Herring			regulator-state-mem {
108*724ba675SRob Herring				regulator-off-in-suspend;
109*724ba675SRob Herring			};
110*724ba675SRob Herring		};
111*724ba675SRob Herring	};
112*724ba675SRob Herring};
113*724ba675SRob Herring
114*724ba675SRob Herring&sdmmc {
115*724ba675SRob Herring	disable-wp;
116*724ba675SRob Herring	pinctrl-names = "default";
117*724ba675SRob Herring	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
118*724ba675SRob Herring			&sdmmc_bus4>;
119*724ba675SRob Herring};
120*724ba675SRob Herring
121*724ba675SRob Herring&vcc_5v {
122*724ba675SRob Herring	enable-active-high;
123*724ba675SRob Herring	gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
124*724ba675SRob Herring	pinctrl-names = "default";
125*724ba675SRob Herring	pinctrl-0 = <&drv_5v>;
126*724ba675SRob Herring};
127*724ba675SRob Herring
128*724ba675SRob Herring&vcc50_hdmi {
129*724ba675SRob Herring	enable-active-high;
130*724ba675SRob Herring	gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
131*724ba675SRob Herring	pinctrl-names = "default";
132*724ba675SRob Herring	pinctrl-0 = <&vcc50_hdmi_en>;
133*724ba675SRob Herring};
134*724ba675SRob Herring
135*724ba675SRob Herring&gpio0 {
136*724ba675SRob Herring	gpio-line-names = "PMIC_SLEEP_AP",
137*724ba675SRob Herring			  "DDRIO_PWROFF",
138*724ba675SRob Herring			  "DDRIO_RETEN",
139*724ba675SRob Herring			  "TS3A227E_INT_L",
140*724ba675SRob Herring			  "PMIC_INT_L",
141*724ba675SRob Herring			  "PWR_KEY_L",
142*724ba675SRob Herring			  "AP_LID_INT_L",
143*724ba675SRob Herring			  "EC_IN_RW",
144*724ba675SRob Herring
145*724ba675SRob Herring			  "AC_PRESENT_AP",
146*724ba675SRob Herring			  /*
147*724ba675SRob Herring			   * RECOVERY_SW_L is Chrome OS ABI.  Schematics call
148*724ba675SRob Herring			   * it REC_MODE_L.
149*724ba675SRob Herring			   */
150*724ba675SRob Herring			  "RECOVERY_SW_L",
151*724ba675SRob Herring			  "OTP_OUT",
152*724ba675SRob Herring			  "HOST1_PWR_EN",
153*724ba675SRob Herring			  "USBOTG_PWREN_H",
154*724ba675SRob Herring			  "AP_WARM_RESET_H",
155*724ba675SRob Herring			  "nFALUT2",
156*724ba675SRob Herring			  "I2C0_SDA_PMIC",
157*724ba675SRob Herring
158*724ba675SRob Herring			  "I2C0_SCL_PMIC",
159*724ba675SRob Herring			  "SUSPEND_L",
160*724ba675SRob Herring			  "USB_INT";
161*724ba675SRob Herring};
162*724ba675SRob Herring
163*724ba675SRob Herring&gpio2 {
164*724ba675SRob Herring	gpio-line-names = "CONFIG0",
165*724ba675SRob Herring			  "CONFIG1",
166*724ba675SRob Herring			  "CONFIG2",
167*724ba675SRob Herring			  "",
168*724ba675SRob Herring			  "",
169*724ba675SRob Herring			  "",
170*724ba675SRob Herring			  "",
171*724ba675SRob Herring			  "CONFIG3",
172*724ba675SRob Herring
173*724ba675SRob Herring			  "PROCHOT#",
174*724ba675SRob Herring			  "EMMC_RST_L",
175*724ba675SRob Herring			  "",
176*724ba675SRob Herring			  "",
177*724ba675SRob Herring			  "BL_PWR_EN",
178*724ba675SRob Herring			  "AVDD_1V8_DISP_EN",
179*724ba675SRob Herring			  "TOUCH_INT",
180*724ba675SRob Herring			  "TOUCH_RST",
181*724ba675SRob Herring
182*724ba675SRob Herring			  "I2C3_SCL_TP",
183*724ba675SRob Herring			  "I2C3_SDA_TP";
184*724ba675SRob Herring};
185*724ba675SRob Herring
186*724ba675SRob Herring&gpio3 {
187*724ba675SRob Herring	gpio-line-names = "FLASH0_D0",
188*724ba675SRob Herring			  "FLASH0_D1",
189*724ba675SRob Herring			  "FLASH0_D2",
190*724ba675SRob Herring			  "FLASH0_D3",
191*724ba675SRob Herring			  "FLASH0_D4",
192*724ba675SRob Herring			  "FLASH0_D5",
193*724ba675SRob Herring			  "FLASH0_D6",
194*724ba675SRob Herring			  "FLASH0_D7",
195*724ba675SRob Herring
196*724ba675SRob Herring			  "",
197*724ba675SRob Herring			  "",
198*724ba675SRob Herring			  "",
199*724ba675SRob Herring			  "",
200*724ba675SRob Herring			  "",
201*724ba675SRob Herring			  "",
202*724ba675SRob Herring			  "",
203*724ba675SRob Herring			  "",
204*724ba675SRob Herring
205*724ba675SRob Herring			  "FLASH0_CS2/EMMC_CMD",
206*724ba675SRob Herring			  "",
207*724ba675SRob Herring			  "FLASH0_DQS/EMMC_CLKO";
208*724ba675SRob Herring};
209*724ba675SRob Herring
210*724ba675SRob Herring&gpio4 {
211*724ba675SRob Herring	gpio-line-names = "",
212*724ba675SRob Herring			  "",
213*724ba675SRob Herring			  "",
214*724ba675SRob Herring			  "",
215*724ba675SRob Herring			  "",
216*724ba675SRob Herring			  "",
217*724ba675SRob Herring			  "",
218*724ba675SRob Herring			  "",
219*724ba675SRob Herring
220*724ba675SRob Herring			  "",
221*724ba675SRob Herring			  "",
222*724ba675SRob Herring			  "",
223*724ba675SRob Herring			  "",
224*724ba675SRob Herring			  "",
225*724ba675SRob Herring			  "",
226*724ba675SRob Herring			  "",
227*724ba675SRob Herring			  "",
228*724ba675SRob Herring
229*724ba675SRob Herring			  "UART0_RXD",
230*724ba675SRob Herring			  "UART0_TXD",
231*724ba675SRob Herring			  "UART0_CTS",
232*724ba675SRob Herring			  "UART0_RTS",
233*724ba675SRob Herring			  "SDIO0_D0",
234*724ba675SRob Herring			  "SDIO0_D1",
235*724ba675SRob Herring			  "SDIO0_D2",
236*724ba675SRob Herring			  "SDIO0_D3",
237*724ba675SRob Herring
238*724ba675SRob Herring			  "SDIO0_CMD",
239*724ba675SRob Herring			  "SDIO0_CLK",
240*724ba675SRob Herring			  "dev_wake",
241*724ba675SRob Herring			  "",
242*724ba675SRob Herring			  "WIFI_ENABLE_H",
243*724ba675SRob Herring			  "BT_ENABLE_L",
244*724ba675SRob Herring			  "WIFI_HOST_WAKE",
245*724ba675SRob Herring			  "BT_HOST_WAKE";
246*724ba675SRob Herring};
247*724ba675SRob Herring
248*724ba675SRob Herring&gpio5 {
249*724ba675SRob Herring	gpio-line-names = "",
250*724ba675SRob Herring			  "",
251*724ba675SRob Herring			  "",
252*724ba675SRob Herring			  "",
253*724ba675SRob Herring			  "",
254*724ba675SRob Herring			  "",
255*724ba675SRob Herring			  "",
256*724ba675SRob Herring			  "",
257*724ba675SRob Herring
258*724ba675SRob Herring			  "",
259*724ba675SRob Herring			  "",
260*724ba675SRob Herring			  "Volum_Up#",
261*724ba675SRob Herring			  "Volum_Down#",
262*724ba675SRob Herring			  "SPI0_CLK",
263*724ba675SRob Herring			  "SPI0_CS0",
264*724ba675SRob Herring			  "SPI0_TXD",
265*724ba675SRob Herring			  "SPI0_RXD",
266*724ba675SRob Herring
267*724ba675SRob Herring			  "",
268*724ba675SRob Herring			  "",
269*724ba675SRob Herring			  "",
270*724ba675SRob Herring			  "VCC50_HDMI_EN";
271*724ba675SRob Herring};
272*724ba675SRob Herring
273*724ba675SRob Herring&gpio6 {
274*724ba675SRob Herring	gpio-line-names = "I2S0_SCLK",
275*724ba675SRob Herring			  "I2S0_LRCK_RX",
276*724ba675SRob Herring			  "I2S0_LRCK_TX",
277*724ba675SRob Herring			  "I2S0_SDI",
278*724ba675SRob Herring			  "I2S0_SDO0",
279*724ba675SRob Herring			  "HP_DET_H",
280*724ba675SRob Herring			  "",
281*724ba675SRob Herring			  "INT_CODEC",
282*724ba675SRob Herring
283*724ba675SRob Herring			  "I2S0_CLK",
284*724ba675SRob Herring			  "I2C2_SDA",
285*724ba675SRob Herring			  "I2C2_SCL",
286*724ba675SRob Herring			  "MICDET",
287*724ba675SRob Herring			  "",
288*724ba675SRob Herring			  "",
289*724ba675SRob Herring			  "",
290*724ba675SRob Herring			  "",
291*724ba675SRob Herring
292*724ba675SRob Herring			  "SDMMC_D0",
293*724ba675SRob Herring			  "SDMMC_D1",
294*724ba675SRob Herring			  "SDMMC_D2",
295*724ba675SRob Herring			  "SDMMC_D3",
296*724ba675SRob Herring			  "SDMMC_CLK",
297*724ba675SRob Herring			  "SDMMC_CMD";
298*724ba675SRob Herring};
299*724ba675SRob Herring
300*724ba675SRob Herring&gpio7 {
301*724ba675SRob Herring	gpio-line-names = "LCDC_BL",
302*724ba675SRob Herring			  "PWM_LOG",
303*724ba675SRob Herring			  "BL_EN",
304*724ba675SRob Herring			  "TRACKPAD_INT",
305*724ba675SRob Herring			  "TPM_INT_H",
306*724ba675SRob Herring			  "SDMMC_DET_L",
307*724ba675SRob Herring			  /*
308*724ba675SRob Herring			   * AP_FLASH_WP_L is Chrome OS ABI.  Schematics call
309*724ba675SRob Herring			   * it FW_WP_AP.
310*724ba675SRob Herring			   */
311*724ba675SRob Herring			  "AP_FLASH_WP_L",
312*724ba675SRob Herring			  "EC_INT",
313*724ba675SRob Herring
314*724ba675SRob Herring			  "CPU_NMI",
315*724ba675SRob Herring			  "DVS_OK",
316*724ba675SRob Herring			  "SDMMC_WP",
317*724ba675SRob Herring			  "EDP_HPD",
318*724ba675SRob Herring			  "DVS1",
319*724ba675SRob Herring			  "nFALUT1",
320*724ba675SRob Herring			  "LCD_EN",
321*724ba675SRob Herring			  "DVS2",
322*724ba675SRob Herring
323*724ba675SRob Herring			  "VCC5V_GOOD_H",
324*724ba675SRob Herring			  "I2C4_SDA_TP",
325*724ba675SRob Herring			  "I2C4_SCL_TP",
326*724ba675SRob Herring			  "I2C5_SDA_HDMI",
327*724ba675SRob Herring			  "I2C5_SCL_HDMI",
328*724ba675SRob Herring			  "5V_DRV",
329*724ba675SRob Herring			  "UART2_RXD",
330*724ba675SRob Herring			  "UART2_TXD";
331*724ba675SRob Herring};
332*724ba675SRob Herring
333*724ba675SRob Herring&gpio8 {
334*724ba675SRob Herring	gpio-line-names = "RAM_ID0",
335*724ba675SRob Herring			  "RAM_ID1",
336*724ba675SRob Herring			  "RAM_ID2",
337*724ba675SRob Herring			  "RAM_ID3",
338*724ba675SRob Herring			  "I2C1_SDA_TPM",
339*724ba675SRob Herring			  "I2C1_SCL_TPM",
340*724ba675SRob Herring			  "SPI2_CLK",
341*724ba675SRob Herring			  "SPI2_CS0",
342*724ba675SRob Herring
343*724ba675SRob Herring			  "SPI2_RXD",
344*724ba675SRob Herring			  "SPI2_TXD";
345*724ba675SRob Herring};
346*724ba675SRob Herring
347*724ba675SRob Herring&pinctrl {
348*724ba675SRob Herring	pinctrl-names = "default", "sleep";
349*724ba675SRob Herring	pinctrl-0 = <
350*724ba675SRob Herring		/* Common for sleep and wake, but no owners */
351*724ba675SRob Herring		&ddr0_retention
352*724ba675SRob Herring		&ddrio_pwroff
353*724ba675SRob Herring		&global_pwroff
354*724ba675SRob Herring
355*724ba675SRob Herring		/* Wake only */
356*724ba675SRob Herring		&suspend_l_wake
357*724ba675SRob Herring	>;
358*724ba675SRob Herring	pinctrl-1 = <
359*724ba675SRob Herring		/* Common for sleep and wake, but no owners */
360*724ba675SRob Herring		&ddr0_retention
361*724ba675SRob Herring		&ddrio_pwroff
362*724ba675SRob Herring		&global_pwroff
363*724ba675SRob Herring
364*724ba675SRob Herring		/* Sleep only */
365*724ba675SRob Herring		&suspend_l_sleep
366*724ba675SRob Herring	>;
367*724ba675SRob Herring
368*724ba675SRob Herring	buck-5v {
369*724ba675SRob Herring		drv_5v: drv-5v {
370*724ba675SRob Herring			rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
371*724ba675SRob Herring		};
372*724ba675SRob Herring	};
373*724ba675SRob Herring
374*724ba675SRob Herring	buttons {
375*724ba675SRob Herring		volum_down_l: volum-down-l {
376*724ba675SRob Herring			rockchip,pins = <5 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
377*724ba675SRob Herring		};
378*724ba675SRob Herring
379*724ba675SRob Herring		volum_up_l: volum-up-l {
380*724ba675SRob Herring			rockchip,pins = <5 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
381*724ba675SRob Herring		};
382*724ba675SRob Herring	};
383*724ba675SRob Herring
384*724ba675SRob Herring	hdmi {
385*724ba675SRob Herring		vcc50_hdmi_en: vcc50-hdmi-en {
386*724ba675SRob Herring			rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
387*724ba675SRob Herring		};
388*724ba675SRob Herring	};
389*724ba675SRob Herring
390*724ba675SRob Herring	pmic {
391*724ba675SRob Herring		dvs_1: dvs-1 {
392*724ba675SRob Herring			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
393*724ba675SRob Herring		};
394*724ba675SRob Herring
395*724ba675SRob Herring		dvs_2: dvs-2 {
396*724ba675SRob Herring			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
397*724ba675SRob Herring		};
398*724ba675SRob Herring	};
399*724ba675SRob Herring
400*724ba675SRob Herring	prochot {
401*724ba675SRob Herring		gpio_prochot: gpio-prochot {
402*724ba675SRob Herring			rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
403*724ba675SRob Herring		};
404*724ba675SRob Herring	};
405*724ba675SRob Herring
406*724ba675SRob Herring	touchscreen {
407*724ba675SRob Herring		touch_int: touch-int {
408*724ba675SRob Herring			rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
409*724ba675SRob Herring		};
410*724ba675SRob Herring
411*724ba675SRob Herring		touch_rst: touch-rst {
412*724ba675SRob Herring			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
413*724ba675SRob Herring		};
414*724ba675SRob Herring	};
415*724ba675SRob Herring};
416