1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Google Veyron Mickey Rev 0 board device tree source
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright 2015 Google, Inc
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herring/dts-v1/;
9*724ba675SRob Herring#include "rk3288-veyron.dtsi"
10*724ba675SRob Herring#include "rk3288-veyron-broadcom-bluetooth.dtsi"
11*724ba675SRob Herring
12*724ba675SRob Herring/ {
13*724ba675SRob Herring	model = "Google Mickey";
14*724ba675SRob Herring	compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
15*724ba675SRob Herring		     "google,veyron-mickey-rev6", "google,veyron-mickey-rev5",
16*724ba675SRob Herring		     "google,veyron-mickey-rev4", "google,veyron-mickey-rev3",
17*724ba675SRob Herring		     "google,veyron-mickey-rev2", "google,veyron-mickey-rev1",
18*724ba675SRob Herring		     "google,veyron-mickey-rev0", "google,veyron-mickey",
19*724ba675SRob Herring		     "google,veyron", "rockchip,rk3288";
20*724ba675SRob Herring
21*724ba675SRob Herring	vcc_5v: vcc-5v {
22*724ba675SRob Herring		vin-supply = <&vcc33_sys>;
23*724ba675SRob Herring	};
24*724ba675SRob Herring
25*724ba675SRob Herring	vcc33_io: vcc33_io {
26*724ba675SRob Herring		compatible = "regulator-fixed";
27*724ba675SRob Herring		regulator-name = "vcc33_io";
28*724ba675SRob Herring		regulator-always-on;
29*724ba675SRob Herring		regulator-boot-on;
30*724ba675SRob Herring		vin-supply = <&vcc33_sys>;
31*724ba675SRob Herring	};
32*724ba675SRob Herring
33*724ba675SRob Herring	sound {
34*724ba675SRob Herring		compatible = "rockchip,rockchip-audio-max98090";
35*724ba675SRob Herring		rockchip,model = "VEYRON-HDMI";
36*724ba675SRob Herring		rockchip,hdmi-codec = <&hdmi>;
37*724ba675SRob Herring		rockchip,i2s-controller = <&i2s>;
38*724ba675SRob Herring	};
39*724ba675SRob Herring};
40*724ba675SRob Herring
41*724ba675SRob Herring&cpu_thermal {
42*724ba675SRob Herring	/delete-node/ trips;
43*724ba675SRob Herring	/delete-node/ cooling-maps;
44*724ba675SRob Herring
45*724ba675SRob Herring	trips {
46*724ba675SRob Herring		cpu_alert_almost_warm: cpu_alert_almost_warm {
47*724ba675SRob Herring			temperature = <63000>; /* millicelsius */
48*724ba675SRob Herring			hysteresis = <2000>; /* millicelsius */
49*724ba675SRob Herring			type = "passive";
50*724ba675SRob Herring		};
51*724ba675SRob Herring		cpu_alert_warm: cpu_alert_warm {
52*724ba675SRob Herring			temperature = <65000>; /* millicelsius */
53*724ba675SRob Herring			hysteresis = <2000>; /* millicelsius */
54*724ba675SRob Herring			type = "passive";
55*724ba675SRob Herring		};
56*724ba675SRob Herring		cpu_alert_almost_hot: cpu_alert_almost_hot {
57*724ba675SRob Herring			temperature = <80000>; /* millicelsius */
58*724ba675SRob Herring			hysteresis = <2000>; /* millicelsius */
59*724ba675SRob Herring			type = "passive";
60*724ba675SRob Herring		};
61*724ba675SRob Herring		cpu_alert_hot: cpu_alert_hot {
62*724ba675SRob Herring			temperature = <82000>; /* millicelsius */
63*724ba675SRob Herring			hysteresis = <2000>; /* millicelsius */
64*724ba675SRob Herring			type = "passive";
65*724ba675SRob Herring		};
66*724ba675SRob Herring		cpu_alert_hotter: cpu_alert_hotter {
67*724ba675SRob Herring			temperature = <84000>; /* millicelsius */
68*724ba675SRob Herring			hysteresis = <2000>; /* millicelsius */
69*724ba675SRob Herring			type = "passive";
70*724ba675SRob Herring		};
71*724ba675SRob Herring		cpu_alert_very_hot: cpu_alert_very_hot {
72*724ba675SRob Herring			temperature = <85000>; /* millicelsius */
73*724ba675SRob Herring			hysteresis = <2000>; /* millicelsius */
74*724ba675SRob Herring			type = "passive";
75*724ba675SRob Herring		};
76*724ba675SRob Herring		cpu_crit: cpu_crit {
77*724ba675SRob Herring			temperature = <90000>; /* millicelsius */
78*724ba675SRob Herring			hysteresis = <2000>; /* millicelsius */
79*724ba675SRob Herring			type = "critical";
80*724ba675SRob Herring		};
81*724ba675SRob Herring	};
82*724ba675SRob Herring
83*724ba675SRob Herring	cooling-maps {
84*724ba675SRob Herring		/*
85*724ba675SRob Herring		 * After 1st level, throttle the CPU down to as low as 1.4 GHz
86*724ba675SRob Herring		 * and don't let the GPU go faster than 400 MHz.
87*724ba675SRob Herring		 */
88*724ba675SRob Herring		cpu_warm_limit_cpu {
89*724ba675SRob Herring			trip = <&cpu_alert_warm>;
90*724ba675SRob Herring			cooling-device = <&cpu0 THERMAL_NO_LIMIT 4>,
91*724ba675SRob Herring					 <&cpu1 THERMAL_NO_LIMIT 4>,
92*724ba675SRob Herring					 <&cpu2 THERMAL_NO_LIMIT 4>,
93*724ba675SRob Herring					 <&cpu3 THERMAL_NO_LIMIT 4>;
94*724ba675SRob Herring		};
95*724ba675SRob Herring		cpu_warm_limit_gpu {
96*724ba675SRob Herring			trip = <&cpu_alert_warm>;
97*724ba675SRob Herring			cooling-device = <&gpu 1 1>;
98*724ba675SRob Herring		};
99*724ba675SRob Herring
100*724ba675SRob Herring		/*
101*724ba675SRob Herring		 * Add some discrete steps to help throttling system deal
102*724ba675SRob Herring		 * with the fact that there are two passive cooling devices:
103*724ba675SRob Herring		 * the CPU and the GPU.
104*724ba675SRob Herring		 *
105*724ba675SRob Herring		 * - 1.2 GHz - 1.0 GHz (almost hot)
106*724ba675SRob Herring		 * - 800 MHz           (hot)
107*724ba675SRob Herring		 * - 800 MHz - 696 MHz (hotter)
108*724ba675SRob Herring		 * - 696 MHz - min     (very hot)
109*724ba675SRob Herring		 *
110*724ba675SRob Herring		 * Note:
111*724ba675SRob Herring		 * - 800 MHz appears to be a "sweet spot" for me.  I can run
112*724ba675SRob Herring		 *   some pretty serious workload here and be happy.
113*724ba675SRob Herring		 * - After 696 MHz we stop lowering voltage, so throttling
114*724ba675SRob Herring		 *   past there is less effective.
115*724ba675SRob Herring		 */
116*724ba675SRob Herring		cpu_almost_hot_limit_cpu {
117*724ba675SRob Herring			trip = <&cpu_alert_almost_hot>;
118*724ba675SRob Herring			cooling-device = <&cpu0 5 6>, <&cpu1 5 6>, <&cpu2 5 6>,
119*724ba675SRob Herring					 <&cpu3 5 6>;
120*724ba675SRob Herring		};
121*724ba675SRob Herring		cpu_hot_limit_cpu {
122*724ba675SRob Herring			trip = <&cpu_alert_hot>;
123*724ba675SRob Herring			cooling-device = <&cpu0 7 7>, <&cpu1 7 7>, <&cpu2 7 7>,
124*724ba675SRob Herring					 <&cpu3 7 7>;
125*724ba675SRob Herring		};
126*724ba675SRob Herring		cpu_hotter_limit_cpu {
127*724ba675SRob Herring			trip = <&cpu_alert_hotter>;
128*724ba675SRob Herring			cooling-device = <&cpu0 7 8>, <&cpu1 7 8>, <&cpu2 7 8>,
129*724ba675SRob Herring					 <&cpu3 7 8>;
130*724ba675SRob Herring		};
131*724ba675SRob Herring		cpu_very_hot_limit_cpu {
132*724ba675SRob Herring			trip = <&cpu_alert_very_hot>;
133*724ba675SRob Herring			cooling-device = <&cpu0 8 THERMAL_NO_LIMIT>,
134*724ba675SRob Herring					 <&cpu1 8 THERMAL_NO_LIMIT>,
135*724ba675SRob Herring					 <&cpu2 8 THERMAL_NO_LIMIT>,
136*724ba675SRob Herring					 <&cpu3 8 THERMAL_NO_LIMIT>;
137*724ba675SRob Herring		};
138*724ba675SRob Herring
139*724ba675SRob Herring		/* At very hot, don't let GPU go over 300 MHz */
140*724ba675SRob Herring		cpu_very_hot_limit_gpu {
141*724ba675SRob Herring			trip = <&cpu_alert_very_hot>;
142*724ba675SRob Herring			cooling-device = <&gpu 2 2>;
143*724ba675SRob Herring		};
144*724ba675SRob Herring	};
145*724ba675SRob Herring};
146*724ba675SRob Herring
147*724ba675SRob Herring&gpu_thermal {
148*724ba675SRob Herring	/delete-node/ trips;
149*724ba675SRob Herring	/delete-node/ cooling-maps;
150*724ba675SRob Herring
151*724ba675SRob Herring	trips {
152*724ba675SRob Herring		gpu_alert_warmish: gpu_alert_warmish {
153*724ba675SRob Herring			temperature = <60000>; /* millicelsius */
154*724ba675SRob Herring			hysteresis = <2000>; /* millicelsius */
155*724ba675SRob Herring			type = "passive";
156*724ba675SRob Herring		};
157*724ba675SRob Herring		gpu_alert_warm: gpu_alert_warm {
158*724ba675SRob Herring			temperature = <65000>; /* millicelsius */
159*724ba675SRob Herring			hysteresis = <2000>; /* millicelsius */
160*724ba675SRob Herring			type = "passive";
161*724ba675SRob Herring		};
162*724ba675SRob Herring		gpu_alert_hotter: gpu_alert_hotter {
163*724ba675SRob Herring			temperature = <84000>; /* millicelsius */
164*724ba675SRob Herring			hysteresis = <2000>; /* millicelsius */
165*724ba675SRob Herring			type = "passive";
166*724ba675SRob Herring		};
167*724ba675SRob Herring		gpu_alert_very_very_hot: gpu_alert_very_very_hot {
168*724ba675SRob Herring			temperature = <86000>; /* millicelsius */
169*724ba675SRob Herring			hysteresis = <2000>; /* millicelsius */
170*724ba675SRob Herring			type = "passive";
171*724ba675SRob Herring		};
172*724ba675SRob Herring		gpu_crit: gpu_crit {
173*724ba675SRob Herring			temperature = <90000>; /* millicelsius */
174*724ba675SRob Herring			hysteresis = <2000>; /* millicelsius */
175*724ba675SRob Herring			type = "critical";
176*724ba675SRob Herring		};
177*724ba675SRob Herring	};
178*724ba675SRob Herring
179*724ba675SRob Herring	cooling-maps {
180*724ba675SRob Herring		/* After 1st level throttle the GPU down to as low as 400 MHz */
181*724ba675SRob Herring		gpu_warmish_limit_gpu {
182*724ba675SRob Herring			trip = <&gpu_alert_warmish>;
183*724ba675SRob Herring			cooling-device = <&gpu THERMAL_NO_LIMIT 1>;
184*724ba675SRob Herring		};
185*724ba675SRob Herring
186*724ba675SRob Herring		/*
187*724ba675SRob Herring		 * Slightly after we throttle the GPU, we'll also make sure that
188*724ba675SRob Herring		 * the CPU can't go faster than 1.4 GHz.  Note that we won't
189*724ba675SRob Herring		 * throttle the CPU lower than 1.4 GHz due to GPU heat--we'll
190*724ba675SRob Herring		 * let the CPU do the rest itself.
191*724ba675SRob Herring		 */
192*724ba675SRob Herring		gpu_warm_limit_cpu {
193*724ba675SRob Herring			trip = <&gpu_alert_warm>;
194*724ba675SRob Herring			cooling-device = <&cpu0 4 4>,
195*724ba675SRob Herring					 <&cpu1 4 4>,
196*724ba675SRob Herring					 <&cpu2 4 4>,
197*724ba675SRob Herring					 <&cpu3 4 4>;
198*724ba675SRob Herring		};
199*724ba675SRob Herring
200*724ba675SRob Herring		/* When hot, GPU goes down to 300 MHz */
201*724ba675SRob Herring		gpu_hotter_limit_gpu {
202*724ba675SRob Herring			trip = <&gpu_alert_hotter>;
203*724ba675SRob Herring			cooling-device = <&gpu 2 2>;
204*724ba675SRob Herring		};
205*724ba675SRob Herring
206*724ba675SRob Herring		/* When really hot, don't let GPU go _above_ 300 MHz */
207*724ba675SRob Herring		gpu_very_very_hot_limit_gpu {
208*724ba675SRob Herring			trip = <&gpu_alert_very_very_hot>;
209*724ba675SRob Herring			cooling-device = <&gpu 2 THERMAL_NO_LIMIT>;
210*724ba675SRob Herring		};
211*724ba675SRob Herring	};
212*724ba675SRob Herring};
213*724ba675SRob Herring
214*724ba675SRob Herring&i2c2 {
215*724ba675SRob Herring	status = "disabled";
216*724ba675SRob Herring};
217*724ba675SRob Herring
218*724ba675SRob Herring&i2c4 {
219*724ba675SRob Herring	status = "disabled";
220*724ba675SRob Herring};
221*724ba675SRob Herring
222*724ba675SRob Herring&i2s {
223*724ba675SRob Herring	status = "okay";
224*724ba675SRob Herring};
225*724ba675SRob Herring
226*724ba675SRob Herring&rk808 {
227*724ba675SRob Herring	pinctrl-names = "default";
228*724ba675SRob Herring	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
229*724ba675SRob Herring	dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
230*724ba675SRob Herring		    <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
231*724ba675SRob Herring
232*724ba675SRob Herring	/delete-property/ vcc6-supply;
233*724ba675SRob Herring	/delete-property/ vcc12-supply;
234*724ba675SRob Herring
235*724ba675SRob Herring	vcc11-supply = <&vcc33_sys>;
236*724ba675SRob Herring
237*724ba675SRob Herring	regulators {
238*724ba675SRob Herring		/* vcc33_io is sourced directly from vcc33_sys */
239*724ba675SRob Herring		/delete-node/ LDO_REG1;
240*724ba675SRob Herring		/delete-node/ LDO_REG7;
241*724ba675SRob Herring
242*724ba675SRob Herring		/* This is not a pwren anymore, but the real power supply */
243*724ba675SRob Herring		vdd10_lcd: LDO_REG7 {
244*724ba675SRob Herring			regulator-always-on;
245*724ba675SRob Herring			regulator-boot-on;
246*724ba675SRob Herring			regulator-min-microvolt = <1000000>;
247*724ba675SRob Herring			regulator-max-microvolt = <1000000>;
248*724ba675SRob Herring			regulator-name = "vdd10_lcd";
249*724ba675SRob Herring			regulator-suspend-mem-disabled;
250*724ba675SRob Herring		};
251*724ba675SRob Herring
252*724ba675SRob Herring		vcc18_lcd: LDO_REG8 {
253*724ba675SRob Herring			regulator-always-on;
254*724ba675SRob Herring			regulator-boot-on;
255*724ba675SRob Herring			regulator-min-microvolt = <1800000>;
256*724ba675SRob Herring			regulator-max-microvolt = <1800000>;
257*724ba675SRob Herring			regulator-name = "vcc18_lcd";
258*724ba675SRob Herring			regulator-suspend-mem-disabled;
259*724ba675SRob Herring		};
260*724ba675SRob Herring	};
261*724ba675SRob Herring};
262*724ba675SRob Herring
263*724ba675SRob Herring&gpio0 {
264*724ba675SRob Herring	gpio-line-names = "PMIC_SLEEP_AP",
265*724ba675SRob Herring			  "",
266*724ba675SRob Herring			  "",
267*724ba675SRob Herring			  "",
268*724ba675SRob Herring			  "PMIC_INT_L",
269*724ba675SRob Herring			  "POWER_BUTTON_L",
270*724ba675SRob Herring			  "",
271*724ba675SRob Herring			  "",
272*724ba675SRob Herring
273*724ba675SRob Herring			  "",
274*724ba675SRob Herring			  /*
275*724ba675SRob Herring			   * RECOVERY_SW_L is Chrome OS ABI.  Schematics call
276*724ba675SRob Herring			   * it REC_MODE_L.
277*724ba675SRob Herring			   */
278*724ba675SRob Herring			  "RECOVERY_SW_L",
279*724ba675SRob Herring			  "OT_RESET",
280*724ba675SRob Herring			  "",
281*724ba675SRob Herring			  "",
282*724ba675SRob Herring			  "AP_WARM_RESET_H",
283*724ba675SRob Herring			  "",
284*724ba675SRob Herring			  "I2C0_SDA_PMIC",
285*724ba675SRob Herring
286*724ba675SRob Herring			  "I2C0_SCL_PMIC",
287*724ba675SRob Herring			  "",
288*724ba675SRob Herring			  "nFALUT";
289*724ba675SRob Herring};
290*724ba675SRob Herring
291*724ba675SRob Herring&gpio2 {
292*724ba675SRob Herring	gpio-line-names = "CONFIG0",
293*724ba675SRob Herring			  "CONFIG1",
294*724ba675SRob Herring			  "CONFIG2",
295*724ba675SRob Herring			  "",
296*724ba675SRob Herring			  "",
297*724ba675SRob Herring			  "",
298*724ba675SRob Herring			  "",
299*724ba675SRob Herring			  "CONFIG3",
300*724ba675SRob Herring
301*724ba675SRob Herring			  "",
302*724ba675SRob Herring			  "EMMC_RST_L";
303*724ba675SRob Herring};
304*724ba675SRob Herring
305*724ba675SRob Herring&gpio3 {
306*724ba675SRob Herring	gpio-line-names = "FLASH0_D0",
307*724ba675SRob Herring			  "FLASH0_D1",
308*724ba675SRob Herring			  "FLASH0_D2",
309*724ba675SRob Herring			  "FLASH0_D3",
310*724ba675SRob Herring			  "FLASH0_D4",
311*724ba675SRob Herring			  "FLASH0_D5",
312*724ba675SRob Herring			  "FLASH0_D6",
313*724ba675SRob Herring			  "FLASH0_D7",
314*724ba675SRob Herring
315*724ba675SRob Herring			  "",
316*724ba675SRob Herring			  "",
317*724ba675SRob Herring			  "",
318*724ba675SRob Herring			  "",
319*724ba675SRob Herring			  "",
320*724ba675SRob Herring			  "",
321*724ba675SRob Herring			  "",
322*724ba675SRob Herring			  "",
323*724ba675SRob Herring
324*724ba675SRob Herring			  "FLASH0_CS2/EMMC_CMD",
325*724ba675SRob Herring			  "",
326*724ba675SRob Herring			  "FLASH0_DQS/EMMC_CLKO";
327*724ba675SRob Herring};
328*724ba675SRob Herring
329*724ba675SRob Herring&gpio4 {
330*724ba675SRob Herring	gpio-line-names = "",
331*724ba675SRob Herring			  "",
332*724ba675SRob Herring			  "",
333*724ba675SRob Herring			  "",
334*724ba675SRob Herring			  "",
335*724ba675SRob Herring			  "",
336*724ba675SRob Herring			  "",
337*724ba675SRob Herring			  "",
338*724ba675SRob Herring
339*724ba675SRob Herring			  "",
340*724ba675SRob Herring			  "",
341*724ba675SRob Herring			  "",
342*724ba675SRob Herring			  "",
343*724ba675SRob Herring			  "",
344*724ba675SRob Herring			  "",
345*724ba675SRob Herring			  "",
346*724ba675SRob Herring			  "",
347*724ba675SRob Herring
348*724ba675SRob Herring			  "UART0_RXD",
349*724ba675SRob Herring			  "UART0_TXD",
350*724ba675SRob Herring			  "UART0_CTS_L",
351*724ba675SRob Herring			  "UART0_RTS_L",
352*724ba675SRob Herring			  "SDIO0_D0",
353*724ba675SRob Herring			  "SDIO0_D1",
354*724ba675SRob Herring			  "SDIO0_D2",
355*724ba675SRob Herring			  "SDIO0_D3",
356*724ba675SRob Herring
357*724ba675SRob Herring			  "SDIO0_CMD",
358*724ba675SRob Herring			  "SDIO0_CLK",
359*724ba675SRob Herring			  "BT_DEV_WAKE",
360*724ba675SRob Herring			  "",
361*724ba675SRob Herring			  "WIFI_ENABLE_H",
362*724ba675SRob Herring			  "BT_ENABLE_L",
363*724ba675SRob Herring			  "WIFI_HOST_WAKE",
364*724ba675SRob Herring			  "BT_HOST_WAKE";
365*724ba675SRob Herring};
366*724ba675SRob Herring
367*724ba675SRob Herring&gpio7 {
368*724ba675SRob Herring	gpio-line-names = "",
369*724ba675SRob Herring			  "PWM_LOG",
370*724ba675SRob Herring			  "",
371*724ba675SRob Herring			  "",
372*724ba675SRob Herring			  "TPM_INT_H",
373*724ba675SRob Herring			  "SDMMC_DET_L",
374*724ba675SRob Herring			  /*
375*724ba675SRob Herring			   * AP_FLASH_WP_L is Chrome OS ABI.  Schematics call
376*724ba675SRob Herring			   * it FW_WP_AP.
377*724ba675SRob Herring			   */
378*724ba675SRob Herring			  "AP_FLASH_WP_L",
379*724ba675SRob Herring			  "",
380*724ba675SRob Herring
381*724ba675SRob Herring			  "CPU_NMI",
382*724ba675SRob Herring			  "DVSOK",
383*724ba675SRob Herring			  "HDMI_WAKE",
384*724ba675SRob Herring			  "POWER_HDMI_ON",
385*724ba675SRob Herring			  "DVS1",
386*724ba675SRob Herring			  "",
387*724ba675SRob Herring			  "",
388*724ba675SRob Herring			  "DVS2",
389*724ba675SRob Herring
390*724ba675SRob Herring			  "HDMI_CEC",
391*724ba675SRob Herring			  "",
392*724ba675SRob Herring			  "",
393*724ba675SRob Herring			  "I2C5_SDA_HDMI",
394*724ba675SRob Herring			  "I2C5_SCL_HDMI",
395*724ba675SRob Herring			  "",
396*724ba675SRob Herring			  "UART2_RXD",
397*724ba675SRob Herring			  "UART2_TXD";
398*724ba675SRob Herring};
399*724ba675SRob Herring
400*724ba675SRob Herring&gpio8 {
401*724ba675SRob Herring	gpio-line-names = "RAM_ID0",
402*724ba675SRob Herring			  "RAM_ID1",
403*724ba675SRob Herring			  "RAM_ID2",
404*724ba675SRob Herring			  "RAM_ID3",
405*724ba675SRob Herring			  "I2C1_SDA_TPM",
406*724ba675SRob Herring			  "I2C1_SCL_TPM",
407*724ba675SRob Herring			  "SPI2_CLK",
408*724ba675SRob Herring			  "SPI2_CS0",
409*724ba675SRob Herring
410*724ba675SRob Herring			  "SPI2_RXD",
411*724ba675SRob Herring			  "SPI2_TXD";
412*724ba675SRob Herring};
413*724ba675SRob Herring
414*724ba675SRob Herring&pinctrl {
415*724ba675SRob Herring	pinctrl-names = "default";
416*724ba675SRob Herring	pinctrl-0 = <
417*724ba675SRob Herring		/* Common for sleep and wake, but no owners */
418*724ba675SRob Herring		&ddr0_retention
419*724ba675SRob Herring		&ddrio_pwroff
420*724ba675SRob Herring		&global_pwroff
421*724ba675SRob Herring	>;
422*724ba675SRob Herring
423*724ba675SRob Herring	hdmi {
424*724ba675SRob Herring		power_hdmi_on: power-hdmi-on {
425*724ba675SRob Herring			rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
426*724ba675SRob Herring		};
427*724ba675SRob Herring	};
428*724ba675SRob Herring
429*724ba675SRob Herring	pmic {
430*724ba675SRob Herring		dvs_1: dvs-1 {
431*724ba675SRob Herring			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
432*724ba675SRob Herring		};
433*724ba675SRob Herring
434*724ba675SRob Herring		dvs_2: dvs-2 {
435*724ba675SRob Herring			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
436*724ba675SRob Herring		};
437*724ba675SRob Herring	};
438*724ba675SRob Herring};
439*724ba675SRob Herring
440*724ba675SRob Herring&usb_host0_ehci {
441*724ba675SRob Herring	status = "disabled";
442*724ba675SRob Herring};
443*724ba675SRob Herring
444*724ba675SRob Herring&usb_host1 {
445*724ba675SRob Herring	status = "disabled";
446*724ba675SRob Herring};
447*724ba675SRob Herring
448*724ba675SRob Herring&vcc50_hdmi {
449*724ba675SRob Herring	enable-active-high;
450*724ba675SRob Herring	gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>;
451*724ba675SRob Herring	pinctrl-names = "default";
452*724ba675SRob Herring	pinctrl-0 = <&power_hdmi_on>;
453*724ba675SRob Herring};
454