1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Google Veyron Jerry Rev 3+ board device tree source
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright 2015 Google, Inc
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herring/dts-v1/;
9*724ba675SRob Herring#include "rk3288-veyron-chromebook.dtsi"
10*724ba675SRob Herring#include "../cros-ec-sbs.dtsi"
11*724ba675SRob Herring
12*724ba675SRob Herring/ {
13*724ba675SRob Herring	model = "Google Jerry";
14*724ba675SRob Herring	compatible = "google,veyron-jerry-rev15", "google,veyron-jerry-rev14",
15*724ba675SRob Herring		     "google,veyron-jerry-rev13", "google,veyron-jerry-rev12",
16*724ba675SRob Herring		     "google,veyron-jerry-rev11", "google,veyron-jerry-rev10",
17*724ba675SRob Herring		     "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
18*724ba675SRob Herring		     "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
19*724ba675SRob Herring		     "google,veyron-jerry-rev3", "google,veyron-jerry",
20*724ba675SRob Herring		     "google,veyron", "rockchip,rk3288";
21*724ba675SRob Herring};
22*724ba675SRob Herring
23*724ba675SRob Herring&rk808 {
24*724ba675SRob Herring	pinctrl-names = "default";
25*724ba675SRob Herring	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
26*724ba675SRob Herring	dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
27*724ba675SRob Herring		    <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
28*724ba675SRob Herring
29*724ba675SRob Herring	regulators {
30*724ba675SRob Herring		mic_vcc: LDO_REG2 {
31*724ba675SRob Herring			regulator-name = "mic_vcc";
32*724ba675SRob Herring			regulator-always-on;
33*724ba675SRob Herring			regulator-boot-on;
34*724ba675SRob Herring			regulator-min-microvolt = <1800000>;
35*724ba675SRob Herring			regulator-max-microvolt = <1800000>;
36*724ba675SRob Herring			regulator-state-mem {
37*724ba675SRob Herring				regulator-off-in-suspend;
38*724ba675SRob Herring			};
39*724ba675SRob Herring		};
40*724ba675SRob Herring	};
41*724ba675SRob Herring};
42*724ba675SRob Herring
43*724ba675SRob Herring&sdio0 {
44*724ba675SRob Herring	#address-cells = <1>;
45*724ba675SRob Herring	#size-cells = <0>;
46*724ba675SRob Herring
47*724ba675SRob Herring	mwifiex: wifi@1 {
48*724ba675SRob Herring		compatible = "marvell,sd8897";
49*724ba675SRob Herring		reg = <1>;
50*724ba675SRob Herring
51*724ba675SRob Herring		marvell,caldata-txpwrlimit-2g = /bits/ 8 <
52*724ba675SRob Herring0x01 0x00 0x06 0x00 0x08 0x02 0x89 0x01
53*724ba675SRob Herring0x24 0x00 0x67 0x09 0x14 0x01 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
54*724ba675SRob Herring0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
55*724ba675SRob Herring0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x02 0x00 0x0f
56*724ba675SRob Herring0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
57*724ba675SRob Herring0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
58*724ba675SRob Herring0x24 0x00 0x67 0x09 0x14 0x03 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
59*724ba675SRob Herring0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
60*724ba675SRob Herring0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x04 0x00 0x0f
61*724ba675SRob Herring0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
62*724ba675SRob Herring0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
63*724ba675SRob Herring0x24 0x00 0x67 0x09 0x14 0x05 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
64*724ba675SRob Herring0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
65*724ba675SRob Herring0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x06 0x00 0x0f
66*724ba675SRob Herring0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
67*724ba675SRob Herring0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
68*724ba675SRob Herring0x24 0x00 0x67 0x09 0x14 0x07 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
69*724ba675SRob Herring0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
70*724ba675SRob Herring0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x08 0x00 0x0f
71*724ba675SRob Herring0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
72*724ba675SRob Herring0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
73*724ba675SRob Herring0x24 0x00 0x67 0x09 0x14 0x09 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
74*724ba675SRob Herring0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
75*724ba675SRob Herring0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x0a 0x00 0x0f
76*724ba675SRob Herring0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
77*724ba675SRob Herring0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
78*724ba675SRob Herring0x24 0x00 0x67 0x09 0x14 0x0b 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
79*724ba675SRob Herring0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
80*724ba675SRob Herring0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x0c 0x00 0x0f
81*724ba675SRob Herring0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
82*724ba675SRob Herring0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
83*724ba675SRob Herring0x24 0x00 0x67 0x09 0x14 0x0d 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
84*724ba675SRob Herring0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
85*724ba675SRob Herring0x0d 0x09 0x0e 0x09 0x0f 0x09>;
86*724ba675SRob Herring
87*724ba675SRob Herring		marvell,caldata-txpwrlimit-5g-sub0 = /bits/ 8 <
88*724ba675SRob Herring0x01 0x00 0x06 0x00 0xf0 0x01 0x89 0x01
89*724ba675SRob Herring0x3a 0x00 0x88 0x13 0x14 0x24 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a
90*724ba675SRob Herring0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09
91*724ba675SRob Herring0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05
92*724ba675SRob Herring0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
93*724ba675SRob Herring0x88 0x13 0x14 0x28 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a
94*724ba675SRob Herring0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09
95*724ba675SRob Herring0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05
96*724ba675SRob Herring0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13
97*724ba675SRob Herring0x14 0x2c 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09
98*724ba675SRob Herring0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09
99*724ba675SRob Herring0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05
100*724ba675SRob Herring0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x30
101*724ba675SRob Herring0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09
102*724ba675SRob Herring0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05
103*724ba675SRob Herring0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05
104*724ba675SRob Herring0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x34 0x01 0x0c
105*724ba675SRob Herring0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09
106*724ba675SRob Herring0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05
107*724ba675SRob Herring0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05
108*724ba675SRob Herring0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x38 0x01 0x0c 0x02 0x0c
109*724ba675SRob Herring0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a
110*724ba675SRob Herring0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05
111*724ba675SRob Herring0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05
112*724ba675SRob Herring0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x3c 0x01 0x0c 0x02 0x0c 0x03 0x0c
113*724ba675SRob Herring0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a
114*724ba675SRob Herring0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05
115*724ba675SRob Herring0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05
116*724ba675SRob Herring0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x40 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a
117*724ba675SRob Herring0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a
118*724ba675SRob Herring0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05
119*724ba675SRob Herring0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05>;
120*724ba675SRob Herring
121*724ba675SRob Herring		marvell,caldata-txpwrlimit-5g-sub1 = /bits/ 8 <
122*724ba675SRob Herring0x01 0x00 0x06 0x00 0xaa 0x02 0x89 0x01
123*724ba675SRob Herring0x3a 0x00 0x88 0x13 0x14 0x64 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a
124*724ba675SRob Herring0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09
125*724ba675SRob Herring0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05
126*724ba675SRob Herring0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
127*724ba675SRob Herring0x88 0x13 0x14 0x68 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a
128*724ba675SRob Herring0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09
129*724ba675SRob Herring0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05
130*724ba675SRob Herring0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13
131*724ba675SRob Herring0x14 0x6c 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09
132*724ba675SRob Herring0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09
133*724ba675SRob Herring0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05
134*724ba675SRob Herring0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x70
135*724ba675SRob Herring0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09
136*724ba675SRob Herring0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05
137*724ba675SRob Herring0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05
138*724ba675SRob Herring0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x74 0x01 0x0c
139*724ba675SRob Herring0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09
140*724ba675SRob Herring0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05
141*724ba675SRob Herring0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05
142*724ba675SRob Herring0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x78 0x01 0x0c 0x02 0x0c
143*724ba675SRob Herring0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a
144*724ba675SRob Herring0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05
145*724ba675SRob Herring0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05
146*724ba675SRob Herring0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x7c 0x01 0x0c 0x02 0x0c 0x03 0x0c
147*724ba675SRob Herring0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a
148*724ba675SRob Herring0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05
149*724ba675SRob Herring0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05
150*724ba675SRob Herring0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x80 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a
151*724ba675SRob Herring0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a
152*724ba675SRob Herring0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05
153*724ba675SRob Herring0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01
154*724ba675SRob Herring0x3a 0x00 0x88 0x13 0x14 0x84 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a
155*724ba675SRob Herring0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09
156*724ba675SRob Herring0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05
157*724ba675SRob Herring0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
158*724ba675SRob Herring0x88 0x13 0x14 0x88 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a
159*724ba675SRob Herring0x07 0x08 0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08
160*724ba675SRob Herring0x0f 0x08 0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04
161*724ba675SRob Herring0x17 0x04 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13
162*724ba675SRob Herring0x14 0x8c 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x08
163*724ba675SRob Herring0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08 0x0f 0x08
164*724ba675SRob Herring0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04 0x17 0x04
165*724ba675SRob Herring0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05>;
166*724ba675SRob Herring
167*724ba675SRob Herring		marvell,caldata-txpwrlimit-5g-sub2 = /bits/ 8 <
168*724ba675SRob Herring0x01 0x00 0x06 0x00 0x36 0x01 0x89 0x01
169*724ba675SRob Herring0x3a 0x00 0x88 0x13 0x14 0x95 0x01 0x0b 0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a
170*724ba675SRob Herring0x06 0x0a 0x07 0x08 0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08
171*724ba675SRob Herring0x0e 0x08 0x0f 0x08 0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05
172*724ba675SRob Herring0x16 0x04 0x17 0x04 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
173*724ba675SRob Herring0x88 0x13 0x14 0x99 0x01 0x0b 0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a 0x06 0x0a
174*724ba675SRob Herring0x07 0x08 0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08
175*724ba675SRob Herring0x0f 0x08 0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04
176*724ba675SRob Herring0x17 0x04 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13
177*724ba675SRob Herring0x14 0x9d 0x01 0x0b 0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x08
178*724ba675SRob Herring0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08 0x0f 0x08
179*724ba675SRob Herring0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04 0x17 0x04
180*724ba675SRob Herring0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0xa1
181*724ba675SRob Herring0x01 0x0b 0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x08 0x08 0x08
182*724ba675SRob Herring0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08 0x0f 0x08 0x10 0x04
183*724ba675SRob Herring0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04 0x17 0x04 0x18 0x05
184*724ba675SRob Herring0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0xa5 0x01 0x0b
185*724ba675SRob Herring0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x08 0x08 0x08 0x09 0x08
186*724ba675SRob Herring0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08 0x0f 0x08 0x10 0x04 0x11 0x04
187*724ba675SRob Herring0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04 0x17 0x04 0x18 0x05 0x19 0x05
188*724ba675SRob Herring0x1a 0x05 0x1b 0x05>;
189*724ba675SRob Herring	};
190*724ba675SRob Herring};
191*724ba675SRob Herring
192*724ba675SRob Herring&sdmmc {
193*724ba675SRob Herring	disable-wp;
194*724ba675SRob Herring	pinctrl-names = "default";
195*724ba675SRob Herring	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
196*724ba675SRob Herring			&sdmmc_bus4>;
197*724ba675SRob Herring};
198*724ba675SRob Herring
199*724ba675SRob Herring&vcc_5v {
200*724ba675SRob Herring	enable-active-high;
201*724ba675SRob Herring	gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
202*724ba675SRob Herring	pinctrl-names = "default";
203*724ba675SRob Herring	pinctrl-0 = <&drv_5v>;
204*724ba675SRob Herring};
205*724ba675SRob Herring
206*724ba675SRob Herring&vcc50_hdmi {
207*724ba675SRob Herring	enable-active-high;
208*724ba675SRob Herring	gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
209*724ba675SRob Herring	pinctrl-names = "default";
210*724ba675SRob Herring	pinctrl-0 = <&vcc50_hdmi_en>;
211*724ba675SRob Herring};
212*724ba675SRob Herring
213*724ba675SRob Herring&gpio0 {
214*724ba675SRob Herring	gpio-line-names = "PMIC_SLEEP_AP",
215*724ba675SRob Herring			  "DDRIO_PWROFF",
216*724ba675SRob Herring			  "DDRIO_RETEN",
217*724ba675SRob Herring			  "TS3A227E_INT_L",
218*724ba675SRob Herring			  "PMIC_INT_L",
219*724ba675SRob Herring			  "PWR_KEY_L",
220*724ba675SRob Herring			  "AP_LID_INT_L",
221*724ba675SRob Herring			  "EC_IN_RW",
222*724ba675SRob Herring
223*724ba675SRob Herring			  "AC_PRESENT_AP",
224*724ba675SRob Herring			  /*
225*724ba675SRob Herring			   * RECOVERY_SW_L is Chrome OS ABI.  Schematics call
226*724ba675SRob Herring			   * it REC_MODE_L.
227*724ba675SRob Herring			   */
228*724ba675SRob Herring			  "RECOVERY_SW_L",
229*724ba675SRob Herring			  "OTP_OUT",
230*724ba675SRob Herring			  "HOST1_PWR_EN",
231*724ba675SRob Herring			  "USBOTG_PWREN_H",
232*724ba675SRob Herring			  "AP_WARM_RESET_H",
233*724ba675SRob Herring			  "nFAULT2",
234*724ba675SRob Herring			  "I2C0_SDA_PMIC",
235*724ba675SRob Herring
236*724ba675SRob Herring			  "I2C0_SCL_PMIC",
237*724ba675SRob Herring			  "SUSPEND_L",
238*724ba675SRob Herring			  "USB_INT";
239*724ba675SRob Herring};
240*724ba675SRob Herring
241*724ba675SRob Herring&gpio2 {
242*724ba675SRob Herring	gpio-line-names = "CONFIG0",
243*724ba675SRob Herring			  "CONFIG1",
244*724ba675SRob Herring			  "CONFIG2",
245*724ba675SRob Herring			  "",
246*724ba675SRob Herring			  "",
247*724ba675SRob Herring			  "",
248*724ba675SRob Herring			  "",
249*724ba675SRob Herring			  "CONFIG3",
250*724ba675SRob Herring
251*724ba675SRob Herring			  "",
252*724ba675SRob Herring			  "EMMC_RST_L",
253*724ba675SRob Herring			  "",
254*724ba675SRob Herring			  "",
255*724ba675SRob Herring			  "BL_PWR_EN",
256*724ba675SRob Herring			  "AVDD_1V8_DISP_EN";
257*724ba675SRob Herring};
258*724ba675SRob Herring
259*724ba675SRob Herring&gpio3 {
260*724ba675SRob Herring	gpio-line-names = "FLASH0_D0",
261*724ba675SRob Herring			  "FLASH0_D1",
262*724ba675SRob Herring			  "FLASH0_D2",
263*724ba675SRob Herring			  "FLASH0_D3",
264*724ba675SRob Herring			  "FLASH0_D4",
265*724ba675SRob Herring			  "FLASH0_D5",
266*724ba675SRob Herring			  "FLASH0_D6",
267*724ba675SRob Herring			  "FLASH0_D7",
268*724ba675SRob Herring
269*724ba675SRob Herring			  "",
270*724ba675SRob Herring			  "",
271*724ba675SRob Herring			  "",
272*724ba675SRob Herring			  "",
273*724ba675SRob Herring			  "",
274*724ba675SRob Herring			  "",
275*724ba675SRob Herring			  "",
276*724ba675SRob Herring			  "",
277*724ba675SRob Herring
278*724ba675SRob Herring			  "FLASH0_CS2/EMMC_CMD",
279*724ba675SRob Herring			  "",
280*724ba675SRob Herring			  "FLASH0_DQS/EMMC_CLKO";
281*724ba675SRob Herring};
282*724ba675SRob Herring
283*724ba675SRob Herring&gpio4 {
284*724ba675SRob Herring	gpio-line-names = "",
285*724ba675SRob Herring			  "",
286*724ba675SRob Herring			  "",
287*724ba675SRob Herring			  "",
288*724ba675SRob Herring			  "",
289*724ba675SRob Herring			  "",
290*724ba675SRob Herring			  "",
291*724ba675SRob Herring			  "",
292*724ba675SRob Herring
293*724ba675SRob Herring			  "",
294*724ba675SRob Herring			  "",
295*724ba675SRob Herring			  "",
296*724ba675SRob Herring			  "",
297*724ba675SRob Herring			  "",
298*724ba675SRob Herring			  "",
299*724ba675SRob Herring			  "",
300*724ba675SRob Herring			  "",
301*724ba675SRob Herring
302*724ba675SRob Herring			  "UART0_RXD",
303*724ba675SRob Herring			  "UART0_TXD",
304*724ba675SRob Herring			  "UART0_CTS",
305*724ba675SRob Herring			  "UART0_RTS",
306*724ba675SRob Herring			  "SDIO0_D0",
307*724ba675SRob Herring			  "SDIO0_D1",
308*724ba675SRob Herring			  "SDIO0_D2",
309*724ba675SRob Herring			  "SDIO0_D3",
310*724ba675SRob Herring
311*724ba675SRob Herring			  "SDIO0_CMD",
312*724ba675SRob Herring			  "SDIO0_CLK",
313*724ba675SRob Herring			  "BT_DEV_WAKE",
314*724ba675SRob Herring			  "",
315*724ba675SRob Herring			  "WIFI_ENABLE_H",
316*724ba675SRob Herring			  "BT_ENABLE_L",
317*724ba675SRob Herring			  "WIFI_HOST_WAKE",
318*724ba675SRob Herring			  "BT_HOST_WAKE";
319*724ba675SRob Herring};
320*724ba675SRob Herring
321*724ba675SRob Herring&gpio5 {
322*724ba675SRob Herring	gpio-line-names = "",
323*724ba675SRob Herring			  "",
324*724ba675SRob Herring			  "",
325*724ba675SRob Herring			  "",
326*724ba675SRob Herring			  "",
327*724ba675SRob Herring			  "",
328*724ba675SRob Herring			  "",
329*724ba675SRob Herring			  "",
330*724ba675SRob Herring
331*724ba675SRob Herring			  "",
332*724ba675SRob Herring			  "",
333*724ba675SRob Herring			  "",
334*724ba675SRob Herring			  "",
335*724ba675SRob Herring			  "SPI0_CLK",
336*724ba675SRob Herring			  "SPI0_CS0",
337*724ba675SRob Herring			  "SPI0_TXD",
338*724ba675SRob Herring			  "SPI0_RXD",
339*724ba675SRob Herring
340*724ba675SRob Herring			  "",
341*724ba675SRob Herring			  "",
342*724ba675SRob Herring			  "",
343*724ba675SRob Herring			  "VCC50_HDMI_EN";
344*724ba675SRob Herring};
345*724ba675SRob Herring
346*724ba675SRob Herring&gpio6 {
347*724ba675SRob Herring	gpio-line-names = "I2S0_SCLK",
348*724ba675SRob Herring			  "I2S0_LRCK_RX",
349*724ba675SRob Herring			  "I2S0_LRCK_TX",
350*724ba675SRob Herring			  "I2S0_SDI",
351*724ba675SRob Herring			  "I2S0_SDO0",
352*724ba675SRob Herring			  "HP_DET_H",
353*724ba675SRob Herring			  "",
354*724ba675SRob Herring			  "INT_CODEC",
355*724ba675SRob Herring
356*724ba675SRob Herring			  "I2S0_CLK",
357*724ba675SRob Herring			  "I2C2_SDA",
358*724ba675SRob Herring			  "I2C2_SCL",
359*724ba675SRob Herring			  "MICDET",
360*724ba675SRob Herring			  "",
361*724ba675SRob Herring			  "",
362*724ba675SRob Herring			  "",
363*724ba675SRob Herring			  "",
364*724ba675SRob Herring
365*724ba675SRob Herring			  "SDMMC_D0",
366*724ba675SRob Herring			  "SDMMC_D1",
367*724ba675SRob Herring			  "SDMMC_D2",
368*724ba675SRob Herring			  "SDMMC_D3",
369*724ba675SRob Herring			  "SDMMC_CLK",
370*724ba675SRob Herring			  "SDMMC_CMD";
371*724ba675SRob Herring};
372*724ba675SRob Herring
373*724ba675SRob Herring&gpio7 {
374*724ba675SRob Herring	gpio-line-names = "LCDC_BL",
375*724ba675SRob Herring			  "PWM_LOG",
376*724ba675SRob Herring			  "BL_EN",
377*724ba675SRob Herring			  "TRACKPAD_INT",
378*724ba675SRob Herring			  "TPM_INT_H",
379*724ba675SRob Herring			  "SDMMC_DET_L",
380*724ba675SRob Herring			  /*
381*724ba675SRob Herring			   * AP_FLASH_WP_L is Chrome OS ABI.  Schematics call
382*724ba675SRob Herring			   * it FW_WP_AP.
383*724ba675SRob Herring			   */
384*724ba675SRob Herring			  "AP_FLASH_WP_L",
385*724ba675SRob Herring			  "EC_INT",
386*724ba675SRob Herring
387*724ba675SRob Herring			  "CPU_NMI",
388*724ba675SRob Herring			  "DVSOK",
389*724ba675SRob Herring			  "",
390*724ba675SRob Herring			  "EDP_HPD",
391*724ba675SRob Herring			  "DVS1",
392*724ba675SRob Herring			  "nFAULT1",
393*724ba675SRob Herring			  "LCD_EN",
394*724ba675SRob Herring			  "DVS2",
395*724ba675SRob Herring
396*724ba675SRob Herring			  "VCC5V_GOOD_H",
397*724ba675SRob Herring			  "I2C4_SDA_TP",
398*724ba675SRob Herring			  "I2C4_SCL_TP",
399*724ba675SRob Herring			  "I2C5_SDA_HDMI",
400*724ba675SRob Herring			  "I2C5_SCL_HDMI",
401*724ba675SRob Herring			  "5V_DRV",
402*724ba675SRob Herring			  "UART2_RXD",
403*724ba675SRob Herring			  "UART2_TXD";
404*724ba675SRob Herring};
405*724ba675SRob Herring
406*724ba675SRob Herring&gpio8 {
407*724ba675SRob Herring	gpio-line-names = "RAM_ID0",
408*724ba675SRob Herring			  "RAM_ID1",
409*724ba675SRob Herring			  "RAM_ID2",
410*724ba675SRob Herring			  "RAM_ID3",
411*724ba675SRob Herring			  "I2C1_SDA_TPM",
412*724ba675SRob Herring			  "I2C1_SCL_TPM",
413*724ba675SRob Herring			  "SPI2_CLK",
414*724ba675SRob Herring			  "SPI2_CS0",
415*724ba675SRob Herring
416*724ba675SRob Herring			  "SPI2_RXD",
417*724ba675SRob Herring			  "SPI2_TXD";
418*724ba675SRob Herring};
419*724ba675SRob Herring
420*724ba675SRob Herring&pinctrl {
421*724ba675SRob Herring	pinctrl-names = "default", "sleep";
422*724ba675SRob Herring	pinctrl-0 = <
423*724ba675SRob Herring		/* Common for sleep and wake, but no owners */
424*724ba675SRob Herring		&ddr0_retention
425*724ba675SRob Herring		&ddrio_pwroff
426*724ba675SRob Herring		&global_pwroff
427*724ba675SRob Herring
428*724ba675SRob Herring		/* Wake only */
429*724ba675SRob Herring		&suspend_l_wake
430*724ba675SRob Herring		&bt_dev_wake_awake
431*724ba675SRob Herring	>;
432*724ba675SRob Herring	pinctrl-1 = <
433*724ba675SRob Herring		/* Common for sleep and wake, but no owners */
434*724ba675SRob Herring		&ddr0_retention
435*724ba675SRob Herring		&ddrio_pwroff
436*724ba675SRob Herring		&global_pwroff
437*724ba675SRob Herring
438*724ba675SRob Herring		/* Sleep only */
439*724ba675SRob Herring		&suspend_l_sleep
440*724ba675SRob Herring		&bt_dev_wake_sleep
441*724ba675SRob Herring	>;
442*724ba675SRob Herring
443*724ba675SRob Herring	buck-5v {
444*724ba675SRob Herring		drv_5v: drv-5v {
445*724ba675SRob Herring			rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
446*724ba675SRob Herring		};
447*724ba675SRob Herring	};
448*724ba675SRob Herring
449*724ba675SRob Herring	hdmi {
450*724ba675SRob Herring		vcc50_hdmi_en: vcc50-hdmi-en {
451*724ba675SRob Herring			rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
452*724ba675SRob Herring		};
453*724ba675SRob Herring	};
454*724ba675SRob Herring
455*724ba675SRob Herring	pmic {
456*724ba675SRob Herring		dvs_1: dvs-1 {
457*724ba675SRob Herring			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
458*724ba675SRob Herring		};
459*724ba675SRob Herring
460*724ba675SRob Herring		dvs_2: dvs-2 {
461*724ba675SRob Herring			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
462*724ba675SRob Herring		};
463*724ba675SRob Herring	};
464*724ba675SRob Herring};
465*724ba675SRob Herring
466*724ba675SRob Herring&i2c4 {
467*724ba675SRob Herring	status = "okay";
468*724ba675SRob Herring
469*724ba675SRob Herring	/*
470*724ba675SRob Herring	 * Trackpad pin control is shared between Elan and Synaptics devices
471*724ba675SRob Herring	 * so we have to pull it up to the bus level.
472*724ba675SRob Herring	 */
473*724ba675SRob Herring	pinctrl-names = "default";
474*724ba675SRob Herring	pinctrl-0 = <&i2c4_xfer &trackpad_int>;
475*724ba675SRob Herring
476*724ba675SRob Herring	trackpad@15 {
477*724ba675SRob Herring		/*
478*724ba675SRob Herring		 * Remove the inherited pinctrl settings to avoid clashing
479*724ba675SRob Herring		 * with bus-wide ones.
480*724ba675SRob Herring		 */
481*724ba675SRob Herring		/delete-property/pinctrl-names;
482*724ba675SRob Herring		/delete-property/pinctrl-0;
483*724ba675SRob Herring	};
484*724ba675SRob Herring
485*724ba675SRob Herring	trackpad@2c {
486*724ba675SRob Herring		compatible = "hid-over-i2c";
487*724ba675SRob Herring		interrupt-parent = <&gpio7>;
488*724ba675SRob Herring		interrupts = <RK_PA3 IRQ_TYPE_EDGE_FALLING>;
489*724ba675SRob Herring		reg = <0x2c>;
490*724ba675SRob Herring		hid-descr-addr = <0x0020>;
491*724ba675SRob Herring		vcc-supply = <&vcc33_io>;
492*724ba675SRob Herring		wakeup-source;
493*724ba675SRob Herring	};
494*724ba675SRob Herring};
495