1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Device Tree Source for the R-Car E2 (R8A77940) SoC 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2014 Renesas Electronics Corporation 6*724ba675SRob Herring * Copyright (C) 2014 Ulrich Hecht 7*724ba675SRob Herring */ 8*724ba675SRob Herring 9*724ba675SRob Herring#include <dt-bindings/clock/r8a7794-cpg-mssr.h> 10*724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h> 11*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 12*724ba675SRob Herring#include <dt-bindings/power/r8a7794-sysc.h> 13*724ba675SRob Herring 14*724ba675SRob Herring/ { 15*724ba675SRob Herring compatible = "renesas,r8a7794"; 16*724ba675SRob Herring #address-cells = <2>; 17*724ba675SRob Herring #size-cells = <2>; 18*724ba675SRob Herring 19*724ba675SRob Herring aliases { 20*724ba675SRob Herring i2c0 = &i2c0; 21*724ba675SRob Herring i2c1 = &i2c1; 22*724ba675SRob Herring i2c2 = &i2c2; 23*724ba675SRob Herring i2c3 = &i2c3; 24*724ba675SRob Herring i2c4 = &i2c4; 25*724ba675SRob Herring i2c5 = &i2c5; 26*724ba675SRob Herring i2c6 = &i2c6; 27*724ba675SRob Herring i2c7 = &i2c7; 28*724ba675SRob Herring spi0 = &qspi; 29*724ba675SRob Herring vin0 = &vin0; 30*724ba675SRob Herring vin1 = &vin1; 31*724ba675SRob Herring }; 32*724ba675SRob Herring 33*724ba675SRob Herring /* 34*724ba675SRob Herring * The external audio clocks are configured as 0 Hz fixed frequency 35*724ba675SRob Herring * clocks by default. 36*724ba675SRob Herring * Boards that provide audio clocks should override them. 37*724ba675SRob Herring */ 38*724ba675SRob Herring audio_clka: audio_clka { 39*724ba675SRob Herring compatible = "fixed-clock"; 40*724ba675SRob Herring #clock-cells = <0>; 41*724ba675SRob Herring clock-frequency = <0>; 42*724ba675SRob Herring }; 43*724ba675SRob Herring audio_clkb: audio_clkb { 44*724ba675SRob Herring compatible = "fixed-clock"; 45*724ba675SRob Herring #clock-cells = <0>; 46*724ba675SRob Herring clock-frequency = <0>; 47*724ba675SRob Herring }; 48*724ba675SRob Herring audio_clkc: audio_clkc { 49*724ba675SRob Herring compatible = "fixed-clock"; 50*724ba675SRob Herring #clock-cells = <0>; 51*724ba675SRob Herring clock-frequency = <0>; 52*724ba675SRob Herring }; 53*724ba675SRob Herring 54*724ba675SRob Herring /* External CAN clock */ 55*724ba675SRob Herring can_clk: can { 56*724ba675SRob Herring compatible = "fixed-clock"; 57*724ba675SRob Herring #clock-cells = <0>; 58*724ba675SRob Herring /* This value must be overridden by the board. */ 59*724ba675SRob Herring clock-frequency = <0>; 60*724ba675SRob Herring }; 61*724ba675SRob Herring 62*724ba675SRob Herring cpus { 63*724ba675SRob Herring #address-cells = <1>; 64*724ba675SRob Herring #size-cells = <0>; 65*724ba675SRob Herring 66*724ba675SRob Herring cpu0: cpu@0 { 67*724ba675SRob Herring device_type = "cpu"; 68*724ba675SRob Herring compatible = "arm,cortex-a7"; 69*724ba675SRob Herring reg = <0>; 70*724ba675SRob Herring clock-frequency = <1000000000>; 71*724ba675SRob Herring clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; 72*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_CA7_CPU0>; 73*724ba675SRob Herring enable-method = "renesas,apmu"; 74*724ba675SRob Herring next-level-cache = <&L2_CA7>; 75*724ba675SRob Herring }; 76*724ba675SRob Herring 77*724ba675SRob Herring cpu1: cpu@1 { 78*724ba675SRob Herring device_type = "cpu"; 79*724ba675SRob Herring compatible = "arm,cortex-a7"; 80*724ba675SRob Herring reg = <1>; 81*724ba675SRob Herring clock-frequency = <1000000000>; 82*724ba675SRob Herring clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; 83*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_CA7_CPU1>; 84*724ba675SRob Herring enable-method = "renesas,apmu"; 85*724ba675SRob Herring next-level-cache = <&L2_CA7>; 86*724ba675SRob Herring }; 87*724ba675SRob Herring 88*724ba675SRob Herring L2_CA7: cache-controller-0 { 89*724ba675SRob Herring compatible = "cache"; 90*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_CA7_SCU>; 91*724ba675SRob Herring cache-unified; 92*724ba675SRob Herring cache-level = <2>; 93*724ba675SRob Herring }; 94*724ba675SRob Herring }; 95*724ba675SRob Herring 96*724ba675SRob Herring /* External root clock */ 97*724ba675SRob Herring extal_clk: extal { 98*724ba675SRob Herring compatible = "fixed-clock"; 99*724ba675SRob Herring #clock-cells = <0>; 100*724ba675SRob Herring /* This value must be overridden by the board. */ 101*724ba675SRob Herring clock-frequency = <0>; 102*724ba675SRob Herring }; 103*724ba675SRob Herring 104*724ba675SRob Herring pmu { 105*724ba675SRob Herring compatible = "arm,cortex-a7-pmu"; 106*724ba675SRob Herring interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 107*724ba675SRob Herring <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 108*724ba675SRob Herring interrupt-affinity = <&cpu0>, <&cpu1>; 109*724ba675SRob Herring }; 110*724ba675SRob Herring 111*724ba675SRob Herring /* External SCIF clock */ 112*724ba675SRob Herring scif_clk: scif { 113*724ba675SRob Herring compatible = "fixed-clock"; 114*724ba675SRob Herring #clock-cells = <0>; 115*724ba675SRob Herring /* This value must be overridden by the board. */ 116*724ba675SRob Herring clock-frequency = <0>; 117*724ba675SRob Herring }; 118*724ba675SRob Herring 119*724ba675SRob Herring soc { 120*724ba675SRob Herring compatible = "simple-bus"; 121*724ba675SRob Herring interrupt-parent = <&gic>; 122*724ba675SRob Herring 123*724ba675SRob Herring #address-cells = <2>; 124*724ba675SRob Herring #size-cells = <2>; 125*724ba675SRob Herring ranges; 126*724ba675SRob Herring 127*724ba675SRob Herring rwdt: watchdog@e6020000 { 128*724ba675SRob Herring compatible = "renesas,r8a7794-wdt", 129*724ba675SRob Herring "renesas,rcar-gen2-wdt"; 130*724ba675SRob Herring reg = <0 0xe6020000 0 0x0c>; 131*724ba675SRob Herring interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 132*724ba675SRob Herring clocks = <&cpg CPG_MOD 402>; 133*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 134*724ba675SRob Herring resets = <&cpg 402>; 135*724ba675SRob Herring status = "disabled"; 136*724ba675SRob Herring }; 137*724ba675SRob Herring 138*724ba675SRob Herring gpio0: gpio@e6050000 { 139*724ba675SRob Herring compatible = "renesas,gpio-r8a7794", 140*724ba675SRob Herring "renesas,rcar-gen2-gpio"; 141*724ba675SRob Herring reg = <0 0xe6050000 0 0x50>; 142*724ba675SRob Herring interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 143*724ba675SRob Herring #gpio-cells = <2>; 144*724ba675SRob Herring gpio-controller; 145*724ba675SRob Herring gpio-ranges = <&pfc 0 0 32>; 146*724ba675SRob Herring #interrupt-cells = <2>; 147*724ba675SRob Herring interrupt-controller; 148*724ba675SRob Herring clocks = <&cpg CPG_MOD 912>; 149*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 150*724ba675SRob Herring resets = <&cpg 912>; 151*724ba675SRob Herring }; 152*724ba675SRob Herring 153*724ba675SRob Herring gpio1: gpio@e6051000 { 154*724ba675SRob Herring compatible = "renesas,gpio-r8a7794", 155*724ba675SRob Herring "renesas,rcar-gen2-gpio"; 156*724ba675SRob Herring reg = <0 0xe6051000 0 0x50>; 157*724ba675SRob Herring interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 158*724ba675SRob Herring #gpio-cells = <2>; 159*724ba675SRob Herring gpio-controller; 160*724ba675SRob Herring gpio-ranges = <&pfc 0 32 26>; 161*724ba675SRob Herring #interrupt-cells = <2>; 162*724ba675SRob Herring interrupt-controller; 163*724ba675SRob Herring clocks = <&cpg CPG_MOD 911>; 164*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 165*724ba675SRob Herring resets = <&cpg 911>; 166*724ba675SRob Herring }; 167*724ba675SRob Herring 168*724ba675SRob Herring gpio2: gpio@e6052000 { 169*724ba675SRob Herring compatible = "renesas,gpio-r8a7794", 170*724ba675SRob Herring "renesas,rcar-gen2-gpio"; 171*724ba675SRob Herring reg = <0 0xe6052000 0 0x50>; 172*724ba675SRob Herring interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 173*724ba675SRob Herring #gpio-cells = <2>; 174*724ba675SRob Herring gpio-controller; 175*724ba675SRob Herring gpio-ranges = <&pfc 0 64 32>; 176*724ba675SRob Herring #interrupt-cells = <2>; 177*724ba675SRob Herring interrupt-controller; 178*724ba675SRob Herring clocks = <&cpg CPG_MOD 910>; 179*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 180*724ba675SRob Herring resets = <&cpg 910>; 181*724ba675SRob Herring }; 182*724ba675SRob Herring 183*724ba675SRob Herring gpio3: gpio@e6053000 { 184*724ba675SRob Herring compatible = "renesas,gpio-r8a7794", 185*724ba675SRob Herring "renesas,rcar-gen2-gpio"; 186*724ba675SRob Herring reg = <0 0xe6053000 0 0x50>; 187*724ba675SRob Herring interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 188*724ba675SRob Herring #gpio-cells = <2>; 189*724ba675SRob Herring gpio-controller; 190*724ba675SRob Herring gpio-ranges = <&pfc 0 96 32>; 191*724ba675SRob Herring #interrupt-cells = <2>; 192*724ba675SRob Herring interrupt-controller; 193*724ba675SRob Herring clocks = <&cpg CPG_MOD 909>; 194*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 195*724ba675SRob Herring resets = <&cpg 909>; 196*724ba675SRob Herring }; 197*724ba675SRob Herring 198*724ba675SRob Herring gpio4: gpio@e6054000 { 199*724ba675SRob Herring compatible = "renesas,gpio-r8a7794", 200*724ba675SRob Herring "renesas,rcar-gen2-gpio"; 201*724ba675SRob Herring reg = <0 0xe6054000 0 0x50>; 202*724ba675SRob Herring interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 203*724ba675SRob Herring #gpio-cells = <2>; 204*724ba675SRob Herring gpio-controller; 205*724ba675SRob Herring gpio-ranges = <&pfc 0 128 32>; 206*724ba675SRob Herring #interrupt-cells = <2>; 207*724ba675SRob Herring interrupt-controller; 208*724ba675SRob Herring clocks = <&cpg CPG_MOD 908>; 209*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 210*724ba675SRob Herring resets = <&cpg 908>; 211*724ba675SRob Herring }; 212*724ba675SRob Herring 213*724ba675SRob Herring gpio5: gpio@e6055000 { 214*724ba675SRob Herring compatible = "renesas,gpio-r8a7794", 215*724ba675SRob Herring "renesas,rcar-gen2-gpio"; 216*724ba675SRob Herring reg = <0 0xe6055000 0 0x50>; 217*724ba675SRob Herring interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 218*724ba675SRob Herring #gpio-cells = <2>; 219*724ba675SRob Herring gpio-controller; 220*724ba675SRob Herring gpio-ranges = <&pfc 0 160 28>; 221*724ba675SRob Herring #interrupt-cells = <2>; 222*724ba675SRob Herring interrupt-controller; 223*724ba675SRob Herring clocks = <&cpg CPG_MOD 907>; 224*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 225*724ba675SRob Herring resets = <&cpg 907>; 226*724ba675SRob Herring }; 227*724ba675SRob Herring 228*724ba675SRob Herring gpio6: gpio@e6055400 { 229*724ba675SRob Herring compatible = "renesas,gpio-r8a7794", 230*724ba675SRob Herring "renesas,rcar-gen2-gpio"; 231*724ba675SRob Herring reg = <0 0xe6055400 0 0x50>; 232*724ba675SRob Herring interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 233*724ba675SRob Herring #gpio-cells = <2>; 234*724ba675SRob Herring gpio-controller; 235*724ba675SRob Herring gpio-ranges = <&pfc 0 192 26>; 236*724ba675SRob Herring #interrupt-cells = <2>; 237*724ba675SRob Herring interrupt-controller; 238*724ba675SRob Herring clocks = <&cpg CPG_MOD 905>; 239*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 240*724ba675SRob Herring resets = <&cpg 905>; 241*724ba675SRob Herring }; 242*724ba675SRob Herring 243*724ba675SRob Herring pfc: pinctrl@e6060000 { 244*724ba675SRob Herring compatible = "renesas,pfc-r8a7794"; 245*724ba675SRob Herring reg = <0 0xe6060000 0 0x11c>; 246*724ba675SRob Herring }; 247*724ba675SRob Herring 248*724ba675SRob Herring cpg: clock-controller@e6150000 { 249*724ba675SRob Herring compatible = "renesas,r8a7794-cpg-mssr"; 250*724ba675SRob Herring reg = <0 0xe6150000 0 0x1000>; 251*724ba675SRob Herring clocks = <&extal_clk>, <&usb_extal_clk>; 252*724ba675SRob Herring clock-names = "extal", "usb_extal"; 253*724ba675SRob Herring #clock-cells = <2>; 254*724ba675SRob Herring #power-domain-cells = <0>; 255*724ba675SRob Herring #reset-cells = <1>; 256*724ba675SRob Herring }; 257*724ba675SRob Herring 258*724ba675SRob Herring apmu@e6151000 { 259*724ba675SRob Herring compatible = "renesas,r8a7794-apmu", "renesas,apmu"; 260*724ba675SRob Herring reg = <0 0xe6151000 0 0x188>; 261*724ba675SRob Herring cpus = <&cpu0>, <&cpu1>; 262*724ba675SRob Herring }; 263*724ba675SRob Herring 264*724ba675SRob Herring rst: reset-controller@e6160000 { 265*724ba675SRob Herring compatible = "renesas,r8a7794-rst"; 266*724ba675SRob Herring reg = <0 0xe6160000 0 0x0100>; 267*724ba675SRob Herring }; 268*724ba675SRob Herring 269*724ba675SRob Herring sysc: system-controller@e6180000 { 270*724ba675SRob Herring compatible = "renesas,r8a7794-sysc"; 271*724ba675SRob Herring reg = <0 0xe6180000 0 0x0200>; 272*724ba675SRob Herring #power-domain-cells = <1>; 273*724ba675SRob Herring }; 274*724ba675SRob Herring 275*724ba675SRob Herring irqc0: interrupt-controller@e61c0000 { 276*724ba675SRob Herring compatible = "renesas,irqc-r8a7794", "renesas,irqc"; 277*724ba675SRob Herring #interrupt-cells = <2>; 278*724ba675SRob Herring interrupt-controller; 279*724ba675SRob Herring reg = <0 0xe61c0000 0 0x200>; 280*724ba675SRob Herring interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 281*724ba675SRob Herring <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 282*724ba675SRob Herring <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 283*724ba675SRob Herring <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 284*724ba675SRob Herring <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 285*724ba675SRob Herring <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 286*724ba675SRob Herring <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 287*724ba675SRob Herring <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 288*724ba675SRob Herring <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 289*724ba675SRob Herring <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 290*724ba675SRob Herring clocks = <&cpg CPG_MOD 407>; 291*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 292*724ba675SRob Herring resets = <&cpg 407>; 293*724ba675SRob Herring }; 294*724ba675SRob Herring 295*724ba675SRob Herring ipmmu_sy0: iommu@e6280000 { 296*724ba675SRob Herring compatible = "renesas,ipmmu-r8a7794", 297*724ba675SRob Herring "renesas,ipmmu-vmsa"; 298*724ba675SRob Herring reg = <0 0xe6280000 0 0x1000>; 299*724ba675SRob Herring interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 300*724ba675SRob Herring <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 301*724ba675SRob Herring #iommu-cells = <1>; 302*724ba675SRob Herring status = "disabled"; 303*724ba675SRob Herring }; 304*724ba675SRob Herring 305*724ba675SRob Herring ipmmu_sy1: iommu@e6290000 { 306*724ba675SRob Herring compatible = "renesas,ipmmu-r8a7794", 307*724ba675SRob Herring "renesas,ipmmu-vmsa"; 308*724ba675SRob Herring reg = <0 0xe6290000 0 0x1000>; 309*724ba675SRob Herring interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 310*724ba675SRob Herring #iommu-cells = <1>; 311*724ba675SRob Herring status = "disabled"; 312*724ba675SRob Herring }; 313*724ba675SRob Herring 314*724ba675SRob Herring ipmmu_ds: iommu@e6740000 { 315*724ba675SRob Herring compatible = "renesas,ipmmu-r8a7794", 316*724ba675SRob Herring "renesas,ipmmu-vmsa"; 317*724ba675SRob Herring reg = <0 0xe6740000 0 0x1000>; 318*724ba675SRob Herring interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 319*724ba675SRob Herring <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 320*724ba675SRob Herring #iommu-cells = <1>; 321*724ba675SRob Herring status = "disabled"; 322*724ba675SRob Herring }; 323*724ba675SRob Herring 324*724ba675SRob Herring ipmmu_mp: iommu@ec680000 { 325*724ba675SRob Herring compatible = "renesas,ipmmu-r8a7794", 326*724ba675SRob Herring "renesas,ipmmu-vmsa"; 327*724ba675SRob Herring reg = <0 0xec680000 0 0x1000>; 328*724ba675SRob Herring interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 329*724ba675SRob Herring #iommu-cells = <1>; 330*724ba675SRob Herring status = "disabled"; 331*724ba675SRob Herring }; 332*724ba675SRob Herring 333*724ba675SRob Herring ipmmu_mx: iommu@fe951000 { 334*724ba675SRob Herring compatible = "renesas,ipmmu-r8a7794", 335*724ba675SRob Herring "renesas,ipmmu-vmsa"; 336*724ba675SRob Herring reg = <0 0xfe951000 0 0x1000>; 337*724ba675SRob Herring interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 338*724ba675SRob Herring <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 339*724ba675SRob Herring #iommu-cells = <1>; 340*724ba675SRob Herring status = "disabled"; 341*724ba675SRob Herring }; 342*724ba675SRob Herring 343*724ba675SRob Herring ipmmu_gp: iommu@e62a0000 { 344*724ba675SRob Herring compatible = "renesas,ipmmu-r8a7794", 345*724ba675SRob Herring "renesas,ipmmu-vmsa"; 346*724ba675SRob Herring reg = <0 0xe62a0000 0 0x1000>; 347*724ba675SRob Herring interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 348*724ba675SRob Herring <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 349*724ba675SRob Herring #iommu-cells = <1>; 350*724ba675SRob Herring status = "disabled"; 351*724ba675SRob Herring }; 352*724ba675SRob Herring 353*724ba675SRob Herring icram0: sram@e63a0000 { 354*724ba675SRob Herring compatible = "mmio-sram"; 355*724ba675SRob Herring reg = <0 0xe63a0000 0 0x12000>; 356*724ba675SRob Herring #address-cells = <1>; 357*724ba675SRob Herring #size-cells = <1>; 358*724ba675SRob Herring ranges = <0 0 0xe63a0000 0x12000>; 359*724ba675SRob Herring }; 360*724ba675SRob Herring 361*724ba675SRob Herring icram1: sram@e63c0000 { 362*724ba675SRob Herring compatible = "mmio-sram"; 363*724ba675SRob Herring reg = <0 0xe63c0000 0 0x1000>; 364*724ba675SRob Herring #address-cells = <1>; 365*724ba675SRob Herring #size-cells = <1>; 366*724ba675SRob Herring ranges = <0 0 0xe63c0000 0x1000>; 367*724ba675SRob Herring 368*724ba675SRob Herring smp-sram@0 { 369*724ba675SRob Herring compatible = "renesas,smp-sram"; 370*724ba675SRob Herring reg = <0 0x100>; 371*724ba675SRob Herring }; 372*724ba675SRob Herring }; 373*724ba675SRob Herring 374*724ba675SRob Herring /* The memory map in the User's Manual maps the cores to 375*724ba675SRob Herring * bus numbers 376*724ba675SRob Herring */ 377*724ba675SRob Herring i2c0: i2c@e6508000 { 378*724ba675SRob Herring compatible = "renesas,i2c-r8a7794", 379*724ba675SRob Herring "renesas,rcar-gen2-i2c"; 380*724ba675SRob Herring reg = <0 0xe6508000 0 0x40>; 381*724ba675SRob Herring interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 382*724ba675SRob Herring clocks = <&cpg CPG_MOD 931>; 383*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 384*724ba675SRob Herring resets = <&cpg 931>; 385*724ba675SRob Herring #address-cells = <1>; 386*724ba675SRob Herring #size-cells = <0>; 387*724ba675SRob Herring i2c-scl-internal-delay-ns = <6>; 388*724ba675SRob Herring status = "disabled"; 389*724ba675SRob Herring }; 390*724ba675SRob Herring 391*724ba675SRob Herring i2c1: i2c@e6518000 { 392*724ba675SRob Herring compatible = "renesas,i2c-r8a7794", 393*724ba675SRob Herring "renesas,rcar-gen2-i2c"; 394*724ba675SRob Herring reg = <0 0xe6518000 0 0x40>; 395*724ba675SRob Herring interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 396*724ba675SRob Herring clocks = <&cpg CPG_MOD 930>; 397*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 398*724ba675SRob Herring resets = <&cpg 930>; 399*724ba675SRob Herring #address-cells = <1>; 400*724ba675SRob Herring #size-cells = <0>; 401*724ba675SRob Herring i2c-scl-internal-delay-ns = <6>; 402*724ba675SRob Herring status = "disabled"; 403*724ba675SRob Herring }; 404*724ba675SRob Herring 405*724ba675SRob Herring i2c2: i2c@e6530000 { 406*724ba675SRob Herring compatible = "renesas,i2c-r8a7794", 407*724ba675SRob Herring "renesas,rcar-gen2-i2c"; 408*724ba675SRob Herring reg = <0 0xe6530000 0 0x40>; 409*724ba675SRob Herring interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 410*724ba675SRob Herring clocks = <&cpg CPG_MOD 929>; 411*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 412*724ba675SRob Herring resets = <&cpg 929>; 413*724ba675SRob Herring #address-cells = <1>; 414*724ba675SRob Herring #size-cells = <0>; 415*724ba675SRob Herring i2c-scl-internal-delay-ns = <6>; 416*724ba675SRob Herring status = "disabled"; 417*724ba675SRob Herring }; 418*724ba675SRob Herring 419*724ba675SRob Herring i2c3: i2c@e6540000 { 420*724ba675SRob Herring compatible = "renesas,i2c-r8a7794", 421*724ba675SRob Herring "renesas,rcar-gen2-i2c"; 422*724ba675SRob Herring reg = <0 0xe6540000 0 0x40>; 423*724ba675SRob Herring interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 424*724ba675SRob Herring clocks = <&cpg CPG_MOD 928>; 425*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 426*724ba675SRob Herring resets = <&cpg 928>; 427*724ba675SRob Herring #address-cells = <1>; 428*724ba675SRob Herring #size-cells = <0>; 429*724ba675SRob Herring i2c-scl-internal-delay-ns = <6>; 430*724ba675SRob Herring status = "disabled"; 431*724ba675SRob Herring }; 432*724ba675SRob Herring 433*724ba675SRob Herring i2c4: i2c@e6520000 { 434*724ba675SRob Herring compatible = "renesas,i2c-r8a7794", 435*724ba675SRob Herring "renesas,rcar-gen2-i2c"; 436*724ba675SRob Herring reg = <0 0xe6520000 0 0x40>; 437*724ba675SRob Herring interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 438*724ba675SRob Herring clocks = <&cpg CPG_MOD 927>; 439*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 440*724ba675SRob Herring resets = <&cpg 927>; 441*724ba675SRob Herring #address-cells = <1>; 442*724ba675SRob Herring #size-cells = <0>; 443*724ba675SRob Herring i2c-scl-internal-delay-ns = <6>; 444*724ba675SRob Herring status = "disabled"; 445*724ba675SRob Herring }; 446*724ba675SRob Herring 447*724ba675SRob Herring i2c5: i2c@e6528000 { 448*724ba675SRob Herring compatible = "renesas,i2c-r8a7794", 449*724ba675SRob Herring "renesas,rcar-gen2-i2c"; 450*724ba675SRob Herring reg = <0 0xe6528000 0 0x40>; 451*724ba675SRob Herring interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 452*724ba675SRob Herring clocks = <&cpg CPG_MOD 925>; 453*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 454*724ba675SRob Herring resets = <&cpg 925>; 455*724ba675SRob Herring #address-cells = <1>; 456*724ba675SRob Herring #size-cells = <0>; 457*724ba675SRob Herring i2c-scl-internal-delay-ns = <6>; 458*724ba675SRob Herring status = "disabled"; 459*724ba675SRob Herring }; 460*724ba675SRob Herring 461*724ba675SRob Herring i2c6: i2c@e6500000 { 462*724ba675SRob Herring compatible = "renesas,iic-r8a7794", 463*724ba675SRob Herring "renesas,rcar-gen2-iic", 464*724ba675SRob Herring "renesas,rmobile-iic"; 465*724ba675SRob Herring reg = <0 0xe6500000 0 0x425>; 466*724ba675SRob Herring interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 467*724ba675SRob Herring clocks = <&cpg CPG_MOD 318>; 468*724ba675SRob Herring dmas = <&dmac0 0x61>, <&dmac0 0x62>, 469*724ba675SRob Herring <&dmac1 0x61>, <&dmac1 0x62>; 470*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 471*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 472*724ba675SRob Herring resets = <&cpg 318>; 473*724ba675SRob Herring #address-cells = <1>; 474*724ba675SRob Herring #size-cells = <0>; 475*724ba675SRob Herring status = "disabled"; 476*724ba675SRob Herring }; 477*724ba675SRob Herring 478*724ba675SRob Herring i2c7: i2c@e6510000 { 479*724ba675SRob Herring compatible = "renesas,iic-r8a7794", 480*724ba675SRob Herring "renesas,rcar-gen2-iic", 481*724ba675SRob Herring "renesas,rmobile-iic"; 482*724ba675SRob Herring reg = <0 0xe6510000 0 0x425>; 483*724ba675SRob Herring interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 484*724ba675SRob Herring clocks = <&cpg CPG_MOD 323>; 485*724ba675SRob Herring dmas = <&dmac0 0x65>, <&dmac0 0x66>, 486*724ba675SRob Herring <&dmac1 0x65>, <&dmac1 0x66>; 487*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 488*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 489*724ba675SRob Herring resets = <&cpg 323>; 490*724ba675SRob Herring #address-cells = <1>; 491*724ba675SRob Herring #size-cells = <0>; 492*724ba675SRob Herring status = "disabled"; 493*724ba675SRob Herring }; 494*724ba675SRob Herring 495*724ba675SRob Herring hsusb: usb@e6590000 { 496*724ba675SRob Herring compatible = "renesas,usbhs-r8a7794", 497*724ba675SRob Herring "renesas,rcar-gen2-usbhs"; 498*724ba675SRob Herring reg = <0 0xe6590000 0 0x100>; 499*724ba675SRob Herring interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 500*724ba675SRob Herring clocks = <&cpg CPG_MOD 704>; 501*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 502*724ba675SRob Herring resets = <&cpg 704>; 503*724ba675SRob Herring renesas,buswait = <4>; 504*724ba675SRob Herring phys = <&usb0 1>; 505*724ba675SRob Herring phy-names = "usb"; 506*724ba675SRob Herring status = "disabled"; 507*724ba675SRob Herring }; 508*724ba675SRob Herring 509*724ba675SRob Herring usbphy: usb-phy-controller@e6590100 { 510*724ba675SRob Herring compatible = "renesas,usb-phy-r8a7794", 511*724ba675SRob Herring "renesas,rcar-gen2-usb-phy"; 512*724ba675SRob Herring reg = <0 0xe6590100 0 0x100>; 513*724ba675SRob Herring #address-cells = <1>; 514*724ba675SRob Herring #size-cells = <0>; 515*724ba675SRob Herring clocks = <&cpg CPG_MOD 704>; 516*724ba675SRob Herring clock-names = "usbhs"; 517*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 518*724ba675SRob Herring resets = <&cpg 704>; 519*724ba675SRob Herring status = "disabled"; 520*724ba675SRob Herring 521*724ba675SRob Herring usb0: usb-phy@0 { 522*724ba675SRob Herring reg = <0>; 523*724ba675SRob Herring #phy-cells = <1>; 524*724ba675SRob Herring }; 525*724ba675SRob Herring usb2: usb-phy@2 { 526*724ba675SRob Herring reg = <2>; 527*724ba675SRob Herring #phy-cells = <1>; 528*724ba675SRob Herring }; 529*724ba675SRob Herring }; 530*724ba675SRob Herring 531*724ba675SRob Herring dmac0: dma-controller@e6700000 { 532*724ba675SRob Herring compatible = "renesas,dmac-r8a7794", 533*724ba675SRob Herring "renesas,rcar-dmac"; 534*724ba675SRob Herring reg = <0 0xe6700000 0 0x20000>; 535*724ba675SRob Herring interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 536*724ba675SRob Herring <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 537*724ba675SRob Herring <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 538*724ba675SRob Herring <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 539*724ba675SRob Herring <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 540*724ba675SRob Herring <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 541*724ba675SRob Herring <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 542*724ba675SRob Herring <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 543*724ba675SRob Herring <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 544*724ba675SRob Herring <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 545*724ba675SRob Herring <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 546*724ba675SRob Herring <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 547*724ba675SRob Herring <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 548*724ba675SRob Herring <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 549*724ba675SRob Herring <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 550*724ba675SRob Herring <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 551*724ba675SRob Herring interrupt-names = "error", 552*724ba675SRob Herring "ch0", "ch1", "ch2", "ch3", 553*724ba675SRob Herring "ch4", "ch5", "ch6", "ch7", 554*724ba675SRob Herring "ch8", "ch9", "ch10", "ch11", 555*724ba675SRob Herring "ch12", "ch13", "ch14"; 556*724ba675SRob Herring clocks = <&cpg CPG_MOD 219>; 557*724ba675SRob Herring clock-names = "fck"; 558*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 559*724ba675SRob Herring resets = <&cpg 219>; 560*724ba675SRob Herring #dma-cells = <1>; 561*724ba675SRob Herring dma-channels = <15>; 562*724ba675SRob Herring }; 563*724ba675SRob Herring 564*724ba675SRob Herring dmac1: dma-controller@e6720000 { 565*724ba675SRob Herring compatible = "renesas,dmac-r8a7794", 566*724ba675SRob Herring "renesas,rcar-dmac"; 567*724ba675SRob Herring reg = <0 0xe6720000 0 0x20000>; 568*724ba675SRob Herring interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 569*724ba675SRob Herring <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 570*724ba675SRob Herring <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 571*724ba675SRob Herring <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 572*724ba675SRob Herring <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 573*724ba675SRob Herring <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 574*724ba675SRob Herring <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 575*724ba675SRob Herring <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 576*724ba675SRob Herring <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 577*724ba675SRob Herring <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 578*724ba675SRob Herring <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 579*724ba675SRob Herring <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 580*724ba675SRob Herring <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 581*724ba675SRob Herring <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 582*724ba675SRob Herring <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 583*724ba675SRob Herring <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 584*724ba675SRob Herring interrupt-names = "error", 585*724ba675SRob Herring "ch0", "ch1", "ch2", "ch3", 586*724ba675SRob Herring "ch4", "ch5", "ch6", "ch7", 587*724ba675SRob Herring "ch8", "ch9", "ch10", "ch11", 588*724ba675SRob Herring "ch12", "ch13", "ch14"; 589*724ba675SRob Herring clocks = <&cpg CPG_MOD 218>; 590*724ba675SRob Herring clock-names = "fck"; 591*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 592*724ba675SRob Herring resets = <&cpg 218>; 593*724ba675SRob Herring #dma-cells = <1>; 594*724ba675SRob Herring dma-channels = <15>; 595*724ba675SRob Herring }; 596*724ba675SRob Herring 597*724ba675SRob Herring avb: ethernet@e6800000 { 598*724ba675SRob Herring compatible = "renesas,etheravb-r8a7794", 599*724ba675SRob Herring "renesas,etheravb-rcar-gen2"; 600*724ba675SRob Herring reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 601*724ba675SRob Herring interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 602*724ba675SRob Herring clocks = <&cpg CPG_MOD 812>; 603*724ba675SRob Herring clock-names = "fck"; 604*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 605*724ba675SRob Herring resets = <&cpg 812>; 606*724ba675SRob Herring #address-cells = <1>; 607*724ba675SRob Herring #size-cells = <0>; 608*724ba675SRob Herring status = "disabled"; 609*724ba675SRob Herring }; 610*724ba675SRob Herring 611*724ba675SRob Herring qspi: spi@e6b10000 { 612*724ba675SRob Herring compatible = "renesas,qspi-r8a7794", "renesas,qspi"; 613*724ba675SRob Herring reg = <0 0xe6b10000 0 0x2c>; 614*724ba675SRob Herring interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 615*724ba675SRob Herring clocks = <&cpg CPG_MOD 917>; 616*724ba675SRob Herring dmas = <&dmac0 0x17>, <&dmac0 0x18>, 617*724ba675SRob Herring <&dmac1 0x17>, <&dmac1 0x18>; 618*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 619*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 620*724ba675SRob Herring resets = <&cpg 917>; 621*724ba675SRob Herring num-cs = <1>; 622*724ba675SRob Herring #address-cells = <1>; 623*724ba675SRob Herring #size-cells = <0>; 624*724ba675SRob Herring status = "disabled"; 625*724ba675SRob Herring }; 626*724ba675SRob Herring 627*724ba675SRob Herring scifa0: serial@e6c40000 { 628*724ba675SRob Herring compatible = "renesas,scifa-r8a7794", 629*724ba675SRob Herring "renesas,rcar-gen2-scifa", "renesas,scifa"; 630*724ba675SRob Herring reg = <0 0xe6c40000 0 64>; 631*724ba675SRob Herring interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 632*724ba675SRob Herring clocks = <&cpg CPG_MOD 204>; 633*724ba675SRob Herring clock-names = "fck"; 634*724ba675SRob Herring dmas = <&dmac0 0x21>, <&dmac0 0x22>, 635*724ba675SRob Herring <&dmac1 0x21>, <&dmac1 0x22>; 636*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 637*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 638*724ba675SRob Herring resets = <&cpg 204>; 639*724ba675SRob Herring status = "disabled"; 640*724ba675SRob Herring }; 641*724ba675SRob Herring 642*724ba675SRob Herring scifa1: serial@e6c50000 { 643*724ba675SRob Herring compatible = "renesas,scifa-r8a7794", 644*724ba675SRob Herring "renesas,rcar-gen2-scifa", "renesas,scifa"; 645*724ba675SRob Herring reg = <0 0xe6c50000 0 64>; 646*724ba675SRob Herring interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 647*724ba675SRob Herring clocks = <&cpg CPG_MOD 203>; 648*724ba675SRob Herring clock-names = "fck"; 649*724ba675SRob Herring dmas = <&dmac0 0x25>, <&dmac0 0x26>, 650*724ba675SRob Herring <&dmac1 0x25>, <&dmac1 0x26>; 651*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 652*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 653*724ba675SRob Herring resets = <&cpg 203>; 654*724ba675SRob Herring status = "disabled"; 655*724ba675SRob Herring }; 656*724ba675SRob Herring 657*724ba675SRob Herring scifa2: serial@e6c60000 { 658*724ba675SRob Herring compatible = "renesas,scifa-r8a7794", 659*724ba675SRob Herring "renesas,rcar-gen2-scifa", "renesas,scifa"; 660*724ba675SRob Herring reg = <0 0xe6c60000 0 64>; 661*724ba675SRob Herring interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 662*724ba675SRob Herring clocks = <&cpg CPG_MOD 202>; 663*724ba675SRob Herring clock-names = "fck"; 664*724ba675SRob Herring dmas = <&dmac0 0x27>, <&dmac0 0x28>, 665*724ba675SRob Herring <&dmac1 0x27>, <&dmac1 0x28>; 666*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 667*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 668*724ba675SRob Herring resets = <&cpg 202>; 669*724ba675SRob Herring status = "disabled"; 670*724ba675SRob Herring }; 671*724ba675SRob Herring 672*724ba675SRob Herring scifa3: serial@e6c70000 { 673*724ba675SRob Herring compatible = "renesas,scifa-r8a7794", 674*724ba675SRob Herring "renesas,rcar-gen2-scifa", "renesas,scifa"; 675*724ba675SRob Herring reg = <0 0xe6c70000 0 64>; 676*724ba675SRob Herring interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 677*724ba675SRob Herring clocks = <&cpg CPG_MOD 1106>; 678*724ba675SRob Herring clock-names = "fck"; 679*724ba675SRob Herring dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 680*724ba675SRob Herring <&dmac1 0x1b>, <&dmac1 0x1c>; 681*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 682*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 683*724ba675SRob Herring resets = <&cpg 1106>; 684*724ba675SRob Herring status = "disabled"; 685*724ba675SRob Herring }; 686*724ba675SRob Herring 687*724ba675SRob Herring scifa4: serial@e6c78000 { 688*724ba675SRob Herring compatible = "renesas,scifa-r8a7794", 689*724ba675SRob Herring "renesas,rcar-gen2-scifa", "renesas,scifa"; 690*724ba675SRob Herring reg = <0 0xe6c78000 0 64>; 691*724ba675SRob Herring interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 692*724ba675SRob Herring clocks = <&cpg CPG_MOD 1107>; 693*724ba675SRob Herring clock-names = "fck"; 694*724ba675SRob Herring dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 695*724ba675SRob Herring <&dmac1 0x1f>, <&dmac1 0x20>; 696*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 697*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 698*724ba675SRob Herring resets = <&cpg 1107>; 699*724ba675SRob Herring status = "disabled"; 700*724ba675SRob Herring }; 701*724ba675SRob Herring 702*724ba675SRob Herring scifa5: serial@e6c80000 { 703*724ba675SRob Herring compatible = "renesas,scifa-r8a7794", 704*724ba675SRob Herring "renesas,rcar-gen2-scifa", "renesas,scifa"; 705*724ba675SRob Herring reg = <0 0xe6c80000 0 64>; 706*724ba675SRob Herring interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 707*724ba675SRob Herring clocks = <&cpg CPG_MOD 1108>; 708*724ba675SRob Herring clock-names = "fck"; 709*724ba675SRob Herring dmas = <&dmac0 0x23>, <&dmac0 0x24>, 710*724ba675SRob Herring <&dmac1 0x23>, <&dmac1 0x24>; 711*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 712*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 713*724ba675SRob Herring resets = <&cpg 1108>; 714*724ba675SRob Herring status = "disabled"; 715*724ba675SRob Herring }; 716*724ba675SRob Herring 717*724ba675SRob Herring scifb0: serial@e6c20000 { 718*724ba675SRob Herring compatible = "renesas,scifb-r8a7794", 719*724ba675SRob Herring "renesas,rcar-gen2-scifb", "renesas,scifb"; 720*724ba675SRob Herring reg = <0 0xe6c20000 0 0x100>; 721*724ba675SRob Herring interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 722*724ba675SRob Herring clocks = <&cpg CPG_MOD 206>; 723*724ba675SRob Herring clock-names = "fck"; 724*724ba675SRob Herring dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 725*724ba675SRob Herring <&dmac1 0x3d>, <&dmac1 0x3e>; 726*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 727*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 728*724ba675SRob Herring resets = <&cpg 206>; 729*724ba675SRob Herring status = "disabled"; 730*724ba675SRob Herring }; 731*724ba675SRob Herring 732*724ba675SRob Herring scifb1: serial@e6c30000 { 733*724ba675SRob Herring compatible = "renesas,scifb-r8a7794", 734*724ba675SRob Herring "renesas,rcar-gen2-scifb", "renesas,scifb"; 735*724ba675SRob Herring reg = <0 0xe6c30000 0 0x100>; 736*724ba675SRob Herring interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 737*724ba675SRob Herring clocks = <&cpg CPG_MOD 207>; 738*724ba675SRob Herring clock-names = "fck"; 739*724ba675SRob Herring dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 740*724ba675SRob Herring <&dmac1 0x19>, <&dmac1 0x1a>; 741*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 742*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 743*724ba675SRob Herring resets = <&cpg 207>; 744*724ba675SRob Herring status = "disabled"; 745*724ba675SRob Herring }; 746*724ba675SRob Herring 747*724ba675SRob Herring scifb2: serial@e6ce0000 { 748*724ba675SRob Herring compatible = "renesas,scifb-r8a7794", 749*724ba675SRob Herring "renesas,rcar-gen2-scifb", "renesas,scifb"; 750*724ba675SRob Herring reg = <0 0xe6ce0000 0 0x100>; 751*724ba675SRob Herring interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 752*724ba675SRob Herring clocks = <&cpg CPG_MOD 216>; 753*724ba675SRob Herring clock-names = "fck"; 754*724ba675SRob Herring dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 755*724ba675SRob Herring <&dmac1 0x1d>, <&dmac1 0x1e>; 756*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 757*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 758*724ba675SRob Herring resets = <&cpg 216>; 759*724ba675SRob Herring status = "disabled"; 760*724ba675SRob Herring }; 761*724ba675SRob Herring 762*724ba675SRob Herring scif0: serial@e6e60000 { 763*724ba675SRob Herring compatible = "renesas,scif-r8a7794", 764*724ba675SRob Herring "renesas,rcar-gen2-scif", 765*724ba675SRob Herring "renesas,scif"; 766*724ba675SRob Herring reg = <0 0xe6e60000 0 64>; 767*724ba675SRob Herring interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 768*724ba675SRob Herring clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 769*724ba675SRob Herring <&scif_clk>; 770*724ba675SRob Herring clock-names = "fck", "brg_int", "scif_clk"; 771*724ba675SRob Herring dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 772*724ba675SRob Herring <&dmac1 0x29>, <&dmac1 0x2a>; 773*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 774*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 775*724ba675SRob Herring resets = <&cpg 721>; 776*724ba675SRob Herring status = "disabled"; 777*724ba675SRob Herring }; 778*724ba675SRob Herring 779*724ba675SRob Herring scif1: serial@e6e68000 { 780*724ba675SRob Herring compatible = "renesas,scif-r8a7794", 781*724ba675SRob Herring "renesas,rcar-gen2-scif", 782*724ba675SRob Herring "renesas,scif"; 783*724ba675SRob Herring reg = <0 0xe6e68000 0 64>; 784*724ba675SRob Herring interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 785*724ba675SRob Herring clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 786*724ba675SRob Herring <&scif_clk>; 787*724ba675SRob Herring clock-names = "fck", "brg_int", "scif_clk"; 788*724ba675SRob Herring dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 789*724ba675SRob Herring <&dmac1 0x2d>, <&dmac1 0x2e>; 790*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 791*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 792*724ba675SRob Herring resets = <&cpg 720>; 793*724ba675SRob Herring status = "disabled"; 794*724ba675SRob Herring }; 795*724ba675SRob Herring 796*724ba675SRob Herring scif2: serial@e6e58000 { 797*724ba675SRob Herring compatible = "renesas,scif-r8a7794", 798*724ba675SRob Herring "renesas,rcar-gen2-scif", "renesas,scif"; 799*724ba675SRob Herring reg = <0 0xe6e58000 0 64>; 800*724ba675SRob Herring interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 801*724ba675SRob Herring clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 802*724ba675SRob Herring <&scif_clk>; 803*724ba675SRob Herring clock-names = "fck", "brg_int", "scif_clk"; 804*724ba675SRob Herring dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 805*724ba675SRob Herring <&dmac1 0x2b>, <&dmac1 0x2c>; 806*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 807*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 808*724ba675SRob Herring resets = <&cpg 719>; 809*724ba675SRob Herring status = "disabled"; 810*724ba675SRob Herring }; 811*724ba675SRob Herring 812*724ba675SRob Herring scif3: serial@e6ea8000 { 813*724ba675SRob Herring compatible = "renesas,scif-r8a7794", 814*724ba675SRob Herring "renesas,rcar-gen2-scif", "renesas,scif"; 815*724ba675SRob Herring reg = <0 0xe6ea8000 0 64>; 816*724ba675SRob Herring interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 817*724ba675SRob Herring clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 818*724ba675SRob Herring <&scif_clk>; 819*724ba675SRob Herring clock-names = "fck", "brg_int", "scif_clk"; 820*724ba675SRob Herring dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 821*724ba675SRob Herring <&dmac1 0x2f>, <&dmac1 0x30>; 822*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 823*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 824*724ba675SRob Herring resets = <&cpg 718>; 825*724ba675SRob Herring status = "disabled"; 826*724ba675SRob Herring }; 827*724ba675SRob Herring 828*724ba675SRob Herring scif4: serial@e6ee0000 { 829*724ba675SRob Herring compatible = "renesas,scif-r8a7794", 830*724ba675SRob Herring "renesas,rcar-gen2-scif", "renesas,scif"; 831*724ba675SRob Herring reg = <0 0xe6ee0000 0 64>; 832*724ba675SRob Herring interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 833*724ba675SRob Herring clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 834*724ba675SRob Herring <&scif_clk>; 835*724ba675SRob Herring clock-names = "fck", "brg_int", "scif_clk"; 836*724ba675SRob Herring dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 837*724ba675SRob Herring <&dmac1 0xfb>, <&dmac1 0xfc>; 838*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 839*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 840*724ba675SRob Herring resets = <&cpg 715>; 841*724ba675SRob Herring status = "disabled"; 842*724ba675SRob Herring }; 843*724ba675SRob Herring 844*724ba675SRob Herring scif5: serial@e6ee8000 { 845*724ba675SRob Herring compatible = "renesas,scif-r8a7794", 846*724ba675SRob Herring "renesas,rcar-gen2-scif", "renesas,scif"; 847*724ba675SRob Herring reg = <0 0xe6ee8000 0 64>; 848*724ba675SRob Herring interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 849*724ba675SRob Herring clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 850*724ba675SRob Herring <&scif_clk>; 851*724ba675SRob Herring clock-names = "fck", "brg_int", "scif_clk"; 852*724ba675SRob Herring dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 853*724ba675SRob Herring <&dmac1 0xfd>, <&dmac1 0xfe>; 854*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 855*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 856*724ba675SRob Herring resets = <&cpg 714>; 857*724ba675SRob Herring status = "disabled"; 858*724ba675SRob Herring }; 859*724ba675SRob Herring 860*724ba675SRob Herring hscif0: serial@e62c0000 { 861*724ba675SRob Herring compatible = "renesas,hscif-r8a7794", 862*724ba675SRob Herring "renesas,rcar-gen2-hscif", "renesas,hscif"; 863*724ba675SRob Herring reg = <0 0xe62c0000 0 96>; 864*724ba675SRob Herring interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 865*724ba675SRob Herring clocks = <&cpg CPG_MOD 717>, 866*724ba675SRob Herring <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; 867*724ba675SRob Herring clock-names = "fck", "brg_int", "scif_clk"; 868*724ba675SRob Herring dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 869*724ba675SRob Herring <&dmac1 0x39>, <&dmac1 0x3a>; 870*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 871*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 872*724ba675SRob Herring resets = <&cpg 717>; 873*724ba675SRob Herring status = "disabled"; 874*724ba675SRob Herring }; 875*724ba675SRob Herring 876*724ba675SRob Herring hscif1: serial@e62c8000 { 877*724ba675SRob Herring compatible = "renesas,hscif-r8a7794", 878*724ba675SRob Herring "renesas,rcar-gen2-hscif", "renesas,hscif"; 879*724ba675SRob Herring reg = <0 0xe62c8000 0 96>; 880*724ba675SRob Herring interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 881*724ba675SRob Herring clocks = <&cpg CPG_MOD 716>, 882*724ba675SRob Herring <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; 883*724ba675SRob Herring clock-names = "fck", "brg_int", "scif_clk"; 884*724ba675SRob Herring dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 885*724ba675SRob Herring <&dmac1 0x4d>, <&dmac1 0x4e>; 886*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 887*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 888*724ba675SRob Herring resets = <&cpg 716>; 889*724ba675SRob Herring status = "disabled"; 890*724ba675SRob Herring }; 891*724ba675SRob Herring 892*724ba675SRob Herring hscif2: serial@e62d0000 { 893*724ba675SRob Herring compatible = "renesas,hscif-r8a7794", 894*724ba675SRob Herring "renesas,rcar-gen2-hscif", "renesas,hscif"; 895*724ba675SRob Herring reg = <0 0xe62d0000 0 96>; 896*724ba675SRob Herring interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 897*724ba675SRob Herring clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 898*724ba675SRob Herring <&scif_clk>; 899*724ba675SRob Herring clock-names = "fck", "brg_int", "scif_clk"; 900*724ba675SRob Herring dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 901*724ba675SRob Herring <&dmac1 0x3b>, <&dmac1 0x3c>; 902*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 903*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 904*724ba675SRob Herring resets = <&cpg 713>; 905*724ba675SRob Herring status = "disabled"; 906*724ba675SRob Herring }; 907*724ba675SRob Herring 908*724ba675SRob Herring can0: can@e6e80000 { 909*724ba675SRob Herring compatible = "renesas,can-r8a7794", 910*724ba675SRob Herring "renesas,rcar-gen2-can"; 911*724ba675SRob Herring reg = <0 0xe6e80000 0 0x1000>; 912*724ba675SRob Herring interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 913*724ba675SRob Herring clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, 914*724ba675SRob Herring <&can_clk>; 915*724ba675SRob Herring clock-names = "clkp1", "clkp2", "can_clk"; 916*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 917*724ba675SRob Herring resets = <&cpg 916>; 918*724ba675SRob Herring status = "disabled"; 919*724ba675SRob Herring }; 920*724ba675SRob Herring 921*724ba675SRob Herring can1: can@e6e88000 { 922*724ba675SRob Herring compatible = "renesas,can-r8a7794", 923*724ba675SRob Herring "renesas,rcar-gen2-can"; 924*724ba675SRob Herring reg = <0 0xe6e88000 0 0x1000>; 925*724ba675SRob Herring interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 926*724ba675SRob Herring clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, 927*724ba675SRob Herring <&can_clk>; 928*724ba675SRob Herring clock-names = "clkp1", "clkp2", "can_clk"; 929*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 930*724ba675SRob Herring resets = <&cpg 915>; 931*724ba675SRob Herring status = "disabled"; 932*724ba675SRob Herring }; 933*724ba675SRob Herring 934*724ba675SRob Herring vin0: video@e6ef0000 { 935*724ba675SRob Herring compatible = "renesas,vin-r8a7794", 936*724ba675SRob Herring "renesas,rcar-gen2-vin"; 937*724ba675SRob Herring reg = <0 0xe6ef0000 0 0x1000>; 938*724ba675SRob Herring interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 939*724ba675SRob Herring clocks = <&cpg CPG_MOD 811>; 940*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 941*724ba675SRob Herring resets = <&cpg 811>; 942*724ba675SRob Herring status = "disabled"; 943*724ba675SRob Herring }; 944*724ba675SRob Herring 945*724ba675SRob Herring vin1: video@e6ef1000 { 946*724ba675SRob Herring compatible = "renesas,vin-r8a7794", 947*724ba675SRob Herring "renesas,rcar-gen2-vin"; 948*724ba675SRob Herring reg = <0 0xe6ef1000 0 0x1000>; 949*724ba675SRob Herring interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 950*724ba675SRob Herring clocks = <&cpg CPG_MOD 810>; 951*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 952*724ba675SRob Herring resets = <&cpg 810>; 953*724ba675SRob Herring status = "disabled"; 954*724ba675SRob Herring }; 955*724ba675SRob Herring 956*724ba675SRob Herring rcar_sound: sound@ec500000 { 957*724ba675SRob Herring /* 958*724ba675SRob Herring * #sound-dai-cells is required if simple-card 959*724ba675SRob Herring * 960*724ba675SRob Herring * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 961*724ba675SRob Herring * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 962*724ba675SRob Herring */ 963*724ba675SRob Herring compatible = "renesas,rcar_sound-r8a7794", 964*724ba675SRob Herring "renesas,rcar_sound-gen2"; 965*724ba675SRob Herring reg = <0 0xec500000 0 0x1000>, /* SCU */ 966*724ba675SRob Herring <0 0xec5a0000 0 0x100>, /* ADG */ 967*724ba675SRob Herring <0 0xec540000 0 0x1000>, /* SSIU */ 968*724ba675SRob Herring <0 0xec541000 0 0x280>, /* SSI */ 969*724ba675SRob Herring <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */ 970*724ba675SRob Herring reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 971*724ba675SRob Herring 972*724ba675SRob Herring clocks = <&cpg CPG_MOD 1005>, 973*724ba675SRob Herring <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 974*724ba675SRob Herring <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 975*724ba675SRob Herring <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 976*724ba675SRob Herring <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 977*724ba675SRob Herring <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 978*724ba675SRob Herring <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, 979*724ba675SRob Herring <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, 980*724ba675SRob Herring <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>, 981*724ba675SRob Herring <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 982*724ba675SRob Herring <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 983*724ba675SRob Herring <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 984*724ba675SRob Herring <&audio_clka>, <&audio_clkb>, <&audio_clkc>, 985*724ba675SRob Herring <&cpg CPG_CORE R8A7794_CLK_M2>; 986*724ba675SRob Herring clock-names = "ssi-all", 987*724ba675SRob Herring "ssi.9", "ssi.8", "ssi.7", "ssi.6", 988*724ba675SRob Herring "ssi.5", "ssi.4", "ssi.3", "ssi.2", 989*724ba675SRob Herring "ssi.1", "ssi.0", 990*724ba675SRob Herring "src.6", "src.5", "src.4", "src.3", 991*724ba675SRob Herring "src.2", "src.1", 992*724ba675SRob Herring "ctu.0", "ctu.1", 993*724ba675SRob Herring "mix.0", "mix.1", 994*724ba675SRob Herring "dvc.0", "dvc.1", 995*724ba675SRob Herring "clk_a", "clk_b", "clk_c", "clk_i"; 996*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 997*724ba675SRob Herring resets = <&cpg 1005>, 998*724ba675SRob Herring <&cpg 1006>, <&cpg 1007>, 999*724ba675SRob Herring <&cpg 1008>, <&cpg 1009>, 1000*724ba675SRob Herring <&cpg 1010>, <&cpg 1011>, 1001*724ba675SRob Herring <&cpg 1012>, <&cpg 1013>, 1002*724ba675SRob Herring <&cpg 1014>, <&cpg 1015>; 1003*724ba675SRob Herring reset-names = "ssi-all", 1004*724ba675SRob Herring "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1005*724ba675SRob Herring "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1006*724ba675SRob Herring "ssi.1", "ssi.0"; 1007*724ba675SRob Herring 1008*724ba675SRob Herring status = "disabled"; 1009*724ba675SRob Herring 1010*724ba675SRob Herring rcar_sound,dvc { 1011*724ba675SRob Herring dvc0: dvc-0 { 1012*724ba675SRob Herring dmas = <&audma0 0xbc>; 1013*724ba675SRob Herring dma-names = "tx"; 1014*724ba675SRob Herring }; 1015*724ba675SRob Herring dvc1: dvc-1 { 1016*724ba675SRob Herring dmas = <&audma0 0xbe>; 1017*724ba675SRob Herring dma-names = "tx"; 1018*724ba675SRob Herring }; 1019*724ba675SRob Herring }; 1020*724ba675SRob Herring 1021*724ba675SRob Herring rcar_sound,mix { 1022*724ba675SRob Herring mix0: mix-0 { }; 1023*724ba675SRob Herring mix1: mix-1 { }; 1024*724ba675SRob Herring }; 1025*724ba675SRob Herring 1026*724ba675SRob Herring rcar_sound,ctu { 1027*724ba675SRob Herring ctu00: ctu-0 { }; 1028*724ba675SRob Herring ctu01: ctu-1 { }; 1029*724ba675SRob Herring ctu02: ctu-2 { }; 1030*724ba675SRob Herring ctu03: ctu-3 { }; 1031*724ba675SRob Herring ctu10: ctu-4 { }; 1032*724ba675SRob Herring ctu11: ctu-5 { }; 1033*724ba675SRob Herring ctu12: ctu-6 { }; 1034*724ba675SRob Herring ctu13: ctu-7 { }; 1035*724ba675SRob Herring }; 1036*724ba675SRob Herring 1037*724ba675SRob Herring rcar_sound,src { 1038*724ba675SRob Herring src-0 { 1039*724ba675SRob Herring status = "disabled"; 1040*724ba675SRob Herring }; 1041*724ba675SRob Herring src1: src-1 { 1042*724ba675SRob Herring interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1043*724ba675SRob Herring dmas = <&audma0 0x87>, <&audma0 0x9c>; 1044*724ba675SRob Herring dma-names = "rx", "tx"; 1045*724ba675SRob Herring }; 1046*724ba675SRob Herring src2: src-2 { 1047*724ba675SRob Herring interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1048*724ba675SRob Herring dmas = <&audma0 0x89>, <&audma0 0x9e>; 1049*724ba675SRob Herring dma-names = "rx", "tx"; 1050*724ba675SRob Herring }; 1051*724ba675SRob Herring src3: src-3 { 1052*724ba675SRob Herring interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1053*724ba675SRob Herring dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1054*724ba675SRob Herring dma-names = "rx", "tx"; 1055*724ba675SRob Herring }; 1056*724ba675SRob Herring src4: src-4 { 1057*724ba675SRob Herring interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1058*724ba675SRob Herring dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1059*724ba675SRob Herring dma-names = "rx", "tx"; 1060*724ba675SRob Herring }; 1061*724ba675SRob Herring src5: src-5 { 1062*724ba675SRob Herring interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1063*724ba675SRob Herring dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1064*724ba675SRob Herring dma-names = "rx", "tx"; 1065*724ba675SRob Herring }; 1066*724ba675SRob Herring src6: src-6 { 1067*724ba675SRob Herring interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1068*724ba675SRob Herring dmas = <&audma0 0x91>, <&audma0 0xb4>; 1069*724ba675SRob Herring dma-names = "rx", "tx"; 1070*724ba675SRob Herring }; 1071*724ba675SRob Herring }; 1072*724ba675SRob Herring 1073*724ba675SRob Herring rcar_sound,ssi { 1074*724ba675SRob Herring ssi0: ssi-0 { 1075*724ba675SRob Herring interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1076*724ba675SRob Herring dmas = <&audma0 0x01>, <&audma0 0x02>, 1077*724ba675SRob Herring <&audma0 0x15>, <&audma0 0x16>; 1078*724ba675SRob Herring dma-names = "rx", "tx", "rxu", "txu"; 1079*724ba675SRob Herring }; 1080*724ba675SRob Herring ssi1: ssi-1 { 1081*724ba675SRob Herring interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1082*724ba675SRob Herring dmas = <&audma0 0x03>, <&audma0 0x04>, 1083*724ba675SRob Herring <&audma0 0x49>, <&audma0 0x4a>; 1084*724ba675SRob Herring dma-names = "rx", "tx", "rxu", "txu"; 1085*724ba675SRob Herring }; 1086*724ba675SRob Herring ssi2: ssi-2 { 1087*724ba675SRob Herring interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1088*724ba675SRob Herring dmas = <&audma0 0x05>, <&audma0 0x06>, 1089*724ba675SRob Herring <&audma0 0x63>, <&audma0 0x64>; 1090*724ba675SRob Herring dma-names = "rx", "tx", "rxu", "txu"; 1091*724ba675SRob Herring }; 1092*724ba675SRob Herring ssi3: ssi-3 { 1093*724ba675SRob Herring interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1094*724ba675SRob Herring dmas = <&audma0 0x07>, <&audma0 0x08>, 1095*724ba675SRob Herring <&audma0 0x6f>, <&audma0 0x70>; 1096*724ba675SRob Herring dma-names = "rx", "tx", "rxu", "txu"; 1097*724ba675SRob Herring }; 1098*724ba675SRob Herring ssi4: ssi-4 { 1099*724ba675SRob Herring interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1100*724ba675SRob Herring dmas = <&audma0 0x09>, <&audma0 0x0a>, 1101*724ba675SRob Herring <&audma0 0x71>, <&audma0 0x72>; 1102*724ba675SRob Herring dma-names = "rx", "tx", "rxu", "txu"; 1103*724ba675SRob Herring }; 1104*724ba675SRob Herring ssi5: ssi-5 { 1105*724ba675SRob Herring interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1106*724ba675SRob Herring dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1107*724ba675SRob Herring <&audma0 0x73>, <&audma0 0x74>; 1108*724ba675SRob Herring dma-names = "rx", "tx", "rxu", "txu"; 1109*724ba675SRob Herring }; 1110*724ba675SRob Herring ssi6: ssi-6 { 1111*724ba675SRob Herring interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1112*724ba675SRob Herring dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1113*724ba675SRob Herring <&audma0 0x75>, <&audma0 0x76>; 1114*724ba675SRob Herring dma-names = "rx", "tx", "rxu", "txu"; 1115*724ba675SRob Herring }; 1116*724ba675SRob Herring ssi7: ssi-7 { 1117*724ba675SRob Herring interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1118*724ba675SRob Herring dmas = <&audma0 0x0f>, <&audma0 0x10>, 1119*724ba675SRob Herring <&audma0 0x79>, <&audma0 0x7a>; 1120*724ba675SRob Herring dma-names = "rx", "tx", "rxu", "txu"; 1121*724ba675SRob Herring }; 1122*724ba675SRob Herring ssi8: ssi-8 { 1123*724ba675SRob Herring interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1124*724ba675SRob Herring dmas = <&audma0 0x11>, <&audma0 0x12>, 1125*724ba675SRob Herring <&audma0 0x7b>, <&audma0 0x7c>; 1126*724ba675SRob Herring dma-names = "rx", "tx", "rxu", "txu"; 1127*724ba675SRob Herring }; 1128*724ba675SRob Herring ssi9: ssi-9 { 1129*724ba675SRob Herring interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1130*724ba675SRob Herring dmas = <&audma0 0x13>, <&audma0 0x14>, 1131*724ba675SRob Herring <&audma0 0x7d>, <&audma0 0x7e>; 1132*724ba675SRob Herring dma-names = "rx", "tx", "rxu", "txu"; 1133*724ba675SRob Herring }; 1134*724ba675SRob Herring }; 1135*724ba675SRob Herring }; 1136*724ba675SRob Herring 1137*724ba675SRob Herring audma0: dma-controller@ec700000 { 1138*724ba675SRob Herring compatible = "renesas,dmac-r8a7794", 1139*724ba675SRob Herring "renesas,rcar-dmac"; 1140*724ba675SRob Herring reg = <0 0xec700000 0 0x10000>; 1141*724ba675SRob Herring interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1142*724ba675SRob Herring <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1143*724ba675SRob Herring <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1144*724ba675SRob Herring <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1145*724ba675SRob Herring <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1146*724ba675SRob Herring <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1147*724ba675SRob Herring <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1148*724ba675SRob Herring <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1149*724ba675SRob Herring <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1150*724ba675SRob Herring <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1151*724ba675SRob Herring <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1152*724ba675SRob Herring <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1153*724ba675SRob Herring <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1154*724ba675SRob Herring <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1155*724ba675SRob Herring interrupt-names = "error", 1156*724ba675SRob Herring "ch0", "ch1", "ch2", "ch3", "ch4", 1157*724ba675SRob Herring "ch5", "ch6", "ch7", "ch8", "ch9", 1158*724ba675SRob Herring "ch10", "ch11", 1159*724ba675SRob Herring "ch12"; 1160*724ba675SRob Herring clocks = <&cpg CPG_MOD 502>; 1161*724ba675SRob Herring clock-names = "fck"; 1162*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1163*724ba675SRob Herring resets = <&cpg 502>; 1164*724ba675SRob Herring #dma-cells = <1>; 1165*724ba675SRob Herring dma-channels = <13>; 1166*724ba675SRob Herring }; 1167*724ba675SRob Herring 1168*724ba675SRob Herring pci0: pci@ee090000 { 1169*724ba675SRob Herring compatible = "renesas,pci-r8a7794", 1170*724ba675SRob Herring "renesas,pci-rcar-gen2"; 1171*724ba675SRob Herring device_type = "pci"; 1172*724ba675SRob Herring reg = <0 0xee090000 0 0xc00>, 1173*724ba675SRob Herring <0 0xee080000 0 0x1100>; 1174*724ba675SRob Herring interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1175*724ba675SRob Herring clocks = <&cpg CPG_MOD 703>; 1176*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1177*724ba675SRob Herring resets = <&cpg 703>; 1178*724ba675SRob Herring status = "disabled"; 1179*724ba675SRob Herring 1180*724ba675SRob Herring bus-range = <0 0>; 1181*724ba675SRob Herring #address-cells = <3>; 1182*724ba675SRob Herring #size-cells = <2>; 1183*724ba675SRob Herring #interrupt-cells = <1>; 1184*724ba675SRob Herring ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1185*724ba675SRob Herring interrupt-map-mask = <0xf800 0 0 0x7>; 1186*724ba675SRob Herring interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1187*724ba675SRob Herring <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1188*724ba675SRob Herring <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1189*724ba675SRob Herring 1190*724ba675SRob Herring usb@1,0 { 1191*724ba675SRob Herring reg = <0x800 0 0 0 0>; 1192*724ba675SRob Herring phys = <&usb0 0>; 1193*724ba675SRob Herring phy-names = "usb"; 1194*724ba675SRob Herring }; 1195*724ba675SRob Herring 1196*724ba675SRob Herring usb@2,0 { 1197*724ba675SRob Herring reg = <0x1000 0 0 0 0>; 1198*724ba675SRob Herring phys = <&usb0 0>; 1199*724ba675SRob Herring phy-names = "usb"; 1200*724ba675SRob Herring }; 1201*724ba675SRob Herring }; 1202*724ba675SRob Herring 1203*724ba675SRob Herring pci1: pci@ee0d0000 { 1204*724ba675SRob Herring compatible = "renesas,pci-r8a7794", 1205*724ba675SRob Herring "renesas,pci-rcar-gen2"; 1206*724ba675SRob Herring device_type = "pci"; 1207*724ba675SRob Herring reg = <0 0xee0d0000 0 0xc00>, 1208*724ba675SRob Herring <0 0xee0c0000 0 0x1100>; 1209*724ba675SRob Herring interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1210*724ba675SRob Herring clocks = <&cpg CPG_MOD 703>; 1211*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1212*724ba675SRob Herring resets = <&cpg 703>; 1213*724ba675SRob Herring status = "disabled"; 1214*724ba675SRob Herring 1215*724ba675SRob Herring bus-range = <1 1>; 1216*724ba675SRob Herring #address-cells = <3>; 1217*724ba675SRob Herring #size-cells = <2>; 1218*724ba675SRob Herring #interrupt-cells = <1>; 1219*724ba675SRob Herring ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1220*724ba675SRob Herring interrupt-map-mask = <0xf800 0 0 0x7>; 1221*724ba675SRob Herring interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1222*724ba675SRob Herring <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1223*724ba675SRob Herring <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1224*724ba675SRob Herring 1225*724ba675SRob Herring usb@1,0 { 1226*724ba675SRob Herring reg = <0x10800 0 0 0 0>; 1227*724ba675SRob Herring phys = <&usb2 0>; 1228*724ba675SRob Herring phy-names = "usb"; 1229*724ba675SRob Herring }; 1230*724ba675SRob Herring 1231*724ba675SRob Herring usb@2,0 { 1232*724ba675SRob Herring reg = <0x11000 0 0 0 0>; 1233*724ba675SRob Herring phys = <&usb2 0>; 1234*724ba675SRob Herring phy-names = "usb"; 1235*724ba675SRob Herring }; 1236*724ba675SRob Herring }; 1237*724ba675SRob Herring 1238*724ba675SRob Herring sdhi0: mmc@ee100000 { 1239*724ba675SRob Herring compatible = "renesas,sdhi-r8a7794", 1240*724ba675SRob Herring "renesas,rcar-gen2-sdhi"; 1241*724ba675SRob Herring reg = <0 0xee100000 0 0x328>; 1242*724ba675SRob Herring interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1243*724ba675SRob Herring clocks = <&cpg CPG_MOD 314>; 1244*724ba675SRob Herring dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1245*724ba675SRob Herring <&dmac1 0xcd>, <&dmac1 0xce>; 1246*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 1247*724ba675SRob Herring max-frequency = <195000000>; 1248*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1249*724ba675SRob Herring resets = <&cpg 314>; 1250*724ba675SRob Herring status = "disabled"; 1251*724ba675SRob Herring }; 1252*724ba675SRob Herring 1253*724ba675SRob Herring sdhi1: mmc@ee140000 { 1254*724ba675SRob Herring compatible = "renesas,sdhi-r8a7794", 1255*724ba675SRob Herring "renesas,rcar-gen2-sdhi"; 1256*724ba675SRob Herring reg = <0 0xee140000 0 0x100>; 1257*724ba675SRob Herring interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1258*724ba675SRob Herring clocks = <&cpg CPG_MOD 312>; 1259*724ba675SRob Herring dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1260*724ba675SRob Herring <&dmac1 0xc1>, <&dmac1 0xc2>; 1261*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 1262*724ba675SRob Herring max-frequency = <97500000>; 1263*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1264*724ba675SRob Herring resets = <&cpg 312>; 1265*724ba675SRob Herring status = "disabled"; 1266*724ba675SRob Herring }; 1267*724ba675SRob Herring 1268*724ba675SRob Herring sdhi2: mmc@ee160000 { 1269*724ba675SRob Herring compatible = "renesas,sdhi-r8a7794", 1270*724ba675SRob Herring "renesas,rcar-gen2-sdhi"; 1271*724ba675SRob Herring reg = <0 0xee160000 0 0x100>; 1272*724ba675SRob Herring interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1273*724ba675SRob Herring clocks = <&cpg CPG_MOD 311>; 1274*724ba675SRob Herring dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1275*724ba675SRob Herring <&dmac1 0xd3>, <&dmac1 0xd4>; 1276*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 1277*724ba675SRob Herring max-frequency = <97500000>; 1278*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1279*724ba675SRob Herring resets = <&cpg 311>; 1280*724ba675SRob Herring status = "disabled"; 1281*724ba675SRob Herring }; 1282*724ba675SRob Herring 1283*724ba675SRob Herring mmcif0: mmc@ee200000 { 1284*724ba675SRob Herring compatible = "renesas,mmcif-r8a7794", 1285*724ba675SRob Herring "renesas,sh-mmcif"; 1286*724ba675SRob Herring reg = <0 0xee200000 0 0x80>; 1287*724ba675SRob Herring interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1288*724ba675SRob Herring clocks = <&cpg CPG_MOD 315>; 1289*724ba675SRob Herring dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1290*724ba675SRob Herring <&dmac1 0xd1>, <&dmac1 0xd2>; 1291*724ba675SRob Herring dma-names = "tx", "rx", "tx", "rx"; 1292*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1293*724ba675SRob Herring resets = <&cpg 315>; 1294*724ba675SRob Herring reg-io-width = <4>; 1295*724ba675SRob Herring status = "disabled"; 1296*724ba675SRob Herring }; 1297*724ba675SRob Herring 1298*724ba675SRob Herring ether: ethernet@ee700000 { 1299*724ba675SRob Herring compatible = "renesas,ether-r8a7794", 1300*724ba675SRob Herring "renesas,rcar-gen2-ether"; 1301*724ba675SRob Herring reg = <0 0xee700000 0 0x400>; 1302*724ba675SRob Herring interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1303*724ba675SRob Herring clocks = <&cpg CPG_MOD 813>; 1304*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1305*724ba675SRob Herring resets = <&cpg 813>; 1306*724ba675SRob Herring phy-mode = "rmii"; 1307*724ba675SRob Herring #address-cells = <1>; 1308*724ba675SRob Herring #size-cells = <0>; 1309*724ba675SRob Herring status = "disabled"; 1310*724ba675SRob Herring }; 1311*724ba675SRob Herring 1312*724ba675SRob Herring gic: interrupt-controller@f1001000 { 1313*724ba675SRob Herring compatible = "arm,gic-400"; 1314*724ba675SRob Herring #interrupt-cells = <3>; 1315*724ba675SRob Herring #address-cells = <0>; 1316*724ba675SRob Herring interrupt-controller; 1317*724ba675SRob Herring reg = <0 0xf1001000 0 0x1000>, 1318*724ba675SRob Herring <0 0xf1002000 0 0x2000>, 1319*724ba675SRob Herring <0 0xf1004000 0 0x2000>, 1320*724ba675SRob Herring <0 0xf1006000 0 0x2000>; 1321*724ba675SRob Herring interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1322*724ba675SRob Herring clocks = <&cpg CPG_MOD 408>; 1323*724ba675SRob Herring clock-names = "clk"; 1324*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1325*724ba675SRob Herring resets = <&cpg 408>; 1326*724ba675SRob Herring }; 1327*724ba675SRob Herring 1328*724ba675SRob Herring vsp@fe928000 { 1329*724ba675SRob Herring compatible = "renesas,vsp1"; 1330*724ba675SRob Herring reg = <0 0xfe928000 0 0x8000>; 1331*724ba675SRob Herring interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1332*724ba675SRob Herring clocks = <&cpg CPG_MOD 131>; 1333*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1334*724ba675SRob Herring resets = <&cpg 131>; 1335*724ba675SRob Herring }; 1336*724ba675SRob Herring 1337*724ba675SRob Herring vsp@fe930000 { 1338*724ba675SRob Herring compatible = "renesas,vsp1"; 1339*724ba675SRob Herring reg = <0 0xfe930000 0 0x8000>; 1340*724ba675SRob Herring interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1341*724ba675SRob Herring clocks = <&cpg CPG_MOD 128>; 1342*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1343*724ba675SRob Herring resets = <&cpg 128>; 1344*724ba675SRob Herring }; 1345*724ba675SRob Herring 1346*724ba675SRob Herring fdp1@fe940000 { 1347*724ba675SRob Herring compatible = "renesas,fdp1"; 1348*724ba675SRob Herring reg = <0 0xfe940000 0 0x2400>; 1349*724ba675SRob Herring interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1350*724ba675SRob Herring clocks = <&cpg CPG_MOD 119>; 1351*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1352*724ba675SRob Herring resets = <&cpg 119>; 1353*724ba675SRob Herring }; 1354*724ba675SRob Herring 1355*724ba675SRob Herring du: display@feb00000 { 1356*724ba675SRob Herring compatible = "renesas,du-r8a7794"; 1357*724ba675SRob Herring reg = <0 0xfeb00000 0 0x40000>; 1358*724ba675SRob Herring interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1359*724ba675SRob Herring <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1360*724ba675SRob Herring clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1361*724ba675SRob Herring clock-names = "du.0", "du.1"; 1362*724ba675SRob Herring resets = <&cpg 724>; 1363*724ba675SRob Herring reset-names = "du.0"; 1364*724ba675SRob Herring status = "disabled"; 1365*724ba675SRob Herring 1366*724ba675SRob Herring ports { 1367*724ba675SRob Herring #address-cells = <1>; 1368*724ba675SRob Herring #size-cells = <0>; 1369*724ba675SRob Herring 1370*724ba675SRob Herring port@0 { 1371*724ba675SRob Herring reg = <0>; 1372*724ba675SRob Herring du_out_rgb0: endpoint { 1373*724ba675SRob Herring }; 1374*724ba675SRob Herring }; 1375*724ba675SRob Herring port@1 { 1376*724ba675SRob Herring reg = <1>; 1377*724ba675SRob Herring du_out_rgb1: endpoint { 1378*724ba675SRob Herring }; 1379*724ba675SRob Herring }; 1380*724ba675SRob Herring }; 1381*724ba675SRob Herring }; 1382*724ba675SRob Herring 1383*724ba675SRob Herring prr: chipid@ff000044 { 1384*724ba675SRob Herring compatible = "renesas,prr"; 1385*724ba675SRob Herring reg = <0 0xff000044 0 4>; 1386*724ba675SRob Herring }; 1387*724ba675SRob Herring 1388*724ba675SRob Herring cmt0: timer@ffca0000 { 1389*724ba675SRob Herring compatible = "renesas,r8a7794-cmt0", 1390*724ba675SRob Herring "renesas,rcar-gen2-cmt0"; 1391*724ba675SRob Herring reg = <0 0xffca0000 0 0x1004>; 1392*724ba675SRob Herring interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1393*724ba675SRob Herring <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1394*724ba675SRob Herring clocks = <&cpg CPG_MOD 124>; 1395*724ba675SRob Herring clock-names = "fck"; 1396*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1397*724ba675SRob Herring resets = <&cpg 124>; 1398*724ba675SRob Herring 1399*724ba675SRob Herring status = "disabled"; 1400*724ba675SRob Herring }; 1401*724ba675SRob Herring 1402*724ba675SRob Herring cmt1: timer@e6130000 { 1403*724ba675SRob Herring compatible = "renesas,r8a7794-cmt1", 1404*724ba675SRob Herring "renesas,rcar-gen2-cmt1"; 1405*724ba675SRob Herring reg = <0 0xe6130000 0 0x1004>; 1406*724ba675SRob Herring interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1407*724ba675SRob Herring <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1408*724ba675SRob Herring <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1409*724ba675SRob Herring <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1410*724ba675SRob Herring <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1411*724ba675SRob Herring <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1412*724ba675SRob Herring <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1413*724ba675SRob Herring <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1414*724ba675SRob Herring clocks = <&cpg CPG_MOD 329>; 1415*724ba675SRob Herring clock-names = "fck"; 1416*724ba675SRob Herring power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1417*724ba675SRob Herring resets = <&cpg 329>; 1418*724ba675SRob Herring 1419*724ba675SRob Herring status = "disabled"; 1420*724ba675SRob Herring }; 1421*724ba675SRob Herring }; 1422*724ba675SRob Herring 1423*724ba675SRob Herring timer { 1424*724ba675SRob Herring compatible = "arm,armv7-timer"; 1425*724ba675SRob Herring interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1426*724ba675SRob Herring <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1427*724ba675SRob Herring <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1428*724ba675SRob Herring <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1429*724ba675SRob Herring }; 1430*724ba675SRob Herring 1431*724ba675SRob Herring /* External USB clock - can be overridden by the board */ 1432*724ba675SRob Herring usb_extal_clk: usb_extal { 1433*724ba675SRob Herring compatible = "fixed-clock"; 1434*724ba675SRob Herring #clock-cells = <0>; 1435*724ba675SRob Herring clock-frequency = <48000000>; 1436*724ba675SRob Herring }; 1437*724ba675SRob Herring}; 1438