1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree Source for the r8a7745 SoC
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (C) 2016-2017 Cogent Embedded Inc.
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h>
9*724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h>
10*724ba675SRob Herring#include <dt-bindings/clock/r8a7745-cpg-mssr.h>
11*724ba675SRob Herring#include <dt-bindings/power/r8a7745-sysc.h>
12*724ba675SRob Herring
13*724ba675SRob Herring/ {
14*724ba675SRob Herring	compatible = "renesas,r8a7745";
15*724ba675SRob Herring	#address-cells = <2>;
16*724ba675SRob Herring	#size-cells = <2>;
17*724ba675SRob Herring
18*724ba675SRob Herring	aliases {
19*724ba675SRob Herring		i2c0 = &i2c0;
20*724ba675SRob Herring		i2c1 = &i2c1;
21*724ba675SRob Herring		i2c2 = &i2c2;
22*724ba675SRob Herring		i2c3 = &i2c3;
23*724ba675SRob Herring		i2c4 = &i2c4;
24*724ba675SRob Herring		i2c5 = &i2c5;
25*724ba675SRob Herring		i2c6 = &iic0;
26*724ba675SRob Herring		i2c7 = &iic1;
27*724ba675SRob Herring		spi0 = &qspi;
28*724ba675SRob Herring		spi1 = &msiof0;
29*724ba675SRob Herring		spi2 = &msiof1;
30*724ba675SRob Herring		spi3 = &msiof2;
31*724ba675SRob Herring		vin0 = &vin0;
32*724ba675SRob Herring		vin1 = &vin1;
33*724ba675SRob Herring	};
34*724ba675SRob Herring
35*724ba675SRob Herring	/*
36*724ba675SRob Herring	 * The external audio clocks are configured  as 0 Hz fixed
37*724ba675SRob Herring	 * frequency clocks by default.  Boards that provide audio
38*724ba675SRob Herring	 * clocks should override them.
39*724ba675SRob Herring	 */
40*724ba675SRob Herring	audio_clka: audio_clka {
41*724ba675SRob Herring		compatible = "fixed-clock";
42*724ba675SRob Herring		#clock-cells = <0>;
43*724ba675SRob Herring		clock-frequency = <0>;
44*724ba675SRob Herring	};
45*724ba675SRob Herring	audio_clkb: audio_clkb {
46*724ba675SRob Herring		compatible = "fixed-clock";
47*724ba675SRob Herring		#clock-cells = <0>;
48*724ba675SRob Herring		clock-frequency = <0>;
49*724ba675SRob Herring	};
50*724ba675SRob Herring	audio_clkc: audio_clkc {
51*724ba675SRob Herring		compatible = "fixed-clock";
52*724ba675SRob Herring		#clock-cells = <0>;
53*724ba675SRob Herring		clock-frequency = <0>;
54*724ba675SRob Herring	};
55*724ba675SRob Herring
56*724ba675SRob Herring	/* External CAN clock */
57*724ba675SRob Herring	can_clk: can {
58*724ba675SRob Herring		compatible = "fixed-clock";
59*724ba675SRob Herring		#clock-cells = <0>;
60*724ba675SRob Herring		/* This value must be overridden by the board. */
61*724ba675SRob Herring		clock-frequency = <0>;
62*724ba675SRob Herring	};
63*724ba675SRob Herring
64*724ba675SRob Herring	cpus {
65*724ba675SRob Herring		#address-cells = <1>;
66*724ba675SRob Herring		#size-cells = <0>;
67*724ba675SRob Herring
68*724ba675SRob Herring		cpu0: cpu@0 {
69*724ba675SRob Herring			device_type = "cpu";
70*724ba675SRob Herring			compatible = "arm,cortex-a7";
71*724ba675SRob Herring			reg = <0>;
72*724ba675SRob Herring			clock-frequency = <1000000000>;
73*724ba675SRob Herring			clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
74*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_CA7_CPU0>;
75*724ba675SRob Herring			enable-method = "renesas,apmu";
76*724ba675SRob Herring			next-level-cache = <&L2_CA7>;
77*724ba675SRob Herring		};
78*724ba675SRob Herring
79*724ba675SRob Herring		cpu1: cpu@1 {
80*724ba675SRob Herring			device_type = "cpu";
81*724ba675SRob Herring			compatible = "arm,cortex-a7";
82*724ba675SRob Herring			reg = <1>;
83*724ba675SRob Herring			clock-frequency = <1000000000>;
84*724ba675SRob Herring			clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
85*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_CA7_CPU1>;
86*724ba675SRob Herring			enable-method = "renesas,apmu";
87*724ba675SRob Herring			next-level-cache = <&L2_CA7>;
88*724ba675SRob Herring		};
89*724ba675SRob Herring
90*724ba675SRob Herring		L2_CA7: cache-controller-0 {
91*724ba675SRob Herring			compatible = "cache";
92*724ba675SRob Herring			cache-unified;
93*724ba675SRob Herring			cache-level = <2>;
94*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_CA7_SCU>;
95*724ba675SRob Herring		};
96*724ba675SRob Herring	};
97*724ba675SRob Herring
98*724ba675SRob Herring	/* External root clock */
99*724ba675SRob Herring	extal_clk: extal {
100*724ba675SRob Herring		compatible = "fixed-clock";
101*724ba675SRob Herring		#clock-cells = <0>;
102*724ba675SRob Herring		/* This value must be overridden by the board. */
103*724ba675SRob Herring		clock-frequency = <0>;
104*724ba675SRob Herring	};
105*724ba675SRob Herring
106*724ba675SRob Herring	pmu {
107*724ba675SRob Herring		compatible = "arm,cortex-a7-pmu";
108*724ba675SRob Herring		interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
109*724ba675SRob Herring				      <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
110*724ba675SRob Herring		interrupt-affinity = <&cpu0>, <&cpu1>;
111*724ba675SRob Herring	};
112*724ba675SRob Herring
113*724ba675SRob Herring	/* External SCIF clock */
114*724ba675SRob Herring	scif_clk: scif {
115*724ba675SRob Herring		compatible = "fixed-clock";
116*724ba675SRob Herring		#clock-cells = <0>;
117*724ba675SRob Herring		/* This value must be overridden by the board. */
118*724ba675SRob Herring		clock-frequency = <0>;
119*724ba675SRob Herring	};
120*724ba675SRob Herring
121*724ba675SRob Herring	soc {
122*724ba675SRob Herring		compatible = "simple-bus";
123*724ba675SRob Herring		interrupt-parent = <&gic>;
124*724ba675SRob Herring
125*724ba675SRob Herring		#address-cells = <2>;
126*724ba675SRob Herring		#size-cells = <2>;
127*724ba675SRob Herring		ranges;
128*724ba675SRob Herring
129*724ba675SRob Herring		gpio0: gpio@e6050000 {
130*724ba675SRob Herring			compatible = "renesas,gpio-r8a7745",
131*724ba675SRob Herring				     "renesas,rcar-gen2-gpio";
132*724ba675SRob Herring			reg = <0 0xe6050000 0 0x50>;
133*724ba675SRob Herring			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
134*724ba675SRob Herring			#gpio-cells = <2>;
135*724ba675SRob Herring			gpio-controller;
136*724ba675SRob Herring			gpio-ranges = <&pfc 0 0 32>;
137*724ba675SRob Herring			#interrupt-cells = <2>;
138*724ba675SRob Herring			interrupt-controller;
139*724ba675SRob Herring			clocks = <&cpg CPG_MOD 912>;
140*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
141*724ba675SRob Herring			resets = <&cpg 912>;
142*724ba675SRob Herring		};
143*724ba675SRob Herring
144*724ba675SRob Herring		gpio1: gpio@e6051000 {
145*724ba675SRob Herring			compatible = "renesas,gpio-r8a7745",
146*724ba675SRob Herring				     "renesas,rcar-gen2-gpio";
147*724ba675SRob Herring			reg = <0 0xe6051000 0 0x50>;
148*724ba675SRob Herring			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
149*724ba675SRob Herring			#gpio-cells = <2>;
150*724ba675SRob Herring			gpio-controller;
151*724ba675SRob Herring			gpio-ranges = <&pfc 0 32 26>;
152*724ba675SRob Herring			#interrupt-cells = <2>;
153*724ba675SRob Herring			interrupt-controller;
154*724ba675SRob Herring			clocks = <&cpg CPG_MOD 911>;
155*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
156*724ba675SRob Herring			resets = <&cpg 911>;
157*724ba675SRob Herring		};
158*724ba675SRob Herring
159*724ba675SRob Herring		gpio2: gpio@e6052000 {
160*724ba675SRob Herring			compatible = "renesas,gpio-r8a7745",
161*724ba675SRob Herring				     "renesas,rcar-gen2-gpio";
162*724ba675SRob Herring			reg = <0 0xe6052000 0 0x50>;
163*724ba675SRob Herring			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
164*724ba675SRob Herring			#gpio-cells = <2>;
165*724ba675SRob Herring			gpio-controller;
166*724ba675SRob Herring			gpio-ranges = <&pfc 0 64 32>;
167*724ba675SRob Herring			#interrupt-cells = <2>;
168*724ba675SRob Herring			interrupt-controller;
169*724ba675SRob Herring			clocks = <&cpg CPG_MOD 910>;
170*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
171*724ba675SRob Herring			resets = <&cpg 910>;
172*724ba675SRob Herring		};
173*724ba675SRob Herring
174*724ba675SRob Herring		gpio3: gpio@e6053000 {
175*724ba675SRob Herring			compatible = "renesas,gpio-r8a7745",
176*724ba675SRob Herring				     "renesas,rcar-gen2-gpio";
177*724ba675SRob Herring			reg = <0 0xe6053000 0 0x50>;
178*724ba675SRob Herring			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
179*724ba675SRob Herring			#gpio-cells = <2>;
180*724ba675SRob Herring			gpio-controller;
181*724ba675SRob Herring			gpio-ranges = <&pfc 0 96 32>;
182*724ba675SRob Herring			#interrupt-cells = <2>;
183*724ba675SRob Herring			interrupt-controller;
184*724ba675SRob Herring			clocks = <&cpg CPG_MOD 909>;
185*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
186*724ba675SRob Herring			resets = <&cpg 909>;
187*724ba675SRob Herring		};
188*724ba675SRob Herring
189*724ba675SRob Herring		gpio4: gpio@e6054000 {
190*724ba675SRob Herring			compatible = "renesas,gpio-r8a7745",
191*724ba675SRob Herring				     "renesas,rcar-gen2-gpio";
192*724ba675SRob Herring			reg = <0 0xe6054000 0 0x50>;
193*724ba675SRob Herring			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
194*724ba675SRob Herring			#gpio-cells = <2>;
195*724ba675SRob Herring			gpio-controller;
196*724ba675SRob Herring			gpio-ranges = <&pfc 0 128 32>;
197*724ba675SRob Herring			#interrupt-cells = <2>;
198*724ba675SRob Herring			interrupt-controller;
199*724ba675SRob Herring			clocks = <&cpg CPG_MOD 908>;
200*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
201*724ba675SRob Herring			resets = <&cpg 908>;
202*724ba675SRob Herring		};
203*724ba675SRob Herring
204*724ba675SRob Herring		gpio5: gpio@e6055000 {
205*724ba675SRob Herring			compatible = "renesas,gpio-r8a7745",
206*724ba675SRob Herring				     "renesas,rcar-gen2-gpio";
207*724ba675SRob Herring			reg = <0 0xe6055000 0 0x50>;
208*724ba675SRob Herring			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
209*724ba675SRob Herring			#gpio-cells = <2>;
210*724ba675SRob Herring			gpio-controller;
211*724ba675SRob Herring			gpio-ranges = <&pfc 0 160 28>;
212*724ba675SRob Herring			#interrupt-cells = <2>;
213*724ba675SRob Herring			interrupt-controller;
214*724ba675SRob Herring			clocks = <&cpg CPG_MOD 907>;
215*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
216*724ba675SRob Herring			resets = <&cpg 907>;
217*724ba675SRob Herring		};
218*724ba675SRob Herring
219*724ba675SRob Herring		gpio6: gpio@e6055400 {
220*724ba675SRob Herring			compatible = "renesas,gpio-r8a7745",
221*724ba675SRob Herring				     "renesas,rcar-gen2-gpio";
222*724ba675SRob Herring			reg = <0 0xe6055400 0 0x50>;
223*724ba675SRob Herring			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
224*724ba675SRob Herring			#gpio-cells = <2>;
225*724ba675SRob Herring			gpio-controller;
226*724ba675SRob Herring			gpio-ranges = <&pfc 0 192 26>;
227*724ba675SRob Herring			#interrupt-cells = <2>;
228*724ba675SRob Herring			interrupt-controller;
229*724ba675SRob Herring			clocks = <&cpg CPG_MOD 905>;
230*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
231*724ba675SRob Herring			resets = <&cpg 905>;
232*724ba675SRob Herring		};
233*724ba675SRob Herring
234*724ba675SRob Herring		pfc: pinctrl@e6060000 {
235*724ba675SRob Herring			compatible = "renesas,pfc-r8a7745";
236*724ba675SRob Herring			reg = <0 0xe6060000 0 0x11c>;
237*724ba675SRob Herring		};
238*724ba675SRob Herring
239*724ba675SRob Herring		tpu: pwm@e60f0000 {
240*724ba675SRob Herring			compatible = "renesas,tpu-r8a7745", "renesas,tpu";
241*724ba675SRob Herring			reg = <0 0xe60f0000 0 0x148>;
242*724ba675SRob Herring			clocks = <&cpg CPG_MOD 304>;
243*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
244*724ba675SRob Herring			resets = <&cpg 304>;
245*724ba675SRob Herring			#pwm-cells = <3>;
246*724ba675SRob Herring			status = "disabled";
247*724ba675SRob Herring		};
248*724ba675SRob Herring
249*724ba675SRob Herring		cpg: clock-controller@e6150000 {
250*724ba675SRob Herring			compatible = "renesas,r8a7745-cpg-mssr";
251*724ba675SRob Herring			reg = <0 0xe6150000 0 0x1000>;
252*724ba675SRob Herring			clocks = <&extal_clk>, <&usb_extal_clk>;
253*724ba675SRob Herring			clock-names = "extal", "usb_extal";
254*724ba675SRob Herring			#clock-cells = <2>;
255*724ba675SRob Herring			#power-domain-cells = <0>;
256*724ba675SRob Herring			#reset-cells = <1>;
257*724ba675SRob Herring		};
258*724ba675SRob Herring
259*724ba675SRob Herring		apmu@e6151000 {
260*724ba675SRob Herring			compatible = "renesas,r8a7745-apmu", "renesas,apmu";
261*724ba675SRob Herring			reg = <0 0xe6151000 0 0x188>;
262*724ba675SRob Herring			cpus = <&cpu0>, <&cpu1>;
263*724ba675SRob Herring		};
264*724ba675SRob Herring
265*724ba675SRob Herring		rst: reset-controller@e6160000 {
266*724ba675SRob Herring			compatible = "renesas,r8a7745-rst";
267*724ba675SRob Herring			reg = <0 0xe6160000 0 0x100>;
268*724ba675SRob Herring		};
269*724ba675SRob Herring
270*724ba675SRob Herring		rwdt: watchdog@e6020000 {
271*724ba675SRob Herring			compatible = "renesas,r8a7745-wdt",
272*724ba675SRob Herring				     "renesas,rcar-gen2-wdt";
273*724ba675SRob Herring			interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
274*724ba675SRob Herring			reg = <0 0xe6020000 0 0x0c>;
275*724ba675SRob Herring			clocks = <&cpg CPG_MOD 402>;
276*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
277*724ba675SRob Herring			resets = <&cpg 402>;
278*724ba675SRob Herring			status = "disabled";
279*724ba675SRob Herring		};
280*724ba675SRob Herring
281*724ba675SRob Herring		sysc: system-controller@e6180000 {
282*724ba675SRob Herring			compatible = "renesas,r8a7745-sysc";
283*724ba675SRob Herring			reg = <0 0xe6180000 0 0x200>;
284*724ba675SRob Herring			#power-domain-cells = <1>;
285*724ba675SRob Herring		};
286*724ba675SRob Herring
287*724ba675SRob Herring		irqc: interrupt-controller@e61c0000 {
288*724ba675SRob Herring			compatible = "renesas,irqc-r8a7745", "renesas,irqc";
289*724ba675SRob Herring			#interrupt-cells = <2>;
290*724ba675SRob Herring			interrupt-controller;
291*724ba675SRob Herring			reg = <0 0xe61c0000 0 0x200>;
292*724ba675SRob Herring			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
293*724ba675SRob Herring				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
294*724ba675SRob Herring				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
295*724ba675SRob Herring				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
296*724ba675SRob Herring				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
297*724ba675SRob Herring				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
298*724ba675SRob Herring				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
299*724ba675SRob Herring				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
300*724ba675SRob Herring				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
301*724ba675SRob Herring				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
302*724ba675SRob Herring			clocks = <&cpg CPG_MOD 407>;
303*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
304*724ba675SRob Herring			resets = <&cpg 407>;
305*724ba675SRob Herring		};
306*724ba675SRob Herring
307*724ba675SRob Herring		ipmmu_sy0: iommu@e6280000 {
308*724ba675SRob Herring			compatible = "renesas,ipmmu-r8a7745",
309*724ba675SRob Herring				     "renesas,ipmmu-vmsa";
310*724ba675SRob Herring			reg = <0 0xe6280000 0 0x1000>;
311*724ba675SRob Herring			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
312*724ba675SRob Herring				     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
313*724ba675SRob Herring			#iommu-cells = <1>;
314*724ba675SRob Herring			status = "disabled";
315*724ba675SRob Herring		};
316*724ba675SRob Herring
317*724ba675SRob Herring		ipmmu_sy1: iommu@e6290000 {
318*724ba675SRob Herring			compatible = "renesas,ipmmu-r8a7745",
319*724ba675SRob Herring				     "renesas,ipmmu-vmsa";
320*724ba675SRob Herring			reg = <0 0xe6290000 0 0x1000>;
321*724ba675SRob Herring			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
322*724ba675SRob Herring			#iommu-cells = <1>;
323*724ba675SRob Herring			status = "disabled";
324*724ba675SRob Herring		};
325*724ba675SRob Herring
326*724ba675SRob Herring		ipmmu_ds: iommu@e6740000 {
327*724ba675SRob Herring			compatible = "renesas,ipmmu-r8a7745",
328*724ba675SRob Herring				     "renesas,ipmmu-vmsa";
329*724ba675SRob Herring			reg = <0 0xe6740000 0 0x1000>;
330*724ba675SRob Herring			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
331*724ba675SRob Herring				     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
332*724ba675SRob Herring			#iommu-cells = <1>;
333*724ba675SRob Herring			status = "disabled";
334*724ba675SRob Herring		};
335*724ba675SRob Herring
336*724ba675SRob Herring		ipmmu_mp: iommu@ec680000 {
337*724ba675SRob Herring			compatible = "renesas,ipmmu-r8a7745",
338*724ba675SRob Herring				     "renesas,ipmmu-vmsa";
339*724ba675SRob Herring			reg = <0 0xec680000 0 0x1000>;
340*724ba675SRob Herring			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
341*724ba675SRob Herring			#iommu-cells = <1>;
342*724ba675SRob Herring			status = "disabled";
343*724ba675SRob Herring		};
344*724ba675SRob Herring
345*724ba675SRob Herring		ipmmu_mx: iommu@fe951000 {
346*724ba675SRob Herring			compatible = "renesas,ipmmu-r8a7745",
347*724ba675SRob Herring				     "renesas,ipmmu-vmsa";
348*724ba675SRob Herring			reg = <0 0xfe951000 0 0x1000>;
349*724ba675SRob Herring			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
350*724ba675SRob Herring				     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
351*724ba675SRob Herring			#iommu-cells = <1>;
352*724ba675SRob Herring			status = "disabled";
353*724ba675SRob Herring		};
354*724ba675SRob Herring
355*724ba675SRob Herring		ipmmu_gp: iommu@e62a0000 {
356*724ba675SRob Herring			compatible = "renesas,ipmmu-r8a7745",
357*724ba675SRob Herring				     "renesas,ipmmu-vmsa";
358*724ba675SRob Herring			reg = <0 0xe62a0000 0 0x1000>;
359*724ba675SRob Herring			interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
360*724ba675SRob Herring				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
361*724ba675SRob Herring			#iommu-cells = <1>;
362*724ba675SRob Herring			status = "disabled";
363*724ba675SRob Herring		};
364*724ba675SRob Herring
365*724ba675SRob Herring		icram0:	sram@e63a0000 {
366*724ba675SRob Herring			compatible = "mmio-sram";
367*724ba675SRob Herring			reg = <0 0xe63a0000 0 0x12000>;
368*724ba675SRob Herring			#address-cells = <1>;
369*724ba675SRob Herring			#size-cells = <1>;
370*724ba675SRob Herring			ranges = <0 0 0xe63a0000 0x12000>;
371*724ba675SRob Herring		};
372*724ba675SRob Herring
373*724ba675SRob Herring		icram1:	sram@e63c0000 {
374*724ba675SRob Herring			compatible = "mmio-sram";
375*724ba675SRob Herring			reg = <0 0xe63c0000 0 0x1000>;
376*724ba675SRob Herring			#address-cells = <1>;
377*724ba675SRob Herring			#size-cells = <1>;
378*724ba675SRob Herring			ranges = <0 0 0xe63c0000 0x1000>;
379*724ba675SRob Herring
380*724ba675SRob Herring			smp-sram@0 {
381*724ba675SRob Herring				compatible = "renesas,smp-sram";
382*724ba675SRob Herring				reg = <0 0x100>;
383*724ba675SRob Herring			};
384*724ba675SRob Herring		};
385*724ba675SRob Herring
386*724ba675SRob Herring		icram2:	sram@e6300000 {
387*724ba675SRob Herring			compatible = "mmio-sram";
388*724ba675SRob Herring			reg = <0 0xe6300000 0 0x40000>;
389*724ba675SRob Herring			#address-cells = <1>;
390*724ba675SRob Herring			#size-cells = <1>;
391*724ba675SRob Herring			ranges = <0 0 0xe6300000 0x40000>;
392*724ba675SRob Herring		};
393*724ba675SRob Herring		i2c0: i2c@e6508000 {
394*724ba675SRob Herring			#address-cells = <1>;
395*724ba675SRob Herring			#size-cells = <0>;
396*724ba675SRob Herring			compatible = "renesas,i2c-r8a7745",
397*724ba675SRob Herring				     "renesas,rcar-gen2-i2c";
398*724ba675SRob Herring			reg = <0 0xe6508000 0 0x40>;
399*724ba675SRob Herring			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
400*724ba675SRob Herring			clocks = <&cpg CPG_MOD 931>;
401*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
402*724ba675SRob Herring			resets = <&cpg 931>;
403*724ba675SRob Herring			i2c-scl-internal-delay-ns = <6>;
404*724ba675SRob Herring			status = "disabled";
405*724ba675SRob Herring		};
406*724ba675SRob Herring
407*724ba675SRob Herring		i2c1: i2c@e6518000 {
408*724ba675SRob Herring			#address-cells = <1>;
409*724ba675SRob Herring			#size-cells = <0>;
410*724ba675SRob Herring			compatible = "renesas,i2c-r8a7745",
411*724ba675SRob Herring				     "renesas,rcar-gen2-i2c";
412*724ba675SRob Herring			reg = <0 0xe6518000 0 0x40>;
413*724ba675SRob Herring			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
414*724ba675SRob Herring			clocks = <&cpg CPG_MOD 930>;
415*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
416*724ba675SRob Herring			resets = <&cpg 930>;
417*724ba675SRob Herring			i2c-scl-internal-delay-ns = <6>;
418*724ba675SRob Herring			status = "disabled";
419*724ba675SRob Herring		};
420*724ba675SRob Herring
421*724ba675SRob Herring		i2c2: i2c@e6530000 {
422*724ba675SRob Herring			#address-cells = <1>;
423*724ba675SRob Herring			#size-cells = <0>;
424*724ba675SRob Herring			compatible = "renesas,i2c-r8a7745",
425*724ba675SRob Herring				     "renesas,rcar-gen2-i2c";
426*724ba675SRob Herring			reg = <0 0xe6530000 0 0x40>;
427*724ba675SRob Herring			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
428*724ba675SRob Herring			clocks = <&cpg CPG_MOD 929>;
429*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
430*724ba675SRob Herring			resets = <&cpg 929>;
431*724ba675SRob Herring			i2c-scl-internal-delay-ns = <6>;
432*724ba675SRob Herring			status = "disabled";
433*724ba675SRob Herring		};
434*724ba675SRob Herring
435*724ba675SRob Herring		i2c3: i2c@e6540000 {
436*724ba675SRob Herring			#address-cells = <1>;
437*724ba675SRob Herring			#size-cells = <0>;
438*724ba675SRob Herring			compatible = "renesas,i2c-r8a7745",
439*724ba675SRob Herring				     "renesas,rcar-gen2-i2c";
440*724ba675SRob Herring			reg = <0 0xe6540000 0 0x40>;
441*724ba675SRob Herring			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
442*724ba675SRob Herring			clocks = <&cpg CPG_MOD 928>;
443*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
444*724ba675SRob Herring			resets = <&cpg 928>;
445*724ba675SRob Herring			i2c-scl-internal-delay-ns = <6>;
446*724ba675SRob Herring			status = "disabled";
447*724ba675SRob Herring		};
448*724ba675SRob Herring
449*724ba675SRob Herring		i2c4: i2c@e6520000 {
450*724ba675SRob Herring			#address-cells = <1>;
451*724ba675SRob Herring			#size-cells = <0>;
452*724ba675SRob Herring			compatible = "renesas,i2c-r8a7745",
453*724ba675SRob Herring				     "renesas,rcar-gen2-i2c";
454*724ba675SRob Herring			reg = <0 0xe6520000 0 0x40>;
455*724ba675SRob Herring			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
456*724ba675SRob Herring			clocks = <&cpg CPG_MOD 927>;
457*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
458*724ba675SRob Herring			resets = <&cpg 927>;
459*724ba675SRob Herring			i2c-scl-internal-delay-ns = <6>;
460*724ba675SRob Herring			status = "disabled";
461*724ba675SRob Herring		};
462*724ba675SRob Herring
463*724ba675SRob Herring		i2c5: i2c@e6528000 {
464*724ba675SRob Herring			#address-cells = <1>;
465*724ba675SRob Herring			#size-cells = <0>;
466*724ba675SRob Herring			compatible = "renesas,i2c-r8a7745",
467*724ba675SRob Herring				     "renesas,rcar-gen2-i2c";
468*724ba675SRob Herring			reg = <0 0xe6528000 0 0x40>;
469*724ba675SRob Herring			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
470*724ba675SRob Herring			clocks = <&cpg CPG_MOD 925>;
471*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
472*724ba675SRob Herring			resets = <&cpg 925>;
473*724ba675SRob Herring			i2c-scl-internal-delay-ns = <6>;
474*724ba675SRob Herring			status = "disabled";
475*724ba675SRob Herring		};
476*724ba675SRob Herring
477*724ba675SRob Herring		iic0: i2c@e6500000 {
478*724ba675SRob Herring			#address-cells = <1>;
479*724ba675SRob Herring			#size-cells = <0>;
480*724ba675SRob Herring			compatible = "renesas,iic-r8a7745",
481*724ba675SRob Herring				     "renesas,rcar-gen2-iic",
482*724ba675SRob Herring				     "renesas,rmobile-iic";
483*724ba675SRob Herring			reg = <0 0xe6500000 0 0x425>;
484*724ba675SRob Herring			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
485*724ba675SRob Herring			clocks = <&cpg CPG_MOD 318>;
486*724ba675SRob Herring			dmas = <&dmac0 0x61>, <&dmac0 0x62>,
487*724ba675SRob Herring			       <&dmac1 0x61>, <&dmac1 0x62>;
488*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
489*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
490*724ba675SRob Herring			resets = <&cpg 318>;
491*724ba675SRob Herring			status = "disabled";
492*724ba675SRob Herring		};
493*724ba675SRob Herring
494*724ba675SRob Herring		iic1: i2c@e6510000 {
495*724ba675SRob Herring			#address-cells = <1>;
496*724ba675SRob Herring			#size-cells = <0>;
497*724ba675SRob Herring			compatible = "renesas,iic-r8a7745",
498*724ba675SRob Herring				     "renesas,rcar-gen2-iic",
499*724ba675SRob Herring				     "renesas,rmobile-iic";
500*724ba675SRob Herring			reg = <0 0xe6510000 0 0x425>;
501*724ba675SRob Herring			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
502*724ba675SRob Herring			clocks = <&cpg CPG_MOD 323>;
503*724ba675SRob Herring			dmas = <&dmac0 0x65>, <&dmac0 0x66>,
504*724ba675SRob Herring			       <&dmac1 0x65>, <&dmac1 0x66>;
505*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
506*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
507*724ba675SRob Herring			resets = <&cpg 323>;
508*724ba675SRob Herring			status = "disabled";
509*724ba675SRob Herring		};
510*724ba675SRob Herring
511*724ba675SRob Herring		hsusb: usb@e6590000 {
512*724ba675SRob Herring			compatible = "renesas,usbhs-r8a7745",
513*724ba675SRob Herring				     "renesas,rcar-gen2-usbhs";
514*724ba675SRob Herring			reg = <0 0xe6590000 0 0x100>;
515*724ba675SRob Herring			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
516*724ba675SRob Herring			clocks = <&cpg CPG_MOD 704>;
517*724ba675SRob Herring			dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
518*724ba675SRob Herring			       <&usb_dmac1 0>, <&usb_dmac1 1>;
519*724ba675SRob Herring			dma-names = "ch0", "ch1", "ch2", "ch3";
520*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
521*724ba675SRob Herring			resets = <&cpg 704>;
522*724ba675SRob Herring			renesas,buswait = <4>;
523*724ba675SRob Herring			phys = <&usb0 1>;
524*724ba675SRob Herring			phy-names = "usb";
525*724ba675SRob Herring			status = "disabled";
526*724ba675SRob Herring		};
527*724ba675SRob Herring
528*724ba675SRob Herring		usbphy: usb-phy-controller@e6590100 {
529*724ba675SRob Herring			compatible = "renesas,usb-phy-r8a7745",
530*724ba675SRob Herring				     "renesas,rcar-gen2-usb-phy";
531*724ba675SRob Herring			reg = <0 0xe6590100 0 0x100>;
532*724ba675SRob Herring			#address-cells = <1>;
533*724ba675SRob Herring			#size-cells = <0>;
534*724ba675SRob Herring			clocks = <&cpg CPG_MOD 704>;
535*724ba675SRob Herring			clock-names = "usbhs";
536*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
537*724ba675SRob Herring			resets = <&cpg 704>;
538*724ba675SRob Herring			status = "disabled";
539*724ba675SRob Herring
540*724ba675SRob Herring			usb0: usb-phy@0 {
541*724ba675SRob Herring				reg = <0>;
542*724ba675SRob Herring				#phy-cells = <1>;
543*724ba675SRob Herring			};
544*724ba675SRob Herring			usb2: usb-phy@2 {
545*724ba675SRob Herring				reg = <2>;
546*724ba675SRob Herring				#phy-cells = <1>;
547*724ba675SRob Herring			};
548*724ba675SRob Herring		};
549*724ba675SRob Herring
550*724ba675SRob Herring		usb_dmac0: dma-controller@e65a0000 {
551*724ba675SRob Herring			compatible = "renesas,r8a7745-usb-dmac",
552*724ba675SRob Herring				     "renesas,usb-dmac";
553*724ba675SRob Herring			reg = <0 0xe65a0000 0 0x100>;
554*724ba675SRob Herring			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
555*724ba675SRob Herring				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
556*724ba675SRob Herring			interrupt-names = "ch0", "ch1";
557*724ba675SRob Herring			clocks = <&cpg CPG_MOD 330>;
558*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
559*724ba675SRob Herring			resets = <&cpg 330>;
560*724ba675SRob Herring			#dma-cells = <1>;
561*724ba675SRob Herring			dma-channels = <2>;
562*724ba675SRob Herring		};
563*724ba675SRob Herring
564*724ba675SRob Herring		usb_dmac1: dma-controller@e65b0000 {
565*724ba675SRob Herring			compatible = "renesas,r8a7745-usb-dmac",
566*724ba675SRob Herring				     "renesas,usb-dmac";
567*724ba675SRob Herring			reg = <0 0xe65b0000 0 0x100>;
568*724ba675SRob Herring			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
569*724ba675SRob Herring				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
570*724ba675SRob Herring			interrupt-names = "ch0", "ch1";
571*724ba675SRob Herring			clocks = <&cpg CPG_MOD 331>;
572*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
573*724ba675SRob Herring			resets = <&cpg 331>;
574*724ba675SRob Herring			#dma-cells = <1>;
575*724ba675SRob Herring			dma-channels = <2>;
576*724ba675SRob Herring		};
577*724ba675SRob Herring
578*724ba675SRob Herring		dmac0: dma-controller@e6700000 {
579*724ba675SRob Herring			compatible = "renesas,dmac-r8a7745",
580*724ba675SRob Herring				     "renesas,rcar-dmac";
581*724ba675SRob Herring			reg = <0 0xe6700000 0 0x20000>;
582*724ba675SRob Herring			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
583*724ba675SRob Herring				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
584*724ba675SRob Herring				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
585*724ba675SRob Herring				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
586*724ba675SRob Herring				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
587*724ba675SRob Herring				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
588*724ba675SRob Herring				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
589*724ba675SRob Herring				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
590*724ba675SRob Herring				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
591*724ba675SRob Herring				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
592*724ba675SRob Herring				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
593*724ba675SRob Herring				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
594*724ba675SRob Herring				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
595*724ba675SRob Herring				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
596*724ba675SRob Herring				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
597*724ba675SRob Herring				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
598*724ba675SRob Herring			interrupt-names = "error",
599*724ba675SRob Herring					  "ch0", "ch1", "ch2", "ch3",
600*724ba675SRob Herring					  "ch4", "ch5", "ch6", "ch7",
601*724ba675SRob Herring					  "ch8", "ch9", "ch10", "ch11",
602*724ba675SRob Herring					  "ch12", "ch13", "ch14";
603*724ba675SRob Herring			clocks = <&cpg CPG_MOD 219>;
604*724ba675SRob Herring			clock-names = "fck";
605*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
606*724ba675SRob Herring			resets = <&cpg 219>;
607*724ba675SRob Herring			#dma-cells = <1>;
608*724ba675SRob Herring			dma-channels = <15>;
609*724ba675SRob Herring		};
610*724ba675SRob Herring
611*724ba675SRob Herring		dmac1: dma-controller@e6720000 {
612*724ba675SRob Herring			compatible = "renesas,dmac-r8a7745",
613*724ba675SRob Herring				     "renesas,rcar-dmac";
614*724ba675SRob Herring			reg = <0 0xe6720000 0 0x20000>;
615*724ba675SRob Herring			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
616*724ba675SRob Herring				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
617*724ba675SRob Herring				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
618*724ba675SRob Herring				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
619*724ba675SRob Herring				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
620*724ba675SRob Herring				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
621*724ba675SRob Herring				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
622*724ba675SRob Herring				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
623*724ba675SRob Herring				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
624*724ba675SRob Herring				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
625*724ba675SRob Herring				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
626*724ba675SRob Herring				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
627*724ba675SRob Herring				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
628*724ba675SRob Herring				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
629*724ba675SRob Herring				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
630*724ba675SRob Herring				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
631*724ba675SRob Herring			interrupt-names = "error",
632*724ba675SRob Herring					  "ch0", "ch1", "ch2", "ch3",
633*724ba675SRob Herring					  "ch4", "ch5", "ch6", "ch7",
634*724ba675SRob Herring					  "ch8", "ch9", "ch10", "ch11",
635*724ba675SRob Herring					  "ch12", "ch13", "ch14";
636*724ba675SRob Herring			clocks = <&cpg CPG_MOD 218>;
637*724ba675SRob Herring			clock-names = "fck";
638*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
639*724ba675SRob Herring			resets = <&cpg 218>;
640*724ba675SRob Herring			#dma-cells = <1>;
641*724ba675SRob Herring			dma-channels = <15>;
642*724ba675SRob Herring		};
643*724ba675SRob Herring
644*724ba675SRob Herring		avb: ethernet@e6800000 {
645*724ba675SRob Herring			compatible = "renesas,etheravb-r8a7745",
646*724ba675SRob Herring				     "renesas,etheravb-rcar-gen2";
647*724ba675SRob Herring			reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
648*724ba675SRob Herring			interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
649*724ba675SRob Herring			clocks = <&cpg CPG_MOD 812>;
650*724ba675SRob Herring			clock-names = "fck";
651*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
652*724ba675SRob Herring			resets = <&cpg 812>;
653*724ba675SRob Herring			#address-cells = <1>;
654*724ba675SRob Herring			#size-cells = <0>;
655*724ba675SRob Herring			status = "disabled";
656*724ba675SRob Herring		};
657*724ba675SRob Herring
658*724ba675SRob Herring		qspi: spi@e6b10000 {
659*724ba675SRob Herring			compatible = "renesas,qspi-r8a7745", "renesas,qspi";
660*724ba675SRob Herring			reg = <0 0xe6b10000 0 0x2c>;
661*724ba675SRob Herring			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
662*724ba675SRob Herring			clocks = <&cpg CPG_MOD 917>;
663*724ba675SRob Herring			dmas = <&dmac0 0x17>, <&dmac0 0x18>,
664*724ba675SRob Herring			       <&dmac1 0x17>, <&dmac1 0x18>;
665*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
666*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
667*724ba675SRob Herring			num-cs = <1>;
668*724ba675SRob Herring			#address-cells = <1>;
669*724ba675SRob Herring			#size-cells = <0>;
670*724ba675SRob Herring			resets = <&cpg 917>;
671*724ba675SRob Herring			status = "disabled";
672*724ba675SRob Herring		};
673*724ba675SRob Herring
674*724ba675SRob Herring		scifa0: serial@e6c40000 {
675*724ba675SRob Herring			compatible = "renesas,scifa-r8a7745",
676*724ba675SRob Herring				     "renesas,rcar-gen2-scifa", "renesas,scifa";
677*724ba675SRob Herring			reg = <0 0xe6c40000 0 0x40>;
678*724ba675SRob Herring			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
679*724ba675SRob Herring			clocks = <&cpg CPG_MOD 204>;
680*724ba675SRob Herring			clock-names = "fck";
681*724ba675SRob Herring			dmas = <&dmac0 0x21>, <&dmac0 0x22>,
682*724ba675SRob Herring			       <&dmac1 0x21>, <&dmac1 0x22>;
683*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
684*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
685*724ba675SRob Herring			resets = <&cpg 204>;
686*724ba675SRob Herring			status = "disabled";
687*724ba675SRob Herring		};
688*724ba675SRob Herring
689*724ba675SRob Herring		scifa1: serial@e6c50000 {
690*724ba675SRob Herring			compatible = "renesas,scifa-r8a7745",
691*724ba675SRob Herring				     "renesas,rcar-gen2-scifa", "renesas,scifa";
692*724ba675SRob Herring			reg = <0 0xe6c50000 0 0x40>;
693*724ba675SRob Herring			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
694*724ba675SRob Herring			clocks = <&cpg CPG_MOD 203>;
695*724ba675SRob Herring			clock-names = "fck";
696*724ba675SRob Herring			dmas = <&dmac0 0x25>, <&dmac0 0x26>,
697*724ba675SRob Herring			       <&dmac1 0x25>, <&dmac1 0x26>;
698*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
699*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
700*724ba675SRob Herring			resets = <&cpg 203>;
701*724ba675SRob Herring			status = "disabled";
702*724ba675SRob Herring		};
703*724ba675SRob Herring
704*724ba675SRob Herring		scifa2: serial@e6c60000 {
705*724ba675SRob Herring			compatible = "renesas,scifa-r8a7745",
706*724ba675SRob Herring				     "renesas,rcar-gen2-scifa", "renesas,scifa";
707*724ba675SRob Herring			reg = <0 0xe6c60000 0 0x40>;
708*724ba675SRob Herring			interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
709*724ba675SRob Herring			clocks = <&cpg CPG_MOD 202>;
710*724ba675SRob Herring			clock-names = "fck";
711*724ba675SRob Herring			dmas = <&dmac0 0x27>, <&dmac0 0x28>,
712*724ba675SRob Herring			       <&dmac1 0x27>, <&dmac1 0x28>;
713*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
714*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
715*724ba675SRob Herring			resets = <&cpg 202>;
716*724ba675SRob Herring			status = "disabled";
717*724ba675SRob Herring		};
718*724ba675SRob Herring
719*724ba675SRob Herring		scifa3: serial@e6c70000 {
720*724ba675SRob Herring			compatible = "renesas,scifa-r8a7745",
721*724ba675SRob Herring				     "renesas,rcar-gen2-scifa", "renesas,scifa";
722*724ba675SRob Herring			reg = <0 0xe6c70000 0 0x40>;
723*724ba675SRob Herring			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
724*724ba675SRob Herring			clocks = <&cpg CPG_MOD 1106>;
725*724ba675SRob Herring			clock-names = "fck";
726*724ba675SRob Herring			dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
727*724ba675SRob Herring			       <&dmac1 0x1b>, <&dmac1 0x1c>;
728*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
729*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
730*724ba675SRob Herring			resets = <&cpg 1106>;
731*724ba675SRob Herring			status = "disabled";
732*724ba675SRob Herring		};
733*724ba675SRob Herring
734*724ba675SRob Herring		scifa4: serial@e6c78000 {
735*724ba675SRob Herring			compatible = "renesas,scifa-r8a7745",
736*724ba675SRob Herring				     "renesas,rcar-gen2-scifa", "renesas,scifa";
737*724ba675SRob Herring			reg = <0 0xe6c78000 0 0x40>;
738*724ba675SRob Herring			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
739*724ba675SRob Herring			clocks = <&cpg CPG_MOD 1107>;
740*724ba675SRob Herring			clock-names = "fck";
741*724ba675SRob Herring			dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
742*724ba675SRob Herring			       <&dmac1 0x1f>, <&dmac1 0x20>;
743*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
744*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
745*724ba675SRob Herring			resets = <&cpg 1107>;
746*724ba675SRob Herring			status = "disabled";
747*724ba675SRob Herring		};
748*724ba675SRob Herring
749*724ba675SRob Herring		scifa5: serial@e6c80000 {
750*724ba675SRob Herring			compatible = "renesas,scifa-r8a7745",
751*724ba675SRob Herring				     "renesas,rcar-gen2-scifa", "renesas,scifa";
752*724ba675SRob Herring			reg = <0 0xe6c80000 0 0x40>;
753*724ba675SRob Herring			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
754*724ba675SRob Herring			clocks = <&cpg CPG_MOD 1108>;
755*724ba675SRob Herring			clock-names = "fck";
756*724ba675SRob Herring			dmas = <&dmac0 0x23>, <&dmac0 0x24>,
757*724ba675SRob Herring			       <&dmac1 0x23>, <&dmac1 0x24>;
758*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
759*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
760*724ba675SRob Herring			resets = <&cpg 1108>;
761*724ba675SRob Herring			status = "disabled";
762*724ba675SRob Herring		};
763*724ba675SRob Herring
764*724ba675SRob Herring		scifb0: serial@e6c20000 {
765*724ba675SRob Herring			compatible = "renesas,scifb-r8a7745",
766*724ba675SRob Herring				     "renesas,rcar-gen2-scifb", "renesas,scifb";
767*724ba675SRob Herring			reg = <0 0xe6c20000 0 0x100>;
768*724ba675SRob Herring			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
769*724ba675SRob Herring			clocks = <&cpg CPG_MOD 206>;
770*724ba675SRob Herring			clock-names = "fck";
771*724ba675SRob Herring			dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
772*724ba675SRob Herring			       <&dmac1 0x3d>, <&dmac1 0x3e>;
773*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
774*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
775*724ba675SRob Herring			resets = <&cpg 206>;
776*724ba675SRob Herring			status = "disabled";
777*724ba675SRob Herring		};
778*724ba675SRob Herring
779*724ba675SRob Herring		scifb1: serial@e6c30000 {
780*724ba675SRob Herring			compatible = "renesas,scifb-r8a7745",
781*724ba675SRob Herring				     "renesas,rcar-gen2-scifb", "renesas,scifb";
782*724ba675SRob Herring			reg = <0 0xe6c30000 0 0x100>;
783*724ba675SRob Herring			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
784*724ba675SRob Herring			clocks = <&cpg CPG_MOD 207>;
785*724ba675SRob Herring			clock-names = "fck";
786*724ba675SRob Herring			dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
787*724ba675SRob Herring			       <&dmac1 0x19>, <&dmac1 0x1a>;
788*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
789*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
790*724ba675SRob Herring			resets = <&cpg 207>;
791*724ba675SRob Herring			status = "disabled";
792*724ba675SRob Herring		};
793*724ba675SRob Herring
794*724ba675SRob Herring		scifb2: serial@e6ce0000 {
795*724ba675SRob Herring			compatible = "renesas,scifb-r8a7745",
796*724ba675SRob Herring				     "renesas,rcar-gen2-scifb", "renesas,scifb";
797*724ba675SRob Herring			reg = <0 0xe6ce0000 0 0x100>;
798*724ba675SRob Herring			interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
799*724ba675SRob Herring			clocks = <&cpg CPG_MOD 216>;
800*724ba675SRob Herring			clock-names = "fck";
801*724ba675SRob Herring			dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
802*724ba675SRob Herring			       <&dmac1 0x1d>, <&dmac1 0x1e>;
803*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
804*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
805*724ba675SRob Herring			resets = <&cpg 216>;
806*724ba675SRob Herring			status = "disabled";
807*724ba675SRob Herring		};
808*724ba675SRob Herring
809*724ba675SRob Herring		scif0: serial@e6e60000 {
810*724ba675SRob Herring			compatible = "renesas,scif-r8a7745",
811*724ba675SRob Herring				     "renesas,rcar-gen2-scif", "renesas,scif";
812*724ba675SRob Herring			reg = <0 0xe6e60000 0 0x40>;
813*724ba675SRob Herring			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
814*724ba675SRob Herring			clocks = <&cpg CPG_MOD 721>,
815*724ba675SRob Herring				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
816*724ba675SRob Herring			clock-names = "fck", "brg_int", "scif_clk";
817*724ba675SRob Herring			dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
818*724ba675SRob Herring			       <&dmac1 0x29>, <&dmac1 0x2a>;
819*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
820*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
821*724ba675SRob Herring			resets = <&cpg 721>;
822*724ba675SRob Herring			status = "disabled";
823*724ba675SRob Herring		};
824*724ba675SRob Herring
825*724ba675SRob Herring		scif1: serial@e6e68000 {
826*724ba675SRob Herring			compatible = "renesas,scif-r8a7745",
827*724ba675SRob Herring				     "renesas,rcar-gen2-scif", "renesas,scif";
828*724ba675SRob Herring			reg = <0 0xe6e68000 0 0x40>;
829*724ba675SRob Herring			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
830*724ba675SRob Herring			clocks = <&cpg CPG_MOD 720>,
831*724ba675SRob Herring				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
832*724ba675SRob Herring			clock-names = "fck", "brg_int", "scif_clk";
833*724ba675SRob Herring			dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
834*724ba675SRob Herring			       <&dmac1 0x2d>, <&dmac1 0x2e>;
835*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
836*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
837*724ba675SRob Herring			resets = <&cpg 720>;
838*724ba675SRob Herring			status = "disabled";
839*724ba675SRob Herring		};
840*724ba675SRob Herring
841*724ba675SRob Herring		scif2: serial@e6e58000 {
842*724ba675SRob Herring			compatible = "renesas,scif-r8a7745",
843*724ba675SRob Herring				     "renesas,rcar-gen2-scif", "renesas,scif";
844*724ba675SRob Herring			reg = <0 0xe6e58000 0 0x40>;
845*724ba675SRob Herring			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
846*724ba675SRob Herring			clocks = <&cpg CPG_MOD 719>,
847*724ba675SRob Herring				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
848*724ba675SRob Herring			clock-names = "fck", "brg_int", "scif_clk";
849*724ba675SRob Herring			dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
850*724ba675SRob Herring			       <&dmac1 0x2b>, <&dmac1 0x2c>;
851*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
852*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
853*724ba675SRob Herring			resets = <&cpg 719>;
854*724ba675SRob Herring			status = "disabled";
855*724ba675SRob Herring		};
856*724ba675SRob Herring
857*724ba675SRob Herring		scif3: serial@e6ea8000 {
858*724ba675SRob Herring			compatible = "renesas,scif-r8a7745",
859*724ba675SRob Herring				     "renesas,rcar-gen2-scif", "renesas,scif";
860*724ba675SRob Herring			reg = <0 0xe6ea8000 0 0x40>;
861*724ba675SRob Herring			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
862*724ba675SRob Herring			clocks = <&cpg CPG_MOD 718>,
863*724ba675SRob Herring				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
864*724ba675SRob Herring			clock-names = "fck", "brg_int", "scif_clk";
865*724ba675SRob Herring			dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
866*724ba675SRob Herring			       <&dmac1 0x2f>, <&dmac1 0x30>;
867*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
868*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
869*724ba675SRob Herring			resets = <&cpg 718>;
870*724ba675SRob Herring			status = "disabled";
871*724ba675SRob Herring		};
872*724ba675SRob Herring
873*724ba675SRob Herring		scif4: serial@e6ee0000 {
874*724ba675SRob Herring			compatible = "renesas,scif-r8a7745",
875*724ba675SRob Herring				     "renesas,rcar-gen2-scif", "renesas,scif";
876*724ba675SRob Herring			reg = <0 0xe6ee0000 0 0x40>;
877*724ba675SRob Herring			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
878*724ba675SRob Herring			clocks = <&cpg CPG_MOD 715>,
879*724ba675SRob Herring				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
880*724ba675SRob Herring			clock-names = "fck", "brg_int", "scif_clk";
881*724ba675SRob Herring			dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
882*724ba675SRob Herring			       <&dmac1 0xfb>, <&dmac1 0xfc>;
883*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
884*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
885*724ba675SRob Herring			resets = <&cpg 715>;
886*724ba675SRob Herring			status = "disabled";
887*724ba675SRob Herring		};
888*724ba675SRob Herring
889*724ba675SRob Herring		scif5: serial@e6ee8000 {
890*724ba675SRob Herring			compatible = "renesas,scif-r8a7745",
891*724ba675SRob Herring				     "renesas,rcar-gen2-scif", "renesas,scif";
892*724ba675SRob Herring			reg = <0 0xe6ee8000 0 0x40>;
893*724ba675SRob Herring			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
894*724ba675SRob Herring			clocks = <&cpg CPG_MOD 714>,
895*724ba675SRob Herring				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
896*724ba675SRob Herring			clock-names = "fck", "brg_int", "scif_clk";
897*724ba675SRob Herring			dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
898*724ba675SRob Herring			       <&dmac1 0xfd>, <&dmac1 0xfe>;
899*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
900*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
901*724ba675SRob Herring			resets = <&cpg 714>;
902*724ba675SRob Herring			status = "disabled";
903*724ba675SRob Herring		};
904*724ba675SRob Herring
905*724ba675SRob Herring		hscif0: serial@e62c0000 {
906*724ba675SRob Herring			compatible = "renesas,hscif-r8a7745",
907*724ba675SRob Herring				     "renesas,rcar-gen2-hscif", "renesas,hscif";
908*724ba675SRob Herring			reg = <0 0xe62c0000 0 0x60>;
909*724ba675SRob Herring			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
910*724ba675SRob Herring			clocks = <&cpg CPG_MOD 717>,
911*724ba675SRob Herring				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
912*724ba675SRob Herring			clock-names = "fck", "brg_int", "scif_clk";
913*724ba675SRob Herring			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
914*724ba675SRob Herring			       <&dmac1 0x39>, <&dmac1 0x3a>;
915*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
916*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
917*724ba675SRob Herring			resets = <&cpg 717>;
918*724ba675SRob Herring			status = "disabled";
919*724ba675SRob Herring		};
920*724ba675SRob Herring
921*724ba675SRob Herring		hscif1: serial@e62c8000 {
922*724ba675SRob Herring			compatible = "renesas,hscif-r8a7745",
923*724ba675SRob Herring				     "renesas,rcar-gen2-hscif", "renesas,hscif";
924*724ba675SRob Herring			reg = <0 0xe62c8000 0 0x60>;
925*724ba675SRob Herring			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
926*724ba675SRob Herring			clocks = <&cpg CPG_MOD 716>,
927*724ba675SRob Herring				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
928*724ba675SRob Herring			clock-names = "fck", "brg_int", "scif_clk";
929*724ba675SRob Herring			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
930*724ba675SRob Herring			       <&dmac1 0x4d>, <&dmac1 0x4e>;
931*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
932*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
933*724ba675SRob Herring			resets = <&cpg 716>;
934*724ba675SRob Herring			status = "disabled";
935*724ba675SRob Herring		};
936*724ba675SRob Herring
937*724ba675SRob Herring		hscif2: serial@e62d0000 {
938*724ba675SRob Herring			compatible = "renesas,hscif-r8a7745",
939*724ba675SRob Herring				     "renesas,rcar-gen2-hscif", "renesas,hscif";
940*724ba675SRob Herring			reg = <0 0xe62d0000 0 0x60>;
941*724ba675SRob Herring			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
942*724ba675SRob Herring			clocks = <&cpg CPG_MOD 713>,
943*724ba675SRob Herring				 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
944*724ba675SRob Herring			clock-names = "fck", "brg_int", "scif_clk";
945*724ba675SRob Herring			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
946*724ba675SRob Herring			       <&dmac1 0x3b>, <&dmac1 0x3c>;
947*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
948*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
949*724ba675SRob Herring			resets = <&cpg 713>;
950*724ba675SRob Herring			status = "disabled";
951*724ba675SRob Herring		};
952*724ba675SRob Herring
953*724ba675SRob Herring		msiof0: spi@e6e20000 {
954*724ba675SRob Herring			compatible = "renesas,msiof-r8a7745",
955*724ba675SRob Herring				     "renesas,rcar-gen2-msiof";
956*724ba675SRob Herring			reg = <0 0xe6e20000 0 0x0064>;
957*724ba675SRob Herring			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
958*724ba675SRob Herring			clocks = <&cpg CPG_MOD 000>;
959*724ba675SRob Herring			dmas = <&dmac0 0x51>, <&dmac0 0x52>,
960*724ba675SRob Herring			       <&dmac1 0x51>, <&dmac1 0x52>;
961*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
962*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
963*724ba675SRob Herring			#address-cells = <1>;
964*724ba675SRob Herring			#size-cells = <0>;
965*724ba675SRob Herring			resets = <&cpg 000>;
966*724ba675SRob Herring			status = "disabled";
967*724ba675SRob Herring		};
968*724ba675SRob Herring
969*724ba675SRob Herring		msiof1: spi@e6e10000 {
970*724ba675SRob Herring			compatible = "renesas,msiof-r8a7745",
971*724ba675SRob Herring				     "renesas,rcar-gen2-msiof";
972*724ba675SRob Herring			reg = <0 0xe6e10000 0 0x0064>;
973*724ba675SRob Herring			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
974*724ba675SRob Herring			clocks = <&cpg CPG_MOD 208>;
975*724ba675SRob Herring			dmas = <&dmac0 0x55>, <&dmac0 0x56>,
976*724ba675SRob Herring			       <&dmac1 0x55>, <&dmac1 0x56>;
977*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
978*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
979*724ba675SRob Herring			#address-cells = <1>;
980*724ba675SRob Herring			#size-cells = <0>;
981*724ba675SRob Herring			resets = <&cpg 208>;
982*724ba675SRob Herring			status = "disabled";
983*724ba675SRob Herring		};
984*724ba675SRob Herring
985*724ba675SRob Herring		msiof2: spi@e6e00000 {
986*724ba675SRob Herring			compatible = "renesas,msiof-r8a7745",
987*724ba675SRob Herring				     "renesas,rcar-gen2-msiof";
988*724ba675SRob Herring			reg = <0 0xe6e00000 0 0x0064>;
989*724ba675SRob Herring			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
990*724ba675SRob Herring			clocks = <&cpg CPG_MOD 205>;
991*724ba675SRob Herring			dmas = <&dmac0 0x41>, <&dmac0 0x42>,
992*724ba675SRob Herring			       <&dmac1 0x41>, <&dmac1 0x42>;
993*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
994*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
995*724ba675SRob Herring			#address-cells = <1>;
996*724ba675SRob Herring			#size-cells = <0>;
997*724ba675SRob Herring			resets = <&cpg 205>;
998*724ba675SRob Herring			status = "disabled";
999*724ba675SRob Herring		};
1000*724ba675SRob Herring
1001*724ba675SRob Herring		pwm0: pwm@e6e30000 {
1002*724ba675SRob Herring			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1003*724ba675SRob Herring			reg = <0 0xe6e30000 0 0x8>;
1004*724ba675SRob Herring			clocks = <&cpg CPG_MOD 523>;
1005*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1006*724ba675SRob Herring			resets = <&cpg 523>;
1007*724ba675SRob Herring			#pwm-cells = <2>;
1008*724ba675SRob Herring			status = "disabled";
1009*724ba675SRob Herring		};
1010*724ba675SRob Herring
1011*724ba675SRob Herring		pwm1: pwm@e6e31000 {
1012*724ba675SRob Herring			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1013*724ba675SRob Herring			reg = <0 0xe6e31000 0 0x8>;
1014*724ba675SRob Herring			clocks = <&cpg CPG_MOD 523>;
1015*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1016*724ba675SRob Herring			resets = <&cpg 523>;
1017*724ba675SRob Herring			#pwm-cells = <2>;
1018*724ba675SRob Herring			status = "disabled";
1019*724ba675SRob Herring		};
1020*724ba675SRob Herring
1021*724ba675SRob Herring		pwm2: pwm@e6e32000 {
1022*724ba675SRob Herring			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1023*724ba675SRob Herring			reg = <0 0xe6e32000 0 0x8>;
1024*724ba675SRob Herring			clocks = <&cpg CPG_MOD 523>;
1025*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1026*724ba675SRob Herring			resets = <&cpg 523>;
1027*724ba675SRob Herring			#pwm-cells = <2>;
1028*724ba675SRob Herring			status = "disabled";
1029*724ba675SRob Herring		};
1030*724ba675SRob Herring
1031*724ba675SRob Herring		pwm3: pwm@e6e33000 {
1032*724ba675SRob Herring			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1033*724ba675SRob Herring			reg = <0 0xe6e33000 0 0x8>;
1034*724ba675SRob Herring			clocks = <&cpg CPG_MOD 523>;
1035*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1036*724ba675SRob Herring			resets = <&cpg 523>;
1037*724ba675SRob Herring			#pwm-cells = <2>;
1038*724ba675SRob Herring			status = "disabled";
1039*724ba675SRob Herring		};
1040*724ba675SRob Herring
1041*724ba675SRob Herring		pwm4: pwm@e6e34000 {
1042*724ba675SRob Herring			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1043*724ba675SRob Herring			reg = <0 0xe6e34000 0 0x8>;
1044*724ba675SRob Herring			clocks = <&cpg CPG_MOD 523>;
1045*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1046*724ba675SRob Herring			resets = <&cpg 523>;
1047*724ba675SRob Herring			#pwm-cells = <2>;
1048*724ba675SRob Herring			status = "disabled";
1049*724ba675SRob Herring		};
1050*724ba675SRob Herring
1051*724ba675SRob Herring		pwm5: pwm@e6e35000 {
1052*724ba675SRob Herring			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1053*724ba675SRob Herring			reg = <0 0xe6e35000 0 0x8>;
1054*724ba675SRob Herring			clocks = <&cpg CPG_MOD 523>;
1055*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1056*724ba675SRob Herring			resets = <&cpg 523>;
1057*724ba675SRob Herring			#pwm-cells = <2>;
1058*724ba675SRob Herring			status = "disabled";
1059*724ba675SRob Herring		};
1060*724ba675SRob Herring
1061*724ba675SRob Herring		pwm6: pwm@e6e36000 {
1062*724ba675SRob Herring			compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
1063*724ba675SRob Herring			reg = <0 0xe6e36000 0 0x8>;
1064*724ba675SRob Herring			clocks = <&cpg CPG_MOD 523>;
1065*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1066*724ba675SRob Herring			resets = <&cpg 523>;
1067*724ba675SRob Herring			#pwm-cells = <2>;
1068*724ba675SRob Herring			status = "disabled";
1069*724ba675SRob Herring		};
1070*724ba675SRob Herring
1071*724ba675SRob Herring		can0: can@e6e80000 {
1072*724ba675SRob Herring			compatible = "renesas,can-r8a7745",
1073*724ba675SRob Herring				     "renesas,rcar-gen2-can";
1074*724ba675SRob Herring			reg = <0 0xe6e80000 0 0x1000>;
1075*724ba675SRob Herring			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1076*724ba675SRob Herring			clocks = <&cpg CPG_MOD 916>,
1077*724ba675SRob Herring				 <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1078*724ba675SRob Herring				 <&can_clk>;
1079*724ba675SRob Herring			clock-names = "clkp1", "clkp2", "can_clk";
1080*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1081*724ba675SRob Herring			resets = <&cpg 916>;
1082*724ba675SRob Herring			status = "disabled";
1083*724ba675SRob Herring		};
1084*724ba675SRob Herring
1085*724ba675SRob Herring		can1: can@e6e88000 {
1086*724ba675SRob Herring			compatible = "renesas,can-r8a7745",
1087*724ba675SRob Herring				     "renesas,rcar-gen2-can";
1088*724ba675SRob Herring			reg = <0 0xe6e88000 0 0x1000>;
1089*724ba675SRob Herring			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1090*724ba675SRob Herring			clocks = <&cpg CPG_MOD 915>,
1091*724ba675SRob Herring				 <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1092*724ba675SRob Herring				 <&can_clk>;
1093*724ba675SRob Herring			clock-names = "clkp1", "clkp2", "can_clk";
1094*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1095*724ba675SRob Herring			resets = <&cpg 915>;
1096*724ba675SRob Herring			status = "disabled";
1097*724ba675SRob Herring		};
1098*724ba675SRob Herring
1099*724ba675SRob Herring		vin0: video@e6ef0000 {
1100*724ba675SRob Herring			compatible = "renesas,vin-r8a7745",
1101*724ba675SRob Herring				     "renesas,rcar-gen2-vin";
1102*724ba675SRob Herring			reg = <0 0xe6ef0000 0 0x1000>;
1103*724ba675SRob Herring			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1104*724ba675SRob Herring			clocks = <&cpg CPG_MOD 811>;
1105*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1106*724ba675SRob Herring			resets = <&cpg 811>;
1107*724ba675SRob Herring			status = "disabled";
1108*724ba675SRob Herring		};
1109*724ba675SRob Herring
1110*724ba675SRob Herring		vin1: video@e6ef1000 {
1111*724ba675SRob Herring			compatible = "renesas,vin-r8a7745",
1112*724ba675SRob Herring				     "renesas,rcar-gen2-vin";
1113*724ba675SRob Herring			reg = <0 0xe6ef1000 0 0x1000>;
1114*724ba675SRob Herring			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1115*724ba675SRob Herring			clocks = <&cpg CPG_MOD 810>;
1116*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1117*724ba675SRob Herring			resets = <&cpg 810>;
1118*724ba675SRob Herring			status = "disabled";
1119*724ba675SRob Herring		};
1120*724ba675SRob Herring
1121*724ba675SRob Herring		rcar_sound: sound@ec500000 {
1122*724ba675SRob Herring			/*
1123*724ba675SRob Herring			 * #sound-dai-cells is required if simple-card
1124*724ba675SRob Herring			 *
1125*724ba675SRob Herring			 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1126*724ba675SRob Herring			 * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1127*724ba675SRob Herring			 */
1128*724ba675SRob Herring			compatible = "renesas,rcar_sound-r8a7745",
1129*724ba675SRob Herring				     "renesas,rcar_sound-gen2";
1130*724ba675SRob Herring			reg = <0 0xec500000 0 0x1000>, /* SCU */
1131*724ba675SRob Herring			      <0 0xec5a0000 0 0x100>,  /* ADG */
1132*724ba675SRob Herring			      <0 0xec540000 0 0x1000>, /* SSIU */
1133*724ba675SRob Herring			      <0 0xec541000 0 0x280>,  /* SSI */
1134*724ba675SRob Herring			      <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
1135*724ba675SRob Herring			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1136*724ba675SRob Herring
1137*724ba675SRob Herring			clocks = <&cpg CPG_MOD 1005>,
1138*724ba675SRob Herring				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1139*724ba675SRob Herring				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1140*724ba675SRob Herring				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1141*724ba675SRob Herring				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1142*724ba675SRob Herring				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1143*724ba675SRob Herring				 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
1144*724ba675SRob Herring				 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
1145*724ba675SRob Herring				 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
1146*724ba675SRob Herring				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1147*724ba675SRob Herring				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1148*724ba675SRob Herring				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1149*724ba675SRob Herring				 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
1150*724ba675SRob Herring				 <&cpg CPG_CORE R8A7745_CLK_M2>;
1151*724ba675SRob Herring			clock-names = "ssi-all",
1152*724ba675SRob Herring				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1153*724ba675SRob Herring				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1154*724ba675SRob Herring				      "ssi.1", "ssi.0",
1155*724ba675SRob Herring				      "src.6", "src.5", "src.4", "src.3",
1156*724ba675SRob Herring				      "src.2", "src.1",
1157*724ba675SRob Herring				      "ctu.0", "ctu.1",
1158*724ba675SRob Herring				      "mix.0", "mix.1",
1159*724ba675SRob Herring				      "dvc.0", "dvc.1",
1160*724ba675SRob Herring				      "clk_a", "clk_b", "clk_c", "clk_i";
1161*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1162*724ba675SRob Herring			resets = <&cpg 1005>,
1163*724ba675SRob Herring				 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>,
1164*724ba675SRob Herring				 <&cpg 1009>, <&cpg 1010>, <&cpg 1011>,
1165*724ba675SRob Herring				 <&cpg 1012>, <&cpg 1013>, <&cpg 1014>,
1166*724ba675SRob Herring				 <&cpg 1015>;
1167*724ba675SRob Herring			reset-names = "ssi-all",
1168*724ba675SRob Herring				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1169*724ba675SRob Herring				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1170*724ba675SRob Herring				      "ssi.1", "ssi.0";
1171*724ba675SRob Herring
1172*724ba675SRob Herring			status = "disabled";
1173*724ba675SRob Herring
1174*724ba675SRob Herring			rcar_sound,dvc {
1175*724ba675SRob Herring				dvc0: dvc-0 {
1176*724ba675SRob Herring					dmas = <&audma0 0xbc>;
1177*724ba675SRob Herring					dma-names = "tx";
1178*724ba675SRob Herring				};
1179*724ba675SRob Herring				dvc1: dvc-1 {
1180*724ba675SRob Herring					dmas = <&audma0 0xbe>;
1181*724ba675SRob Herring					dma-names = "tx";
1182*724ba675SRob Herring				};
1183*724ba675SRob Herring			};
1184*724ba675SRob Herring
1185*724ba675SRob Herring			rcar_sound,mix {
1186*724ba675SRob Herring				mix0: mix-0 { };
1187*724ba675SRob Herring				mix1: mix-1 { };
1188*724ba675SRob Herring			};
1189*724ba675SRob Herring
1190*724ba675SRob Herring			rcar_sound,ctu {
1191*724ba675SRob Herring				ctu00: ctu-0 { };
1192*724ba675SRob Herring				ctu01: ctu-1 { };
1193*724ba675SRob Herring				ctu02: ctu-2 { };
1194*724ba675SRob Herring				ctu03: ctu-3 { };
1195*724ba675SRob Herring				ctu10: ctu-4 { };
1196*724ba675SRob Herring				ctu11: ctu-5 { };
1197*724ba675SRob Herring				ctu12: ctu-6 { };
1198*724ba675SRob Herring				ctu13: ctu-7 { };
1199*724ba675SRob Herring			};
1200*724ba675SRob Herring
1201*724ba675SRob Herring			rcar_sound,src {
1202*724ba675SRob Herring				src-0 {
1203*724ba675SRob Herring					status = "disabled";
1204*724ba675SRob Herring				};
1205*724ba675SRob Herring				src1: src-1 {
1206*724ba675SRob Herring					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1207*724ba675SRob Herring					dmas = <&audma0 0x87>, <&audma0 0x9c>;
1208*724ba675SRob Herring					dma-names = "rx", "tx";
1209*724ba675SRob Herring				};
1210*724ba675SRob Herring				src2: src-2 {
1211*724ba675SRob Herring					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1212*724ba675SRob Herring					dmas = <&audma0 0x89>, <&audma0 0x9e>;
1213*724ba675SRob Herring					dma-names = "rx", "tx";
1214*724ba675SRob Herring				};
1215*724ba675SRob Herring				src3: src-3 {
1216*724ba675SRob Herring					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1217*724ba675SRob Herring					dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1218*724ba675SRob Herring					dma-names = "rx", "tx";
1219*724ba675SRob Herring				};
1220*724ba675SRob Herring				src4: src-4 {
1221*724ba675SRob Herring					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1222*724ba675SRob Herring					dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1223*724ba675SRob Herring					dma-names = "rx", "tx";
1224*724ba675SRob Herring				};
1225*724ba675SRob Herring				src5: src-5 {
1226*724ba675SRob Herring					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1227*724ba675SRob Herring					dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1228*724ba675SRob Herring					dma-names = "rx", "tx";
1229*724ba675SRob Herring				};
1230*724ba675SRob Herring				src6: src-6 {
1231*724ba675SRob Herring					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1232*724ba675SRob Herring					dmas = <&audma0 0x91>, <&audma0 0xb4>;
1233*724ba675SRob Herring					dma-names = "rx", "tx";
1234*724ba675SRob Herring				};
1235*724ba675SRob Herring			};
1236*724ba675SRob Herring
1237*724ba675SRob Herring			rcar_sound,ssi {
1238*724ba675SRob Herring				ssi0: ssi-0 {
1239*724ba675SRob Herring					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1240*724ba675SRob Herring					dmas = <&audma0 0x01>, <&audma0 0x02>,
1241*724ba675SRob Herring					       <&audma0 0x15>, <&audma0 0x16>;
1242*724ba675SRob Herring					dma-names = "rx", "tx", "rxu", "txu";
1243*724ba675SRob Herring				};
1244*724ba675SRob Herring				ssi1: ssi-1 {
1245*724ba675SRob Herring					interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1246*724ba675SRob Herring					dmas = <&audma0 0x03>, <&audma0 0x04>,
1247*724ba675SRob Herring					       <&audma0 0x49>, <&audma0 0x4a>;
1248*724ba675SRob Herring					dma-names = "rx", "tx", "rxu", "txu";
1249*724ba675SRob Herring				};
1250*724ba675SRob Herring				ssi2: ssi-2 {
1251*724ba675SRob Herring					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1252*724ba675SRob Herring					dmas = <&audma0 0x05>, <&audma0 0x06>,
1253*724ba675SRob Herring					       <&audma0 0x63>, <&audma0 0x64>;
1254*724ba675SRob Herring					dma-names = "rx", "tx", "rxu", "txu";
1255*724ba675SRob Herring				};
1256*724ba675SRob Herring				ssi3: ssi-3 {
1257*724ba675SRob Herring					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1258*724ba675SRob Herring					dmas = <&audma0 0x07>, <&audma0 0x08>,
1259*724ba675SRob Herring					       <&audma0 0x6f>, <&audma0 0x70>;
1260*724ba675SRob Herring					dma-names = "rx", "tx", "rxu", "txu";
1261*724ba675SRob Herring				};
1262*724ba675SRob Herring				ssi4: ssi-4 {
1263*724ba675SRob Herring					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1264*724ba675SRob Herring					dmas = <&audma0 0x09>, <&audma0 0x0a>,
1265*724ba675SRob Herring					       <&audma0 0x71>, <&audma0 0x72>;
1266*724ba675SRob Herring					dma-names = "rx", "tx", "rxu", "txu";
1267*724ba675SRob Herring				};
1268*724ba675SRob Herring				ssi5: ssi-5 {
1269*724ba675SRob Herring					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1270*724ba675SRob Herring					dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1271*724ba675SRob Herring					       <&audma0 0x73>, <&audma0 0x74>;
1272*724ba675SRob Herring					dma-names = "rx", "tx", "rxu", "txu";
1273*724ba675SRob Herring				};
1274*724ba675SRob Herring				ssi6: ssi-6 {
1275*724ba675SRob Herring					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1276*724ba675SRob Herring					dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1277*724ba675SRob Herring					       <&audma0 0x75>, <&audma0 0x76>;
1278*724ba675SRob Herring					dma-names = "rx", "tx", "rxu", "txu";
1279*724ba675SRob Herring				};
1280*724ba675SRob Herring				ssi7: ssi-7 {
1281*724ba675SRob Herring					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1282*724ba675SRob Herring					dmas = <&audma0 0x0f>, <&audma0 0x10>,
1283*724ba675SRob Herring					       <&audma0 0x79>, <&audma0 0x7a>;
1284*724ba675SRob Herring					dma-names = "rx", "tx", "rxu", "txu";
1285*724ba675SRob Herring				};
1286*724ba675SRob Herring				ssi8: ssi-8 {
1287*724ba675SRob Herring					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1288*724ba675SRob Herring					dmas = <&audma0 0x11>, <&audma0 0x12>,
1289*724ba675SRob Herring					       <&audma0 0x7b>, <&audma0 0x7c>;
1290*724ba675SRob Herring					dma-names = "rx", "tx", "rxu", "txu";
1291*724ba675SRob Herring				};
1292*724ba675SRob Herring				ssi9: ssi-9 {
1293*724ba675SRob Herring					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1294*724ba675SRob Herring					dmas = <&audma0 0x13>, <&audma0 0x14>,
1295*724ba675SRob Herring					       <&audma0 0x7d>, <&audma0 0x7e>;
1296*724ba675SRob Herring					dma-names = "rx", "tx", "rxu", "txu";
1297*724ba675SRob Herring				};
1298*724ba675SRob Herring			};
1299*724ba675SRob Herring		};
1300*724ba675SRob Herring
1301*724ba675SRob Herring		audma0: dma-controller@ec700000 {
1302*724ba675SRob Herring			compatible = "renesas,dmac-r8a7745",
1303*724ba675SRob Herring				     "renesas,rcar-dmac";
1304*724ba675SRob Herring			reg = <0 0xec700000 0 0x10000>;
1305*724ba675SRob Herring			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1306*724ba675SRob Herring				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1307*724ba675SRob Herring				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1308*724ba675SRob Herring				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1309*724ba675SRob Herring				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1310*724ba675SRob Herring				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1311*724ba675SRob Herring				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1312*724ba675SRob Herring				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1313*724ba675SRob Herring				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1314*724ba675SRob Herring				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1315*724ba675SRob Herring				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1316*724ba675SRob Herring				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1317*724ba675SRob Herring				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1318*724ba675SRob Herring				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1319*724ba675SRob Herring			interrupt-names = "error",
1320*724ba675SRob Herring					  "ch0", "ch1", "ch2", "ch3",
1321*724ba675SRob Herring					  "ch4", "ch5", "ch6", "ch7",
1322*724ba675SRob Herring					  "ch8", "ch9", "ch10", "ch11",
1323*724ba675SRob Herring					  "ch12";
1324*724ba675SRob Herring			clocks = <&cpg CPG_MOD 502>;
1325*724ba675SRob Herring			clock-names = "fck";
1326*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1327*724ba675SRob Herring			resets = <&cpg 502>;
1328*724ba675SRob Herring			#dma-cells = <1>;
1329*724ba675SRob Herring			dma-channels = <13>;
1330*724ba675SRob Herring		};
1331*724ba675SRob Herring
1332*724ba675SRob Herring		pci0: pci@ee090000 {
1333*724ba675SRob Herring			compatible = "renesas,pci-r8a7745",
1334*724ba675SRob Herring				     "renesas,pci-rcar-gen2";
1335*724ba675SRob Herring			device_type = "pci";
1336*724ba675SRob Herring			reg = <0 0xee090000 0 0xc00>,
1337*724ba675SRob Herring			      <0 0xee080000 0 0x1100>;
1338*724ba675SRob Herring			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1339*724ba675SRob Herring			clocks = <&cpg CPG_MOD 703>;
1340*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1341*724ba675SRob Herring			resets = <&cpg 703>;
1342*724ba675SRob Herring			status = "disabled";
1343*724ba675SRob Herring
1344*724ba675SRob Herring			bus-range = <0 0>;
1345*724ba675SRob Herring			#address-cells = <3>;
1346*724ba675SRob Herring			#size-cells = <2>;
1347*724ba675SRob Herring			#interrupt-cells = <1>;
1348*724ba675SRob Herring			ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1349*724ba675SRob Herring			interrupt-map-mask = <0xf800 0 0 0x7>;
1350*724ba675SRob Herring			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1351*724ba675SRob Herring					<0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1352*724ba675SRob Herring					<0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1353*724ba675SRob Herring
1354*724ba675SRob Herring			usb@1,0 {
1355*724ba675SRob Herring				reg = <0x800 0 0 0 0>;
1356*724ba675SRob Herring				phys = <&usb0 0>;
1357*724ba675SRob Herring				phy-names = "usb";
1358*724ba675SRob Herring			};
1359*724ba675SRob Herring
1360*724ba675SRob Herring			usb@2,0 {
1361*724ba675SRob Herring				reg = <0x1000 0 0 0 0>;
1362*724ba675SRob Herring				phys = <&usb0 0>;
1363*724ba675SRob Herring				phy-names = "usb";
1364*724ba675SRob Herring			};
1365*724ba675SRob Herring		};
1366*724ba675SRob Herring
1367*724ba675SRob Herring		pci1: pci@ee0d0000 {
1368*724ba675SRob Herring			compatible = "renesas,pci-r8a7745",
1369*724ba675SRob Herring				     "renesas,pci-rcar-gen2";
1370*724ba675SRob Herring			device_type = "pci";
1371*724ba675SRob Herring			reg = <0 0xee0d0000 0 0xc00>,
1372*724ba675SRob Herring			      <0 0xee0c0000 0 0x1100>;
1373*724ba675SRob Herring			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1374*724ba675SRob Herring			clocks = <&cpg CPG_MOD 703>;
1375*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1376*724ba675SRob Herring			resets = <&cpg 703>;
1377*724ba675SRob Herring			status = "disabled";
1378*724ba675SRob Herring
1379*724ba675SRob Herring			bus-range = <1 1>;
1380*724ba675SRob Herring			#address-cells = <3>;
1381*724ba675SRob Herring			#size-cells = <2>;
1382*724ba675SRob Herring			#interrupt-cells = <1>;
1383*724ba675SRob Herring			ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1384*724ba675SRob Herring			interrupt-map-mask = <0xf800 0 0 0x7>;
1385*724ba675SRob Herring			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1386*724ba675SRob Herring					<0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1387*724ba675SRob Herring					<0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1388*724ba675SRob Herring
1389*724ba675SRob Herring			usb@1,0 {
1390*724ba675SRob Herring				reg = <0x10800 0 0 0 0>;
1391*724ba675SRob Herring				phys = <&usb2 0>;
1392*724ba675SRob Herring				phy-names = "usb";
1393*724ba675SRob Herring			};
1394*724ba675SRob Herring
1395*724ba675SRob Herring			usb@2,0 {
1396*724ba675SRob Herring				reg = <0x11000 0 0 0 0>;
1397*724ba675SRob Herring				phys = <&usb2 0>;
1398*724ba675SRob Herring				phy-names = "usb";
1399*724ba675SRob Herring			};
1400*724ba675SRob Herring		};
1401*724ba675SRob Herring
1402*724ba675SRob Herring		sdhi0: mmc@ee100000 {
1403*724ba675SRob Herring			compatible = "renesas,sdhi-r8a7745",
1404*724ba675SRob Herring				     "renesas,rcar-gen2-sdhi";
1405*724ba675SRob Herring			reg = <0 0xee100000 0 0x328>;
1406*724ba675SRob Herring			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1407*724ba675SRob Herring			clocks = <&cpg CPG_MOD 314>;
1408*724ba675SRob Herring			dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1409*724ba675SRob Herring			       <&dmac1 0xcd>, <&dmac1 0xce>;
1410*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
1411*724ba675SRob Herring			max-frequency = <195000000>;
1412*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1413*724ba675SRob Herring			resets = <&cpg 314>;
1414*724ba675SRob Herring			status = "disabled";
1415*724ba675SRob Herring		};
1416*724ba675SRob Herring
1417*724ba675SRob Herring		sdhi1: mmc@ee140000 {
1418*724ba675SRob Herring			compatible = "renesas,sdhi-r8a7745",
1419*724ba675SRob Herring				     "renesas,rcar-gen2-sdhi";
1420*724ba675SRob Herring			reg = <0 0xee140000 0 0x100>;
1421*724ba675SRob Herring			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1422*724ba675SRob Herring			clocks = <&cpg CPG_MOD 312>;
1423*724ba675SRob Herring			dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1424*724ba675SRob Herring			       <&dmac1 0xc1>, <&dmac1 0xc2>;
1425*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
1426*724ba675SRob Herring			max-frequency = <97500000>;
1427*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1428*724ba675SRob Herring			resets = <&cpg 312>;
1429*724ba675SRob Herring			status = "disabled";
1430*724ba675SRob Herring		};
1431*724ba675SRob Herring
1432*724ba675SRob Herring		sdhi2: mmc@ee160000 {
1433*724ba675SRob Herring			compatible = "renesas,sdhi-r8a7745",
1434*724ba675SRob Herring				     "renesas,rcar-gen2-sdhi";
1435*724ba675SRob Herring			reg = <0 0xee160000 0 0x100>;
1436*724ba675SRob Herring			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1437*724ba675SRob Herring			clocks = <&cpg CPG_MOD 311>;
1438*724ba675SRob Herring			dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1439*724ba675SRob Herring			       <&dmac1 0xd3>, <&dmac1 0xd4>;
1440*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
1441*724ba675SRob Herring			max-frequency = <97500000>;
1442*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1443*724ba675SRob Herring			resets = <&cpg 311>;
1444*724ba675SRob Herring			status = "disabled";
1445*724ba675SRob Herring		};
1446*724ba675SRob Herring
1447*724ba675SRob Herring		mmcif0: mmc@ee200000 {
1448*724ba675SRob Herring			compatible = "renesas,mmcif-r8a7745",
1449*724ba675SRob Herring				     "renesas,sh-mmcif";
1450*724ba675SRob Herring			reg = <0 0xee200000 0 0x80>;
1451*724ba675SRob Herring			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1452*724ba675SRob Herring			clocks = <&cpg CPG_MOD 315>;
1453*724ba675SRob Herring			dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1454*724ba675SRob Herring			       <&dmac1 0xd1>, <&dmac1 0xd2>;
1455*724ba675SRob Herring			dma-names = "tx", "rx", "tx", "rx";
1456*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1457*724ba675SRob Herring			resets = <&cpg 315>;
1458*724ba675SRob Herring			reg-io-width = <4>;
1459*724ba675SRob Herring			max-frequency = <97500000>;
1460*724ba675SRob Herring			status = "disabled";
1461*724ba675SRob Herring		};
1462*724ba675SRob Herring
1463*724ba675SRob Herring		ether: ethernet@ee700000 {
1464*724ba675SRob Herring			compatible = "renesas,ether-r8a7745",
1465*724ba675SRob Herring				     "renesas,rcar-gen2-ether";
1466*724ba675SRob Herring			reg = <0 0xee700000 0 0x400>;
1467*724ba675SRob Herring			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1468*724ba675SRob Herring			clocks = <&cpg CPG_MOD 813>;
1469*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1470*724ba675SRob Herring			resets = <&cpg 813>;
1471*724ba675SRob Herring			phy-mode = "rmii";
1472*724ba675SRob Herring			#address-cells = <1>;
1473*724ba675SRob Herring			#size-cells = <0>;
1474*724ba675SRob Herring			status = "disabled";
1475*724ba675SRob Herring		};
1476*724ba675SRob Herring
1477*724ba675SRob Herring		gic: interrupt-controller@f1001000 {
1478*724ba675SRob Herring			compatible = "arm,gic-400";
1479*724ba675SRob Herring			#interrupt-cells = <3>;
1480*724ba675SRob Herring			#address-cells = <0>;
1481*724ba675SRob Herring			interrupt-controller;
1482*724ba675SRob Herring			reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1483*724ba675SRob Herring			      <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1484*724ba675SRob Herring			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1485*724ba675SRob Herring			clocks = <&cpg CPG_MOD 408>;
1486*724ba675SRob Herring			clock-names = "clk";
1487*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1488*724ba675SRob Herring			resets = <&cpg 408>;
1489*724ba675SRob Herring		};
1490*724ba675SRob Herring
1491*724ba675SRob Herring		vsp@fe928000 {
1492*724ba675SRob Herring			compatible = "renesas,vsp1";
1493*724ba675SRob Herring			reg = <0 0xfe928000 0 0x8000>;
1494*724ba675SRob Herring			interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1495*724ba675SRob Herring			clocks = <&cpg CPG_MOD 131>;
1496*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1497*724ba675SRob Herring			resets = <&cpg 131>;
1498*724ba675SRob Herring		};
1499*724ba675SRob Herring
1500*724ba675SRob Herring		vsp@fe930000 {
1501*724ba675SRob Herring			compatible = "renesas,vsp1";
1502*724ba675SRob Herring			reg = <0 0xfe930000 0 0x8000>;
1503*724ba675SRob Herring			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1504*724ba675SRob Herring			clocks = <&cpg CPG_MOD 128>;
1505*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1506*724ba675SRob Herring			resets = <&cpg 128>;
1507*724ba675SRob Herring		};
1508*724ba675SRob Herring
1509*724ba675SRob Herring		du: display@feb00000 {
1510*724ba675SRob Herring			compatible = "renesas,du-r8a7745";
1511*724ba675SRob Herring			reg = <0 0xfeb00000 0 0x40000>;
1512*724ba675SRob Herring			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1513*724ba675SRob Herring				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1514*724ba675SRob Herring			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1515*724ba675SRob Herring			clock-names = "du.0", "du.1";
1516*724ba675SRob Herring			resets = <&cpg 724>;
1517*724ba675SRob Herring			reset-names = "du.0";
1518*724ba675SRob Herring			status = "disabled";
1519*724ba675SRob Herring
1520*724ba675SRob Herring			ports {
1521*724ba675SRob Herring				#address-cells = <1>;
1522*724ba675SRob Herring				#size-cells = <0>;
1523*724ba675SRob Herring
1524*724ba675SRob Herring				port@0 {
1525*724ba675SRob Herring					reg = <0>;
1526*724ba675SRob Herring					du_out_rgb0: endpoint {
1527*724ba675SRob Herring					};
1528*724ba675SRob Herring				};
1529*724ba675SRob Herring				port@1 {
1530*724ba675SRob Herring					reg = <1>;
1531*724ba675SRob Herring					du_out_rgb1: endpoint {
1532*724ba675SRob Herring					};
1533*724ba675SRob Herring				};
1534*724ba675SRob Herring			};
1535*724ba675SRob Herring		};
1536*724ba675SRob Herring
1537*724ba675SRob Herring		prr: chipid@ff000044 {
1538*724ba675SRob Herring			compatible = "renesas,prr";
1539*724ba675SRob Herring			reg = <0 0xff000044 0 4>;
1540*724ba675SRob Herring		};
1541*724ba675SRob Herring
1542*724ba675SRob Herring		cmt0: timer@ffca0000 {
1543*724ba675SRob Herring			compatible = "renesas,r8a7745-cmt0",
1544*724ba675SRob Herring				     "renesas,rcar-gen2-cmt0";
1545*724ba675SRob Herring			reg = <0 0xffca0000 0 0x1004>;
1546*724ba675SRob Herring			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1547*724ba675SRob Herring				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1548*724ba675SRob Herring			clocks = <&cpg CPG_MOD 124>;
1549*724ba675SRob Herring			clock-names = "fck";
1550*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1551*724ba675SRob Herring			resets = <&cpg 124>;
1552*724ba675SRob Herring			status = "disabled";
1553*724ba675SRob Herring		};
1554*724ba675SRob Herring
1555*724ba675SRob Herring		cmt1: timer@e6130000 {
1556*724ba675SRob Herring			compatible = "renesas,r8a7745-cmt1",
1557*724ba675SRob Herring				     "renesas,rcar-gen2-cmt1";
1558*724ba675SRob Herring			reg = <0 0xe6130000 0 0x1004>;
1559*724ba675SRob Herring			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1560*724ba675SRob Herring				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1561*724ba675SRob Herring				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1562*724ba675SRob Herring				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1563*724ba675SRob Herring				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1564*724ba675SRob Herring				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1565*724ba675SRob Herring				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1566*724ba675SRob Herring				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1567*724ba675SRob Herring			clocks = <&cpg CPG_MOD 329>;
1568*724ba675SRob Herring			clock-names = "fck";
1569*724ba675SRob Herring			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1570*724ba675SRob Herring			resets = <&cpg 329>;
1571*724ba675SRob Herring			status = "disabled";
1572*724ba675SRob Herring		};
1573*724ba675SRob Herring	};
1574*724ba675SRob Herring
1575*724ba675SRob Herring	timer {
1576*724ba675SRob Herring		compatible = "arm,armv7-timer";
1577*724ba675SRob Herring		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1578*724ba675SRob Herring				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1579*724ba675SRob Herring				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1580*724ba675SRob Herring				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1581*724ba675SRob Herring	};
1582*724ba675SRob Herring
1583*724ba675SRob Herring	/* External USB clock - can be overridden by the board */
1584*724ba675SRob Herring	usb_extal_clk: usb_extal {
1585*724ba675SRob Herring		compatible = "fixed-clock";
1586*724ba675SRob Herring		#clock-cells = <0>;
1587*724ba675SRob Herring		clock-frequency = <48000000>;
1588*724ba675SRob Herring	};
1589*724ba675SRob Herring};
1590