1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree Source for the iWave RZ/G1H Qseven SOM
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (C) 2020 Renesas Electronics Corp.
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herring#include "r8a7742.dtsi"
9*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
10*724ba675SRob Herring
11*724ba675SRob Herring/ {
12*724ba675SRob Herring	compatible = "iwave,g21m", "renesas,r8a7742";
13*724ba675SRob Herring
14*724ba675SRob Herring	memory@40000000 {
15*724ba675SRob Herring		device_type = "memory";
16*724ba675SRob Herring		reg = <0 0x40000000 0 0x40000000>;
17*724ba675SRob Herring	};
18*724ba675SRob Herring
19*724ba675SRob Herring	memory@200000000 {
20*724ba675SRob Herring		device_type = "memory";
21*724ba675SRob Herring		reg = <2 0x00000000 0 0x40000000>;
22*724ba675SRob Herring	};
23*724ba675SRob Herring
24*724ba675SRob Herring	reg_3p3v: 3p3v {
25*724ba675SRob Herring		compatible = "regulator-fixed";
26*724ba675SRob Herring		regulator-name = "3P3V";
27*724ba675SRob Herring		regulator-min-microvolt = <3300000>;
28*724ba675SRob Herring		regulator-max-microvolt = <3300000>;
29*724ba675SRob Herring		regulator-always-on;
30*724ba675SRob Herring		regulator-boot-on;
31*724ba675SRob Herring	};
32*724ba675SRob Herring};
33*724ba675SRob Herring
34*724ba675SRob Herring&extal_clk {
35*724ba675SRob Herring	clock-frequency = <20000000>;
36*724ba675SRob Herring};
37*724ba675SRob Herring
38*724ba675SRob Herring&gpio0 {
39*724ba675SRob Herring	/* GP0_18 set low to select QSPI. Doing so will disable VIN2 */
40*724ba675SRob Herring	qspi-en-hog {
41*724ba675SRob Herring		gpio-hog;
42*724ba675SRob Herring		gpios = <18 GPIO_ACTIVE_HIGH>;
43*724ba675SRob Herring		output-low;
44*724ba675SRob Herring		line-name = "QSPI_EN";
45*724ba675SRob Herring	};
46*724ba675SRob Herring};
47*724ba675SRob Herring
48*724ba675SRob Herring&i2c0 {
49*724ba675SRob Herring	pinctrl-0 = <&i2c0_pins>;
50*724ba675SRob Herring	pinctrl-names = "default";
51*724ba675SRob Herring
52*724ba675SRob Herring	status = "okay";
53*724ba675SRob Herring	clock-frequency = <400000>;
54*724ba675SRob Herring
55*724ba675SRob Herring	rtc@68 {
56*724ba675SRob Herring		compatible = "ti,bq32000";
57*724ba675SRob Herring		reg = <0x68>;
58*724ba675SRob Herring		interrupt-parent = <&gpio1>;
59*724ba675SRob Herring		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
60*724ba675SRob Herring	};
61*724ba675SRob Herring};
62*724ba675SRob Herring
63*724ba675SRob Herring&mmcif1 {
64*724ba675SRob Herring	pinctrl-0 = <&mmc1_pins>;
65*724ba675SRob Herring	pinctrl-names = "default";
66*724ba675SRob Herring
67*724ba675SRob Herring	vmmc-supply = <&reg_3p3v>;
68*724ba675SRob Herring	bus-width = <4>;
69*724ba675SRob Herring	non-removable;
70*724ba675SRob Herring	status = "okay";
71*724ba675SRob Herring};
72*724ba675SRob Herring
73*724ba675SRob Herring&pfc {
74*724ba675SRob Herring	i2c0_pins: i2c0 {
75*724ba675SRob Herring		groups = "i2c0";
76*724ba675SRob Herring		function = "i2c0";
77*724ba675SRob Herring	};
78*724ba675SRob Herring
79*724ba675SRob Herring	mmc1_pins: mmc1 {
80*724ba675SRob Herring		groups = "mmc1_data4", "mmc1_ctrl";
81*724ba675SRob Herring		function = "mmc1";
82*724ba675SRob Herring	};
83*724ba675SRob Herring
84*724ba675SRob Herring	qspi_pins: qspi {
85*724ba675SRob Herring		groups = "qspi_ctrl", "qspi_data2";
86*724ba675SRob Herring		function = "qspi";
87*724ba675SRob Herring	};
88*724ba675SRob Herring};
89*724ba675SRob Herring
90*724ba675SRob Herring&qspi {
91*724ba675SRob Herring	pinctrl-0 = <&qspi_pins>;
92*724ba675SRob Herring	pinctrl-names = "default";
93*724ba675SRob Herring
94*724ba675SRob Herring	status = "okay";
95*724ba675SRob Herring
96*724ba675SRob Herring	flash: flash@0 {
97*724ba675SRob Herring		compatible = "sst,sst25vf016b", "jedec,spi-nor";
98*724ba675SRob Herring		reg = <0>;
99*724ba675SRob Herring		spi-max-frequency = <50000000>;
100*724ba675SRob Herring		m25p,fast-read;
101*724ba675SRob Herring		spi-cpol;
102*724ba675SRob Herring		spi-cpha;
103*724ba675SRob Herring
104*724ba675SRob Herring		partitions {
105*724ba675SRob Herring			compatible = "fixed-partitions";
106*724ba675SRob Herring			#address-cells = <1>;
107*724ba675SRob Herring			#size-cells = <1>;
108*724ba675SRob Herring
109*724ba675SRob Herring			partition@0 {
110*724ba675SRob Herring				label = "bootloader";
111*724ba675SRob Herring				reg = <0x00000000 0x000c0000>;
112*724ba675SRob Herring				read-only;
113*724ba675SRob Herring			};
114*724ba675SRob Herring			partition@c0000 {
115*724ba675SRob Herring				label = "env";
116*724ba675SRob Herring				reg = <0x000c0000 0x00002000>;
117*724ba675SRob Herring			};
118*724ba675SRob Herring			partition@c2000 {
119*724ba675SRob Herring				label = "user";
120*724ba675SRob Herring				reg = <0x000c2000 0x0013e000>;
121*724ba675SRob Herring			};
122*724ba675SRob Herring		};
123*724ba675SRob Herring	};
124*724ba675SRob Herring};
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