1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Device Tree Source for the GR-Peach board 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2017 Jacopo Mondi <jacopo+renesas@jmondi.org> 6*724ba675SRob Herring * Copyright (C) 2016 Renesas Electronics 7*724ba675SRob Herring */ 8*724ba675SRob Herring 9*724ba675SRob Herring/dts-v1/; 10*724ba675SRob Herring#include "r7s72100.dtsi" 11*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 12*724ba675SRob Herring#include <dt-bindings/pinctrl/r7s72100-pinctrl.h> 13*724ba675SRob Herring 14*724ba675SRob Herring/ { 15*724ba675SRob Herring model = "GR-Peach"; 16*724ba675SRob Herring compatible = "renesas,gr-peach", "renesas,r7s72100"; 17*724ba675SRob Herring 18*724ba675SRob Herring aliases { 19*724ba675SRob Herring serial0 = &scif2; 20*724ba675SRob Herring }; 21*724ba675SRob Herring 22*724ba675SRob Herring chosen { 23*724ba675SRob Herring bootargs = "ignore_loglevel rw root=/dev/mtdblock0"; 24*724ba675SRob Herring stdout-path = "serial0:115200n8"; 25*724ba675SRob Herring }; 26*724ba675SRob Herring 27*724ba675SRob Herring memory@20000000 { 28*724ba675SRob Herring device_type = "memory"; 29*724ba675SRob Herring reg = <0x20000000 0x00a00000>; 30*724ba675SRob Herring }; 31*724ba675SRob Herring 32*724ba675SRob Herring lbsc { 33*724ba675SRob Herring #address-cells = <1>; 34*724ba675SRob Herring #size-cells = <1>; 35*724ba675SRob Herring }; 36*724ba675SRob Herring 37*724ba675SRob Herring flash@18000000 { 38*724ba675SRob Herring compatible = "mtd-rom"; 39*724ba675SRob Herring probe-type = "map_rom"; 40*724ba675SRob Herring reg = <0x18000000 0x00800000>; 41*724ba675SRob Herring bank-width = <4>; 42*724ba675SRob Herring device-width = <1>; 43*724ba675SRob Herring 44*724ba675SRob Herring clocks = <&mstp9_clks R7S72100_CLK_SPIBSC0>; 45*724ba675SRob Herring power-domains = <&cpg_clocks>; 46*724ba675SRob Herring 47*724ba675SRob Herring #address-cells = <1>; 48*724ba675SRob Herring #size-cells = <1>; 49*724ba675SRob Herring 50*724ba675SRob Herring rootfs@600000 { 51*724ba675SRob Herring label = "rootfs"; 52*724ba675SRob Herring reg = <0x00600000 0x00200000>; 53*724ba675SRob Herring }; 54*724ba675SRob Herring }; 55*724ba675SRob Herring 56*724ba675SRob Herring leds { 57*724ba675SRob Herring status = "okay"; 58*724ba675SRob Herring compatible = "gpio-leds"; 59*724ba675SRob Herring 60*724ba675SRob Herring led1 { 61*724ba675SRob Herring gpios = <&port6 12 GPIO_ACTIVE_HIGH>; 62*724ba675SRob Herring }; 63*724ba675SRob Herring }; 64*724ba675SRob Herring}; 65*724ba675SRob Herring 66*724ba675SRob Herring&pinctrl { 67*724ba675SRob Herring scif2_pins: serial2 { 68*724ba675SRob Herring /* P6_2 as RxD2; P6_3 as TxD2 */ 69*724ba675SRob Herring pinmux = <RZA1_PINMUX(6, 2, 7)>, <RZA1_PINMUX(6, 3, 7)>; 70*724ba675SRob Herring }; 71*724ba675SRob Herring 72*724ba675SRob Herring ether_pins: ether { 73*724ba675SRob Herring /* Ethernet on Ports 1,3,5,10 */ 74*724ba675SRob Herring pinmux = <RZA1_PINMUX(1, 14, 4)>, /* P1_14 = ET_COL */ 75*724ba675SRob Herring <RZA1_PINMUX(3, 0, 2)>, /* P3_0 = ET_TXCLK */ 76*724ba675SRob Herring <RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */ 77*724ba675SRob Herring <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */ 78*724ba675SRob Herring <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER */ 79*724ba675SRob Herring <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV */ 80*724ba675SRob Herring <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC */ 81*724ba675SRob Herring <RZA1_PINMUX(10, 1, 4)>, /* P10_1 = ET_TXER */ 82*724ba675SRob Herring <RZA1_PINMUX(10, 2, 4)>, /* P10_2 = ET_TXEN */ 83*724ba675SRob Herring <RZA1_PINMUX(10, 3, 4)>, /* P10_3 = ET_CRS */ 84*724ba675SRob Herring <RZA1_PINMUX(10, 4, 4)>, /* P10_4 = ET_TXD0 */ 85*724ba675SRob Herring <RZA1_PINMUX(10, 5, 4)>, /* P10_5 = ET_TXD1 */ 86*724ba675SRob Herring <RZA1_PINMUX(10, 6, 4)>, /* P10_6 = ET_TXD2 */ 87*724ba675SRob Herring <RZA1_PINMUX(10, 7, 4)>, /* P10_7 = ET_TXD3 */ 88*724ba675SRob Herring <RZA1_PINMUX(10, 8, 4)>, /* P10_8 = ET_RXD0 */ 89*724ba675SRob Herring <RZA1_PINMUX(10, 9, 4)>, /* P10_9 = ET_RXD1 */ 90*724ba675SRob Herring <RZA1_PINMUX(10, 10, 4)>,/* P10_10 = ET_RXD2 */ 91*724ba675SRob Herring <RZA1_PINMUX(10, 11, 4)>;/* P10_11 = ET_RXD3 */ 92*724ba675SRob Herring }; 93*724ba675SRob Herring}; 94*724ba675SRob Herring 95*724ba675SRob Herring&extal_clk { 96*724ba675SRob Herring clock-frequency = <13333000>; 97*724ba675SRob Herring}; 98*724ba675SRob Herring 99*724ba675SRob Herring&usb_x1_clk { 100*724ba675SRob Herring clock-frequency = <48000000>; 101*724ba675SRob Herring}; 102*724ba675SRob Herring 103*724ba675SRob Herring&mtu2 { 104*724ba675SRob Herring status = "okay"; 105*724ba675SRob Herring}; 106*724ba675SRob Herring 107*724ba675SRob Herring&ostm0 { 108*724ba675SRob Herring status = "okay"; 109*724ba675SRob Herring}; 110*724ba675SRob Herring 111*724ba675SRob Herring&ostm1 { 112*724ba675SRob Herring status = "okay"; 113*724ba675SRob Herring}; 114*724ba675SRob Herring 115*724ba675SRob Herring&scif2 { 116*724ba675SRob Herring pinctrl-names = "default"; 117*724ba675SRob Herring pinctrl-0 = <&scif2_pins>; 118*724ba675SRob Herring 119*724ba675SRob Herring status = "okay"; 120*724ba675SRob Herring}; 121*724ba675SRob Herring 122*724ba675SRob Herringðer { 123*724ba675SRob Herring pinctrl-names = "default"; 124*724ba675SRob Herring pinctrl-0 = <ðer_pins>; 125*724ba675SRob Herring 126*724ba675SRob Herring status = "okay"; 127*724ba675SRob Herring 128*724ba675SRob Herring renesas,no-ether-link; 129*724ba675SRob Herring phy-handle = <&phy0>; 130*724ba675SRob Herring 131*724ba675SRob Herring phy0: ethernet-phy@0 { 132*724ba675SRob Herring compatible = "ethernet-phy-id0007.c0f0", 133*724ba675SRob Herring "ethernet-phy-ieee802.3-c22"; 134*724ba675SRob Herring reg = <0>; 135*724ba675SRob Herring 136*724ba675SRob Herring reset-gpios = <&port4 2 GPIO_ACTIVE_LOW>; 137*724ba675SRob Herring reset-delay-us = <5>; 138*724ba675SRob Herring }; 139*724ba675SRob Herring}; 140