1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Genmai board 4 * 5 * Copyright (C) 2013-14 Renesas Solutions Corp. 6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com> 7 */ 8 9/dts-v1/; 10#include "r7s72100.dtsi" 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/pinctrl/r7s72100-pinctrl.h> 13 14/ { 15 model = "Genmai"; 16 compatible = "renesas,genmai", "renesas,r7s72100"; 17 18 aliases { 19 serial0 = &scif2; 20 }; 21 22 chosen { 23 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 24 stdout-path = "serial0:115200n8"; 25 }; 26 27 memory@8000000 { 28 device_type = "memory"; 29 reg = <0x08000000 0x08000000>; 30 }; 31 32 lbsc { 33 #address-cells = <1>; 34 #size-cells = <1>; 35 }; 36 37 leds { 38 status = "okay"; 39 compatible = "gpio-leds"; 40 41 led1 { 42 gpios = <&port4 10 GPIO_ACTIVE_LOW>; 43 }; 44 45 led2 { 46 gpios = <&port4 11 GPIO_ACTIVE_LOW>; 47 }; 48 }; 49}; 50 51&pinctrl { 52 53 scif2_pins: serial2 { 54 /* P3_0 as TxD2; P3_2 as RxD2 */ 55 pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>; 56 }; 57 58 i2c2_pins: i2c2 { 59 /* RIIC2: P1_4 as SCL, P1_5 as SDA */ 60 pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>; 61 }; 62 63 ether_pins: ether { 64 /* Ethernet on Ports 1,2,3,5 */ 65 pinmux = <RZA1_PINMUX(1, 14, 4)>,/* P1_14 = ET_COL */ 66 <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC */ 67 <RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */ 68 <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */ 69 <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER */ 70 <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV */ 71 <RZA1_PINMUX(2, 0, 2)>, /* P2_0 = ET_TXCLK */ 72 <RZA1_PINMUX(2, 1, 2)>, /* P2_1 = ET_TXER */ 73 <RZA1_PINMUX(2, 2, 2)>, /* P2_2 = ET_TXEN */ 74 <RZA1_PINMUX(2, 3, 2)>, /* P2_3 = ET_CRS */ 75 <RZA1_PINMUX(2, 4, 2)>, /* P2_4 = ET_TXD0 */ 76 <RZA1_PINMUX(2, 5, 2)>, /* P2_5 = ET_TXD1 */ 77 <RZA1_PINMUX(2, 6, 2)>, /* P2_6 = ET_TXD2 */ 78 <RZA1_PINMUX(2, 7, 2)>, /* P2_7 = ET_TXD3 */ 79 <RZA1_PINMUX(2, 8, 2)>, /* P2_8 = ET_RXD0 */ 80 <RZA1_PINMUX(2, 9, 2)>, /* P2_9 = ET_RXD1 */ 81 <RZA1_PINMUX(2, 10, 2)>,/* P2_10 = ET_RXD2 */ 82 <RZA1_PINMUX(2, 11, 2)>;/* P2_11 = ET_RXD3 */ 83 }; 84}; 85 86&extal_clk { 87 clock-frequency = <13330000>; 88}; 89 90&usb_x1_clk { 91 clock-frequency = <48000000>; 92}; 93 94&rtc_x1_clk { 95 clock-frequency = <32768>; 96}; 97 98&mtu2 { 99 status = "okay"; 100}; 101 102ðer { 103 pinctrl-names = "default"; 104 pinctrl-0 = <ðer_pins>; 105 106 status = "okay"; 107 108 renesas,no-ether-link; 109 phy-handle = <&phy0>; 110 phy0: ethernet-phy@0 { 111 compatible = "ethernet-phy-idb824.2814", 112 "ethernet-phy-ieee802.3-c22"; 113 reg = <0>; 114 }; 115}; 116 117&i2c2 { 118 status = "okay"; 119 clock-frequency = <400000>; 120 121 pinctrl-names = "default"; 122 pinctrl-0 = <&i2c2_pins>; 123 124 eeprom@50 { 125 compatible = "renesas,r1ex24128", "atmel,24c128"; 126 reg = <0x50>; 127 pagesize = <64>; 128 }; 129}; 130 131&rtc { 132 status = "okay"; 133}; 134 135&scif2 { 136 pinctrl-names = "default"; 137 pinctrl-0 = <&scif2_pins>; 138 139 status = "okay"; 140}; 141 142&spi4 { 143 status = "okay"; 144 145 codec: codec@0 { 146 compatible = "wlf,wm8978"; 147 reg = <0>; 148 spi-max-frequency = <5000000>; 149 }; 150}; 151