1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2724ba675SRob Herring/dts-v1/;
3724ba675SRob Herring
4724ba675SRob Herring#include <dt-bindings/input/gpio-keys.h>
5724ba675SRob Herring#include <dt-bindings/input/input.h>
6724ba675SRob Herring#include <dt-bindings/thermal/thermal.h>
7724ba675SRob Herring
8724ba675SRob Herring#include "tegra30.dtsi"
9724ba675SRob Herring#include "tegra30-cpu-opp.dtsi"
10724ba675SRob Herring#include "tegra30-cpu-opp-microvolt.dtsi"
11724ba675SRob Herring
12724ba675SRob Herring/ {
13724ba675SRob Herring	model = "Ouya Game Console";
14724ba675SRob Herring	compatible = "ouya,ouya", "nvidia,tegra30";
15724ba675SRob Herring
16724ba675SRob Herring	aliases {
17724ba675SRob Herring		mmc0 = &sdmmc4; /* eMMC */
18724ba675SRob Herring		mmc1 = &sdmmc3; /* WiFi */
19724ba675SRob Herring		rtc0 = &pmic;
20724ba675SRob Herring		rtc1 = "/rtc@7000e000";
21724ba675SRob Herring		serial0 = &uartd; /* Debug Port */
22724ba675SRob Herring		serial1 = &uartc; /* Bluetooth */
23724ba675SRob Herring	};
24724ba675SRob Herring
25724ba675SRob Herring	chosen {
26724ba675SRob Herring		stdout-path = "serial0:115200n8";
27724ba675SRob Herring	};
28724ba675SRob Herring
29724ba675SRob Herring	firmware {
30724ba675SRob Herring		trusted-foundations {
31724ba675SRob Herring			compatible = "tlm,trusted-foundations";
32724ba675SRob Herring			tlm,version-major = <0x0>;
33724ba675SRob Herring			tlm,version-minor = <0x0>;
34724ba675SRob Herring		};
35724ba675SRob Herring	};
36724ba675SRob Herring
37724ba675SRob Herring	memory@80000000 {
38724ba675SRob Herring		reg = <0x80000000 0x40000000>;
39724ba675SRob Herring	};
40724ba675SRob Herring
41724ba675SRob Herring	reserved-memory {
42724ba675SRob Herring		#address-cells = <1>;
43724ba675SRob Herring		#size-cells = <1>;
44724ba675SRob Herring		ranges;
45724ba675SRob Herring
46724ba675SRob Herring		linux,cma@80000000 {
47724ba675SRob Herring			compatible = "shared-dma-pool";
48724ba675SRob Herring			alloc-ranges = <0x80000000 0x30000000>;
49724ba675SRob Herring			size = <0x10000000>; /* 256MiB */
50724ba675SRob Herring			linux,cma-default;
51724ba675SRob Herring			reusable;
52724ba675SRob Herring		};
53724ba675SRob Herring
54724ba675SRob Herring		ramoops@bfdf0000 {
55724ba675SRob Herring			compatible = "ramoops";
56724ba675SRob Herring			reg = <0xbfdf0000 0x10000>;	/* 64kB */
57724ba675SRob Herring			console-size = <0x8000>;	/* 32kB */
58724ba675SRob Herring			record-size = <0x400>;		/*  1kB */
59724ba675SRob Herring			ecc-size = <16>;
60724ba675SRob Herring		};
61724ba675SRob Herring
62724ba675SRob Herring		trustzone@bfe00000 {
63724ba675SRob Herring			reg = <0xbfe00000 0x200000>;
64724ba675SRob Herring			no-map;
65724ba675SRob Herring		};
66724ba675SRob Herring	};
67724ba675SRob Herring
68724ba675SRob Herring	host1x@50000000 {
69724ba675SRob Herring		hdmi@54280000 {
70724ba675SRob Herring			status = "okay";
71724ba675SRob Herring			vdd-supply = <&vdd_vid_reg>;
72724ba675SRob Herring			pll-supply = <&ldo7_reg>;
73724ba675SRob Herring			hdmi-supply = <&sys_3v3_reg>;
74724ba675SRob Herring			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
75724ba675SRob Herring			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
76724ba675SRob Herring		};
77724ba675SRob Herring	};
78724ba675SRob Herring
79724ba675SRob Herring	pinmux@70000868 {
80724ba675SRob Herring		pinctrl-names = "default";
81724ba675SRob Herring		pinctrl-0 = <&state_default>;
82724ba675SRob Herring
83724ba675SRob Herring		state_default: pinmux {
84724ba675SRob Herring			clk_32k_out_pa0 {
85724ba675SRob Herring				nvidia,pins = "clk_32k_out_pa0";
86724ba675SRob Herring				nvidia,function = "blink";
87724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
88724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
89724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
90724ba675SRob Herring			};
91724ba675SRob Herring
92724ba675SRob Herring			uart3_cts_n_pa1 {
93724ba675SRob Herring				nvidia,pins = "uart3_cts_n_pa1";
94724ba675SRob Herring				nvidia,function = "uartc";
95724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
96724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
97724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
98724ba675SRob Herring			};
99724ba675SRob Herring
100724ba675SRob Herring			dap2_fs_pa2 {
101724ba675SRob Herring				nvidia,pins = "dap2_fs_pa2";
102724ba675SRob Herring				nvidia,function = "i2s1";
103724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
104724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
105724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
106724ba675SRob Herring			};
107724ba675SRob Herring
108724ba675SRob Herring			dap2_sclk_pa3 {
109724ba675SRob Herring				nvidia,pins = "dap2_sclk_pa3";
110724ba675SRob Herring				nvidia,function = "i2s1";
111724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
112724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
113724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
114724ba675SRob Herring			};
115724ba675SRob Herring
116724ba675SRob Herring			dap2_din_pa4 {
117724ba675SRob Herring				nvidia,pins = "dap2_din_pa4";
118724ba675SRob Herring				nvidia,function = "i2s1";
119724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
120724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
121724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
122724ba675SRob Herring			};
123724ba675SRob Herring
124724ba675SRob Herring			dap2_dout_pa5 {
125724ba675SRob Herring				nvidia,pins = "dap2_dout_pa5";
126724ba675SRob Herring				nvidia,function = "i2s1";
127724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
128724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
129724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
130724ba675SRob Herring			};
131724ba675SRob Herring
132724ba675SRob Herring			sdmmc3_clk_pa6 {
133724ba675SRob Herring				nvidia,pins = "sdmmc3_clk_pa6";
134724ba675SRob Herring				nvidia,function = "sdmmc3";
135724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
136724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
137724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
138724ba675SRob Herring			};
139724ba675SRob Herring
140724ba675SRob Herring			sdmmc3_cmd_pa7 {
141724ba675SRob Herring				nvidia,pins = "sdmmc3_cmd_pa7";
142724ba675SRob Herring				nvidia,function = "sdmmc3";
143724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
144724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
145724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
146724ba675SRob Herring			};
147724ba675SRob Herring
148724ba675SRob Herring			gmi_a17_pb0 {
149724ba675SRob Herring				nvidia,pins = "gmi_a17_pb0";
150724ba675SRob Herring				nvidia,function = "spi4";
151724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
152724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
153724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
154724ba675SRob Herring			};
155724ba675SRob Herring
156724ba675SRob Herring			gmi_a18_pb1 {
157724ba675SRob Herring				nvidia,pins = "gmi_a18_pb1";
158724ba675SRob Herring				nvidia,function = "spi4";
159724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
160724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
161724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
162724ba675SRob Herring			};
163724ba675SRob Herring
164724ba675SRob Herring			lcd_pwr0_pb2 {
165724ba675SRob Herring				nvidia,pins = "lcd_pwr0_pb2";
166724ba675SRob Herring				nvidia,function = "displaya";
167724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
168724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
169724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
170724ba675SRob Herring			};
171724ba675SRob Herring
172724ba675SRob Herring			lcd_pclk_pb3 {
173724ba675SRob Herring				nvidia,pins = "lcd_pclk_pb3";
174724ba675SRob Herring				nvidia,function = "displaya";
175724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
176724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
177724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
178724ba675SRob Herring			};
179724ba675SRob Herring
180724ba675SRob Herring			sdmmc3_dat3_pb4 {
181724ba675SRob Herring				nvidia,pins = "sdmmc3_dat3_pb4";
182724ba675SRob Herring				nvidia,function = "sdmmc3";
183724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
184724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
185724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
186724ba675SRob Herring			};
187724ba675SRob Herring
188724ba675SRob Herring			sdmmc3_dat2_pb5 {
189724ba675SRob Herring				nvidia,pins = "sdmmc3_dat2_pb5";
190724ba675SRob Herring				nvidia,function = "sdmmc3";
191724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
192724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
193724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
194724ba675SRob Herring			};
195724ba675SRob Herring
196724ba675SRob Herring			sdmmc3_dat1_pb6 {
197724ba675SRob Herring				nvidia,pins = "sdmmc3_dat1_pb6";
198724ba675SRob Herring				nvidia,function = "sdmmc3";
199724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
200724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
201724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
202724ba675SRob Herring			};
203724ba675SRob Herring
204724ba675SRob Herring			sdmmc3_dat0_pb7 {
205724ba675SRob Herring				nvidia,pins = "sdmmc3_dat0_pb7";
206724ba675SRob Herring				nvidia,function = "sdmmc3";
207724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
208724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
209724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
210724ba675SRob Herring			};
211724ba675SRob Herring
212724ba675SRob Herring			uart3_rts_n_pc0 {
213724ba675SRob Herring				nvidia,pins = "uart3_rts_n_pc0";
214724ba675SRob Herring				nvidia,function = "uartc";
215724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
216724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
217724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
218724ba675SRob Herring			};
219724ba675SRob Herring
220724ba675SRob Herring			lcd_pwr1_pc1 {
221724ba675SRob Herring				nvidia,pins = "lcd_pwr1_pc1";
222724ba675SRob Herring				nvidia,function = "displaya";
223724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
224724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
225724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
226724ba675SRob Herring			};
227724ba675SRob Herring
228724ba675SRob Herring			uart2_txd_pc2 {
229724ba675SRob Herring				nvidia,pins = "uart2_txd_pc2";
230724ba675SRob Herring				nvidia,function = "uartb";
231724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
232724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
233724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
234724ba675SRob Herring			};
235724ba675SRob Herring
236724ba675SRob Herring			uart2_rxd_pc3 {
237724ba675SRob Herring				nvidia,pins = "uart2_rxd_pc3";
238724ba675SRob Herring				nvidia,function = "uartb";
239724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
240724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
241724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
242724ba675SRob Herring			};
243724ba675SRob Herring
244724ba675SRob Herring			gen1_i2c_scl_pc4 {
245724ba675SRob Herring				nvidia,pins = "gen1_i2c_scl_pc4";
246724ba675SRob Herring				nvidia,function = "i2c1";
247724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
248724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
249724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
250724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
251724ba675SRob Herring			};
252724ba675SRob Herring
253724ba675SRob Herring			gen1_i2c_sda_pc5 {
254724ba675SRob Herring				nvidia,pins = "gen1_i2c_sda_pc5";
255724ba675SRob Herring				nvidia,function = "i2c1";
256724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
257724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
258724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
259724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
260724ba675SRob Herring			};
261724ba675SRob Herring
262724ba675SRob Herring			lcd_pwr2_pc6 {
263724ba675SRob Herring				nvidia,pins = "lcd_pwr2_pc6";
264724ba675SRob Herring				nvidia,function = "displaya";
265724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
266724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
267724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
268724ba675SRob Herring			};
269724ba675SRob Herring
270724ba675SRob Herring			gmi_wp_n_pc7 {
271724ba675SRob Herring				nvidia,pins = "gmi_wp_n_pc7";
272724ba675SRob Herring				nvidia,function = "gmi";
273724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
274724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
275724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
276724ba675SRob Herring			};
277724ba675SRob Herring
278724ba675SRob Herring			sdmmc3_dat5_pd0 {
279724ba675SRob Herring				nvidia,pins = "sdmmc3_dat5_pd0";
280724ba675SRob Herring				nvidia,function = "sdmmc3";
281724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
282724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
283724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
284724ba675SRob Herring			};
285724ba675SRob Herring
286724ba675SRob Herring			sdmmc3_dat4_pd1 {
287724ba675SRob Herring				nvidia,pins = "sdmmc3_dat4_pd1";
288724ba675SRob Herring				nvidia,function = "sdmmc3";
289724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
290724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
291724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
292724ba675SRob Herring			};
293724ba675SRob Herring
294724ba675SRob Herring			lcd_dc1_pd2 {
295724ba675SRob Herring				nvidia,pins = "lcd_dc1_pd2";
296724ba675SRob Herring				nvidia,function = "displaya";
297724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
298724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
299724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
300724ba675SRob Herring			};
301724ba675SRob Herring
302724ba675SRob Herring			sdmmc3_dat6_pd3 {
303724ba675SRob Herring				nvidia,pins = "sdmmc3_dat6_pd3";
304724ba675SRob Herring				nvidia,function = "spi4";
305724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
306724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
307724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
308724ba675SRob Herring			};
309724ba675SRob Herring
310724ba675SRob Herring			sdmmc3_dat7_pd4 {
311724ba675SRob Herring				nvidia,pins = "sdmmc3_dat7_pd4";
312724ba675SRob Herring				nvidia,function = "spi4";
313724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
314724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
315724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
316724ba675SRob Herring			};
317724ba675SRob Herring
318724ba675SRob Herring			vi_d1_pd5 {
319724ba675SRob Herring				nvidia,pins = "vi_d1_pd5";
320724ba675SRob Herring				nvidia,function = "sdmmc2";
321724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
322724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
323724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
324724ba675SRob Herring			};
325724ba675SRob Herring
326724ba675SRob Herring			vi_vsync_pd6 {
327724ba675SRob Herring				nvidia,pins = "vi_vsync_pd6";
328724ba675SRob Herring				nvidia,function = "ddr";
329724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
330724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
331724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
332724ba675SRob Herring			};
333724ba675SRob Herring
334724ba675SRob Herring			vi_hsync_pd7 {
335724ba675SRob Herring				nvidia,pins = "vi_hsync_pd7";
336724ba675SRob Herring				nvidia,function = "ddr";
337724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
338724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
339724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
340724ba675SRob Herring			};
341724ba675SRob Herring
342724ba675SRob Herring			lcd_d0_pe0 {
343724ba675SRob Herring				nvidia,pins = "lcd_d0_pe0";
344724ba675SRob Herring				nvidia,function = "displaya";
345724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
346724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
347724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
348724ba675SRob Herring			};
349724ba675SRob Herring
350724ba675SRob Herring			lcd_d1_pe1 {
351724ba675SRob Herring				nvidia,pins = "lcd_d1_pe1";
352724ba675SRob Herring				nvidia,function = "displaya";
353724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
354724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
355724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
356724ba675SRob Herring			};
357724ba675SRob Herring
358724ba675SRob Herring			lcd_d2_pe2 {
359724ba675SRob Herring				nvidia,pins = "lcd_d2_pe2";
360724ba675SRob Herring				nvidia,function = "displaya";
361724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
362724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
363724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
364724ba675SRob Herring			};
365724ba675SRob Herring
366724ba675SRob Herring			lcd_d3_pe3 {
367724ba675SRob Herring				nvidia,pins = "lcd_d3_pe3";
368724ba675SRob Herring				nvidia,function = "displaya";
369724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
370724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
371724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
372724ba675SRob Herring			};
373724ba675SRob Herring
374724ba675SRob Herring			lcd_d4_pe4 {
375724ba675SRob Herring				nvidia,pins = "lcd_d4_pe4";
376724ba675SRob Herring				nvidia,function = "displaya";
377724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
378724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
379724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
380724ba675SRob Herring			};
381724ba675SRob Herring
382724ba675SRob Herring			lcd_d5_pe5 {
383724ba675SRob Herring				nvidia,pins = "lcd_d5_pe5";
384724ba675SRob Herring				nvidia,function = "displaya";
385724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
386724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
387724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
388724ba675SRob Herring			};
389724ba675SRob Herring
390724ba675SRob Herring			lcd_d6_pe6 {
391724ba675SRob Herring				nvidia,pins = "lcd_d6_pe6";
392724ba675SRob Herring				nvidia,function = "displaya";
393724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
394724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
395724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
396724ba675SRob Herring			};
397724ba675SRob Herring
398724ba675SRob Herring			lcd_d7_pe7 {
399724ba675SRob Herring				nvidia,pins = "lcd_d7_pe7";
400724ba675SRob Herring				nvidia,function = "displaya";
401724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
402724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
403724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
404724ba675SRob Herring			};
405724ba675SRob Herring
406724ba675SRob Herring			lcd_d8_pf0 {
407724ba675SRob Herring				nvidia,pins = "lcd_d8_pf0";
408724ba675SRob Herring				nvidia,function = "displaya";
409724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
410724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
411724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
412724ba675SRob Herring			};
413724ba675SRob Herring
414724ba675SRob Herring			lcd_d9_pf1 {
415724ba675SRob Herring				nvidia,pins = "lcd_d9_pf1";
416724ba675SRob Herring				nvidia,function = "displaya";
417724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
418724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
419724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
420724ba675SRob Herring			};
421724ba675SRob Herring
422724ba675SRob Herring			lcd_d10_pf2 {
423724ba675SRob Herring				nvidia,pins = "lcd_d10_pf2";
424724ba675SRob Herring				nvidia,function = "displaya";
425724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
426724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
427724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
428724ba675SRob Herring			};
429724ba675SRob Herring
430724ba675SRob Herring			lcd_d11_pf3 {
431724ba675SRob Herring				nvidia,pins = "lcd_d11_pf3";
432724ba675SRob Herring				nvidia,function = "displaya";
433724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
434724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
435724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
436724ba675SRob Herring			};
437724ba675SRob Herring
438724ba675SRob Herring			lcd_d12_pf4 {
439724ba675SRob Herring				nvidia,pins = "lcd_d12_pf4";
440724ba675SRob Herring				nvidia,function = "displaya";
441724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
442724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
443724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
444724ba675SRob Herring			};
445724ba675SRob Herring
446724ba675SRob Herring			lcd_d13_pf5 {
447724ba675SRob Herring				nvidia,pins = "lcd_d13_pf5";
448724ba675SRob Herring				nvidia,function = "displaya";
449724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
450724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
451724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
452724ba675SRob Herring			};
453724ba675SRob Herring
454724ba675SRob Herring			lcd_d14_pf6 {
455724ba675SRob Herring				nvidia,pins = "lcd_d14_pf6";
456724ba675SRob Herring				nvidia,function = "displaya";
457724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
458724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
459724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
460724ba675SRob Herring			};
461724ba675SRob Herring
462724ba675SRob Herring			lcd_d15_pf7 {
463724ba675SRob Herring				nvidia,pins = "lcd_d15_pf7";
464724ba675SRob Herring				nvidia,function = "displaya";
465724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
466724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
467724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
468724ba675SRob Herring			};
469724ba675SRob Herring
470724ba675SRob Herring			gmi_ad0_pg0 {
471724ba675SRob Herring				nvidia,pins = "gmi_ad0_pg0";
472724ba675SRob Herring				nvidia,function = "nand";
473724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
474724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
475724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
476724ba675SRob Herring			};
477724ba675SRob Herring
478724ba675SRob Herring			gmi_ad1_pg1 {
479724ba675SRob Herring				nvidia,pins = "gmi_ad1_pg1";
480724ba675SRob Herring				nvidia,function = "nand";
481724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
482724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
483724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
484724ba675SRob Herring			};
485724ba675SRob Herring
486724ba675SRob Herring			gmi_ad2_pg2 {
487724ba675SRob Herring				nvidia,pins = "gmi_ad2_pg2";
488724ba675SRob Herring				nvidia,function = "nand";
489724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
490724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
491724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
492724ba675SRob Herring			};
493724ba675SRob Herring
494724ba675SRob Herring			gmi_ad3_pg3 {
495724ba675SRob Herring				nvidia,pins = "gmi_ad3_pg3";
496724ba675SRob Herring				nvidia,function = "nand";
497724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
498724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
499724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
500724ba675SRob Herring			};
501724ba675SRob Herring
502724ba675SRob Herring			gmi_ad4_pg4 {
503724ba675SRob Herring				nvidia,pins = "gmi_ad4_pg4";
504724ba675SRob Herring				nvidia,function = "nand";
505724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
506724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
507724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
508724ba675SRob Herring			};
509724ba675SRob Herring
510724ba675SRob Herring			gmi_ad5_pg5 {
511724ba675SRob Herring				nvidia,pins = "gmi_ad5_pg5";
512724ba675SRob Herring				nvidia,function = "nand";
513724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
514724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
515724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
516724ba675SRob Herring			};
517724ba675SRob Herring
518724ba675SRob Herring			gmi_ad6_pg6 {
519724ba675SRob Herring				nvidia,pins = "gmi_ad6_pg6";
520724ba675SRob Herring				nvidia,function = "nand";
521724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
522724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
523724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
524724ba675SRob Herring			};
525724ba675SRob Herring
526724ba675SRob Herring			gmi_ad7_pg7 {
527724ba675SRob Herring				nvidia,pins = "gmi_ad7_pg7";
528724ba675SRob Herring				nvidia,function = "nand";
529724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
530724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
531724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
532724ba675SRob Herring			};
533724ba675SRob Herring
534724ba675SRob Herring			gmi_ad8_ph0 {
535724ba675SRob Herring				nvidia,pins = "gmi_ad8_ph0";
536724ba675SRob Herring				nvidia,function = "pwm0";
537724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
538724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
539724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
540724ba675SRob Herring			};
541724ba675SRob Herring
542724ba675SRob Herring			gmi_ad9_ph1 {
543724ba675SRob Herring				nvidia,pins = "gmi_ad9_ph1";
544724ba675SRob Herring				nvidia,function = "pwm1";
545724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
546724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
547724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
548724ba675SRob Herring			};
549724ba675SRob Herring
550724ba675SRob Herring			gmi_ad10_ph2 {
551724ba675SRob Herring				nvidia,pins = "gmi_ad10_ph2";
552724ba675SRob Herring				nvidia,function = "pwm2";
553724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
554724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
555724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
556724ba675SRob Herring			};
557724ba675SRob Herring
558724ba675SRob Herring			gmi_ad11_ph3 {
559724ba675SRob Herring				nvidia,pins = "gmi_ad11_ph3";
560724ba675SRob Herring				nvidia,function = "nand";
561724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
562724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
563724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
564724ba675SRob Herring			};
565724ba675SRob Herring
566724ba675SRob Herring			gmi_ad12_ph4 {
567724ba675SRob Herring				nvidia,pins = "gmi_ad12_ph4";
568724ba675SRob Herring				nvidia,function = "nand";
569724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
570724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
571724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
572724ba675SRob Herring			};
573724ba675SRob Herring
574724ba675SRob Herring			gmi_ad13_ph5 {
575724ba675SRob Herring				nvidia,pins = "gmi_ad13_ph5";
576724ba675SRob Herring				nvidia,function = "nand";
577724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
578724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
579724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
580724ba675SRob Herring			};
581724ba675SRob Herring
582724ba675SRob Herring			gmi_ad14_ph6 {
583724ba675SRob Herring				nvidia,pins = "gmi_ad14_ph6";
584724ba675SRob Herring				nvidia,function = "nand";
585724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
586724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
587724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
588724ba675SRob Herring			};
589724ba675SRob Herring
590724ba675SRob Herring			gmi_wr_n_pi0 {
591724ba675SRob Herring				nvidia,pins = "gmi_wr_n_pi0";
592724ba675SRob Herring				nvidia,function = "nand";
593724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
594724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
595724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
596724ba675SRob Herring			};
597724ba675SRob Herring
598724ba675SRob Herring			gmi_oe_n_pi1 {
599724ba675SRob Herring				nvidia,pins = "gmi_oe_n_pi1";
600724ba675SRob Herring				nvidia,function = "nand";
601724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
602724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
603724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
604724ba675SRob Herring			};
605724ba675SRob Herring
606724ba675SRob Herring			gmi_dqs_pi2 {
607724ba675SRob Herring				nvidia,pins = "gmi_dqs_pi2";
608724ba675SRob Herring				nvidia,function = "nand";
609724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
610724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
611724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
612724ba675SRob Herring			};
613724ba675SRob Herring
614724ba675SRob Herring			gmi_iordy_pi5 {
615724ba675SRob Herring				nvidia,pins = "gmi_iordy_pi5";
616724ba675SRob Herring				nvidia,function = "rsvd1";
617724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
618724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
619724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
620724ba675SRob Herring			};
621724ba675SRob Herring
622724ba675SRob Herring			gmi_cs7_n_pi6 {
623724ba675SRob Herring				nvidia,pins = "gmi_cs7_n_pi6";
624724ba675SRob Herring				nvidia,function = "nand";
625724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
626724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
627724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
628724ba675SRob Herring			};
629724ba675SRob Herring
630724ba675SRob Herring			gmi_wait_pi7 {
631724ba675SRob Herring				nvidia,pins = "gmi_wait_pi7";
632724ba675SRob Herring				nvidia,function = "nand";
633724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
634724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
635724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
636724ba675SRob Herring			};
637724ba675SRob Herring
638724ba675SRob Herring			lcd_de_pj1 {
639724ba675SRob Herring				nvidia,pins = "lcd_de_pj1";
640724ba675SRob Herring				nvidia,function = "displaya";
641724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
642724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
643724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
644724ba675SRob Herring			};
645724ba675SRob Herring
646724ba675SRob Herring			gmi_cs1_n_pj2 {
647724ba675SRob Herring				nvidia,pins = "gmi_cs1_n_pj2";
648724ba675SRob Herring				nvidia,function = "rsvd1";
649724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
650724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
651724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
652724ba675SRob Herring			};
653724ba675SRob Herring
654724ba675SRob Herring			lcd_hsync_pj3 {
655724ba675SRob Herring				nvidia,pins = "lcd_hsync_pj3";
656724ba675SRob Herring				nvidia,function = "displaya";
657724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
658724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
659724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
660724ba675SRob Herring			};
661724ba675SRob Herring
662724ba675SRob Herring			lcd_vsync_pj4 {
663724ba675SRob Herring				nvidia,pins = "lcd_vsync_pj4";
664724ba675SRob Herring				nvidia,function = "displaya";
665724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
666724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
667724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
668724ba675SRob Herring			};
669724ba675SRob Herring
670724ba675SRob Herring			uart2_cts_n_pj5 {
671724ba675SRob Herring				nvidia,pins = "uart2_cts_n_pj5";
672724ba675SRob Herring				nvidia,function = "uartb";
673724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
674724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
675724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
676724ba675SRob Herring			};
677724ba675SRob Herring
678724ba675SRob Herring			uart2_rts_n_pj6 {
679724ba675SRob Herring				nvidia,pins = "uart2_rts_n_pj6";
680724ba675SRob Herring				nvidia,function = "uartb";
681724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
682724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
683724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
684724ba675SRob Herring			};
685724ba675SRob Herring
686724ba675SRob Herring			gmi_a16_pj7 {
687724ba675SRob Herring				nvidia,pins = "gmi_a16_pj7";
688724ba675SRob Herring				nvidia,function = "spi4";
689724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
690724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
691724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
692724ba675SRob Herring			};
693724ba675SRob Herring
694724ba675SRob Herring			gmi_adv_n_pk0 {
695724ba675SRob Herring				nvidia,pins = "gmi_adv_n_pk0";
696724ba675SRob Herring				nvidia,function = "nand";
697724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
698724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
699724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
700724ba675SRob Herring			};
701724ba675SRob Herring
702724ba675SRob Herring			gmi_clk_pk1 {
703724ba675SRob Herring				nvidia,pins = "gmi_clk_pk1";
704724ba675SRob Herring				nvidia,function = "nand";
705724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
706724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
707724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
708724ba675SRob Herring			};
709724ba675SRob Herring
710724ba675SRob Herring			gmi_cs2_n_pk3 {
711724ba675SRob Herring				nvidia,pins = "gmi_cs2_n_pk3";
712724ba675SRob Herring				nvidia,function = "rsvd1";
713724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
714724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
715724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
716724ba675SRob Herring			};
717724ba675SRob Herring
718724ba675SRob Herring			gmi_cs3_n_pk4 {
719724ba675SRob Herring				nvidia,pins = "gmi_cs3_n_pk4";
720724ba675SRob Herring				nvidia,function = "nand";
721724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
722724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
723724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
724724ba675SRob Herring			};
725724ba675SRob Herring
726724ba675SRob Herring			spdif_out_pk5 {
727724ba675SRob Herring				nvidia,pins = "spdif_out_pk5";
728724ba675SRob Herring				nvidia,function = "spdif";
729724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
730724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
731724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
732724ba675SRob Herring			};
733724ba675SRob Herring
734724ba675SRob Herring			spdif_in_pk6 {
735724ba675SRob Herring				nvidia,pins = "spdif_in_pk6";
736724ba675SRob Herring				nvidia,function = "spdif";
737724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
738724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
739724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
740724ba675SRob Herring			};
741724ba675SRob Herring
742724ba675SRob Herring			gmi_a19_pk7 {
743724ba675SRob Herring				nvidia,pins = "gmi_a19_pk7";
744724ba675SRob Herring				nvidia,function = "spi4";
745724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
746724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
747724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
748724ba675SRob Herring			};
749724ba675SRob Herring
750724ba675SRob Herring			vi_d2_pl0 {
751724ba675SRob Herring				nvidia,pins = "vi_d2_pl0";
752724ba675SRob Herring				nvidia,function = "sdmmc2";
753724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
754724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
755724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
756724ba675SRob Herring			};
757724ba675SRob Herring
758724ba675SRob Herring			vi_d3_pl1 {
759724ba675SRob Herring				nvidia,pins = "vi_d3_pl1";
760724ba675SRob Herring				nvidia,function = "sdmmc2";
761724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
762724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
763724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
764724ba675SRob Herring			};
765724ba675SRob Herring
766724ba675SRob Herring			vi_d4_pl2 {
767724ba675SRob Herring				nvidia,pins = "vi_d4_pl2";
768724ba675SRob Herring				nvidia,function = "vi";
769724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
770724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
771724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
772724ba675SRob Herring			};
773724ba675SRob Herring
774724ba675SRob Herring			vi_d5_pl3 {
775724ba675SRob Herring				nvidia,pins = "vi_d5_pl3";
776724ba675SRob Herring				nvidia,function = "sdmmc2";
777724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
778724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
779724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
780724ba675SRob Herring			};
781724ba675SRob Herring
782724ba675SRob Herring			vi_d6_pl4 {
783724ba675SRob Herring				nvidia,pins = "vi_d6_pl4";
784724ba675SRob Herring				nvidia,function = "vi";
785724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
786724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
787724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
788724ba675SRob Herring			};
789724ba675SRob Herring
790724ba675SRob Herring			vi_d7_pl5 {
791724ba675SRob Herring				nvidia,pins = "vi_d7_pl5";
792724ba675SRob Herring				nvidia,function = "sdmmc2";
793724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
794724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
795724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
796724ba675SRob Herring			};
797724ba675SRob Herring
798724ba675SRob Herring			vi_d8_pl6 {
799724ba675SRob Herring				nvidia,pins = "vi_d8_pl6";
800724ba675SRob Herring				nvidia,function = "sdmmc2";
801724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
802724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
803724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
804724ba675SRob Herring			};
805724ba675SRob Herring
806724ba675SRob Herring			vi_d9_pl7 {
807724ba675SRob Herring				nvidia,pins = "vi_d9_pl7";
808724ba675SRob Herring				nvidia,function = "sdmmc2";
809724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
810724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
811724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
812724ba675SRob Herring			};
813724ba675SRob Herring
814724ba675SRob Herring			lcd_d16_pm0 {
815724ba675SRob Herring				nvidia,pins = "lcd_d16_pm0";
816724ba675SRob Herring				nvidia,function = "displaya";
817724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
818724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
819724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
820724ba675SRob Herring			};
821724ba675SRob Herring
822724ba675SRob Herring			lcd_d17_pm1 {
823724ba675SRob Herring				nvidia,pins = "lcd_d17_pm1";
824724ba675SRob Herring				nvidia,function = "displaya";
825724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
826724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
827724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
828724ba675SRob Herring			};
829724ba675SRob Herring
830724ba675SRob Herring			lcd_d18_pm2 {
831724ba675SRob Herring				nvidia,pins = "lcd_d18_pm2";
832724ba675SRob Herring				nvidia,function = "displaya";
833724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
834724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
835724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
836724ba675SRob Herring			};
837724ba675SRob Herring
838724ba675SRob Herring			lcd_d19_pm3 {
839724ba675SRob Herring				nvidia,pins = "lcd_d19_pm3";
840724ba675SRob Herring				nvidia,function = "displaya";
841724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
842724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
843724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
844724ba675SRob Herring			};
845724ba675SRob Herring
846724ba675SRob Herring			lcd_d20_pm4 {
847724ba675SRob Herring				nvidia,pins = "lcd_d20_pm4";
848724ba675SRob Herring				nvidia,function = "displaya";
849724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
850724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
851724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
852724ba675SRob Herring			};
853724ba675SRob Herring
854724ba675SRob Herring			lcd_d21_pm5 {
855724ba675SRob Herring				nvidia,pins = "lcd_d21_pm5";
856724ba675SRob Herring				nvidia,function = "displaya";
857724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
858724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
859724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
860724ba675SRob Herring			};
861724ba675SRob Herring
862724ba675SRob Herring			lcd_d22_pm6 {
863724ba675SRob Herring				nvidia,pins = "lcd_d22_pm6";
864724ba675SRob Herring				nvidia,function = "displaya";
865724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
866724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
867724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
868724ba675SRob Herring			};
869724ba675SRob Herring
870724ba675SRob Herring			lcd_d23_pm7 {
871724ba675SRob Herring				nvidia,pins = "lcd_d23_pm7";
872724ba675SRob Herring				nvidia,function = "displaya";
873724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
874724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
875724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
876724ba675SRob Herring			};
877724ba675SRob Herring
878724ba675SRob Herring			dap1_fs_pn0 {
879724ba675SRob Herring				nvidia,pins = "dap1_fs_pn0";
880724ba675SRob Herring				nvidia,function = "i2s0";
881724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
882724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
883724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
884724ba675SRob Herring			};
885724ba675SRob Herring
886724ba675SRob Herring			dap1_din_pn1 {
887724ba675SRob Herring				nvidia,pins = "dap1_din_pn1";
888724ba675SRob Herring				nvidia,function = "i2s0";
889724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
890724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
891724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
892724ba675SRob Herring			};
893724ba675SRob Herring
894724ba675SRob Herring			dap1_dout_pn2 {
895724ba675SRob Herring				nvidia,pins = "dap1_dout_pn2";
896724ba675SRob Herring				nvidia,function = "i2s0";
897724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
898724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
899724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
900724ba675SRob Herring			};
901724ba675SRob Herring
902724ba675SRob Herring			dap1_sclk_pn3 {
903724ba675SRob Herring				nvidia,pins = "dap1_sclk_pn3";
904724ba675SRob Herring				nvidia,function = "i2s0";
905724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
906724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
907724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
908724ba675SRob Herring			};
909724ba675SRob Herring
910724ba675SRob Herring			lcd_cs0_n_pn4 {
911724ba675SRob Herring				nvidia,pins = "lcd_cs0_n_pn4";
912724ba675SRob Herring				nvidia,function = "displaya";
913724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
914724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
915724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
916724ba675SRob Herring			};
917724ba675SRob Herring
918724ba675SRob Herring			lcd_sdout_pn5 {
919724ba675SRob Herring				nvidia,pins = "lcd_sdout_pn5";
920724ba675SRob Herring				nvidia,function = "displaya";
921724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
922724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
923724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
924724ba675SRob Herring			};
925724ba675SRob Herring
926724ba675SRob Herring			lcd_dc0_pn6 {
927724ba675SRob Herring				nvidia,pins = "lcd_dc0_pn6";
928724ba675SRob Herring				nvidia,function = "displaya";
929724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
930724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
931724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
932724ba675SRob Herring			};
933724ba675SRob Herring
934724ba675SRob Herring			hdmi_int_pn7 {
935724ba675SRob Herring				nvidia,pins = "hdmi_int_pn7";
936724ba675SRob Herring				nvidia,function = "hdmi";
937724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
938724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
939724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
940724ba675SRob Herring			};
941724ba675SRob Herring
942724ba675SRob Herring			ulpi_data7_po0 {
943724ba675SRob Herring				nvidia,pins = "ulpi_data7_po0";
944724ba675SRob Herring				nvidia,function = "uarta";
945724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
946724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
947724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
948724ba675SRob Herring			};
949724ba675SRob Herring
950724ba675SRob Herring			ulpi_data0_po1 {
951724ba675SRob Herring				nvidia,pins = "ulpi_data0_po1";
952724ba675SRob Herring				nvidia,function = "uarta";
953724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
954724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
955724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
956724ba675SRob Herring			};
957724ba675SRob Herring
958724ba675SRob Herring			ulpi_data1_po2 {
959724ba675SRob Herring				nvidia,pins = "ulpi_data1_po2";
960724ba675SRob Herring				nvidia,function = "uarta";
961724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
962724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
963724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
964724ba675SRob Herring			};
965724ba675SRob Herring
966724ba675SRob Herring			ulpi_data2_po3 {
967724ba675SRob Herring				nvidia,pins = "ulpi_data2_po3";
968724ba675SRob Herring				nvidia,function = "uarta";
969724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
970724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
971724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
972724ba675SRob Herring			};
973724ba675SRob Herring
974724ba675SRob Herring			ulpi_data3_po4 {
975724ba675SRob Herring				nvidia,pins = "ulpi_data3_po4";
976724ba675SRob Herring				nvidia,function = "uarta";
977724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
978724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
979724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
980724ba675SRob Herring			};
981724ba675SRob Herring
982724ba675SRob Herring			ulpi_data4_po5 {
983724ba675SRob Herring				nvidia,pins = "ulpi_data4_po5";
984724ba675SRob Herring				nvidia,function = "uarta";
985724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
986724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
987724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
988724ba675SRob Herring			};
989724ba675SRob Herring
990724ba675SRob Herring			ulpi_data5_po6 {
991724ba675SRob Herring				nvidia,pins = "ulpi_data5_po6";
992724ba675SRob Herring				nvidia,function = "uarta";
993724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
994724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
995724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
996724ba675SRob Herring			};
997724ba675SRob Herring
998724ba675SRob Herring			ulpi_data6_po7 {
999724ba675SRob Herring				nvidia,pins = "ulpi_data6_po7";
1000724ba675SRob Herring				nvidia,function = "uarta";
1001724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1002724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1003724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1004724ba675SRob Herring			};
1005724ba675SRob Herring
1006724ba675SRob Herring			dap3_fs_pp0 {
1007724ba675SRob Herring				nvidia,pins = "dap3_fs_pp0";
1008724ba675SRob Herring				nvidia,function = "i2s2";
1009724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1010724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1011724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1012724ba675SRob Herring			};
1013724ba675SRob Herring
1014724ba675SRob Herring			dap3_din_pp1 {
1015724ba675SRob Herring				nvidia,pins = "dap3_din_pp1";
1016724ba675SRob Herring				nvidia,function = "i2s2";
1017724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1018724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1019724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1020724ba675SRob Herring			};
1021724ba675SRob Herring
1022724ba675SRob Herring			dap3_dout_pp2 {
1023724ba675SRob Herring				nvidia,pins = "dap3_dout_pp2";
1024724ba675SRob Herring				nvidia,function = "i2s2";
1025724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1026724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1027724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1028724ba675SRob Herring			};
1029724ba675SRob Herring
1030724ba675SRob Herring			dap3_sclk_pp3 {
1031724ba675SRob Herring				nvidia,pins = "dap3_sclk_pp3";
1032724ba675SRob Herring				nvidia,function = "i2s2";
1033724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1034724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1035724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1036724ba675SRob Herring			};
1037724ba675SRob Herring
1038724ba675SRob Herring			dap4_fs_pp4 {
1039724ba675SRob Herring				nvidia,pins = "dap4_fs_pp4";
1040724ba675SRob Herring				nvidia,function = "i2s3";
1041724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1042724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1043724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1044724ba675SRob Herring			};
1045724ba675SRob Herring
1046724ba675SRob Herring			dap4_din_pp5 {
1047724ba675SRob Herring				nvidia,pins = "dap4_din_pp5";
1048724ba675SRob Herring				nvidia,function = "i2s3";
1049724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1050724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1051724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1052724ba675SRob Herring			};
1053724ba675SRob Herring
1054724ba675SRob Herring			dap4_dout_pp6 {
1055724ba675SRob Herring				nvidia,pins = "dap4_dout_pp6";
1056724ba675SRob Herring				nvidia,function = "i2s3";
1057724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1058724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1059724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1060724ba675SRob Herring			};
1061724ba675SRob Herring
1062724ba675SRob Herring			dap4_sclk_pp7 {
1063724ba675SRob Herring				nvidia,pins = "dap4_sclk_pp7";
1064724ba675SRob Herring				nvidia,function = "i2s3";
1065724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1066724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1067724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1068724ba675SRob Herring			};
1069724ba675SRob Herring
1070724ba675SRob Herring			kb_col0_pq0 {
1071724ba675SRob Herring				nvidia,pins = "kb_col0_pq0";
1072724ba675SRob Herring				nvidia,function = "kbc";
1073724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1074724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1075724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1076724ba675SRob Herring			};
1077724ba675SRob Herring
1078724ba675SRob Herring			kb_col1_pq1 {
1079724ba675SRob Herring				nvidia,pins = "kb_col1_pq1";
1080724ba675SRob Herring				nvidia,function = "kbc";
1081724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1082724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1083724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1084724ba675SRob Herring			};
1085724ba675SRob Herring
1086724ba675SRob Herring			kb_col2_pq2 {
1087724ba675SRob Herring				nvidia,pins = "kb_col2_pq2";
1088724ba675SRob Herring				nvidia,function = "kbc";
1089724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1090724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1091724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1092724ba675SRob Herring			};
1093724ba675SRob Herring
1094724ba675SRob Herring			kb_col3_pq3 {
1095724ba675SRob Herring				nvidia,pins = "kb_col3_pq3";
1096724ba675SRob Herring				nvidia,function = "kbc";
1097724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1098724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1099724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1100724ba675SRob Herring			};
1101724ba675SRob Herring
1102724ba675SRob Herring			kb_col4_pq4 {
1103724ba675SRob Herring				nvidia,pins = "kb_col4_pq4";
1104724ba675SRob Herring				nvidia,function = "kbc";
1105724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1106724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1107724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1108724ba675SRob Herring			};
1109724ba675SRob Herring
1110724ba675SRob Herring			kb_col5_pq5 {
1111724ba675SRob Herring				nvidia,pins = "kb_col5_pq5";
1112724ba675SRob Herring				nvidia,function = "kbc";
1113724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1114724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1115724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1116724ba675SRob Herring			};
1117724ba675SRob Herring
1118724ba675SRob Herring			kb_col6_pq6 {
1119724ba675SRob Herring				nvidia,pins = "kb_col6_pq6";
1120724ba675SRob Herring				nvidia,function = "kbc";
1121724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1122724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1123724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1124724ba675SRob Herring			};
1125724ba675SRob Herring
1126724ba675SRob Herring			kb_col7_pq7 {
1127724ba675SRob Herring				nvidia,pins = "kb_col7_pq7";
1128724ba675SRob Herring				nvidia,function = "kbc";
1129724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1130724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1131724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1132724ba675SRob Herring			};
1133724ba675SRob Herring
1134724ba675SRob Herring			kb_row0_pr0 {
1135724ba675SRob Herring				nvidia,pins = "kb_row0_pr0";
1136724ba675SRob Herring				nvidia,function = "kbc";
1137724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1138724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1139724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1140724ba675SRob Herring			};
1141724ba675SRob Herring
1142724ba675SRob Herring			kb_row1_pr1 {
1143724ba675SRob Herring				nvidia,pins = "kb_row1_pr1";
1144724ba675SRob Herring				nvidia,function = "kbc";
1145724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1146724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1147724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1148724ba675SRob Herring			};
1149724ba675SRob Herring
1150724ba675SRob Herring			kb_row2_pr2 {
1151724ba675SRob Herring				nvidia,pins = "kb_row2_pr2";
1152724ba675SRob Herring				nvidia,function = "kbc";
1153724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1154724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1155724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1156724ba675SRob Herring			};
1157724ba675SRob Herring
1158724ba675SRob Herring			kb_row3_pr3 {
1159724ba675SRob Herring				nvidia,pins = "kb_row3_pr3";
1160724ba675SRob Herring				nvidia,function = "kbc";
1161724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1162724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1163724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1164724ba675SRob Herring			};
1165724ba675SRob Herring
1166724ba675SRob Herring			kb_row4_pr4 {
1167724ba675SRob Herring				nvidia,pins = "kb_row4_pr4";
1168724ba675SRob Herring				nvidia,function = "kbc";
1169724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1170724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1171724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1172724ba675SRob Herring			};
1173724ba675SRob Herring
1174724ba675SRob Herring			kb_row5_pr5 {
1175724ba675SRob Herring				nvidia,pins = "kb_row5_pr5";
1176724ba675SRob Herring				nvidia,function = "kbc";
1177724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1178724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1179724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1180724ba675SRob Herring			};
1181724ba675SRob Herring
1182724ba675SRob Herring			kb_row6_pr6 {
1183724ba675SRob Herring				nvidia,pins = "kb_row6_pr6";
1184724ba675SRob Herring				nvidia,function = "kbc";
1185724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1186724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1187724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1188724ba675SRob Herring			};
1189724ba675SRob Herring
1190724ba675SRob Herring			kb_row7_pr7 {
1191724ba675SRob Herring				nvidia,pins = "kb_row7_pr7";
1192724ba675SRob Herring				nvidia,function = "kbc";
1193724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1194724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1195724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1196724ba675SRob Herring			};
1197724ba675SRob Herring
1198724ba675SRob Herring			kb_row8_ps0 {
1199724ba675SRob Herring				nvidia,pins = "kb_row8_ps0";
1200724ba675SRob Herring				nvidia,function = "kbc";
1201724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1202724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1203724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1204724ba675SRob Herring			};
1205724ba675SRob Herring
1206724ba675SRob Herring			kb_row9_ps1 {
1207724ba675SRob Herring				nvidia,pins = "kb_row9_ps1";
1208724ba675SRob Herring				nvidia,function = "kbc";
1209724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1210724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1211724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1212724ba675SRob Herring			};
1213724ba675SRob Herring
1214724ba675SRob Herring			kb_row10_ps2 {
1215724ba675SRob Herring				nvidia,pins = "kb_row10_ps2";
1216724ba675SRob Herring				nvidia,function = "kbc";
1217724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1218724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1219724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1220724ba675SRob Herring			};
1221724ba675SRob Herring
1222724ba675SRob Herring			kb_row11_ps3 {
1223724ba675SRob Herring				nvidia,pins = "kb_row11_ps3";
1224724ba675SRob Herring				nvidia,function = "kbc";
1225724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1226724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1227724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1228724ba675SRob Herring			};
1229724ba675SRob Herring
1230724ba675SRob Herring			kb_row12_ps4 {
1231724ba675SRob Herring				nvidia,pins = "kb_row12_ps4";
1232724ba675SRob Herring				nvidia,function = "kbc";
1233724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1234724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1235724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1236724ba675SRob Herring			};
1237724ba675SRob Herring
1238724ba675SRob Herring			kb_row13_ps5 {
1239724ba675SRob Herring				nvidia,pins = "kb_row13_ps5";
1240724ba675SRob Herring				nvidia,function = "kbc";
1241724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1242724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1243724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1244724ba675SRob Herring			};
1245724ba675SRob Herring
1246724ba675SRob Herring			kb_row14_ps6 {
1247724ba675SRob Herring				nvidia,pins = "kb_row14_ps6";
1248724ba675SRob Herring				nvidia,function = "kbc";
1249724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1250724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1251724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1252724ba675SRob Herring			};
1253724ba675SRob Herring
1254724ba675SRob Herring			kb_row15_ps7 {
1255724ba675SRob Herring				nvidia,pins = "kb_row15_ps7";
1256724ba675SRob Herring				nvidia,function = "kbc";
1257724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1258724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1259724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1260724ba675SRob Herring			};
1261724ba675SRob Herring
1262724ba675SRob Herring			vi_pclk_pt0 {
1263724ba675SRob Herring				nvidia,pins = "vi_pclk_pt0";
1264724ba675SRob Herring				nvidia,function = "rsvd1";
1265724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1266724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1267724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1268724ba675SRob Herring			};
1269724ba675SRob Herring
1270724ba675SRob Herring			vi_mclk_pt1 {
1271724ba675SRob Herring				nvidia,pins = "vi_mclk_pt1";
1272724ba675SRob Herring				nvidia,function = "vi";
1273724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1274724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1275724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1276724ba675SRob Herring			};
1277724ba675SRob Herring
1278724ba675SRob Herring			vi_d10_pt2 {
1279724ba675SRob Herring				nvidia,pins = "vi_d10_pt2";
1280724ba675SRob Herring				nvidia,function = "ddr";
1281724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1282724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1283724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1284724ba675SRob Herring			};
1285724ba675SRob Herring
1286724ba675SRob Herring			vi_d11_pt3 {
1287724ba675SRob Herring				nvidia,pins = "vi_d11_pt3";
1288724ba675SRob Herring				nvidia,function = "ddr";
1289724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1290724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1291724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1292724ba675SRob Herring			};
1293724ba675SRob Herring
1294724ba675SRob Herring			vi_d0_pt4 {
1295724ba675SRob Herring				nvidia,pins = "vi_d0_pt4";
1296724ba675SRob Herring				nvidia,function = "ddr";
1297724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1298724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1299724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1300724ba675SRob Herring			};
1301724ba675SRob Herring
1302724ba675SRob Herring			gen2_i2c_scl_pt5 {
1303724ba675SRob Herring				nvidia,pins = "gen2_i2c_scl_pt5";
1304724ba675SRob Herring				nvidia,function = "i2c2";
1305724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1306724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1307724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1308724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1309724ba675SRob Herring			};
1310724ba675SRob Herring
1311724ba675SRob Herring			gen2_i2c_sda_pt6 {
1312724ba675SRob Herring				nvidia,pins = "gen2_i2c_sda_pt6";
1313724ba675SRob Herring				nvidia,function = "i2c2";
1314724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1315724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1316724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1317724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1318724ba675SRob Herring			};
1319724ba675SRob Herring
1320724ba675SRob Herring			sdmmc4_cmd_pt7 {
1321724ba675SRob Herring				nvidia,pins = "sdmmc4_cmd_pt7";
1322724ba675SRob Herring				nvidia,function = "sdmmc4";
1323724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1324724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1325724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1326724ba675SRob Herring				nvidia,io-reset = <TEGRA_PIN_DISABLE>;
1327724ba675SRob Herring			};
1328724ba675SRob Herring
1329724ba675SRob Herring			pu0 {
1330724ba675SRob Herring				nvidia,pins = "pu0";
1331724ba675SRob Herring				nvidia,function = "owr";
1332724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1333724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1334724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1335724ba675SRob Herring			};
1336724ba675SRob Herring
1337724ba675SRob Herring			pu1 {
1338724ba675SRob Herring				nvidia,pins = "pu1";
1339724ba675SRob Herring				nvidia,function = "rsvd1";
1340724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1341724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1342724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1343724ba675SRob Herring			};
1344724ba675SRob Herring
1345724ba675SRob Herring			pu2 {
1346724ba675SRob Herring				nvidia,pins = "pu2";
1347724ba675SRob Herring				nvidia,function = "rsvd1";
1348724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1349724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1350724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1351724ba675SRob Herring			};
1352724ba675SRob Herring
1353724ba675SRob Herring			pu3 {
1354724ba675SRob Herring				nvidia,pins = "pu3";
1355724ba675SRob Herring				nvidia,function = "pwm0";
1356724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1357724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1358724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1359724ba675SRob Herring			};
1360724ba675SRob Herring
1361724ba675SRob Herring			pu4 {
1362724ba675SRob Herring				nvidia,pins = "pu4";
1363724ba675SRob Herring				nvidia,function = "pwm1";
1364724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1365724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1366724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1367724ba675SRob Herring			};
1368724ba675SRob Herring
1369724ba675SRob Herring			pu5 {
1370724ba675SRob Herring				nvidia,pins = "pu5";
1371724ba675SRob Herring				nvidia,function = "rsvd4";
1372724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1373724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1374724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1375724ba675SRob Herring			};
1376724ba675SRob Herring
1377724ba675SRob Herring			pu6 {
1378724ba675SRob Herring				nvidia,pins = "pu6";
1379724ba675SRob Herring				nvidia,function = "pwm3";
1380724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1381724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1382724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1383724ba675SRob Herring			};
1384724ba675SRob Herring
1385724ba675SRob Herring			jtag_rtck_pu7 {
1386724ba675SRob Herring				nvidia,pins = "jtag_rtck_pu7";
1387724ba675SRob Herring				nvidia,function = "rtck";
1388724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1389724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1390724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1391724ba675SRob Herring			};
1392724ba675SRob Herring
1393724ba675SRob Herring			pv0 {
1394724ba675SRob Herring				nvidia,pins = "pv0";
1395724ba675SRob Herring				nvidia,function = "rsvd1";
1396724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1397724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1398724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1399724ba675SRob Herring			};
1400724ba675SRob Herring
1401724ba675SRob Herring			pv1 {
1402724ba675SRob Herring				nvidia,pins = "pv1";
1403724ba675SRob Herring				nvidia,function = "rsvd1";
1404724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1405724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1406724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1407724ba675SRob Herring			};
1408724ba675SRob Herring
1409724ba675SRob Herring			pv2 {
1410724ba675SRob Herring				nvidia,pins = "pv2";
1411724ba675SRob Herring				nvidia,function = "owr";
1412724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1413724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1414724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1415724ba675SRob Herring			};
1416724ba675SRob Herring
1417724ba675SRob Herring			pv3 {
1418724ba675SRob Herring				nvidia,pins = "pv3";
1419724ba675SRob Herring				nvidia,function = "clk_12m_out";
1420724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1421724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1422724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1423724ba675SRob Herring			};
1424724ba675SRob Herring
1425724ba675SRob Herring			ddc_scl_pv4 {
1426724ba675SRob Herring				nvidia,pins = "ddc_scl_pv4";
1427724ba675SRob Herring				nvidia,function = "i2c4";
1428724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1429724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1430724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1431724ba675SRob Herring			};
1432724ba675SRob Herring
1433724ba675SRob Herring			ddc_sda_pv5 {
1434724ba675SRob Herring				nvidia,pins = "ddc_sda_pv5";
1435724ba675SRob Herring				nvidia,function = "i2c4";
1436724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1437724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1438724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1439724ba675SRob Herring			};
1440724ba675SRob Herring
1441724ba675SRob Herring			crt_hsync_pv6 {
1442724ba675SRob Herring				nvidia,pins = "crt_hsync_pv6";
1443724ba675SRob Herring				nvidia,function = "crt";
1444724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1445724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1446724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1447724ba675SRob Herring			};
1448724ba675SRob Herring
1449724ba675SRob Herring			crt_vsync_pv7 {
1450724ba675SRob Herring				nvidia,pins = "crt_vsync_pv7";
1451724ba675SRob Herring				nvidia,function = "crt";
1452724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1453724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1454724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1455724ba675SRob Herring			};
1456724ba675SRob Herring
1457724ba675SRob Herring			lcd_cs1_n_pw0 {
1458724ba675SRob Herring				nvidia,pins = "lcd_cs1_n_pw0";
1459724ba675SRob Herring				nvidia,function = "displaya";
1460724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1461724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1462724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1463724ba675SRob Herring			};
1464724ba675SRob Herring
1465724ba675SRob Herring			lcd_m1_pw1 {
1466724ba675SRob Herring				nvidia,pins = "lcd_m1_pw1";
1467724ba675SRob Herring				nvidia,function = "displaya";
1468724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1469724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1470724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1471724ba675SRob Herring			};
1472724ba675SRob Herring
1473724ba675SRob Herring			spi2_cs1_n_pw2 {
1474724ba675SRob Herring				nvidia,pins = "spi2_cs1_n_pw2";
1475724ba675SRob Herring				nvidia,function = "spi2";
1476724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1477724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1478724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1479724ba675SRob Herring			};
1480724ba675SRob Herring
1481724ba675SRob Herring			clk1_out_pw4 {
1482724ba675SRob Herring				nvidia,pins = "clk1_out_pw4";
1483724ba675SRob Herring				nvidia,function = "extperiph1";
1484724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1485724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1486724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1487724ba675SRob Herring			};
1488724ba675SRob Herring
1489724ba675SRob Herring			clk2_out_pw5 {
1490724ba675SRob Herring				nvidia,pins = "clk2_out_pw5";
1491724ba675SRob Herring				nvidia,function = "extperiph2";
1492724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1493724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1494724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1495724ba675SRob Herring			};
1496724ba675SRob Herring
1497724ba675SRob Herring			uart3_txd_pw6 {
1498724ba675SRob Herring				nvidia,pins = "uart3_txd_pw6";
1499724ba675SRob Herring				nvidia,function = "uartc";
1500724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1501724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1502724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1503724ba675SRob Herring			};
1504724ba675SRob Herring
1505724ba675SRob Herring			uart3_rxd_pw7 {
1506724ba675SRob Herring				nvidia,pins = "uart3_rxd_pw7";
1507724ba675SRob Herring				nvidia,function = "uartc";
1508724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1509724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1510724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1511724ba675SRob Herring			};
1512724ba675SRob Herring
1513724ba675SRob Herring			spi2_sck_px2 {
1514724ba675SRob Herring				nvidia,pins = "spi2_sck_px2";
1515724ba675SRob Herring				nvidia,function = "gmi";
1516724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1517724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1518724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1519724ba675SRob Herring			};
1520724ba675SRob Herring
1521724ba675SRob Herring			spi1_mosi_px4 {
1522724ba675SRob Herring				nvidia,pins = "spi1_mosi_px4";
1523724ba675SRob Herring				nvidia,function = "spi1";
1524724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1525724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1526724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1527724ba675SRob Herring			};
1528724ba675SRob Herring
1529724ba675SRob Herring			spi1_sck_px5 {
1530724ba675SRob Herring				nvidia,pins = "spi1_sck_px5";
1531724ba675SRob Herring				nvidia,function = "spi1";
1532724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1533724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1534724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1535724ba675SRob Herring			};
1536724ba675SRob Herring
1537724ba675SRob Herring			spi1_cs0_n_px6 {
1538724ba675SRob Herring				nvidia,pins = "spi1_cs0_n_px6";
1539724ba675SRob Herring				nvidia,function = "spi1";
1540724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1541724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1542724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1543724ba675SRob Herring			};
1544724ba675SRob Herring
1545724ba675SRob Herring			spi1_miso_px7 {
1546724ba675SRob Herring				nvidia,pins = "spi1_miso_px7";
1547724ba675SRob Herring				nvidia,function = "spi1";
1548724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1549724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1550724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1551724ba675SRob Herring			};
1552724ba675SRob Herring
1553724ba675SRob Herring			ulpi_clk_py0 {
1554724ba675SRob Herring				nvidia,pins = "ulpi_clk_py0";
1555724ba675SRob Herring				nvidia,function = "uartd";
1556724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1557724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1558724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1559724ba675SRob Herring			};
1560724ba675SRob Herring
1561724ba675SRob Herring			ulpi_dir_py1 {
1562724ba675SRob Herring				nvidia,pins = "ulpi_dir_py1";
1563724ba675SRob Herring				nvidia,function = "uartd";
1564724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1565724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1566724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1567724ba675SRob Herring			};
1568724ba675SRob Herring
1569724ba675SRob Herring			ulpi_nxt_py2 {
1570724ba675SRob Herring				nvidia,pins = "ulpi_nxt_py2";
1571724ba675SRob Herring				nvidia,function = "uartd";
1572724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1573724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1574724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1575724ba675SRob Herring			};
1576724ba675SRob Herring
1577724ba675SRob Herring			ulpi_stp_py3 {
1578724ba675SRob Herring				nvidia,pins = "ulpi_stp_py3";
1579724ba675SRob Herring				nvidia,function = "uartd";
1580724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1581724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1582724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1583724ba675SRob Herring			};
1584724ba675SRob Herring
1585724ba675SRob Herring			sdmmc1_dat3_py4 {
1586724ba675SRob Herring				nvidia,pins = "sdmmc1_dat3_py4";
1587724ba675SRob Herring				nvidia,function = "sdmmc1";
1588724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1589724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1590724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1591724ba675SRob Herring			};
1592724ba675SRob Herring
1593724ba675SRob Herring			sdmmc1_dat2_py5 {
1594724ba675SRob Herring				nvidia,pins = "sdmmc1_dat2_py5";
1595724ba675SRob Herring				nvidia,function = "sdmmc1";
1596724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1597724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1598724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1599724ba675SRob Herring			};
1600724ba675SRob Herring
1601724ba675SRob Herring			sdmmc1_dat1_py6 {
1602724ba675SRob Herring				nvidia,pins = "sdmmc1_dat1_py6";
1603724ba675SRob Herring				nvidia,function = "sdmmc1";
1604724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1605724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1606724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1607724ba675SRob Herring			};
1608724ba675SRob Herring
1609724ba675SRob Herring			sdmmc1_dat0_py7 {
1610724ba675SRob Herring				nvidia,pins = "sdmmc1_dat0_py7";
1611724ba675SRob Herring				nvidia,function = "sdmmc1";
1612724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1613724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1614724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1615724ba675SRob Herring			};
1616724ba675SRob Herring
1617724ba675SRob Herring			sdmmc1_clk_pz0 {
1618724ba675SRob Herring				nvidia,pins = "sdmmc1_clk_pz0";
1619724ba675SRob Herring				nvidia,function = "sdmmc1";
1620724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1621724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1622724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1623724ba675SRob Herring			};
1624724ba675SRob Herring
1625724ba675SRob Herring			sdmmc1_cmd_pz1 {
1626724ba675SRob Herring				nvidia,pins = "sdmmc1_cmd_pz1";
1627724ba675SRob Herring				nvidia,function = "sdmmc1";
1628724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1629724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1630724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1631724ba675SRob Herring			};
1632724ba675SRob Herring
1633724ba675SRob Herring			lcd_sdin_pz2 {
1634724ba675SRob Herring				nvidia,pins = "lcd_sdin_pz2";
1635724ba675SRob Herring				nvidia,function = "displaya";
1636724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1637724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1638724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1639724ba675SRob Herring			};
1640724ba675SRob Herring
1641724ba675SRob Herring			lcd_wr_n_pz3 {
1642724ba675SRob Herring				nvidia,pins = "lcd_wr_n_pz3";
1643724ba675SRob Herring				nvidia,function = "displaya";
1644724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1645724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1646724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1647724ba675SRob Herring			};
1648724ba675SRob Herring
1649724ba675SRob Herring			lcd_sck_pz4 {
1650724ba675SRob Herring				nvidia,pins = "lcd_sck_pz4";
1651724ba675SRob Herring				nvidia,function = "displaya";
1652724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1653724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1654724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1655724ba675SRob Herring			};
1656724ba675SRob Herring
1657724ba675SRob Herring			sys_clk_req_pz5 {
1658724ba675SRob Herring				nvidia,pins = "sys_clk_req_pz5";
1659724ba675SRob Herring				nvidia,function = "sysclk";
1660724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1661724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1662724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1663724ba675SRob Herring			};
1664724ba675SRob Herring
1665724ba675SRob Herring			pwr_i2c_scl_pz6 {
1666724ba675SRob Herring				nvidia,pins = "pwr_i2c_scl_pz6";
1667724ba675SRob Herring				nvidia,function = "i2cpwr";
1668724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1669724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1670724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1671724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1672724ba675SRob Herring			};
1673724ba675SRob Herring
1674724ba675SRob Herring			pwr_i2c_sda_pz7 {
1675724ba675SRob Herring				nvidia,pins = "pwr_i2c_sda_pz7";
1676724ba675SRob Herring				nvidia,function = "i2cpwr";
1677724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1678724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1679724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1680724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1681724ba675SRob Herring			};
1682724ba675SRob Herring
1683724ba675SRob Herring			sdmmc4_dat0_paa0 {
1684724ba675SRob Herring				nvidia,pins = "sdmmc4_dat0_paa0";
1685724ba675SRob Herring				nvidia,function = "sdmmc4";
1686724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1687724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1688724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1689724ba675SRob Herring				nvidia,io-reset = <TEGRA_PIN_DISABLE>;
1690724ba675SRob Herring			};
1691724ba675SRob Herring
1692724ba675SRob Herring			sdmmc4_dat1_paa1 {
1693724ba675SRob Herring				nvidia,pins = "sdmmc4_dat1_paa1";
1694724ba675SRob Herring				nvidia,function = "sdmmc4";
1695724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1696724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1697724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1698724ba675SRob Herring				nvidia,io-reset = <TEGRA_PIN_DISABLE>;
1699724ba675SRob Herring			};
1700724ba675SRob Herring
1701724ba675SRob Herring			sdmmc4_dat2_paa2 {
1702724ba675SRob Herring				nvidia,pins = "sdmmc4_dat2_paa2";
1703724ba675SRob Herring				nvidia,function = "sdmmc4";
1704724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1705724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1706724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1707724ba675SRob Herring				nvidia,io-reset = <TEGRA_PIN_DISABLE>;
1708724ba675SRob Herring			};
1709724ba675SRob Herring
1710724ba675SRob Herring			sdmmc4_dat3_paa3 {
1711724ba675SRob Herring				nvidia,pins = "sdmmc4_dat3_paa3";
1712724ba675SRob Herring				nvidia,function = "sdmmc4";
1713724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1714724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1715724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1716724ba675SRob Herring				nvidia,io-reset = <TEGRA_PIN_DISABLE>;
1717724ba675SRob Herring			};
1718724ba675SRob Herring
1719724ba675SRob Herring			sdmmc4_dat4_paa4 {
1720724ba675SRob Herring				nvidia,pins = "sdmmc4_dat4_paa4";
1721724ba675SRob Herring				nvidia,function = "sdmmc4";
1722724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1723724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1724724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1725724ba675SRob Herring				nvidia,io-reset = <TEGRA_PIN_DISABLE>;
1726724ba675SRob Herring			};
1727724ba675SRob Herring
1728724ba675SRob Herring			sdmmc4_dat5_paa5 {
1729724ba675SRob Herring				nvidia,pins = "sdmmc4_dat5_paa5";
1730724ba675SRob Herring				nvidia,function = "sdmmc4";
1731724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1732724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1733724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1734724ba675SRob Herring				nvidia,io-reset = <TEGRA_PIN_DISABLE>;
1735724ba675SRob Herring			};
1736724ba675SRob Herring
1737724ba675SRob Herring			sdmmc4_dat6_paa6 {
1738724ba675SRob Herring				nvidia,pins = "sdmmc4_dat6_paa6";
1739724ba675SRob Herring				nvidia,function = "sdmmc4";
1740724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1741724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1742724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1743724ba675SRob Herring				nvidia,io-reset = <TEGRA_PIN_DISABLE>;
1744724ba675SRob Herring			};
1745724ba675SRob Herring
1746724ba675SRob Herring			sdmmc4_dat7_paa7 {
1747724ba675SRob Herring				nvidia,pins = "sdmmc4_dat7_paa7";
1748724ba675SRob Herring				nvidia,function = "sdmmc4";
1749724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1750724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1751724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1752724ba675SRob Herring				nvidia,io-reset = <TEGRA_PIN_DISABLE>;
1753724ba675SRob Herring			};
1754724ba675SRob Herring
1755724ba675SRob Herring			pbb0 {
1756724ba675SRob Herring				nvidia,pins = "pbb0";
1757724ba675SRob Herring				nvidia,function = "i2s4";
1758724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1759724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1760724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1761724ba675SRob Herring			};
1762724ba675SRob Herring
1763724ba675SRob Herring			cam_i2c_scl_pbb1 {
1764724ba675SRob Herring				nvidia,pins = "cam_i2c_scl_pbb1";
1765724ba675SRob Herring				nvidia,function = "i2c3";
1766724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1767724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1768724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1769724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1770724ba675SRob Herring			};
1771724ba675SRob Herring
1772724ba675SRob Herring			cam_i2c_sda_pbb2 {
1773724ba675SRob Herring				nvidia,pins = "cam_i2c_sda_pbb2";
1774724ba675SRob Herring				nvidia,function = "i2c3";
1775724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1776724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1777724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1778724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1779724ba675SRob Herring			};
1780724ba675SRob Herring
1781724ba675SRob Herring			pbb3 {
1782724ba675SRob Herring				nvidia,pins = "pbb3";
1783724ba675SRob Herring				nvidia,function = "vgp3";
1784724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1785724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1786724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1787724ba675SRob Herring			};
1788724ba675SRob Herring
1789724ba675SRob Herring			pbb4 {
1790724ba675SRob Herring				nvidia,pins = "pbb4";
1791724ba675SRob Herring				nvidia,function = "vgp4";
1792724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1793724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1794724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1795724ba675SRob Herring			};
1796724ba675SRob Herring
1797724ba675SRob Herring			pbb5 {
1798724ba675SRob Herring				nvidia,pins = "pbb5";
1799724ba675SRob Herring				nvidia,function = "vgp5";
1800724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1801724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1802724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1803724ba675SRob Herring			};
1804724ba675SRob Herring
1805724ba675SRob Herring			pbb6 {
1806724ba675SRob Herring				nvidia,pins = "pbb6";
1807724ba675SRob Herring				nvidia,function = "vgp6";
1808724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1809724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1810724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1811724ba675SRob Herring			};
1812724ba675SRob Herring
1813724ba675SRob Herring			pbb7 {
1814724ba675SRob Herring				nvidia,pins = "pbb7";
1815724ba675SRob Herring				nvidia,function = "i2s4";
1816724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1817724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1818724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1819724ba675SRob Herring			};
1820724ba675SRob Herring
1821724ba675SRob Herring			cam_mclk_pcc0 {
1822724ba675SRob Herring				nvidia,pins = "cam_mclk_pcc0";
1823724ba675SRob Herring				nvidia,function = "vi_alt3";
1824724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1825724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1826724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1827724ba675SRob Herring			};
1828724ba675SRob Herring
1829724ba675SRob Herring			pcc1 {
1830724ba675SRob Herring				nvidia,pins = "pcc1";
1831724ba675SRob Herring				nvidia,function = "i2s4";
1832724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1833724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1834724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1835724ba675SRob Herring			};
1836724ba675SRob Herring
1837724ba675SRob Herring			pcc2 {
1838724ba675SRob Herring				nvidia,pins = "pcc2";
1839724ba675SRob Herring				nvidia,function = "i2s4";
1840724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1841724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1842724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1843724ba675SRob Herring			};
1844724ba675SRob Herring
1845724ba675SRob Herring			sdmmc4_rst_n_pcc3 {
1846724ba675SRob Herring				nvidia,pins = "sdmmc4_rst_n_pcc3";
1847724ba675SRob Herring				nvidia,function = "sdmmc4";
1848724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1849724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1850724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1851724ba675SRob Herring				nvidia,io-reset = <TEGRA_PIN_DISABLE>;
1852724ba675SRob Herring			};
1853724ba675SRob Herring
1854724ba675SRob Herring			sdmmc4_clk_pcc4 {
1855724ba675SRob Herring				nvidia,pins = "sdmmc4_clk_pcc4";
1856724ba675SRob Herring				nvidia,function = "sdmmc4";
1857724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1858724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1859724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1860724ba675SRob Herring				nvidia,io-reset = <TEGRA_PIN_DISABLE>;
1861724ba675SRob Herring			};
1862724ba675SRob Herring
1863724ba675SRob Herring			clk2_req_pcc5 {
1864724ba675SRob Herring				nvidia,pins = "clk2_req_pcc5";
1865724ba675SRob Herring				nvidia,function = "dap";
1866724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1867724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1868724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1869724ba675SRob Herring			};
1870724ba675SRob Herring
1871724ba675SRob Herring			pex_l2_rst_n_pcc6 {
1872724ba675SRob Herring				nvidia,pins = "pex_l2_rst_n_pcc6";
1873724ba675SRob Herring				nvidia,function = "pcie";
1874724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1875724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1876724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1877724ba675SRob Herring			};
1878724ba675SRob Herring
1879724ba675SRob Herring			pex_l2_clkreq_n_pcc7 {
1880724ba675SRob Herring				nvidia,pins = "pex_l2_clkreq_n_pcc7";
1881724ba675SRob Herring				nvidia,function = "pcie";
1882724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1883724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1884724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1885724ba675SRob Herring			};
1886724ba675SRob Herring
1887724ba675SRob Herring			pex_l0_prsnt_n_pdd0 {
1888724ba675SRob Herring				nvidia,pins = "pex_l0_prsnt_n_pdd0";
1889724ba675SRob Herring				nvidia,function = "pcie";
1890724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1891724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1892724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1893724ba675SRob Herring			};
1894724ba675SRob Herring
1895724ba675SRob Herring			pex_l0_rst_n_pdd1 {
1896724ba675SRob Herring				nvidia,pins = "pex_l0_rst_n_pdd1";
1897724ba675SRob Herring				nvidia,function = "pcie";
1898724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1899724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1900724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1901724ba675SRob Herring			};
1902724ba675SRob Herring
1903724ba675SRob Herring			pex_l0_clkreq_n_pdd2 {
1904724ba675SRob Herring				nvidia,pins = "pex_l0_clkreq_n_pdd2";
1905724ba675SRob Herring				nvidia,function = "pcie";
1906724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1907724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1908724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1909724ba675SRob Herring			};
1910724ba675SRob Herring
1911724ba675SRob Herring			pex_wake_n_pdd3 {
1912724ba675SRob Herring				nvidia,pins = "pex_wake_n_pdd3";
1913724ba675SRob Herring				nvidia,function = "pcie";
1914724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1915724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1916724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1917724ba675SRob Herring			};
1918724ba675SRob Herring
1919724ba675SRob Herring			pex_l1_prsnt_n_pdd4 {
1920724ba675SRob Herring				nvidia,pins = "pex_l1_prsnt_n_pdd4";
1921724ba675SRob Herring				nvidia,function = "pcie";
1922724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1923724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1924724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1925724ba675SRob Herring			};
1926724ba675SRob Herring
1927724ba675SRob Herring			pex_l1_rst_n_pdd5 {
1928724ba675SRob Herring				nvidia,pins = "pex_l1_rst_n_pdd5";
1929724ba675SRob Herring				nvidia,function = "pcie";
1930724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1931724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1932724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1933724ba675SRob Herring			};
1934724ba675SRob Herring
1935724ba675SRob Herring			pex_l1_clkreq_n_pdd6 {
1936724ba675SRob Herring				nvidia,pins = "pex_l1_clkreq_n_pdd6";
1937724ba675SRob Herring				nvidia,function = "pcie";
1938724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1939724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1940724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1941724ba675SRob Herring			};
1942724ba675SRob Herring
1943724ba675SRob Herring			pex_l2_prsnt_n_pdd7 {
1944724ba675SRob Herring				nvidia,pins = "pex_l2_prsnt_n_pdd7";
1945724ba675SRob Herring				nvidia,function = "pcie";
1946724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1947724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1948724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1949724ba675SRob Herring			};
1950724ba675SRob Herring
1951724ba675SRob Herring			clk3_out_pee0 {
1952724ba675SRob Herring				nvidia,pins = "clk3_out_pee0";
1953724ba675SRob Herring				nvidia,function = "extperiph3";
1954724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1955724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1956724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1957724ba675SRob Herring			};
1958724ba675SRob Herring
1959724ba675SRob Herring			clk3_req_pee1 {
1960724ba675SRob Herring				nvidia,pins = "clk3_req_pee1";
1961724ba675SRob Herring				nvidia,function = "dev3";
1962724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1963724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1964724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1965724ba675SRob Herring			};
1966724ba675SRob Herring
1967724ba675SRob Herring			clk1_req_pee2 {
1968724ba675SRob Herring				nvidia,pins = "clk1_req_pee2";
1969724ba675SRob Herring				nvidia,function = "dap";
1970724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1971724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1972724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1973724ba675SRob Herring			};
1974724ba675SRob Herring
1975724ba675SRob Herring			hdmi_cec_pee3 {
1976724ba675SRob Herring				nvidia,pins = "hdmi_cec_pee3";
1977724ba675SRob Herring				nvidia,function = "cec";
1978724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1979724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1980724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1981724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1982724ba675SRob Herring			};
1983724ba675SRob Herring
1984724ba675SRob Herring			owr {
1985724ba675SRob Herring				nvidia,pins = "owr";
1986724ba675SRob Herring				nvidia,function = "owr";
1987724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1988724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1989724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1990724ba675SRob Herring			};
1991724ba675SRob Herring
1992724ba675SRob Herring			drive_groups {
1993724ba675SRob Herring				nvidia,pins = "drive_gma",
1994724ba675SRob Herring					      "drive_gmb",
1995724ba675SRob Herring					      "drive_gmc",
1996724ba675SRob Herring					      "drive_gmd";
1997724ba675SRob Herring				nvidia,pull-down-strength = <9>;
1998724ba675SRob Herring				nvidia,pull-up-strength = <9>;
1999724ba675SRob Herring				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
2000724ba675SRob Herring				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
2001724ba675SRob Herring			};
2002724ba675SRob Herring		};
2003724ba675SRob Herring	};
2004724ba675SRob Herring
2005724ba675SRob Herring	uartc: serial@70006200 {
2006724ba675SRob Herring		compatible = "nvidia,tegra30-hsuart";
2007*500b861dSThierry Reding		reset-names = "serial";
2008724ba675SRob Herring		/delete-property/ reg-shift;
2009724ba675SRob Herring		status = "okay";
2010724ba675SRob Herring
2011724ba675SRob Herring		nvidia,adjust-baud-rates = <0 9600 100>,
2012724ba675SRob Herring					   <9600 115200 200>,
2013724ba675SRob Herring					   <1000000 4000000 136>;
2014724ba675SRob Herring
2015724ba675SRob Herring		/* Azurewave AW-NH660 BCM4330B1 */
2016724ba675SRob Herring		bluetooth {
2017724ba675SRob Herring			compatible = "brcm,bcm4330-bt";
2018724ba675SRob Herring
2019724ba675SRob Herring			interrupt-parent = <&gpio>;
2020724ba675SRob Herring			interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
2021724ba675SRob Herring			interrupt-names = "host-wakeup";
2022724ba675SRob Herring
2023724ba675SRob Herring			max-speed = <4000000>;
2024724ba675SRob Herring
2025724ba675SRob Herring			clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
2026724ba675SRob Herring			clock-names = "txco";
2027724ba675SRob Herring
2028724ba675SRob Herring			vbat-supply  = <&sys_3v3_reg>;
2029724ba675SRob Herring			vddio-supply = <&vdd_1v8>;
2030724ba675SRob Herring
2031724ba675SRob Herring			shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
2032724ba675SRob Herring			device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
2033724ba675SRob Herring		};
2034724ba675SRob Herring	};
2035724ba675SRob Herring
2036724ba675SRob Herring	uartd: serial@70006300 {
20379766116aSThierry Reding		/delete-property/ dmas;
20389766116aSThierry Reding		/delete-property/ dma-names;
2039724ba675SRob Herring		status = "okay";
2040724ba675SRob Herring	};
2041724ba675SRob Herring
2042724ba675SRob Herring	hdmi_ddc: i2c@7000c700 {
2043724ba675SRob Herring		status = "okay";
2044724ba675SRob Herring		clock-frequency = <100000>;
2045724ba675SRob Herring	};
2046724ba675SRob Herring
2047724ba675SRob Herring	i2c@7000d000 {
2048724ba675SRob Herring		status = "okay";
2049724ba675SRob Herring		clock-frequency = <400000>;
2050724ba675SRob Herring
2051724ba675SRob Herring		pmic: pmic@2d {
2052724ba675SRob Herring			compatible = "ti,tps65911";
2053724ba675SRob Herring			reg = <0x2d>;
2054724ba675SRob Herring
2055724ba675SRob Herring			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2056724ba675SRob Herring			#interrupt-cells = <2>;
2057724ba675SRob Herring			interrupt-controller;
2058724ba675SRob Herring			wakeup-source;
2059724ba675SRob Herring
2060724ba675SRob Herring			ti,en-gpio-sleep = <0 1 1 1 1 1 0 0 1>;
2061724ba675SRob Herring			ti,system-power-controller;
2062724ba675SRob Herring			ti,sleep-keep-ck32k;
2063724ba675SRob Herring			ti,sleep-enable;
2064724ba675SRob Herring
2065724ba675SRob Herring			#gpio-cells = <2>;
2066724ba675SRob Herring			gpio-controller;
2067724ba675SRob Herring
2068724ba675SRob Herring			vcc1-supply = <&vdd_5v0_reg>;
2069724ba675SRob Herring			vcc2-supply = <&vdd_5v0_reg>;
2070724ba675SRob Herring			vcc3-supply = <&vdd_1v8>;
2071724ba675SRob Herring			vcc4-supply = <&vdd_5v0_reg>;
2072724ba675SRob Herring			vcc5-supply = <&vdd_5v0_reg>;
2073724ba675SRob Herring			vcc6-supply = <&vdd2_reg>;
2074724ba675SRob Herring			vcc7-supply = <&vdd_5v0_reg>;
2075724ba675SRob Herring			vccio-supply = <&vdd_5v0_reg>;
2076724ba675SRob Herring
2077724ba675SRob Herring			regulators {
2078724ba675SRob Herring				vdd1_reg: vdd1 {
2079724ba675SRob Herring					regulator-name = "vddio_ddr_1v2";
2080724ba675SRob Herring					regulator-min-microvolt = <1200000>;
2081724ba675SRob Herring					regulator-max-microvolt = <1200000>;
2082724ba675SRob Herring					regulator-always-on;
2083724ba675SRob Herring				};
2084724ba675SRob Herring
2085724ba675SRob Herring				vdd2_reg: vdd2 {
2086724ba675SRob Herring					regulator-name = "vdd_1v5_gen";
2087724ba675SRob Herring					regulator-min-microvolt = <1500000>;
2088724ba675SRob Herring					regulator-max-microvolt = <1500000>;
2089724ba675SRob Herring					regulator-always-on;
2090724ba675SRob Herring				};
2091724ba675SRob Herring
2092724ba675SRob Herring				vdd_cpu: vddctrl {
2093724ba675SRob Herring					regulator-name = "vdd_cpu,vdd_sys";
2094724ba675SRob Herring					regulator-min-microvolt = <800000>;
2095724ba675SRob Herring					regulator-max-microvolt = <1270000>;
2096724ba675SRob Herring					regulator-coupled-with = <&vdd_core>;
2097724ba675SRob Herring					regulator-coupled-max-spread = <300000>;
2098724ba675SRob Herring					regulator-max-step-microvolt = <100000>;
2099724ba675SRob Herring					regulator-always-on;
2100724ba675SRob Herring
2101724ba675SRob Herring					nvidia,tegra-cpu-regulator;
2102724ba675SRob Herring				};
2103724ba675SRob Herring
2104724ba675SRob Herring				vdd_1v8: vio {
2105724ba675SRob Herring					regulator-name = "vdd_1v8_gen";
2106724ba675SRob Herring					regulator-min-microvolt = <1800000>;
2107724ba675SRob Herring					regulator-max-microvolt = <1800000>;
2108724ba675SRob Herring					regulator-always-on;
2109724ba675SRob Herring				};
2110724ba675SRob Herring
2111724ba675SRob Herring				ldo1_reg: ldo1 {
2112724ba675SRob Herring					regulator-name = "vdd_pexa,vdd_pexb";
2113724ba675SRob Herring					regulator-min-microvolt = <1050000>;
2114724ba675SRob Herring					regulator-max-microvolt = <1050000>;
2115724ba675SRob Herring					regulator-always-on;
2116724ba675SRob Herring				};
2117724ba675SRob Herring
2118724ba675SRob Herring				ldo2_reg: ldo2 {
2119724ba675SRob Herring					regulator-name = "vdd_sata,avdd_plle";
2120724ba675SRob Herring					regulator-min-microvolt = <1050000>;
2121724ba675SRob Herring					regulator-max-microvolt = <1050000>;
2122724ba675SRob Herring					regulator-always-on;
2123724ba675SRob Herring				};
2124724ba675SRob Herring
2125724ba675SRob Herring				/* LDO3 is not connected to anything */
2126724ba675SRob Herring
2127724ba675SRob Herring				ldo4_reg: ldo4 {
2128724ba675SRob Herring					regulator-name = "vdd_rtc";
2129724ba675SRob Herring					regulator-min-microvolt = <1200000>;
2130724ba675SRob Herring					regulator-max-microvolt = <1200000>;
2131724ba675SRob Herring					regulator-always-on;
2132724ba675SRob Herring				};
2133724ba675SRob Herring
2134724ba675SRob Herring				ldo5_reg: ldo5 {
2135724ba675SRob Herring					regulator-name = "vddio_sdmmc,avdd_vdac";
2136724ba675SRob Herring					regulator-min-microvolt = <1800000>;
2137724ba675SRob Herring					regulator-max-microvolt = <3300000>;
2138724ba675SRob Herring					regulator-always-on;
2139724ba675SRob Herring				};
2140724ba675SRob Herring
2141724ba675SRob Herring				ldo6_reg: ldo6 {
2142724ba675SRob Herring					regulator-name = "avdd_dsi_csi,pwrdet_mipi";
2143724ba675SRob Herring					regulator-min-microvolt = <1200000>;
2144724ba675SRob Herring					regulator-max-microvolt = <1200000>;
2145724ba675SRob Herring					regulator-always-on;
2146724ba675SRob Herring				};
2147724ba675SRob Herring
2148724ba675SRob Herring				ldo7_reg: ldo7 {
2149724ba675SRob Herring					regulator-name = "vdd_pllm,x,u,a_p_c_s";
2150724ba675SRob Herring					regulator-min-microvolt = <1200000>;
2151724ba675SRob Herring					regulator-max-microvolt = <1200000>;
2152724ba675SRob Herring					regulator-always-on;
2153724ba675SRob Herring				};
2154724ba675SRob Herring
2155724ba675SRob Herring				ldo8_reg: ldo8 {
2156724ba675SRob Herring					regulator-name = "vdd_ddr_hs";
2157724ba675SRob Herring					regulator-min-microvolt = <1000000>;
2158724ba675SRob Herring					regulator-max-microvolt = <1000000>;
2159724ba675SRob Herring					regulator-always-on;
2160724ba675SRob Herring				};
2161724ba675SRob Herring			};
2162724ba675SRob Herring		};
2163724ba675SRob Herring
2164724ba675SRob Herring		cpu_temp: nct1008@4c {
2165724ba675SRob Herring			compatible = "onnn,nct1008";
2166724ba675SRob Herring			reg = <0x4c>;
2167724ba675SRob Herring			vcc-supply = <&sys_3v3_reg>;
2168724ba675SRob Herring
2169724ba675SRob Herring			interrupt-parent = <&gpio>;
2170724ba675SRob Herring			interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>;
2171724ba675SRob Herring
2172724ba675SRob Herring			#thermal-sensor-cells = <1>;
2173724ba675SRob Herring		};
2174724ba675SRob Herring
2175724ba675SRob Herring		vdd_core: tps62361@60 {
2176724ba675SRob Herring			compatible = "ti,tps62361";
2177724ba675SRob Herring			reg = <0x60>;
2178724ba675SRob Herring
2179724ba675SRob Herring			regulator-name = "vdd_core";
2180724ba675SRob Herring			regulator-min-microvolt = <950000>;
2181724ba675SRob Herring			regulator-max-microvolt = <1350000>;
2182724ba675SRob Herring			regulator-coupled-with = <&vdd_cpu>;
2183724ba675SRob Herring			regulator-coupled-max-spread = <300000>;
2184724ba675SRob Herring			regulator-max-step-microvolt = <100000>;
2185724ba675SRob Herring			regulator-boot-on;
2186724ba675SRob Herring			regulator-always-on;
2187724ba675SRob Herring			ti,vsel0-state-high;
2188724ba675SRob Herring			ti,vsel1-state-high;
2189724ba675SRob Herring			ti,enable-vout-discharge;
2190724ba675SRob Herring
2191724ba675SRob Herring			nvidia,tegra-core-regulator;
2192724ba675SRob Herring		};
2193724ba675SRob Herring	};
2194724ba675SRob Herring
2195724ba675SRob Herring	pmc@7000e400 {
2196724ba675SRob Herring		status = "okay";
2197724ba675SRob Herring		nvidia,invert-interrupt;
2198724ba675SRob Herring		nvidia,suspend-mode = <1>;
2199724ba675SRob Herring		nvidia,cpu-pwr-good-time = <2000>;
2200724ba675SRob Herring		nvidia,cpu-pwr-off-time = <200>;
2201724ba675SRob Herring		nvidia,core-pwr-good-time = <3845 3845>;
2202724ba675SRob Herring		nvidia,core-pwr-off-time = <458>;
2203724ba675SRob Herring		nvidia,core-power-req-active-high;
2204724ba675SRob Herring		nvidia,sys-clock-req-active-high;
2205724ba675SRob Herring		core-supply = <&vdd_core>;
2206724ba675SRob Herring	};
2207724ba675SRob Herring
2208724ba675SRob Herring	memory-controller@7000f000 {
2209724ba675SRob Herring		emc-timings-0 {
2210724ba675SRob Herring			nvidia,ram-code = <0>; /* Samsung RAM */
2211724ba675SRob Herring
2212724ba675SRob Herring			timing-25500000 {
2213724ba675SRob Herring				clock-frequency = <25500000>;
2214724ba675SRob Herring				nvidia,emem-configuration = <
2215724ba675SRob Herring					0x00030003 /* MC_EMEM_ARB_CFG */
2216724ba675SRob Herring					0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2217724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2218724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
2219724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
2220724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
2221724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
2222724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2223724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2224724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2225724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2226724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
2227724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
2228724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2229724ba675SRob Herring					0x06020102 /* MC_EMEM_ARB_DA_TURNS */
2230724ba675SRob Herring					0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
2231724ba675SRob Herring					0x75830303 /* MC_EMEM_ARB_MISC0 */
2232724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2233724ba675SRob Herring				>;
2234724ba675SRob Herring			};
2235724ba675SRob Herring
2236724ba675SRob Herring			timing-51000000 {
2237724ba675SRob Herring				clock-frequency = <51000000>;
2238724ba675SRob Herring				nvidia,emem-configuration = <
2239724ba675SRob Herring					0x00010003 /* MC_EMEM_ARB_CFG */
2240724ba675SRob Herring					0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2241724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2242724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
2243724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
2244724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
2245724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
2246724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2247724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2248724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2249724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2250724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
2251724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
2252724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2253724ba675SRob Herring					0x06020102 /* MC_EMEM_ARB_DA_TURNS */
2254724ba675SRob Herring					0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
2255724ba675SRob Herring					0x74630303 /* MC_EMEM_ARB_MISC0 */
2256724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2257724ba675SRob Herring				>;
2258724ba675SRob Herring			};
2259724ba675SRob Herring
2260724ba675SRob Herring			timing-102000000 {
2261724ba675SRob Herring				clock-frequency = <102000000>;
2262724ba675SRob Herring				nvidia,emem-configuration = <
2263724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_CFG */
2264724ba675SRob Herring					0xc0000018 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2265724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2266724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
2267724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RC */
2268724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
2269724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
2270724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2271724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2272724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2273724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2274724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
2275724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
2276724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2277724ba675SRob Herring					0x06020102 /* MC_EMEM_ARB_DA_TURNS */
2278724ba675SRob Herring					0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
2279724ba675SRob Herring					0x73c30504 /* MC_EMEM_ARB_MISC0 */
2280724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2281724ba675SRob Herring				>;
2282724ba675SRob Herring			};
2283724ba675SRob Herring
2284724ba675SRob Herring			timing-204000000 {
2285724ba675SRob Herring				clock-frequency = <204000000>;
2286724ba675SRob Herring				nvidia,emem-configuration = <
2287724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_CFG */
2288724ba675SRob Herring					0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2289724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2290724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
2291724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RC */
2292724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
2293724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
2294724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2295724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2296724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2297724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2298724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
2299724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
2300724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2301724ba675SRob Herring					0x06020102 /* MC_EMEM_ARB_DA_TURNS */
2302724ba675SRob Herring					0x000a0505 /* MC_EMEM_ARB_DA_COVERS */
2303724ba675SRob Herring					0x73840a06 /* MC_EMEM_ARB_MISC0 */
2304724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2305724ba675SRob Herring				>;
2306724ba675SRob Herring			};
2307724ba675SRob Herring
2308724ba675SRob Herring			timing-400000000 {
2309724ba675SRob Herring				clock-frequency = <400000000>;
2310724ba675SRob Herring				nvidia,emem-configuration = <
2311724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_CFG */
2312724ba675SRob Herring					0xc0000048 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2313724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2314724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RP */
2315724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_TIMING_RC */
2316724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RAS */
2317724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_FAW */
2318724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2319724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2320724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2321724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2322724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
2323724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
2324724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2325724ba675SRob Herring					0x06030202 /* MC_EMEM_ARB_DA_TURNS */
2326724ba675SRob Herring					0x000d0709 /* MC_EMEM_ARB_DA_COVERS */
2327724ba675SRob Herring					0x7086120a /* MC_EMEM_ARB_MISC0 */
2328724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2329724ba675SRob Herring				>;
2330724ba675SRob Herring			};
2331724ba675SRob Herring
2332724ba675SRob Herring			timing-800000000 {
2333724ba675SRob Herring				clock-frequency = <800000000>;
2334724ba675SRob Herring				nvidia,emem-configuration = <
2335724ba675SRob Herring					0x00000018 /* MC_EMEM_ARB_CFG */
2336724ba675SRob Herring					0xc0000090 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2337724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_RCD */
2338724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RP */
2339724ba675SRob Herring					0x00000013 /* MC_EMEM_ARB_TIMING_RC */
2340724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_TIMING_RAS */
2341724ba675SRob Herring					0x0000000f /* MC_EMEM_ARB_TIMING_FAW */
2342724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RRD */
2343724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2344724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */
2345724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2346724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
2347724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
2348724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
2349724ba675SRob Herring					0x08040202 /* MC_EMEM_ARB_DA_TURNS */
2350724ba675SRob Herring					0x00160d13 /* MC_EMEM_ARB_DA_COVERS */
2351724ba675SRob Herring					0x712c2414 /* MC_EMEM_ARB_MISC0 */
2352724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2353724ba675SRob Herring				>;
2354724ba675SRob Herring			};
2355724ba675SRob Herring		};
2356724ba675SRob Herring
2357724ba675SRob Herring		emc-timings-1 {
2358724ba675SRob Herring			nvidia,ram-code = <1>; /* Hynix M RAM */
2359724ba675SRob Herring
2360724ba675SRob Herring			timing-25500000 {
2361724ba675SRob Herring				clock-frequency = <25500000>;
2362724ba675SRob Herring				nvidia,emem-configuration = <
2363724ba675SRob Herring					0x00030003 /* MC_EMEM_ARB_CFG */
2364724ba675SRob Herring					0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2365724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2366724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
2367724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
2368724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
2369724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
2370724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2371724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2372724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2373724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2374724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
2375724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
2376724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2377724ba675SRob Herring					0x06020102 /* MC_EMEM_ARB_DA_TURNS */
2378724ba675SRob Herring					0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
2379724ba675SRob Herring					0x75830303 /* MC_EMEM_ARB_MISC0 */
2380724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2381724ba675SRob Herring				>;
2382724ba675SRob Herring			};
2383724ba675SRob Herring
2384724ba675SRob Herring			timing-51000000 {
2385724ba675SRob Herring				clock-frequency = <51000000>;
2386724ba675SRob Herring				nvidia,emem-configuration = <
2387724ba675SRob Herring					0x00010003 /* MC_EMEM_ARB_CFG */
2388724ba675SRob Herring					0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2389724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2390724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
2391724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
2392724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
2393724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
2394724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2395724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2396724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2397724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2398724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
2399724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
2400724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2401724ba675SRob Herring					0x06020102 /* MC_EMEM_ARB_DA_TURNS */
2402724ba675SRob Herring					0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
2403724ba675SRob Herring					0x74630303 /* MC_EMEM_ARB_MISC0 */
2404724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2405724ba675SRob Herring				>;
2406724ba675SRob Herring			};
2407724ba675SRob Herring
2408724ba675SRob Herring			timing-102000000 {
2409724ba675SRob Herring				clock-frequency = <102000000>;
2410724ba675SRob Herring				nvidia,emem-configuration = <
2411724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_CFG */
2412724ba675SRob Herring					0xc0000018 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2413724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2414724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
2415724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RC */
2416724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
2417724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
2418724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2419724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2420724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2421724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2422724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
2423724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
2424724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2425724ba675SRob Herring					0x06020102 /* MC_EMEM_ARB_DA_TURNS */
2426724ba675SRob Herring					0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
2427724ba675SRob Herring					0x73c30504 /* MC_EMEM_ARB_MISC0 */
2428724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2429724ba675SRob Herring				>;
2430724ba675SRob Herring			};
2431724ba675SRob Herring
2432724ba675SRob Herring			timing-204000000 {
2433724ba675SRob Herring				clock-frequency = <204000000>;
2434724ba675SRob Herring				nvidia,emem-configuration = <
2435724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_CFG */
2436724ba675SRob Herring					0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2437724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2438724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
2439724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RC */
2440724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
2441724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
2442724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2443724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2444724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2445724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2446724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
2447724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
2448724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2449724ba675SRob Herring					0x06020102 /* MC_EMEM_ARB_DA_TURNS */
2450724ba675SRob Herring					0x000a0505 /* MC_EMEM_ARB_DA_COVERS */
2451724ba675SRob Herring					0x73840a06 /* MC_EMEM_ARB_MISC0 */
2452724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2453724ba675SRob Herring				>;
2454724ba675SRob Herring			};
2455724ba675SRob Herring
2456724ba675SRob Herring			timing-400000000 {
2457724ba675SRob Herring				clock-frequency = <400000000>;
2458724ba675SRob Herring				nvidia,emem-configuration = <
2459724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_CFG */
2460724ba675SRob Herring					0xc0000048 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2461724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2462724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RP */
2463724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_TIMING_RC */
2464724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RAS */
2465724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_FAW */
2466724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2467724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2468724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2469724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2470724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
2471724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
2472724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2473724ba675SRob Herring					0x06030202 /* MC_EMEM_ARB_DA_TURNS */
2474724ba675SRob Herring					0x000d0709 /* MC_EMEM_ARB_DA_COVERS */
2475724ba675SRob Herring					0x7086120a /* MC_EMEM_ARB_MISC0 */
2476724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2477724ba675SRob Herring				>;
2478724ba675SRob Herring			};
2479724ba675SRob Herring
2480724ba675SRob Herring			timing-800000000 {
2481724ba675SRob Herring				clock-frequency = <800000000>;
2482724ba675SRob Herring				nvidia,emem-configuration = <
2483724ba675SRob Herring					0x00000018 /* MC_EMEM_ARB_CFG */
2484724ba675SRob Herring					0xc0000090 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2485724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_RCD */
2486724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RP */
2487724ba675SRob Herring					0x00000013 /* MC_EMEM_ARB_TIMING_RC */
2488724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_TIMING_RAS */
2489724ba675SRob Herring					0x0000000f /* MC_EMEM_ARB_TIMING_FAW */
2490724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RRD */
2491724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2492724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */
2493724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2494724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
2495724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
2496724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
2497724ba675SRob Herring					0x08040202 /* MC_EMEM_ARB_DA_TURNS */
2498724ba675SRob Herring					0x00160d13 /* MC_EMEM_ARB_DA_COVERS */
2499724ba675SRob Herring					0x712c2414 /* MC_EMEM_ARB_MISC0 */
2500724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2501724ba675SRob Herring				>;
2502724ba675SRob Herring			};
2503724ba675SRob Herring		};
2504724ba675SRob Herring
2505724ba675SRob Herring		emc-timings-2 {
2506724ba675SRob Herring			nvidia,ram-code = <2>; /* Hynix A RAM */
2507724ba675SRob Herring
2508724ba675SRob Herring			timing-25500000 {
2509724ba675SRob Herring				clock-frequency = <25500000>;
2510724ba675SRob Herring				nvidia,emem-configuration = <
2511724ba675SRob Herring					0x00030003 /* MC_EMEM_ARB_CFG */
2512724ba675SRob Herring					0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2513724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2514724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
2515724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
2516724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
2517724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
2518724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2519724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2520724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2521724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2522724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
2523724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
2524724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2525724ba675SRob Herring					0x06020102 /* MC_EMEM_ARB_DA_TURNS */
2526724ba675SRob Herring					0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
2527724ba675SRob Herring					0x75e30303 /* MC_EMEM_ARB_MISC0 */
2528724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2529724ba675SRob Herring				>;
2530724ba675SRob Herring			};
2531724ba675SRob Herring
2532724ba675SRob Herring			timing-51000000 {
2533724ba675SRob Herring				clock-frequency = <51000000>;
2534724ba675SRob Herring				nvidia,emem-configuration = <
2535724ba675SRob Herring					0x00010003 /* MC_EMEM_ARB_CFG */
2536724ba675SRob Herring					0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2537724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2538724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
2539724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
2540724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
2541724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
2542724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2543724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2544724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2545724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2546724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
2547724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
2548724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2549724ba675SRob Herring					0x06020102 /* MC_EMEM_ARB_DA_TURNS */
2550724ba675SRob Herring					0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
2551724ba675SRob Herring					0x74e30303 /* MC_EMEM_ARB_MISC0 */
2552724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2553724ba675SRob Herring				>;
2554724ba675SRob Herring			};
2555724ba675SRob Herring
2556724ba675SRob Herring			timing-102000000 {
2557724ba675SRob Herring				clock-frequency = <102000000>;
2558724ba675SRob Herring				nvidia,emem-configuration = <
2559724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_CFG */
2560724ba675SRob Herring					0xc0000018 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2561724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2562724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
2563724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RC */
2564724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
2565724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
2566724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2567724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2568724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2569724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2570724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
2571724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
2572724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2573724ba675SRob Herring					0x06020102 /* MC_EMEM_ARB_DA_TURNS */
2574724ba675SRob Herring					0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
2575724ba675SRob Herring					0x74430504 /* MC_EMEM_ARB_MISC0 */
2576724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2577724ba675SRob Herring				>;
2578724ba675SRob Herring			};
2579724ba675SRob Herring
2580724ba675SRob Herring			timing-204000000 {
2581724ba675SRob Herring				clock-frequency = <204000000>;
2582724ba675SRob Herring				nvidia,emem-configuration = <
2583724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_CFG */
2584724ba675SRob Herring					0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2585724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2586724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
2587724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RC */
2588724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
2589724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
2590724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2591724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2592724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2593724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2594724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
2595724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
2596724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2597724ba675SRob Herring					0x06020102 /* MC_EMEM_ARB_DA_TURNS */
2598724ba675SRob Herring					0x000a0505 /* MC_EMEM_ARB_DA_COVERS */
2599724ba675SRob Herring					0x74040a06 /* MC_EMEM_ARB_MISC0 */
2600724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2601724ba675SRob Herring				>;
2602724ba675SRob Herring			};
2603724ba675SRob Herring
2604724ba675SRob Herring			timing-400000000 {
2605724ba675SRob Herring				clock-frequency = <400000000>;
2606724ba675SRob Herring				nvidia,emem-configuration = <
2607724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_CFG */
2608724ba675SRob Herring					0xc0000048 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2609724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
2610724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RP */
2611724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_TIMING_RC */
2612724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RAS */
2613724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_FAW */
2614724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
2615724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2616724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
2617724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2618724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
2619724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
2620724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
2621724ba675SRob Herring					0x06030202 /* MC_EMEM_ARB_DA_TURNS */
2622724ba675SRob Herring					0x000d0709 /* MC_EMEM_ARB_DA_COVERS */
2623724ba675SRob Herring					0x7086120a /* MC_EMEM_ARB_MISC0 */
2624724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2625724ba675SRob Herring				>;
2626724ba675SRob Herring			};
2627724ba675SRob Herring
2628724ba675SRob Herring			timing-800000000 {
2629724ba675SRob Herring				clock-frequency = <800000000>;
2630724ba675SRob Herring				nvidia,emem-configuration = <
2631724ba675SRob Herring					0x00000018 /* MC_EMEM_ARB_CFG */
2632724ba675SRob Herring					0xc0000090 /* MC_EMEM_ARB_OUTSTANDING_REQ */
2633724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_RCD */
2634724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RP */
2635724ba675SRob Herring					0x00000013 /* MC_EMEM_ARB_TIMING_RC */
2636724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_TIMING_RAS */
2637724ba675SRob Herring					0x0000000f /* MC_EMEM_ARB_TIMING_FAW */
2638724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RRD */
2639724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
2640724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */
2641724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
2642724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
2643724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
2644724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
2645724ba675SRob Herring					0x08040202 /* MC_EMEM_ARB_DA_TURNS */
2646724ba675SRob Herring					0x00160d13 /* MC_EMEM_ARB_DA_COVERS */
2647724ba675SRob Herring					0x712c2414 /* MC_EMEM_ARB_MISC0 */
2648724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
2649724ba675SRob Herring				>;
2650724ba675SRob Herring			};
2651724ba675SRob Herring		};
2652724ba675SRob Herring	};
2653724ba675SRob Herring
2654724ba675SRob Herring	memory-controller@7000f400 {
2655724ba675SRob Herring		emc-timings-0 {
2656724ba675SRob Herring			nvidia,ram-code = <0>;  /* Samsung RAM */
2657724ba675SRob Herring
2658724ba675SRob Herring			timing-25500000 {
2659724ba675SRob Herring				clock-frequency = <25500000>;
2660724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
2661724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
2662724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
2663724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
2664724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
2665724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
2666724ba675SRob Herring				nvidia,emc-cfg-dyn-self-ref;
2667724ba675SRob Herring				nvidia,emc-configuration = <
2668724ba675SRob Herring					0x00000001 /* EMC_RC */
2669724ba675SRob Herring					0x00000006 /* EMC_RFC */
2670724ba675SRob Herring					0x00000000 /* EMC_RAS */
2671724ba675SRob Herring					0x00000000 /* EMC_RP */
2672724ba675SRob Herring					0x00000002 /* EMC_R2W */
2673724ba675SRob Herring					0x0000000a /* EMC_W2R */
2674724ba675SRob Herring					0x00000005 /* EMC_R2P */
2675724ba675SRob Herring					0x0000000b /* EMC_W2P */
2676724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
2677724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
2678724ba675SRob Herring					0x00000003 /* EMC_RRD */
2679724ba675SRob Herring					0x00000001 /* EMC_REXT */
2680724ba675SRob Herring					0x00000000 /* EMC_WEXT */
2681724ba675SRob Herring					0x00000005 /* EMC_WDV */
2682724ba675SRob Herring					0x00000005 /* EMC_QUSE */
2683724ba675SRob Herring					0x00000004 /* EMC_QRST */
2684724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
2685724ba675SRob Herring					0x0000000b /* EMC_RDV */
2686724ba675SRob Herring					0x000000c0 /* EMC_REFRESH */
2687724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
2688724ba675SRob Herring					0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */
2689724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
2690724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
2691724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
2692724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
2693724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
2694724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
2695724ba675SRob Herring					0x00000007 /* EMC_TXSR */
2696724ba675SRob Herring					0x00000007 /* EMC_TXSRDLL */
2697724ba675SRob Herring					0x00000004 /* EMC_TCKE */
2698724ba675SRob Herring					0x00000002 /* EMC_TFAW */
2699724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
2700724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
2701724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
2702724ba675SRob Herring					0x000000c7 /* EMC_TREFBW */
2703724ba675SRob Herring					0x00000006 /* EMC_QUSE_EXTRA */
2704724ba675SRob Herring					0x00000004 /* EMC_FBIO_CFG6 */
2705724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
2706724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
2707724ba675SRob Herring					0x00004288 /* EMC_FBIO_CFG5 */
2708724ba675SRob Herring					0x007800a4 /* EMC_CFG_DIG_DLL */
2709724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2710724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS0 */
2711724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS1 */
2712724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS2 */
2713724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS3 */
2714724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS4 */
2715724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS5 */
2716724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS6 */
2717724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS7 */
2718724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2719724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2720724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2721724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2722724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2723724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2724724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2725724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2726724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2727724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2728724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2729724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2730724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2731724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2732724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2733724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2734724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
2735724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
2736724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
2737724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
2738724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
2739724ba675SRob Herring					0x0800211c /* EMC_XM2DQSPADCTRL2 */
2740724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
2741724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
2742724ba675SRob Herring					0x01f1f108 /* EMC_XM2COMPPADCTRL */
2743724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
2744724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2745724ba675SRob Herring					0x08000168 /* EMC_XM2QUSEPADCTRL */
2746724ba675SRob Herring					0x08000000 /* EMC_XM2DQSPADCTRL3 */
2747724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
2748724ba675SRob Herring					0x00000000 /* EMC_ZCAL_INTERVAL */
2749724ba675SRob Herring					0x00000040 /* EMC_ZCAL_WAIT_CNT */
2750724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT */
2751724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2752724ba675SRob Herring					0x00000000 /* EMC_CTT */
2753724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
2754724ba675SRob Herring					0x80000287 /* EMC_DYN_SELF_REF_CONTROL */
2755724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
2756724ba675SRob Herring					0xff00ff00 /* EMC_CFG_RSV */
2757724ba675SRob Herring				>;
2758724ba675SRob Herring			};
2759724ba675SRob Herring
2760724ba675SRob Herring			timing-51000000 {
2761724ba675SRob Herring				clock-frequency = <51000000>;
2762724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
2763724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
2764724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
2765724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
2766724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
2767724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
2768724ba675SRob Herring				nvidia,emc-cfg-dyn-self-ref;
2769724ba675SRob Herring				nvidia,emc-configuration = <
2770724ba675SRob Herring					0x00000002 /* EMC_RC */
2771724ba675SRob Herring					0x0000000d /* EMC_RFC */
2772724ba675SRob Herring					0x00000001 /* EMC_RAS */
2773724ba675SRob Herring					0x00000000 /* EMC_RP */
2774724ba675SRob Herring					0x00000002 /* EMC_R2W */
2775724ba675SRob Herring					0x0000000a /* EMC_W2R */
2776724ba675SRob Herring					0x00000005 /* EMC_R2P */
2777724ba675SRob Herring					0x0000000b /* EMC_W2P */
2778724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
2779724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
2780724ba675SRob Herring					0x00000003 /* EMC_RRD */
2781724ba675SRob Herring					0x00000001 /* EMC_REXT */
2782724ba675SRob Herring					0x00000000 /* EMC_WEXT */
2783724ba675SRob Herring					0x00000005 /* EMC_WDV */
2784724ba675SRob Herring					0x00000005 /* EMC_QUSE */
2785724ba675SRob Herring					0x00000004 /* EMC_QRST */
2786724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
2787724ba675SRob Herring					0x0000000b /* EMC_RDV */
2788724ba675SRob Herring					0x00000181 /* EMC_REFRESH */
2789724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
2790724ba675SRob Herring					0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */
2791724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
2792724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
2793724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
2794724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
2795724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
2796724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
2797724ba675SRob Herring					0x0000000e /* EMC_TXSR */
2798724ba675SRob Herring					0x0000000e /* EMC_TXSRDLL */
2799724ba675SRob Herring					0x00000004 /* EMC_TCKE */
2800724ba675SRob Herring					0x00000003 /* EMC_TFAW */
2801724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
2802724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
2803724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
2804724ba675SRob Herring					0x0000018e /* EMC_TREFBW */
2805724ba675SRob Herring					0x00000006 /* EMC_QUSE_EXTRA */
2806724ba675SRob Herring					0x00000004 /* EMC_FBIO_CFG6 */
2807724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
2808724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
2809724ba675SRob Herring					0x00004288 /* EMC_FBIO_CFG5 */
2810724ba675SRob Herring					0x007800a4 /* EMC_CFG_DIG_DLL */
2811724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2812724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS0 */
2813724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS1 */
2814724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS2 */
2815724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS3 */
2816724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS4 */
2817724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS5 */
2818724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS6 */
2819724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS7 */
2820724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2821724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2822724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2823724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2824724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2825724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2826724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2827724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2828724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2829724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2830724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2831724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2832724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2833724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2834724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2835724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2836724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
2837724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
2838724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
2839724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
2840724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
2841724ba675SRob Herring					0x0800211c /* EMC_XM2DQSPADCTRL2 */
2842724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
2843724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
2844724ba675SRob Herring					0x01f1f108 /* EMC_XM2COMPPADCTRL */
2845724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
2846724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2847724ba675SRob Herring					0x08000168 /* EMC_XM2QUSEPADCTRL */
2848724ba675SRob Herring					0x08000000 /* EMC_XM2DQSPADCTRL3 */
2849724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
2850724ba675SRob Herring					0x00000000 /* EMC_ZCAL_INTERVAL */
2851724ba675SRob Herring					0x00000040 /* EMC_ZCAL_WAIT_CNT */
2852724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT */
2853724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2854724ba675SRob Herring					0x00000000 /* EMC_CTT */
2855724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
2856724ba675SRob Herring					0x8000040b /* EMC_DYN_SELF_REF_CONTROL */
2857724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
2858724ba675SRob Herring					0xff00ff00 /* EMC_CFG_RSV */
2859724ba675SRob Herring				>;
2860724ba675SRob Herring			};
2861724ba675SRob Herring
2862724ba675SRob Herring			timing-102000000 {
2863724ba675SRob Herring				clock-frequency = <102000000>;
2864724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
2865724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
2866724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
2867724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
2868724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
2869724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
2870724ba675SRob Herring				nvidia,emc-cfg-dyn-self-ref;
2871724ba675SRob Herring				nvidia,emc-configuration = <
2872724ba675SRob Herring					0x00000004 /* EMC_RC */
2873724ba675SRob Herring					0x0000001a /* EMC_RFC */
2874724ba675SRob Herring					0x00000003 /* EMC_RAS */
2875724ba675SRob Herring					0x00000001 /* EMC_RP */
2876724ba675SRob Herring					0x00000002 /* EMC_R2W */
2877724ba675SRob Herring					0x0000000a /* EMC_W2R */
2878724ba675SRob Herring					0x00000005 /* EMC_R2P */
2879724ba675SRob Herring					0x0000000b /* EMC_W2P */
2880724ba675SRob Herring					0x00000001 /* EMC_RD_RCD */
2881724ba675SRob Herring					0x00000001 /* EMC_WR_RCD */
2882724ba675SRob Herring					0x00000003 /* EMC_RRD */
2883724ba675SRob Herring					0x00000001 /* EMC_REXT */
2884724ba675SRob Herring					0x00000000 /* EMC_WEXT */
2885724ba675SRob Herring					0x00000005 /* EMC_WDV */
2886724ba675SRob Herring					0x00000005 /* EMC_QUSE */
2887724ba675SRob Herring					0x00000004 /* EMC_QRST */
2888724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
2889724ba675SRob Herring					0x0000000b /* EMC_RDV */
2890724ba675SRob Herring					0x00000303 /* EMC_REFRESH */
2891724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
2892724ba675SRob Herring					0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */
2893724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
2894724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
2895724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
2896724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
2897724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
2898724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
2899724ba675SRob Herring					0x0000001c /* EMC_TXSR */
2900724ba675SRob Herring					0x0000001c /* EMC_TXSRDLL */
2901724ba675SRob Herring					0x00000004 /* EMC_TCKE */
2902724ba675SRob Herring					0x00000005 /* EMC_TFAW */
2903724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
2904724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
2905724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
2906724ba675SRob Herring					0x0000031c /* EMC_TREFBW */
2907724ba675SRob Herring					0x00000006 /* EMC_QUSE_EXTRA */
2908724ba675SRob Herring					0x00000004 /* EMC_FBIO_CFG6 */
2909724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
2910724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
2911724ba675SRob Herring					0x00004288 /* EMC_FBIO_CFG5 */
2912724ba675SRob Herring					0x007800a4 /* EMC_CFG_DIG_DLL */
2913724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2914724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS0 */
2915724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS1 */
2916724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS2 */
2917724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS3 */
2918724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS4 */
2919724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS5 */
2920724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS6 */
2921724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS7 */
2922724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2923724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2924724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2925724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2926724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2927724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2928724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2929724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2930724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2931724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2932724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2933724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2934724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2935724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2936724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2937724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2938724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
2939724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
2940724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
2941724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
2942724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
2943724ba675SRob Herring					0x0800211c /* EMC_XM2DQSPADCTRL2 */
2944724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
2945724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
2946724ba675SRob Herring					0x01f1f108 /* EMC_XM2COMPPADCTRL */
2947724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
2948724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2949724ba675SRob Herring					0x08000168 /* EMC_XM2QUSEPADCTRL */
2950724ba675SRob Herring					0x08000000 /* EMC_XM2DQSPADCTRL3 */
2951724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
2952724ba675SRob Herring					0x00000000 /* EMC_ZCAL_INTERVAL */
2953724ba675SRob Herring					0x00000040 /* EMC_ZCAL_WAIT_CNT */
2954724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT */
2955724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2956724ba675SRob Herring					0x00000000 /* EMC_CTT */
2957724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
2958724ba675SRob Herring					0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
2959724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
2960724ba675SRob Herring					0xff00ff00 /* EMC_CFG_RSV */
2961724ba675SRob Herring				>;
2962724ba675SRob Herring			};
2963724ba675SRob Herring
2964724ba675SRob Herring			timing-204000000 {
2965724ba675SRob Herring				clock-frequency = <204000000>;
2966724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
2967724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
2968724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
2969724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
2970724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
2971724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
2972724ba675SRob Herring				nvidia,emc-cfg-dyn-self-ref;
2973724ba675SRob Herring				nvidia,emc-configuration = <
2974724ba675SRob Herring					0x00000009 /* EMC_RC */
2975724ba675SRob Herring					0x00000035 /* EMC_RFC */
2976724ba675SRob Herring					0x00000007 /* EMC_RAS */
2977724ba675SRob Herring					0x00000002 /* EMC_RP */
2978724ba675SRob Herring					0x00000002 /* EMC_R2W */
2979724ba675SRob Herring					0x0000000a /* EMC_W2R */
2980724ba675SRob Herring					0x00000005 /* EMC_R2P */
2981724ba675SRob Herring					0x0000000b /* EMC_W2P */
2982724ba675SRob Herring					0x00000002 /* EMC_RD_RCD */
2983724ba675SRob Herring					0x00000002 /* EMC_WR_RCD */
2984724ba675SRob Herring					0x00000003 /* EMC_RRD */
2985724ba675SRob Herring					0x00000001 /* EMC_REXT */
2986724ba675SRob Herring					0x00000000 /* EMC_WEXT */
2987724ba675SRob Herring					0x00000005 /* EMC_WDV */
2988724ba675SRob Herring					0x00000005 /* EMC_QUSE */
2989724ba675SRob Herring					0x00000004 /* EMC_QRST */
2990724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
2991724ba675SRob Herring					0x0000000b /* EMC_RDV */
2992724ba675SRob Herring					0x00000607 /* EMC_REFRESH */
2993724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
2994724ba675SRob Herring					0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
2995724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
2996724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
2997724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
2998724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
2999724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
3000724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3001724ba675SRob Herring					0x00000038 /* EMC_TXSR */
3002724ba675SRob Herring					0x00000038 /* EMC_TXSRDLL */
3003724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3004724ba675SRob Herring					0x00000009 /* EMC_TFAW */
3005724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3006724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
3007724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3008724ba675SRob Herring					0x00000638 /* EMC_TREFBW */
3009724ba675SRob Herring					0x00000006 /* EMC_QUSE_EXTRA */
3010724ba675SRob Herring					0x00000006 /* EMC_FBIO_CFG6 */
3011724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3012724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3013724ba675SRob Herring					0x00004288 /* EMC_FBIO_CFG5 */
3014724ba675SRob Herring					0x004400a4 /* EMC_CFG_DIG_DLL */
3015724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3016724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS0 */
3017724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS1 */
3018724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS2 */
3019724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS3 */
3020724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS4 */
3021724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS5 */
3022724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS6 */
3023724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS7 */
3024724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3025724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3026724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3027724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3028724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3029724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3030724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3031724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3032724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3033724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3034724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3035724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3036724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3037724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3038724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3039724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3040724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ0 */
3041724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ1 */
3042724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ2 */
3043724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ3 */
3044724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
3045724ba675SRob Herring					0x0800211c /* EMC_XM2DQSPADCTRL2 */
3046724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3047724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
3048724ba675SRob Herring					0x01f1f108 /* EMC_XM2COMPPADCTRL */
3049724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
3050724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
3051724ba675SRob Herring					0x08000168 /* EMC_XM2QUSEPADCTRL */
3052724ba675SRob Herring					0x08000000 /* EMC_XM2DQSPADCTRL3 */
3053724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
3054724ba675SRob Herring					0x00020000 /* EMC_ZCAL_INTERVAL */
3055724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
3056724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT */
3057724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
3058724ba675SRob Herring					0x00000000 /* EMC_CTT */
3059724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
3060724ba675SRob Herring					0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
3061724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
3062724ba675SRob Herring					0xff00ff00 /* EMC_CFG_RSV */
3063724ba675SRob Herring				>;
3064724ba675SRob Herring			};
3065724ba675SRob Herring
3066724ba675SRob Herring			timing-400000000 {
3067724ba675SRob Herring				clock-frequency = <400000000>;
3068724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3069724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
3070724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200000>;
3071724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000521>;
3072724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
3073724ba675SRob Herring				nvidia,emc-configuration = <
3074724ba675SRob Herring					0x00000012 /* EMC_RC */
3075724ba675SRob Herring					0x00000066 /* EMC_RFC */
3076724ba675SRob Herring					0x0000000c /* EMC_RAS */
3077724ba675SRob Herring					0x00000004 /* EMC_RP */
3078724ba675SRob Herring					0x00000003 /* EMC_R2W */
3079724ba675SRob Herring					0x00000008 /* EMC_W2R */
3080724ba675SRob Herring					0x00000002 /* EMC_R2P */
3081724ba675SRob Herring					0x0000000a /* EMC_W2P */
3082724ba675SRob Herring					0x00000004 /* EMC_RD_RCD */
3083724ba675SRob Herring					0x00000004 /* EMC_WR_RCD */
3084724ba675SRob Herring					0x00000002 /* EMC_RRD */
3085724ba675SRob Herring					0x00000001 /* EMC_REXT */
3086724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3087724ba675SRob Herring					0x00000004 /* EMC_WDV */
3088724ba675SRob Herring					0x00000006 /* EMC_QUSE */
3089724ba675SRob Herring					0x00000004 /* EMC_QRST */
3090724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
3091724ba675SRob Herring					0x0000000c /* EMC_RDV */
3092724ba675SRob Herring					0x00000bf0 /* EMC_REFRESH */
3093724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3094724ba675SRob Herring					0x000002fc /* EMC_PRE_REFRESH_REQ_CNT */
3095724ba675SRob Herring					0x00000001 /* EMC_PDEX2WR */
3096724ba675SRob Herring					0x00000008 /* EMC_PDEX2RD */
3097724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3098724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3099724ba675SRob Herring					0x00000008 /* EMC_AR2PDEN */
3100724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3101724ba675SRob Herring					0x0000006c /* EMC_TXSR */
3102724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
3103724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3104724ba675SRob Herring					0x00000010 /* EMC_TFAW */
3105724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3106724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
3107724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3108724ba675SRob Herring					0x00000c30 /* EMC_TREFBW */
3109724ba675SRob Herring					0x00000000 /* EMC_QUSE_EXTRA */
3110724ba675SRob Herring					0x00000004 /* EMC_FBIO_CFG6 */
3111724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3112724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3113724ba675SRob Herring					0x00007088 /* EMC_FBIO_CFG5 */
3114724ba675SRob Herring					0x001d0084 /* EMC_CFG_DIG_DLL */
3115724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3116724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS0 */
3117724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS1 */
3118724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS2 */
3119724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS3 */
3120724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS4 */
3121724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS5 */
3122724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS6 */
3123724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS7 */
3124724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3125724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3126724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3127724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3128724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3129724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3130724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3131724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3132724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3133724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3134724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3135724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3136724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3137724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3138724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3139724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3140724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ0 */
3141724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ1 */
3142724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ2 */
3143724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ3 */
3144724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
3145724ba675SRob Herring					0x0800013d /* EMC_XM2DQSPADCTRL2 */
3146724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3147724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
3148724ba675SRob Herring					0x01f1f508 /* EMC_XM2COMPPADCTRL */
3149724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
3150724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
3151724ba675SRob Herring					0x080001e8 /* EMC_XM2QUSEPADCTRL */
3152724ba675SRob Herring					0x08000021 /* EMC_XM2DQSPADCTRL3 */
3153724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
3154724ba675SRob Herring					0x00020000 /* EMC_ZCAL_INTERVAL */
3155724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
3156724ba675SRob Herring					0x0158000c /* EMC_MRS_WAIT_CNT */
3157724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
3158724ba675SRob Herring					0x00000000 /* EMC_CTT */
3159724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
3160724ba675SRob Herring					0x800018c8 /* EMC_DYN_SELF_REF_CONTROL */
3161724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
3162724ba675SRob Herring					0xff00ff89 /* EMC_CFG_RSV */
3163724ba675SRob Herring				>;
3164724ba675SRob Herring			};
3165724ba675SRob Herring
3166724ba675SRob Herring			timing-800000000 {
3167724ba675SRob Herring				clock-frequency = <800000000>;
3168724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3169724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
3170724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200018>;
3171724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000d71>;
3172724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
3173724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
3174724ba675SRob Herring				nvidia,emc-configuration = <
3175724ba675SRob Herring					0x00000025 /* EMC_RC */
3176724ba675SRob Herring					0x000000ce /* EMC_RFC */
3177724ba675SRob Herring					0x0000001a /* EMC_RAS */
3178724ba675SRob Herring					0x00000009 /* EMC_RP */
3179724ba675SRob Herring					0x00000005 /* EMC_R2W */
3180724ba675SRob Herring					0x0000000d /* EMC_W2R */
3181724ba675SRob Herring					0x00000004 /* EMC_R2P */
3182724ba675SRob Herring					0x00000013 /* EMC_W2P */
3183724ba675SRob Herring					0x00000009 /* EMC_RD_RCD */
3184724ba675SRob Herring					0x00000009 /* EMC_WR_RCD */
3185724ba675SRob Herring					0x00000004 /* EMC_RRD */
3186724ba675SRob Herring					0x00000001 /* EMC_REXT */
3187724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3188724ba675SRob Herring					0x00000007 /* EMC_WDV */
3189724ba675SRob Herring					0x0000000a /* EMC_QUSE */
3190724ba675SRob Herring					0x00000009 /* EMC_QRST */
3191724ba675SRob Herring					0x0000000b /* EMC_QSAFE */
3192724ba675SRob Herring					0x00000011 /* EMC_RDV */
3193724ba675SRob Herring					0x00001820 /* EMC_REFRESH */
3194724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3195724ba675SRob Herring					0x00000608 /* EMC_PRE_REFRESH_REQ_CNT */
3196724ba675SRob Herring					0x00000003 /* EMC_PDEX2WR */
3197724ba675SRob Herring					0x00000012 /* EMC_PDEX2RD */
3198724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3199724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3200724ba675SRob Herring					0x0000000f /* EMC_AR2PDEN */
3201724ba675SRob Herring					0x00000018 /* EMC_RW2PDEN */
3202724ba675SRob Herring					0x000000d8 /* EMC_TXSR */
3203724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
3204724ba675SRob Herring					0x00000005 /* EMC_TCKE */
3205724ba675SRob Herring					0x00000020 /* EMC_TFAW */
3206724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3207724ba675SRob Herring					0x00000007 /* EMC_TCLKSTABLE */
3208724ba675SRob Herring					0x00000008 /* EMC_TCLKSTOP */
3209724ba675SRob Herring					0x00001860 /* EMC_TREFBW */
3210724ba675SRob Herring					0x0000000b /* EMC_QUSE_EXTRA */
3211724ba675SRob Herring					0x00000006 /* EMC_FBIO_CFG6 */
3212724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3213724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3214724ba675SRob Herring					0x00005088 /* EMC_FBIO_CFG5 */
3215724ba675SRob Herring					0xf0070191 /* EMC_CFG_DIG_DLL */
3216724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3217724ba675SRob Herring					0x0000800a /* EMC_DLL_XFORM_DQS0 */
3218724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS1 */
3219724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS2 */
3220724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS3 */
3221724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS4 */
3222724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS5 */
3223724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS6 */
3224724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS7 */
3225724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE0 */
3226724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE1 */
3227724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE2 */
3228724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE3 */
3229724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE4 */
3230724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE5 */
3231724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE6 */
3232724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE7 */
3233724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3234724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3235724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3236724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3237724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3238724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3239724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3240724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3241724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ0 */
3242724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ1 */
3243724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ2 */
3244724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ3 */
3245724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
3246724ba675SRob Herring					0x0600013d /* EMC_XM2DQSPADCTRL2 */
3247724ba675SRob Herring					0x22220000 /* EMC_XM2DQPADCTRL2 */
3248724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
3249724ba675SRob Herring					0x01f1f501 /* EMC_XM2COMPPADCTRL */
3250724ba675SRob Herring					0x07077404 /* EMC_XM2VTTGENPADCTRL */
3251724ba675SRob Herring					0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
3252724ba675SRob Herring					0x080001e8 /* EMC_XM2QUSEPADCTRL */
3253724ba675SRob Herring					0x08000021 /* EMC_XM2DQSPADCTRL3 */
3254724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
3255724ba675SRob Herring					0x00020000 /* EMC_ZCAL_INTERVAL */
3256724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
3257724ba675SRob Herring					0x00f0000c /* EMC_MRS_WAIT_CNT */
3258724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
3259724ba675SRob Herring					0x00000000 /* EMC_CTT */
3260724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
3261724ba675SRob Herring					0x8000308c /* EMC_DYN_SELF_REF_CONTROL */
3262724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
3263724ba675SRob Herring					0xff00ff49 /* EMC_CFG_RSV */
3264724ba675SRob Herring				>;
3265724ba675SRob Herring			};
3266724ba675SRob Herring		};
3267724ba675SRob Herring
3268724ba675SRob Herring		emc-timings-1 {
3269724ba675SRob Herring			nvidia,ram-code = <1>;  /* Hynix M RAM */
3270724ba675SRob Herring
3271724ba675SRob Herring			timing-25500000 {
3272724ba675SRob Herring				clock-frequency = <25500000>;
3273724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3274724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
3275724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
3276724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
3277724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
3278724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
3279724ba675SRob Herring				nvidia,emc-cfg-dyn-self-ref;
3280724ba675SRob Herring				nvidia,emc-configuration = <
3281724ba675SRob Herring					0x00000001 /* EMC_RC */
3282724ba675SRob Herring					0x00000006 /* EMC_RFC */
3283724ba675SRob Herring					0x00000000 /* EMC_RAS */
3284724ba675SRob Herring					0x00000000 /* EMC_RP */
3285724ba675SRob Herring					0x00000002 /* EMC_R2W */
3286724ba675SRob Herring					0x0000000a /* EMC_W2R */
3287724ba675SRob Herring					0x00000005 /* EMC_R2P */
3288724ba675SRob Herring					0x0000000b /* EMC_W2P */
3289724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
3290724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
3291724ba675SRob Herring					0x00000003 /* EMC_RRD */
3292724ba675SRob Herring					0x00000001 /* EMC_REXT */
3293724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3294724ba675SRob Herring					0x00000005 /* EMC_WDV */
3295724ba675SRob Herring					0x00000005 /* EMC_QUSE */
3296724ba675SRob Herring					0x00000004 /* EMC_QRST */
3297724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
3298724ba675SRob Herring					0x0000000b /* EMC_RDV */
3299724ba675SRob Herring					0x000000c0 /* EMC_REFRESH */
3300724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3301724ba675SRob Herring					0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */
3302724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
3303724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
3304724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3305724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3306724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
3307724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3308724ba675SRob Herring					0x00000007 /* EMC_TXSR */
3309724ba675SRob Herring					0x00000007 /* EMC_TXSRDLL */
3310724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3311724ba675SRob Herring					0x00000002 /* EMC_TFAW */
3312724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3313724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
3314724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3315724ba675SRob Herring					0x000000c7 /* EMC_TREFBW */
3316724ba675SRob Herring					0x00000006 /* EMC_QUSE_EXTRA */
3317724ba675SRob Herring					0x00000004 /* EMC_FBIO_CFG6 */
3318724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3319724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3320724ba675SRob Herring					0x00004288 /* EMC_FBIO_CFG5 */
3321724ba675SRob Herring					0x007800a4 /* EMC_CFG_DIG_DLL */
3322724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3323724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS0 */
3324724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS1 */
3325724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS2 */
3326724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS3 */
3327724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS4 */
3328724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS5 */
3329724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS6 */
3330724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS7 */
3331724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3332724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3333724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3334724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3335724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3336724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3337724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3338724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3339724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3340724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3341724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3342724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3343724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3344724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3345724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3346724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3347724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
3348724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
3349724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
3350724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
3351724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
3352724ba675SRob Herring					0x0800211c /* EMC_XM2DQSPADCTRL2 */
3353724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3354724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
3355724ba675SRob Herring					0x01f1f108 /* EMC_XM2COMPPADCTRL */
3356724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
3357724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
3358724ba675SRob Herring					0x08000168 /* EMC_XM2QUSEPADCTRL */
3359724ba675SRob Herring					0x08000000 /* EMC_XM2DQSPADCTRL3 */
3360724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
3361724ba675SRob Herring					0x00000000 /* EMC_ZCAL_INTERVAL */
3362724ba675SRob Herring					0x00000040 /* EMC_ZCAL_WAIT_CNT */
3363724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT */
3364724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
3365724ba675SRob Herring					0x00000000 /* EMC_CTT */
3366724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
3367724ba675SRob Herring					0x80000287 /* EMC_DYN_SELF_REF_CONTROL */
3368724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
3369724ba675SRob Herring					0xff00ff00 /* EMC_CFG_RSV */
3370724ba675SRob Herring				>;
3371724ba675SRob Herring			};
3372724ba675SRob Herring
3373724ba675SRob Herring			timing-51000000 {
3374724ba675SRob Herring				clock-frequency = <51000000>;
3375724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3376724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
3377724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
3378724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
3379724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
3380724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
3381724ba675SRob Herring				nvidia,emc-cfg-dyn-self-ref;
3382724ba675SRob Herring				nvidia,emc-configuration = <
3383724ba675SRob Herring					0x00000002 /* EMC_RC */
3384724ba675SRob Herring					0x0000000d /* EMC_RFC */
3385724ba675SRob Herring					0x00000001 /* EMC_RAS */
3386724ba675SRob Herring					0x00000000 /* EMC_RP */
3387724ba675SRob Herring					0x00000002 /* EMC_R2W */
3388724ba675SRob Herring					0x0000000a /* EMC_W2R */
3389724ba675SRob Herring					0x00000005 /* EMC_R2P */
3390724ba675SRob Herring					0x0000000b /* EMC_W2P */
3391724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
3392724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
3393724ba675SRob Herring					0x00000003 /* EMC_RRD */
3394724ba675SRob Herring					0x00000001 /* EMC_REXT */
3395724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3396724ba675SRob Herring					0x00000005 /* EMC_WDV */
3397724ba675SRob Herring					0x00000005 /* EMC_QUSE */
3398724ba675SRob Herring					0x00000004 /* EMC_QRST */
3399724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
3400724ba675SRob Herring					0x0000000b /* EMC_RDV */
3401724ba675SRob Herring					0x00000181 /* EMC_REFRESH */
3402724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3403724ba675SRob Herring					0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */
3404724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
3405724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
3406724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3407724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3408724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
3409724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3410724ba675SRob Herring					0x0000000e /* EMC_TXSR */
3411724ba675SRob Herring					0x0000000e /* EMC_TXSRDLL */
3412724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3413724ba675SRob Herring					0x00000003 /* EMC_TFAW */
3414724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3415724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
3416724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3417724ba675SRob Herring					0x0000018e /* EMC_TREFBW */
3418724ba675SRob Herring					0x00000006 /* EMC_QUSE_EXTRA */
3419724ba675SRob Herring					0x00000004 /* EMC_FBIO_CFG6 */
3420724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3421724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3422724ba675SRob Herring					0x00004288 /* EMC_FBIO_CFG5 */
3423724ba675SRob Herring					0x007800a4 /* EMC_CFG_DIG_DLL */
3424724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3425724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS0 */
3426724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS1 */
3427724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS2 */
3428724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS3 */
3429724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS4 */
3430724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS5 */
3431724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS6 */
3432724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS7 */
3433724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3434724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3435724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3436724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3437724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3438724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3439724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3440724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3441724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3442724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3443724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3444724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3445724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3446724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3447724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3448724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3449724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
3450724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
3451724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
3452724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
3453724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
3454724ba675SRob Herring					0x0800211c /* EMC_XM2DQSPADCTRL2 */
3455724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3456724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
3457724ba675SRob Herring					0x01f1f108 /* EMC_XM2COMPPADCTRL */
3458724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
3459724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
3460724ba675SRob Herring					0x08000168 /* EMC_XM2QUSEPADCTRL */
3461724ba675SRob Herring					0x08000000 /* EMC_XM2DQSPADCTRL3 */
3462724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
3463724ba675SRob Herring					0x00000000 /* EMC_ZCAL_INTERVAL */
3464724ba675SRob Herring					0x00000040 /* EMC_ZCAL_WAIT_CNT */
3465724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT */
3466724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
3467724ba675SRob Herring					0x00000000 /* EMC_CTT */
3468724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
3469724ba675SRob Herring					0x8000040b /* EMC_DYN_SELF_REF_CONTROL */
3470724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
3471724ba675SRob Herring					0xff00ff00 /* EMC_CFG_RSV */
3472724ba675SRob Herring				>;
3473724ba675SRob Herring			};
3474724ba675SRob Herring
3475724ba675SRob Herring			timing-102000000 {
3476724ba675SRob Herring				clock-frequency = <102000000>;
3477724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3478724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
3479724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
3480724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
3481724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
3482724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
3483724ba675SRob Herring				nvidia,emc-cfg-dyn-self-ref;
3484724ba675SRob Herring				nvidia,emc-configuration = <
3485724ba675SRob Herring					0x00000004 /* EMC_RC */
3486724ba675SRob Herring					0x0000001a /* EMC_RFC */
3487724ba675SRob Herring					0x00000003 /* EMC_RAS */
3488724ba675SRob Herring					0x00000001 /* EMC_RP */
3489724ba675SRob Herring					0x00000002 /* EMC_R2W */
3490724ba675SRob Herring					0x0000000a /* EMC_W2R */
3491724ba675SRob Herring					0x00000005 /* EMC_R2P */
3492724ba675SRob Herring					0x0000000b /* EMC_W2P */
3493724ba675SRob Herring					0x00000001 /* EMC_RD_RCD */
3494724ba675SRob Herring					0x00000001 /* EMC_WR_RCD */
3495724ba675SRob Herring					0x00000003 /* EMC_RRD */
3496724ba675SRob Herring					0x00000001 /* EMC_REXT */
3497724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3498724ba675SRob Herring					0x00000005 /* EMC_WDV */
3499724ba675SRob Herring					0x00000005 /* EMC_QUSE */
3500724ba675SRob Herring					0x00000004 /* EMC_QRST */
3501724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
3502724ba675SRob Herring					0x0000000b /* EMC_RDV */
3503724ba675SRob Herring					0x00000303 /* EMC_REFRESH */
3504724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3505724ba675SRob Herring					0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */
3506724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
3507724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
3508724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3509724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3510724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
3511724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3512724ba675SRob Herring					0x0000001c /* EMC_TXSR */
3513724ba675SRob Herring					0x0000001c /* EMC_TXSRDLL */
3514724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3515724ba675SRob Herring					0x00000005 /* EMC_TFAW */
3516724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3517724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
3518724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3519724ba675SRob Herring					0x0000031c /* EMC_TREFBW */
3520724ba675SRob Herring					0x00000006 /* EMC_QUSE_EXTRA */
3521724ba675SRob Herring					0x00000004 /* EMC_FBIO_CFG6 */
3522724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3523724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3524724ba675SRob Herring					0x00004288 /* EMC_FBIO_CFG5 */
3525724ba675SRob Herring					0x007800a4 /* EMC_CFG_DIG_DLL */
3526724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3527724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS0 */
3528724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS1 */
3529724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS2 */
3530724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS3 */
3531724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS4 */
3532724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS5 */
3533724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS6 */
3534724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS7 */
3535724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3536724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3537724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3538724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3539724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3540724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3541724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3542724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3543724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3544724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3545724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3546724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3547724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3548724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3549724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3550724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3551724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
3552724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
3553724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
3554724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
3555724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
3556724ba675SRob Herring					0x0800211c /* EMC_XM2DQSPADCTRL2 */
3557724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3558724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
3559724ba675SRob Herring					0x01f1f108 /* EMC_XM2COMPPADCTRL */
3560724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
3561724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
3562724ba675SRob Herring					0x08000168 /* EMC_XM2QUSEPADCTRL */
3563724ba675SRob Herring					0x08000000 /* EMC_XM2DQSPADCTRL3 */
3564724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
3565724ba675SRob Herring					0x00000000 /* EMC_ZCAL_INTERVAL */
3566724ba675SRob Herring					0x00000040 /* EMC_ZCAL_WAIT_CNT */
3567724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT */
3568724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
3569724ba675SRob Herring					0x00000000 /* EMC_CTT */
3570724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
3571724ba675SRob Herring					0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
3572724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
3573724ba675SRob Herring					0xff00ff00 /* EMC_CFG_RSV */
3574724ba675SRob Herring				>;
3575724ba675SRob Herring			};
3576724ba675SRob Herring
3577724ba675SRob Herring			timing-204000000 {
3578724ba675SRob Herring				clock-frequency = <204000000>;
3579724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3580724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
3581724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
3582724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
3583724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
3584724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
3585724ba675SRob Herring				nvidia,emc-cfg-dyn-self-ref;
3586724ba675SRob Herring				nvidia,emc-configuration = <
3587724ba675SRob Herring					0x00000009 /* EMC_RC */
3588724ba675SRob Herring					0x00000035 /* EMC_RFC */
3589724ba675SRob Herring					0x00000007 /* EMC_RAS */
3590724ba675SRob Herring					0x00000002 /* EMC_RP */
3591724ba675SRob Herring					0x00000002 /* EMC_R2W */
3592724ba675SRob Herring					0x0000000a /* EMC_W2R */
3593724ba675SRob Herring					0x00000005 /* EMC_R2P */
3594724ba675SRob Herring					0x0000000b /* EMC_W2P */
3595724ba675SRob Herring					0x00000002 /* EMC_RD_RCD */
3596724ba675SRob Herring					0x00000002 /* EMC_WR_RCD */
3597724ba675SRob Herring					0x00000003 /* EMC_RRD */
3598724ba675SRob Herring					0x00000001 /* EMC_REXT */
3599724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3600724ba675SRob Herring					0x00000005 /* EMC_WDV */
3601724ba675SRob Herring					0x00000005 /* EMC_QUSE */
3602724ba675SRob Herring					0x00000004 /* EMC_QRST */
3603724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
3604724ba675SRob Herring					0x0000000b /* EMC_RDV */
3605724ba675SRob Herring					0x00000607 /* EMC_REFRESH */
3606724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3607724ba675SRob Herring					0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
3608724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
3609724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
3610724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3611724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3612724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
3613724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3614724ba675SRob Herring					0x00000038 /* EMC_TXSR */
3615724ba675SRob Herring					0x00000038 /* EMC_TXSRDLL */
3616724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3617724ba675SRob Herring					0x00000009 /* EMC_TFAW */
3618724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3619724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
3620724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3621724ba675SRob Herring					0x00000638 /* EMC_TREFBW */
3622724ba675SRob Herring					0x00000006 /* EMC_QUSE_EXTRA */
3623724ba675SRob Herring					0x00000006 /* EMC_FBIO_CFG6 */
3624724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3625724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3626724ba675SRob Herring					0x00004288 /* EMC_FBIO_CFG5 */
3627724ba675SRob Herring					0x004400a4 /* EMC_CFG_DIG_DLL */
3628724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3629724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS0 */
3630724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS1 */
3631724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS2 */
3632724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS3 */
3633724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS4 */
3634724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS5 */
3635724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS6 */
3636724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS7 */
3637724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3638724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3639724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3640724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3641724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3642724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3643724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3644724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3645724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3646724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3647724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3648724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3649724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3650724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3651724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3652724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3653724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ0 */
3654724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ1 */
3655724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ2 */
3656724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ3 */
3657724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
3658724ba675SRob Herring					0x0800211c /* EMC_XM2DQSPADCTRL2 */
3659724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3660724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
3661724ba675SRob Herring					0x01f1f108 /* EMC_XM2COMPPADCTRL */
3662724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
3663724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
3664724ba675SRob Herring					0x08000168 /* EMC_XM2QUSEPADCTRL */
3665724ba675SRob Herring					0x08000000 /* EMC_XM2DQSPADCTRL3 */
3666724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
3667724ba675SRob Herring					0x00020000 /* EMC_ZCAL_INTERVAL */
3668724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
3669724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT */
3670724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
3671724ba675SRob Herring					0x00000000 /* EMC_CTT */
3672724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
3673724ba675SRob Herring					0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
3674724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
3675724ba675SRob Herring					0xff00ff00 /* EMC_CFG_RSV */
3676724ba675SRob Herring				>;
3677724ba675SRob Herring			};
3678724ba675SRob Herring
3679724ba675SRob Herring			timing-400000000 {
3680724ba675SRob Herring				clock-frequency = <400000000>;
3681724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3682724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
3683724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200000>;
3684724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000521>;
3685724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
3686724ba675SRob Herring				nvidia,emc-configuration = <
3687724ba675SRob Herring					0x00000012 /* EMC_RC */
3688724ba675SRob Herring					0x00000066 /* EMC_RFC */
3689724ba675SRob Herring					0x0000000c /* EMC_RAS */
3690724ba675SRob Herring					0x00000004 /* EMC_RP */
3691724ba675SRob Herring					0x00000003 /* EMC_R2W */
3692724ba675SRob Herring					0x00000008 /* EMC_W2R */
3693724ba675SRob Herring					0x00000002 /* EMC_R2P */
3694724ba675SRob Herring					0x0000000a /* EMC_W2P */
3695724ba675SRob Herring					0x00000004 /* EMC_RD_RCD */
3696724ba675SRob Herring					0x00000004 /* EMC_WR_RCD */
3697724ba675SRob Herring					0x00000002 /* EMC_RRD */
3698724ba675SRob Herring					0x00000001 /* EMC_REXT */
3699724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3700724ba675SRob Herring					0x00000004 /* EMC_WDV */
3701724ba675SRob Herring					0x00000006 /* EMC_QUSE */
3702724ba675SRob Herring					0x00000004 /* EMC_QRST */
3703724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
3704724ba675SRob Herring					0x0000000c /* EMC_RDV */
3705724ba675SRob Herring					0x00000bf0 /* EMC_REFRESH */
3706724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3707724ba675SRob Herring					0x000002fc /* EMC_PRE_REFRESH_REQ_CNT */
3708724ba675SRob Herring					0x00000001 /* EMC_PDEX2WR */
3709724ba675SRob Herring					0x00000008 /* EMC_PDEX2RD */
3710724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3711724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3712724ba675SRob Herring					0x00000008 /* EMC_AR2PDEN */
3713724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3714724ba675SRob Herring					0x0000006c /* EMC_TXSR */
3715724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
3716724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3717724ba675SRob Herring					0x00000010 /* EMC_TFAW */
3718724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3719724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
3720724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3721724ba675SRob Herring					0x00000c30 /* EMC_TREFBW */
3722724ba675SRob Herring					0x00000000 /* EMC_QUSE_EXTRA */
3723724ba675SRob Herring					0x00000004 /* EMC_FBIO_CFG6 */
3724724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3725724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3726724ba675SRob Herring					0x00007088 /* EMC_FBIO_CFG5 */
3727724ba675SRob Herring					0x001d0084 /* EMC_CFG_DIG_DLL */
3728724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3729724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS0 */
3730724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS1 */
3731724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS2 */
3732724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS3 */
3733724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS4 */
3734724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS5 */
3735724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS6 */
3736724ba675SRob Herring					0x0003c000 /* EMC_DLL_XFORM_DQS7 */
3737724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3738724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3739724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3740724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3741724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3742724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3743724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3744724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3745724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3746724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3747724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3748724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3749724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3750724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3751724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3752724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3753724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ0 */
3754724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ1 */
3755724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ2 */
3756724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ3 */
3757724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
3758724ba675SRob Herring					0x0800013d /* EMC_XM2DQSPADCTRL2 */
3759724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3760724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
3761724ba675SRob Herring					0x01f1f508 /* EMC_XM2COMPPADCTRL */
3762724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
3763724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
3764724ba675SRob Herring					0x080001e8 /* EMC_XM2QUSEPADCTRL */
3765724ba675SRob Herring					0x08000021 /* EMC_XM2DQSPADCTRL3 */
3766724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
3767724ba675SRob Herring					0x00020000 /* EMC_ZCAL_INTERVAL */
3768724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
3769724ba675SRob Herring					0x0158000c /* EMC_MRS_WAIT_CNT */
3770724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
3771724ba675SRob Herring					0x00000000 /* EMC_CTT */
3772724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
3773724ba675SRob Herring					0x800018c8 /* EMC_DYN_SELF_REF_CONTROL */
3774724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
3775724ba675SRob Herring					0xff00ff89 /* EMC_CFG_RSV */
3776724ba675SRob Herring				>;
3777724ba675SRob Herring			};
3778724ba675SRob Herring
3779724ba675SRob Herring			timing-800000000 {
3780724ba675SRob Herring				clock-frequency = <800000000>;
3781724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3782724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
3783724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200018>;
3784724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000d71>;
3785724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
3786724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
3787724ba675SRob Herring				nvidia,emc-configuration = <
3788724ba675SRob Herring					0x00000025 /* EMC_RC */
3789724ba675SRob Herring					0x000000ce /* EMC_RFC */
3790724ba675SRob Herring					0x0000001a /* EMC_RAS */
3791724ba675SRob Herring					0x00000009 /* EMC_RP */
3792724ba675SRob Herring					0x00000005 /* EMC_R2W */
3793724ba675SRob Herring					0x0000000d /* EMC_W2R */
3794724ba675SRob Herring					0x00000004 /* EMC_R2P */
3795724ba675SRob Herring					0x00000013 /* EMC_W2P */
3796724ba675SRob Herring					0x00000009 /* EMC_RD_RCD */
3797724ba675SRob Herring					0x00000009 /* EMC_WR_RCD */
3798724ba675SRob Herring					0x00000004 /* EMC_RRD */
3799724ba675SRob Herring					0x00000001 /* EMC_REXT */
3800724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3801724ba675SRob Herring					0x00000007 /* EMC_WDV */
3802724ba675SRob Herring					0x0000000a /* EMC_QUSE */
3803724ba675SRob Herring					0x00000009 /* EMC_QRST */
3804724ba675SRob Herring					0x0000000b /* EMC_QSAFE */
3805724ba675SRob Herring					0x00000011 /* EMC_RDV */
3806724ba675SRob Herring					0x00001820 /* EMC_REFRESH */
3807724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3808724ba675SRob Herring					0x00000608 /* EMC_PRE_REFRESH_REQ_CNT */
3809724ba675SRob Herring					0x00000003 /* EMC_PDEX2WR */
3810724ba675SRob Herring					0x00000012 /* EMC_PDEX2RD */
3811724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3812724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3813724ba675SRob Herring					0x0000000f /* EMC_AR2PDEN */
3814724ba675SRob Herring					0x00000018 /* EMC_RW2PDEN */
3815724ba675SRob Herring					0x000000d8 /* EMC_TXSR */
3816724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
3817724ba675SRob Herring					0x00000005 /* EMC_TCKE */
3818724ba675SRob Herring					0x00000020 /* EMC_TFAW */
3819724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3820724ba675SRob Herring					0x00000007 /* EMC_TCLKSTABLE */
3821724ba675SRob Herring					0x00000008 /* EMC_TCLKSTOP */
3822724ba675SRob Herring					0x00001860 /* EMC_TREFBW */
3823724ba675SRob Herring					0x0000000b /* EMC_QUSE_EXTRA */
3824724ba675SRob Herring					0x00000006 /* EMC_FBIO_CFG6 */
3825724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3826724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3827724ba675SRob Herring					0x00005088 /* EMC_FBIO_CFG5 */
3828724ba675SRob Herring					0xf0070191 /* EMC_CFG_DIG_DLL */
3829724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3830724ba675SRob Herring					0x0000800a /* EMC_DLL_XFORM_DQS0 */
3831724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS1 */
3832724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS2 */
3833724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS3 */
3834724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS4 */
3835724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS5 */
3836724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS6 */
3837724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS7 */
3838724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE0 */
3839724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE1 */
3840724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE2 */
3841724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE3 */
3842724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE4 */
3843724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE5 */
3844724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE6 */
3845724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE7 */
3846724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3847724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3848724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3849724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3850724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3851724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3852724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3853724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3854724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ0 */
3855724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ1 */
3856724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ2 */
3857724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ3 */
3858724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
3859724ba675SRob Herring					0x0600013d /* EMC_XM2DQSPADCTRL2 */
3860724ba675SRob Herring					0x22220000 /* EMC_XM2DQPADCTRL2 */
3861724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
3862724ba675SRob Herring					0x01f1f501 /* EMC_XM2COMPPADCTRL */
3863724ba675SRob Herring					0x07077404 /* EMC_XM2VTTGENPADCTRL */
3864724ba675SRob Herring					0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
3865724ba675SRob Herring					0x080001e8 /* EMC_XM2QUSEPADCTRL */
3866724ba675SRob Herring					0x08000021 /* EMC_XM2DQSPADCTRL3 */
3867724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
3868724ba675SRob Herring					0x00020000 /* EMC_ZCAL_INTERVAL */
3869724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
3870724ba675SRob Herring					0x00f0000c /* EMC_MRS_WAIT_CNT */
3871724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
3872724ba675SRob Herring					0x00000000 /* EMC_CTT */
3873724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
3874724ba675SRob Herring					0x8000308c /* EMC_DYN_SELF_REF_CONTROL */
3875724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
3876724ba675SRob Herring					0xff00ff49 /* EMC_CFG_RSV */
3877724ba675SRob Herring				>;
3878724ba675SRob Herring			};
3879724ba675SRob Herring		};
3880724ba675SRob Herring
3881724ba675SRob Herring		emc-timings-2 {
3882724ba675SRob Herring			nvidia,ram-code = <2>;  /* Hynix A RAM */
3883724ba675SRob Herring
3884724ba675SRob Herring			timing-25500000 {
3885724ba675SRob Herring				clock-frequency = <25500000>;
3886724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3887724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
3888724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
3889724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
3890724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
3891724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
3892724ba675SRob Herring				nvidia,emc-cfg-dyn-self-ref;
3893724ba675SRob Herring				nvidia,emc-configuration = <
3894724ba675SRob Herring					0x00000001 /* EMC_RC */
3895724ba675SRob Herring					0x00000007 /* EMC_RFC */
3896724ba675SRob Herring					0x00000000 /* EMC_RAS */
3897724ba675SRob Herring					0x00000000 /* EMC_RP */
3898724ba675SRob Herring					0x00000002 /* EMC_R2W */
3899724ba675SRob Herring					0x0000000a /* EMC_W2R */
3900724ba675SRob Herring					0x00000005 /* EMC_R2P */
3901724ba675SRob Herring					0x0000000b /* EMC_W2P */
3902724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
3903724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
3904724ba675SRob Herring					0x00000003 /* EMC_RRD */
3905724ba675SRob Herring					0x00000001 /* EMC_REXT */
3906724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3907724ba675SRob Herring					0x00000005 /* EMC_WDV */
3908724ba675SRob Herring					0x00000005 /* EMC_QUSE */
3909724ba675SRob Herring					0x00000004 /* EMC_QRST */
3910724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
3911724ba675SRob Herring					0x0000000b /* EMC_RDV */
3912724ba675SRob Herring					0x000000c0 /* EMC_REFRESH */
3913724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3914724ba675SRob Herring					0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */
3915724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
3916724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
3917724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3918724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3919724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
3920724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3921724ba675SRob Herring					0x00000008 /* EMC_TXSR */
3922724ba675SRob Herring					0x00000008 /* EMC_TXSRDLL */
3923724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3924724ba675SRob Herring					0x00000002 /* EMC_TFAW */
3925724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3926724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
3927724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3928724ba675SRob Herring					0x000000c7 /* EMC_TREFBW */
3929724ba675SRob Herring					0x00000006 /* EMC_QUSE_EXTRA */
3930724ba675SRob Herring					0x00000004 /* EMC_FBIO_CFG6 */
3931724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3932724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3933724ba675SRob Herring					0x00004288 /* EMC_FBIO_CFG5 */
3934724ba675SRob Herring					0x007800a4 /* EMC_CFG_DIG_DLL */
3935724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3936724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS0 */
3937724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS1 */
3938724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS2 */
3939724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS3 */
3940724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS4 */
3941724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS5 */
3942724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS6 */
3943724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS7 */
3944724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3945724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3946724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3947724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3948724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3949724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3950724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3951724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3952724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3953724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3954724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3955724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3956724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3957724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3958724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3959724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3960724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
3961724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
3962724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
3963724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
3964724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
3965724ba675SRob Herring					0x0800211c /* EMC_XM2DQSPADCTRL2 */
3966724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3967724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
3968724ba675SRob Herring					0x01f1f108 /* EMC_XM2COMPPADCTRL */
3969724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
3970724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
3971724ba675SRob Herring					0x08000168 /* EMC_XM2QUSEPADCTRL */
3972724ba675SRob Herring					0x08000000 /* EMC_XM2DQSPADCTRL3 */
3973724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
3974724ba675SRob Herring					0x00000000 /* EMC_ZCAL_INTERVAL */
3975724ba675SRob Herring					0x00000040 /* EMC_ZCAL_WAIT_CNT */
3976724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT */
3977724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
3978724ba675SRob Herring					0x00000000 /* EMC_CTT */
3979724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
3980724ba675SRob Herring					0x80000287 /* EMC_DYN_SELF_REF_CONTROL */
3981724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
3982724ba675SRob Herring					0xff00ff00 /* EMC_CFG_RSV */
3983724ba675SRob Herring				>;
3984724ba675SRob Herring			};
3985724ba675SRob Herring
3986724ba675SRob Herring			timing-51000000 {
3987724ba675SRob Herring				clock-frequency = <51000000>;
3988724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3989724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
3990724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
3991724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
3992724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
3993724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
3994724ba675SRob Herring				nvidia,emc-cfg-dyn-self-ref;
3995724ba675SRob Herring				nvidia,emc-configuration = <
3996724ba675SRob Herring					0x00000002 /* EMC_RC */
3997724ba675SRob Herring					0x0000000f /* EMC_RFC */
3998724ba675SRob Herring					0x00000001 /* EMC_RAS */
3999724ba675SRob Herring					0x00000000 /* EMC_RP */
4000724ba675SRob Herring					0x00000002 /* EMC_R2W */
4001724ba675SRob Herring					0x0000000a /* EMC_W2R */
4002724ba675SRob Herring					0x00000005 /* EMC_R2P */
4003724ba675SRob Herring					0x0000000b /* EMC_W2P */
4004724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
4005724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
4006724ba675SRob Herring					0x00000003 /* EMC_RRD */
4007724ba675SRob Herring					0x00000001 /* EMC_REXT */
4008724ba675SRob Herring					0x00000000 /* EMC_WEXT */
4009724ba675SRob Herring					0x00000005 /* EMC_WDV */
4010724ba675SRob Herring					0x00000005 /* EMC_QUSE */
4011724ba675SRob Herring					0x00000004 /* EMC_QRST */
4012724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
4013724ba675SRob Herring					0x0000000b /* EMC_RDV */
4014724ba675SRob Herring					0x00000181 /* EMC_REFRESH */
4015724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
4016724ba675SRob Herring					0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */
4017724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
4018724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
4019724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
4020724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
4021724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
4022724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
4023724ba675SRob Herring					0x00000010 /* EMC_TXSR */
4024724ba675SRob Herring					0x00000010 /* EMC_TXSRDLL */
4025724ba675SRob Herring					0x00000004 /* EMC_TCKE */
4026724ba675SRob Herring					0x00000003 /* EMC_TFAW */
4027724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
4028724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
4029724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
4030724ba675SRob Herring					0x0000018e /* EMC_TREFBW */
4031724ba675SRob Herring					0x00000006 /* EMC_QUSE_EXTRA */
4032724ba675SRob Herring					0x00000004 /* EMC_FBIO_CFG6 */
4033724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
4034724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
4035724ba675SRob Herring					0x00004288 /* EMC_FBIO_CFG5 */
4036724ba675SRob Herring					0x007800a4 /* EMC_CFG_DIG_DLL */
4037724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
4038724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS0 */
4039724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS1 */
4040724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS2 */
4041724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS3 */
4042724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS4 */
4043724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS5 */
4044724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS6 */
4045724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS7 */
4046724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
4047724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
4048724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
4049724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
4050724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
4051724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
4052724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
4053724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
4054724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
4055724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
4056724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
4057724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
4058724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
4059724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
4060724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
4061724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
4062724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
4063724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
4064724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
4065724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
4066724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
4067724ba675SRob Herring					0x0800211c /* EMC_XM2DQSPADCTRL2 */
4068724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
4069724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
4070724ba675SRob Herring					0x01f1f108 /* EMC_XM2COMPPADCTRL */
4071724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
4072724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
4073724ba675SRob Herring					0x08000168 /* EMC_XM2QUSEPADCTRL */
4074724ba675SRob Herring					0x08000000 /* EMC_XM2DQSPADCTRL3 */
4075724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
4076724ba675SRob Herring					0x00000000 /* EMC_ZCAL_INTERVAL */
4077724ba675SRob Herring					0x00000040 /* EMC_ZCAL_WAIT_CNT */
4078724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT */
4079724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
4080724ba675SRob Herring					0x00000000 /* EMC_CTT */
4081724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
4082724ba675SRob Herring					0x8000040b /* EMC_DYN_SELF_REF_CONTROL */
4083724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
4084724ba675SRob Herring					0xff00ff00 /* EMC_CFG_RSV */
4085724ba675SRob Herring				>;
4086724ba675SRob Herring			};
4087724ba675SRob Herring
4088724ba675SRob Herring			timing-102000000 {
4089724ba675SRob Herring				clock-frequency = <102000000>;
4090724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
4091724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
4092724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
4093724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
4094724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
4095724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
4096724ba675SRob Herring				nvidia,emc-cfg-dyn-self-ref;
4097724ba675SRob Herring				nvidia,emc-configuration = <
4098724ba675SRob Herring					0x00000004 /* EMC_RC */
4099724ba675SRob Herring					0x0000001e /* EMC_RFC */
4100724ba675SRob Herring					0x00000003 /* EMC_RAS */
4101724ba675SRob Herring					0x00000001 /* EMC_RP */
4102724ba675SRob Herring					0x00000002 /* EMC_R2W */
4103724ba675SRob Herring					0x0000000a /* EMC_W2R */
4104724ba675SRob Herring					0x00000005 /* EMC_R2P */
4105724ba675SRob Herring					0x0000000b /* EMC_W2P */
4106724ba675SRob Herring					0x00000001 /* EMC_RD_RCD */
4107724ba675SRob Herring					0x00000001 /* EMC_WR_RCD */
4108724ba675SRob Herring					0x00000003 /* EMC_RRD */
4109724ba675SRob Herring					0x00000001 /* EMC_REXT */
4110724ba675SRob Herring					0x00000000 /* EMC_WEXT */
4111724ba675SRob Herring					0x00000005 /* EMC_WDV */
4112724ba675SRob Herring					0x00000005 /* EMC_QUSE */
4113724ba675SRob Herring					0x00000004 /* EMC_QRST */
4114724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
4115724ba675SRob Herring					0x0000000b /* EMC_RDV */
4116724ba675SRob Herring					0x00000303 /* EMC_REFRESH */
4117724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
4118724ba675SRob Herring					0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */
4119724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
4120724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
4121724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
4122724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
4123724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
4124724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
4125724ba675SRob Herring					0x00000020 /* EMC_TXSR */
4126724ba675SRob Herring					0x00000020 /* EMC_TXSRDLL */
4127724ba675SRob Herring					0x00000004 /* EMC_TCKE */
4128724ba675SRob Herring					0x00000005 /* EMC_TFAW */
4129724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
4130724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
4131724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
4132724ba675SRob Herring					0x0000031c /* EMC_TREFBW */
4133724ba675SRob Herring					0x00000006 /* EMC_QUSE_EXTRA */
4134724ba675SRob Herring					0x00000004 /* EMC_FBIO_CFG6 */
4135724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
4136724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
4137724ba675SRob Herring					0x00004288 /* EMC_FBIO_CFG5 */
4138724ba675SRob Herring					0x007800a4 /* EMC_CFG_DIG_DLL */
4139724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
4140724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS0 */
4141724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS1 */
4142724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS2 */
4143724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS3 */
4144724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS4 */
4145724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS5 */
4146724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS6 */
4147724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQS7 */
4148724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
4149724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
4150724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
4151724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
4152724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
4153724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
4154724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
4155724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
4156724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
4157724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
4158724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
4159724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
4160724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
4161724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
4162724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
4163724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
4164724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
4165724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
4166724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
4167724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
4168724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
4169724ba675SRob Herring					0x0800211c /* EMC_XM2DQSPADCTRL2 */
4170724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
4171724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
4172724ba675SRob Herring					0x01f1f108 /* EMC_XM2COMPPADCTRL */
4173724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
4174724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
4175724ba675SRob Herring					0x08000168 /* EMC_XM2QUSEPADCTRL */
4176724ba675SRob Herring					0x08000000 /* EMC_XM2DQSPADCTRL3 */
4177724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
4178724ba675SRob Herring					0x00000000 /* EMC_ZCAL_INTERVAL */
4179724ba675SRob Herring					0x00000040 /* EMC_ZCAL_WAIT_CNT */
4180724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT */
4181724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
4182724ba675SRob Herring					0x00000000 /* EMC_CTT */
4183724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
4184724ba675SRob Herring					0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
4185724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
4186724ba675SRob Herring					0xff00ff00 /* EMC_CFG_RSV */
4187724ba675SRob Herring				>;
4188724ba675SRob Herring			};
4189724ba675SRob Herring
4190724ba675SRob Herring			timing-204000000 {
4191724ba675SRob Herring				clock-frequency = <204000000>;
4192724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
4193724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
4194724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
4195724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
4196724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
4197724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
4198724ba675SRob Herring				nvidia,emc-cfg-dyn-self-ref;
4199724ba675SRob Herring				nvidia,emc-configuration = <
4200724ba675SRob Herring					0x00000009 /* EMC_RC */
4201724ba675SRob Herring					0x0000003d /* EMC_RFC */
4202724ba675SRob Herring					0x00000007 /* EMC_RAS */
4203724ba675SRob Herring					0x00000002 /* EMC_RP */
4204724ba675SRob Herring					0x00000002 /* EMC_R2W */
4205724ba675SRob Herring					0x0000000a /* EMC_W2R */
4206724ba675SRob Herring					0x00000005 /* EMC_R2P */
4207724ba675SRob Herring					0x0000000b /* EMC_W2P */
4208724ba675SRob Herring					0x00000002 /* EMC_RD_RCD */
4209724ba675SRob Herring					0x00000002 /* EMC_WR_RCD */
4210724ba675SRob Herring					0x00000003 /* EMC_RRD */
4211724ba675SRob Herring					0x00000001 /* EMC_REXT */
4212724ba675SRob Herring					0x00000000 /* EMC_WEXT */
4213724ba675SRob Herring					0x00000005 /* EMC_WDV */
4214724ba675SRob Herring					0x00000005 /* EMC_QUSE */
4215724ba675SRob Herring					0x00000004 /* EMC_QRST */
4216724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
4217724ba675SRob Herring					0x0000000b /* EMC_RDV */
4218724ba675SRob Herring					0x00000607 /* EMC_REFRESH */
4219724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
4220724ba675SRob Herring					0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
4221724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
4222724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
4223724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
4224724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
4225724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
4226724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
4227724ba675SRob Herring					0x00000040 /* EMC_TXSR */
4228724ba675SRob Herring					0x00000040 /* EMC_TXSRDLL */
4229724ba675SRob Herring					0x00000004 /* EMC_TCKE */
4230724ba675SRob Herring					0x00000009 /* EMC_TFAW */
4231724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
4232724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
4233724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
4234724ba675SRob Herring					0x00000638 /* EMC_TREFBW */
4235724ba675SRob Herring					0x00000006 /* EMC_QUSE_EXTRA */
4236724ba675SRob Herring					0x00000006 /* EMC_FBIO_CFG6 */
4237724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
4238724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
4239724ba675SRob Herring					0x00004288 /* EMC_FBIO_CFG5 */
4240724ba675SRob Herring					0x004400a4 /* EMC_CFG_DIG_DLL */
4241724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
4242724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS0 */
4243724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS1 */
4244724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS2 */
4245724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS3 */
4246724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS4 */
4247724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS5 */
4248724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS6 */
4249724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQS7 */
4250724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
4251724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
4252724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
4253724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
4254724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
4255724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
4256724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
4257724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
4258724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
4259724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
4260724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
4261724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
4262724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
4263724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
4264724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
4265724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
4266724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ0 */
4267724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ1 */
4268724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ2 */
4269724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ3 */
4270724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
4271724ba675SRob Herring					0x0800211c /* EMC_XM2DQSPADCTRL2 */
4272724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
4273724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
4274724ba675SRob Herring					0x01f1f108 /* EMC_XM2COMPPADCTRL */
4275724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
4276724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
4277724ba675SRob Herring					0x08000168 /* EMC_XM2QUSEPADCTRL */
4278724ba675SRob Herring					0x08000000 /* EMC_XM2DQSPADCTRL3 */
4279724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
4280724ba675SRob Herring					0x00020000 /* EMC_ZCAL_INTERVAL */
4281724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
4282724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT */
4283724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
4284724ba675SRob Herring					0x00000000 /* EMC_CTT */
4285724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
4286724ba675SRob Herring					0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
4287724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
4288724ba675SRob Herring					0xff00ff00 /* EMC_CFG_RSV */
4289724ba675SRob Herring				>;
4290724ba675SRob Herring			};
4291724ba675SRob Herring
4292724ba675SRob Herring			timing-400000000 {
4293724ba675SRob Herring				clock-frequency = <400000000>;
4294724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
4295724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
4296724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200000>;
4297724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000521>;
4298724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
4299724ba675SRob Herring				nvidia,emc-configuration = <
4300724ba675SRob Herring					0x00000012 /* EMC_RC */
4301724ba675SRob Herring					0x00000076 /* EMC_RFC */
4302724ba675SRob Herring					0x0000000c /* EMC_RAS */
4303724ba675SRob Herring					0x00000004 /* EMC_RP */
4304724ba675SRob Herring					0x00000003 /* EMC_R2W */
4305724ba675SRob Herring					0x00000008 /* EMC_W2R */
4306724ba675SRob Herring					0x00000002 /* EMC_R2P */
4307724ba675SRob Herring					0x0000000a /* EMC_W2P */
4308724ba675SRob Herring					0x00000004 /* EMC_RD_RCD */
4309724ba675SRob Herring					0x00000004 /* EMC_WR_RCD */
4310724ba675SRob Herring					0x00000002 /* EMC_RRD */
4311724ba675SRob Herring					0x00000001 /* EMC_REXT */
4312724ba675SRob Herring					0x00000000 /* EMC_WEXT */
4313724ba675SRob Herring					0x00000004 /* EMC_WDV */
4314724ba675SRob Herring					0x00000006 /* EMC_QUSE */
4315724ba675SRob Herring					0x00000004 /* EMC_QRST */
4316724ba675SRob Herring					0x0000000a /* EMC_QSAFE */
4317724ba675SRob Herring					0x0000000c /* EMC_RDV */
4318724ba675SRob Herring					0x00000bf0 /* EMC_REFRESH */
4319724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
4320724ba675SRob Herring					0x000002fc /* EMC_PRE_REFRESH_REQ_CNT */
4321724ba675SRob Herring					0x00000001 /* EMC_PDEX2WR */
4322724ba675SRob Herring					0x00000008 /* EMC_PDEX2RD */
4323724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
4324724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
4325724ba675SRob Herring					0x00000008 /* EMC_AR2PDEN */
4326724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
4327724ba675SRob Herring					0x0000007c /* EMC_TXSR */
4328724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
4329724ba675SRob Herring					0x00000004 /* EMC_TCKE */
4330724ba675SRob Herring					0x00000010 /* EMC_TFAW */
4331724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
4332724ba675SRob Herring					0x00000004 /* EMC_TCLKSTABLE */
4333724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
4334724ba675SRob Herring					0x00000c30 /* EMC_TREFBW */
4335724ba675SRob Herring					0x00000000 /* EMC_QUSE_EXTRA */
4336724ba675SRob Herring					0x00000004 /* EMC_FBIO_CFG6 */
4337724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
4338724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
4339724ba675SRob Herring					0x00007088 /* EMC_FBIO_CFG5 */
4340724ba675SRob Herring					0x001d0084 /* EMC_CFG_DIG_DLL */
4341724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
4342724ba675SRob Herring					0x00044000 /* EMC_DLL_XFORM_DQS0 */
4343724ba675SRob Herring					0x00044000 /* EMC_DLL_XFORM_DQS1 */
4344724ba675SRob Herring					0x00044000 /* EMC_DLL_XFORM_DQS2 */
4345724ba675SRob Herring					0x00044000 /* EMC_DLL_XFORM_DQS3 */
4346724ba675SRob Herring					0x00044000 /* EMC_DLL_XFORM_DQS4 */
4347724ba675SRob Herring					0x00044000 /* EMC_DLL_XFORM_DQS5 */
4348724ba675SRob Herring					0x00044000 /* EMC_DLL_XFORM_DQS6 */
4349724ba675SRob Herring					0x00044000 /* EMC_DLL_XFORM_DQS7 */
4350724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
4351724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
4352724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
4353724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
4354724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
4355724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
4356724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
4357724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
4358724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
4359724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
4360724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
4361724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
4362724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
4363724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
4364724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
4365724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
4366724ba675SRob Herring					0x00058000 /* EMC_DLL_XFORM_DQ0 */
4367724ba675SRob Herring					0x00058000 /* EMC_DLL_XFORM_DQ1 */
4368724ba675SRob Herring					0x00058000 /* EMC_DLL_XFORM_DQ2 */
4369724ba675SRob Herring					0x00058000 /* EMC_DLL_XFORM_DQ3 */
4370724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
4371724ba675SRob Herring					0x0800013d /* EMC_XM2DQSPADCTRL2 */
4372724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
4373724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
4374724ba675SRob Herring					0x01f1f508 /* EMC_XM2COMPPADCTRL */
4375724ba675SRob Herring					0x05057404 /* EMC_XM2VTTGENPADCTRL */
4376724ba675SRob Herring					0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
4377724ba675SRob Herring					0x080001e8 /* EMC_XM2QUSEPADCTRL */
4378724ba675SRob Herring					0x08000021 /* EMC_XM2DQSPADCTRL3 */
4379724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
4380724ba675SRob Herring					0x00020000 /* EMC_ZCAL_INTERVAL */
4381724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
4382724ba675SRob Herring					0x0148000c /* EMC_MRS_WAIT_CNT */
4383724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
4384724ba675SRob Herring					0x00000000 /* EMC_CTT */
4385724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
4386724ba675SRob Herring					0x800018c8 /* EMC_DYN_SELF_REF_CONTROL */
4387724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
4388724ba675SRob Herring					0xff00ff89 /* EMC_CFG_RSV */
4389724ba675SRob Herring				>;
4390724ba675SRob Herring			};
4391724ba675SRob Herring
4392724ba675SRob Herring			timing-800000000 {
4393724ba675SRob Herring				clock-frequency = <800000000>;
4394724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
4395724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
4396724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200018>;
4397724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000d71>;
4398724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000040>;
4399724ba675SRob Herring				nvidia,emc-cfg-periodic-qrst;
4400724ba675SRob Herring				nvidia,emc-configuration = <
4401724ba675SRob Herring					0x00000025 /* EMC_RC */
4402724ba675SRob Herring					0x000000ee /* EMC_RFC */
4403724ba675SRob Herring					0x0000001a /* EMC_RAS */
4404724ba675SRob Herring					0x00000009 /* EMC_RP */
4405724ba675SRob Herring					0x00000005 /* EMC_R2W */
4406724ba675SRob Herring					0x0000000d /* EMC_W2R */
4407724ba675SRob Herring					0x00000004 /* EMC_R2P */
4408724ba675SRob Herring					0x00000013 /* EMC_W2P */
4409724ba675SRob Herring					0x00000009 /* EMC_RD_RCD */
4410724ba675SRob Herring					0x00000009 /* EMC_WR_RCD */
4411724ba675SRob Herring					0x00000003 /* EMC_RRD */
4412724ba675SRob Herring					0x00000001 /* EMC_REXT */
4413724ba675SRob Herring					0x00000000 /* EMC_WEXT */
4414724ba675SRob Herring					0x00000007 /* EMC_WDV */
4415724ba675SRob Herring					0x0000000a /* EMC_QUSE */
4416724ba675SRob Herring					0x00000009 /* EMC_QRST */
4417724ba675SRob Herring					0x0000000b /* EMC_QSAFE */
4418724ba675SRob Herring					0x00000011 /* EMC_RDV */
4419724ba675SRob Herring					0x00001820 /* EMC_REFRESH */
4420724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
4421724ba675SRob Herring					0x00000608 /* EMC_PRE_REFRESH_REQ_CNT */
4422724ba675SRob Herring					0x00000003 /* EMC_PDEX2WR */
4423724ba675SRob Herring					0x00000012 /* EMC_PDEX2RD */
4424724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
4425724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
4426724ba675SRob Herring					0x0000000f /* EMC_AR2PDEN */
4427724ba675SRob Herring					0x00000018 /* EMC_RW2PDEN */
4428724ba675SRob Herring					0x000000f8 /* EMC_TXSR */
4429724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
4430724ba675SRob Herring					0x00000005 /* EMC_TCKE */
4431724ba675SRob Herring					0x00000020 /* EMC_TFAW */
4432724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
4433724ba675SRob Herring					0x00000007 /* EMC_TCLKSTABLE */
4434724ba675SRob Herring					0x00000008 /* EMC_TCLKSTOP */
4435724ba675SRob Herring					0x00001860 /* EMC_TREFBW */
4436724ba675SRob Herring					0x0000000b /* EMC_QUSE_EXTRA */
4437724ba675SRob Herring					0x00000006 /* EMC_FBIO_CFG6 */
4438724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
4439724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
4440724ba675SRob Herring					0x00005088 /* EMC_FBIO_CFG5 */
4441724ba675SRob Herring					0xf0070191 /* EMC_CFG_DIG_DLL */
4442724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
4443724ba675SRob Herring					0x0000000c /* EMC_DLL_XFORM_DQS0 */
4444724ba675SRob Herring					0x007fc00a /* EMC_DLL_XFORM_DQS1 */
4445724ba675SRob Herring					0x00000008 /* EMC_DLL_XFORM_DQS2 */
4446724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS3 */
4447724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS4 */
4448724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS5 */
4449724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS6 */
4450724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS7 */
4451724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE0 */
4452724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE1 */
4453724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE2 */
4454724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE3 */
4455724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE4 */
4456724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE5 */
4457724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE6 */
4458724ba675SRob Herring					0x00018000 /* EMC_DLL_XFORM_QUSE7 */
4459724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
4460724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
4461724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
4462724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
4463724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
4464724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
4465724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
4466724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
4467724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ0 */
4468724ba675SRob Herring					0x0000000c /* EMC_DLL_XFORM_DQ1 */
4469724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ2 */
4470724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ3 */
4471724ba675SRob Herring					0x000002a0 /* EMC_XM2CMDPADCTRL */
4472724ba675SRob Herring					0x0600013d /* EMC_XM2DQSPADCTRL2 */
4473724ba675SRob Herring					0x22220000 /* EMC_XM2DQPADCTRL2 */
4474724ba675SRob Herring					0x77fff884 /* EMC_XM2CLKPADCTRL */
4475724ba675SRob Herring					0x01f1f501 /* EMC_XM2COMPPADCTRL */
4476724ba675SRob Herring					0x07077404 /* EMC_XM2VTTGENPADCTRL */
4477724ba675SRob Herring					0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
4478724ba675SRob Herring					0x080001e8 /* EMC_XM2QUSEPADCTRL */
4479724ba675SRob Herring					0x0a000021 /* EMC_XM2DQSPADCTRL3 */
4480724ba675SRob Herring					0x00000802 /* EMC_CTT_TERM_CTRL */
4481724ba675SRob Herring					0x00020000 /* EMC_ZCAL_INTERVAL */
4482724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
4483724ba675SRob Herring					0x00d0000c /* EMC_MRS_WAIT_CNT */
4484724ba675SRob Herring					0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
4485724ba675SRob Herring					0x00000000 /* EMC_CTT */
4486724ba675SRob Herring					0x00000000 /* EMC_CTT_DURATION */
4487724ba675SRob Herring					0x8000308c /* EMC_DYN_SELF_REF_CONTROL */
4488724ba675SRob Herring					0xe8000000 /* EMC_FBIO_SPARE */
4489724ba675SRob Herring					0xff00ff49 /* EMC_CFG_RSV */
4490724ba675SRob Herring				>;
4491724ba675SRob Herring			};
4492724ba675SRob Herring		};
4493724ba675SRob Herring	};
4494724ba675SRob Herring
4495724ba675SRob Herring	hda@70030000 {
4496724ba675SRob Herring		status = "okay";
4497724ba675SRob Herring	};
4498724ba675SRob Herring
4499724ba675SRob Herring	sdmmc3: mmc@78000400 {
4500724ba675SRob Herring		status = "okay";
4501724ba675SRob Herring
4502724ba675SRob Herring		#address-cells = <1>;
4503724ba675SRob Herring		#size-cells = <0>;
4504724ba675SRob Herring
4505724ba675SRob Herring		assigned-clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
4506724ba675SRob Herring		assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_C>;
4507724ba675SRob Herring		assigned-clock-rates = <50000000>;
4508724ba675SRob Herring
4509724ba675SRob Herring		max-frequency = <50000000>;
4510724ba675SRob Herring		keep-power-in-suspend;
4511724ba675SRob Herring
4512724ba675SRob Herring		bus-width = <4>;
4513724ba675SRob Herring		non-removable;
4514724ba675SRob Herring
4515724ba675SRob Herring		mmc-pwrseq = <&wifi_pwrseq>;
4516724ba675SRob Herring		vmmc-supply = <&sdmmc_3v3_reg>;
4517724ba675SRob Herring		vqmmc-supply = <&vdd_1v8>;
4518724ba675SRob Herring
4519724ba675SRob Herring		/* Azurewave AW-NH660 BCM4330 */
4520724ba675SRob Herring		brcmf: wifi@1 {
4521724ba675SRob Herring			reg = <1>;
4522724ba675SRob Herring			compatible = "brcm,bcm4329-fmac";
4523724ba675SRob Herring			interrupt-parent = <&gpio>;
4524724ba675SRob Herring			interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_HIGH>;
4525724ba675SRob Herring			interrupt-names = "host-wake";
4526724ba675SRob Herring		};
4527724ba675SRob Herring	};
4528724ba675SRob Herring
4529724ba675SRob Herring	sdmmc4: mmc@78000600 {
4530724ba675SRob Herring		status = "okay";
4531724ba675SRob Herring
4532724ba675SRob Herring		keep-power-in-suspend;
4533724ba675SRob Herring		bus-width = <8>;
4534724ba675SRob Herring		non-removable;
4535724ba675SRob Herring		vmmc-supply = <&sys_3v3_reg>;
4536724ba675SRob Herring		vqmmc-supply = <&vdd_1v8>;
4537724ba675SRob Herring		nvidia,default-tap = <0x0F>;
4538724ba675SRob Herring		max-frequency = <25500000>;
4539724ba675SRob Herring	};
4540724ba675SRob Herring
4541724ba675SRob Herring	usb@7d000000 {
4542724ba675SRob Herring		compatible = "nvidia,tegra30-udc";
4543724ba675SRob Herring		status = "okay";
4544724ba675SRob Herring	};
4545724ba675SRob Herring
4546724ba675SRob Herring	usb-phy@7d000000 {
4547724ba675SRob Herring		status = "okay";
4548724ba675SRob Herring		dr_mode = "peripheral";
4549724ba675SRob Herring	};
4550724ba675SRob Herring
4551724ba675SRob Herring	usb@7d004000 {
4552724ba675SRob Herring		status = "okay";
4553724ba675SRob Herring		#address-cells = <1>;
4554724ba675SRob Herring		#size-cells = <0>;
4555724ba675SRob Herring
4556724ba675SRob Herring		ethernet@2 { /* SMSC 10/100T Ethernet Controller */
4557724ba675SRob Herring			compatible = "usb424,9e00";
4558724ba675SRob Herring			reg = <2>;
4559724ba675SRob Herring			local-mac-address = [00 11 22 33 44 55];
4560724ba675SRob Herring		};
4561724ba675SRob Herring	};
4562724ba675SRob Herring
4563724ba675SRob Herring	usb-phy@7d004000 {
4564724ba675SRob Herring		vbus-supply = <&vdd_smsc>;
4565724ba675SRob Herring		status = "okay";
4566724ba675SRob Herring	};
4567724ba675SRob Herring
4568724ba675SRob Herring	usb@7d008000 {
4569724ba675SRob Herring		status = "okay";
4570724ba675SRob Herring	};
4571724ba675SRob Herring
4572724ba675SRob Herring	usb-phy@7d008000 {
4573724ba675SRob Herring		vbus-supply = <&usb3_vbus_reg>;
4574724ba675SRob Herring		status = "okay";
4575724ba675SRob Herring	};
4576724ba675SRob Herring
4577724ba675SRob Herring	/* PMIC has a built-in 32KHz oscillator which is used by PMC */
4578724ba675SRob Herring	clk32k_in: clock {
4579724ba675SRob Herring		compatible = "fixed-clock";
4580724ba675SRob Herring		#clock-cells = <0>;
4581724ba675SRob Herring		clock-frequency = <32768>;
4582724ba675SRob Herring		clock-output-names = "pmic-oscillator";
4583724ba675SRob Herring	};
4584724ba675SRob Herring
4585724ba675SRob Herring	cpus {
4586724ba675SRob Herring		cpu0: cpu@0 {
4587724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
4588724ba675SRob Herring			cpu-supply = <&vdd_cpu>;
4589724ba675SRob Herring			#cooling-cells = <2>;
4590724ba675SRob Herring		};
4591724ba675SRob Herring
4592724ba675SRob Herring		cpu1: cpu@1 {
4593724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
4594724ba675SRob Herring			cpu-supply = <&vdd_cpu>;
4595724ba675SRob Herring			#cooling-cells = <2>;
4596724ba675SRob Herring		};
4597724ba675SRob Herring
4598724ba675SRob Herring		cpu2: cpu@2 {
4599724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
4600724ba675SRob Herring			cpu-supply = <&vdd_cpu>;
4601724ba675SRob Herring			#cooling-cells = <2>;
4602724ba675SRob Herring		};
4603724ba675SRob Herring
4604724ba675SRob Herring		cpu3: cpu@3 {
4605724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
4606724ba675SRob Herring			cpu-supply = <&vdd_cpu>;
4607724ba675SRob Herring			#cooling-cells = <2>;
4608724ba675SRob Herring		};
4609724ba675SRob Herring	};
4610724ba675SRob Herring
4611724ba675SRob Herring	fan: fan {
4612724ba675SRob Herring		compatible = "gpio-fan";
4613724ba675SRob Herring		gpios = <&gpio TEGRA_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
4614724ba675SRob Herring		gpio-fan,speed-map = <0    0
4615724ba675SRob Herring				      4500 1>;
4616724ba675SRob Herring		#cooling-cells = <2>;
4617724ba675SRob Herring	};
4618724ba675SRob Herring
4619724ba675SRob Herring	gpio-keys {
4620724ba675SRob Herring		compatible = "gpio-keys";
4621724ba675SRob Herring
4622724ba675SRob Herring		key-power {
4623724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
4624724ba675SRob Herring			debounce-interval = <10>;
4625724ba675SRob Herring			linux,code = <KEY_POWER>;
4626724ba675SRob Herring			wakeup-event-action = <EV_ACT_ASSERTED>;
4627724ba675SRob Herring			wakeup-source;
4628724ba675SRob Herring		};
4629724ba675SRob Herring	};
4630724ba675SRob Herring
4631724ba675SRob Herring	leds {
4632724ba675SRob Herring		compatible = "gpio-leds";
4633724ba675SRob Herring
4634724ba675SRob Herring		led-power {
4635724ba675SRob Herring			label = "power-led";
4636724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
4637724ba675SRob Herring			default-state = "on";
4638724ba675SRob Herring			linux,default-trigger = "heartbeat";
4639724ba675SRob Herring			retain-state-suspended;
4640724ba675SRob Herring		};
4641724ba675SRob Herring	};
4642724ba675SRob Herring
4643724ba675SRob Herring	opp-table-actmon {
4644724ba675SRob Herring		/delete-node/ opp-900000000;
4645724ba675SRob Herring	};
4646724ba675SRob Herring
4647724ba675SRob Herring	opp-table-emc {
4648724ba675SRob Herring		/delete-node/ opp-900000000-1350;
4649724ba675SRob Herring	};
4650724ba675SRob Herring
4651724ba675SRob Herring	wifi_pwrseq: pwrseq-wifi {
4652724ba675SRob Herring		compatible = "mmc-pwrseq-simple";
4653724ba675SRob Herring
4654724ba675SRob Herring		clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
4655724ba675SRob Herring		clock-names = "ext_clock";
4656724ba675SRob Herring
4657724ba675SRob Herring		reset-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_LOW>;
4658724ba675SRob Herring		post-power-on-delay-ms = <300>;
4659724ba675SRob Herring		power-off-delay-us = <300>;
4660724ba675SRob Herring	};
4661724ba675SRob Herring
4662724ba675SRob Herring	vdd_12v_in: regulator-vdd-12v-in {
4663724ba675SRob Herring		compatible = "regulator-fixed";
4664724ba675SRob Herring		regulator-name = "vdd_12v_in";
4665724ba675SRob Herring		regulator-min-microvolt = <12000000>;
4666724ba675SRob Herring		regulator-max-microvolt = <12000000>;
4667724ba675SRob Herring		regulator-always-on;
4668724ba675SRob Herring	};
4669724ba675SRob Herring
4670724ba675SRob Herring	sdmmc_3v3_reg: regulator-sdmmc-3v3 {
4671724ba675SRob Herring		compatible = "regulator-fixed";
4672724ba675SRob Herring		regulator-name = "sdmmc_3v3";
4673724ba675SRob Herring		regulator-min-microvolt = <3300000>;
4674724ba675SRob Herring		regulator-max-microvolt = <3300000>;
4675724ba675SRob Herring		enable-active-high;
4676724ba675SRob Herring		regulator-always-on;
4677724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
4678724ba675SRob Herring		vin-supply = <&sys_3v3_reg>;
4679724ba675SRob Herring	};
4680724ba675SRob Herring
4681724ba675SRob Herring	vdd_fuse_3v3_reg: regulator-vdd-fuse-3v3 {
4682724ba675SRob Herring		compatible = "regulator-fixed";
4683724ba675SRob Herring		regulator-name = "vdd_fuse_3v3";
4684724ba675SRob Herring		regulator-min-microvolt = <3300000>;
4685724ba675SRob Herring		regulator-max-microvolt = <3300000>;
4686724ba675SRob Herring		enable-active-high;
4687724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
4688724ba675SRob Herring		vin-supply = <&sys_3v3_reg>;
4689724ba675SRob Herring		regulator-always-on;
4690724ba675SRob Herring	};
4691724ba675SRob Herring
4692724ba675SRob Herring	vdd_vid_reg: regulator-vdd-vid {
4693724ba675SRob Herring		compatible = "regulator-fixed";
4694724ba675SRob Herring		regulator-name = "vddio_vid";
4695724ba675SRob Herring		regulator-min-microvolt = <5000000>;
4696724ba675SRob Herring		regulator-max-microvolt = <5000000>;
4697724ba675SRob Herring		enable-active-high;
4698724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
4699724ba675SRob Herring		vin-supply = <&vdd_5v0_reg>;
4700724ba675SRob Herring		regulator-boot-on;
4701724ba675SRob Herring	};
4702724ba675SRob Herring
4703724ba675SRob Herring	ddr_reg: regulator-ddr {
4704724ba675SRob Herring		compatible = "regulator-fixed";
4705724ba675SRob Herring		regulator-name = "vdd_ddr";
4706724ba675SRob Herring		regulator-min-microvolt = <1500000>;
4707724ba675SRob Herring		regulator-max-microvolt = <1500000>;
4708724ba675SRob Herring		regulator-always-on;
4709724ba675SRob Herring		enable-active-high;
4710724ba675SRob Herring		gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
4711724ba675SRob Herring		regulator-boot-on;
4712724ba675SRob Herring		vin-supply = <&vdd_12v_in>;
4713724ba675SRob Herring	};
4714724ba675SRob Herring
4715724ba675SRob Herring	sys_3v3_reg: regulator-sys-3v3 {
4716724ba675SRob Herring		compatible = "regulator-fixed";
4717724ba675SRob Herring		regulator-name = "sys_3v3";
4718724ba675SRob Herring		regulator-min-microvolt = <3300000>;
4719724ba675SRob Herring		regulator-max-microvolt = <3300000>;
4720724ba675SRob Herring		enable-active-high;
4721724ba675SRob Herring		gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
4722724ba675SRob Herring		regulator-always-on;
4723724ba675SRob Herring		regulator-boot-on;
4724724ba675SRob Herring		vin-supply = <&vdd_12v_in>;
4725724ba675SRob Herring	};
4726724ba675SRob Herring
4727724ba675SRob Herring	vdd_5v0_reg: regulator-vdd-5v0 {
4728724ba675SRob Herring		compatible = "regulator-fixed";
4729724ba675SRob Herring		regulator-name = "vdd_5v0";
4730724ba675SRob Herring		regulator-min-microvolt = <5000000>;
4731724ba675SRob Herring		regulator-max-microvolt = <5000000>;
4732724ba675SRob Herring		enable-active-high;
4733724ba675SRob Herring		gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
4734724ba675SRob Herring		regulator-always-on;
4735724ba675SRob Herring		regulator-boot-on;
4736724ba675SRob Herring		vin-supply = <&vdd_12v_in>;
4737724ba675SRob Herring	};
4738724ba675SRob Herring
4739724ba675SRob Herring	vdd_smsc: regulator-vdd-smsc {
4740724ba675SRob Herring		compatible = "regulator-fixed";
4741724ba675SRob Herring		regulator-name = "vdd_smsc";
4742724ba675SRob Herring		enable-active-high;
4743724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(DD, 5) GPIO_ACTIVE_HIGH>;
4744724ba675SRob Herring	};
4745724ba675SRob Herring
4746724ba675SRob Herring	usb3_vbus_reg: regulator-usb3-vbus {
4747724ba675SRob Herring		compatible = "regulator-fixed";
4748724ba675SRob Herring		regulator-name = "usb3_vbus";
4749724ba675SRob Herring		regulator-min-microvolt = <5000000>;
4750724ba675SRob Herring		regulator-max-microvolt = <5000000>;
4751724ba675SRob Herring		enable-active-high;
4752724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
4753724ba675SRob Herring		vin-supply = <&vdd_5v0_reg>;
4754724ba675SRob Herring	};
4755724ba675SRob Herring
4756724ba675SRob Herring	thermal-zones {
4757724ba675SRob Herring		cpu_thermal: cpu-thermal {
4758724ba675SRob Herring			polling-delay = <5000>;
4759724ba675SRob Herring			polling-delay-passive = <5000>;
4760724ba675SRob Herring
4761724ba675SRob Herring			thermal-sensors = <&cpu_temp 1>;
4762724ba675SRob Herring
4763724ba675SRob Herring			trips {
4764724ba675SRob Herring				cpu_alert0: cpu-alert0 {
4765724ba675SRob Herring					temperature = <50000>;
4766724ba675SRob Herring					hysteresis = <10000>;
4767724ba675SRob Herring					type = "active";
4768724ba675SRob Herring				};
4769724ba675SRob Herring				cpu_alert1: cpu-alert1 {
4770724ba675SRob Herring					temperature = <70000>;
4771724ba675SRob Herring					hysteresis = <5000>;
4772724ba675SRob Herring					type = "passive";
4773724ba675SRob Herring				};
4774724ba675SRob Herring				cpu_crit: cpu-crit {
4775724ba675SRob Herring					temperature = <90000>;
4776724ba675SRob Herring					hysteresis = <2000>;
4777724ba675SRob Herring					type = "critical";
4778724ba675SRob Herring				};
4779724ba675SRob Herring			};
4780724ba675SRob Herring
4781724ba675SRob Herring			cooling-maps {
4782724ba675SRob Herring				map0 {
4783724ba675SRob Herring					trip = <&cpu_alert0>;
4784724ba675SRob Herring					cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
4785724ba675SRob Herring				};
4786724ba675SRob Herring				map1 {
4787724ba675SRob Herring					trip = <&cpu_alert1>;
4788724ba675SRob Herring					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
4789724ba675SRob Herring							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
4790724ba675SRob Herring							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
4791724ba675SRob Herring							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
4792724ba675SRob Herring							 <&actmon THERMAL_NO_LIMIT
4793724ba675SRob Herring								  THERMAL_NO_LIMIT>;
4794724ba675SRob Herring				};
4795724ba675SRob Herring			};
4796724ba675SRob Herring		};
4797724ba675SRob Herring	};
4798724ba675SRob Herring};
4799