1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2724ba675SRob Herring
3724ba675SRob Herring#include <dt-bindings/input/gpio-keys.h>
4724ba675SRob Herring#include <dt-bindings/input/input.h>
5724ba675SRob Herring#include <dt-bindings/power/summit,smb347-charger.h>
6724ba675SRob Herring#include <dt-bindings/thermal/thermal.h>
7724ba675SRob Herring
8724ba675SRob Herring#include "tegra30.dtsi"
9724ba675SRob Herring#include "tegra30-cpu-opp.dtsi"
10724ba675SRob Herring#include "tegra30-cpu-opp-microvolt.dtsi"
11724ba675SRob Herring#include "tegra30-asus-lvds-display.dtsi"
12724ba675SRob Herring
13724ba675SRob Herring/ {
14724ba675SRob Herring	aliases {
15724ba675SRob Herring		mmc0 = &sdmmc4; /* eMMC */
16724ba675SRob Herring		mmc1 = &sdmmc3; /* WiFi */
17724ba675SRob Herring
18724ba675SRob Herring		rtc0 = &pmic;
19724ba675SRob Herring		rtc1 = "/rtc@7000e000";
20724ba675SRob Herring
21724ba675SRob Herring		serial1 = &uartc; /* Bluetooth */
22724ba675SRob Herring		serial2 = &uartb; /* GPS */
23724ba675SRob Herring	};
24724ba675SRob Herring
25724ba675SRob Herring	/*
26724ba675SRob Herring	 * The decompressor and also some bootloaders rely on a
27724ba675SRob Herring	 * pre-existing /chosen node to be available to insert the
28724ba675SRob Herring	 * command line and merge other ATAGS info.
29724ba675SRob Herring	 */
30724ba675SRob Herring	chosen {};
31724ba675SRob Herring
32724ba675SRob Herring	firmware {
33724ba675SRob Herring		trusted-foundations {
34724ba675SRob Herring			compatible = "tlm,trusted-foundations";
35724ba675SRob Herring			tlm,version-major = <0x0>;
36724ba675SRob Herring			tlm,version-minor = <0x0>;
37724ba675SRob Herring		};
38724ba675SRob Herring	};
39724ba675SRob Herring
40724ba675SRob Herring	memory@80000000 {
41724ba675SRob Herring		reg = <0x80000000 0x40000000>;
42724ba675SRob Herring	};
43724ba675SRob Herring
44724ba675SRob Herring	reserved-memory {
45724ba675SRob Herring		#address-cells = <1>;
46724ba675SRob Herring		#size-cells = <1>;
47724ba675SRob Herring		ranges;
48724ba675SRob Herring
49724ba675SRob Herring		linux,cma@80000000 {
50724ba675SRob Herring			compatible = "shared-dma-pool";
51724ba675SRob Herring			alloc-ranges = <0x80000000 0x30000000>;
52724ba675SRob Herring			size = <0x10000000>; /* 256MiB */
53724ba675SRob Herring			linux,cma-default;
54724ba675SRob Herring			reusable;
55724ba675SRob Herring		};
56724ba675SRob Herring
57724ba675SRob Herring		ramoops@bfdf0000 {
58724ba675SRob Herring			compatible = "ramoops";
59724ba675SRob Herring			reg = <0xbfdf0000 0x10000>;	/* 64kB */
60724ba675SRob Herring			console-size = <0x8000>;	/* 32kB */
61724ba675SRob Herring			record-size = <0x400>;		/*  1kB */
62724ba675SRob Herring			ecc-size = <16>;
63724ba675SRob Herring		};
64724ba675SRob Herring
65724ba675SRob Herring		trustzone@bfe00000 {
66724ba675SRob Herring			reg = <0xbfe00000 0x200000>;
67724ba675SRob Herring			no-map;
68724ba675SRob Herring		};
69724ba675SRob Herring	};
70724ba675SRob Herring
71724ba675SRob Herring	gpio@6000d000 {
72724ba675SRob Herring		init-low-power-mode-hog {
73724ba675SRob Herring			gpio-hog;
74724ba675SRob Herring			gpios = <TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
75724ba675SRob Herring			input;
76724ba675SRob Herring		};
77724ba675SRob Herring
78724ba675SRob Herring		init-mode-hog {
79724ba675SRob Herring			gpio-hog;
80724ba675SRob Herring			gpios = <TEGRA_GPIO(DD, 7) GPIO_ACTIVE_HIGH>,
81724ba675SRob Herring				<TEGRA_GPIO(CC, 6) GPIO_ACTIVE_HIGH>,
82724ba675SRob Herring				<TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
83724ba675SRob Herring			output-low;
84724ba675SRob Herring		};
85724ba675SRob Herring	};
86724ba675SRob Herring
87724ba675SRob Herring	pinmux@70000868 {
88724ba675SRob Herring		pinctrl-names = "default";
89724ba675SRob Herring		pinctrl-0 = <&state_default>;
90724ba675SRob Herring
91724ba675SRob Herring		state_default: pinmux {
92724ba675SRob Herring			clk_32k_out_pa0 {
93724ba675SRob Herring				nvidia,pins = "clk_32k_out_pa0";
94724ba675SRob Herring				nvidia,function = "blink";
95724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
96724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
97724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
98724ba675SRob Herring			};
99724ba675SRob Herring			uart3_cts_n_pa1 {
100724ba675SRob Herring				nvidia,pins = "uart3_cts_n_pa1",
101724ba675SRob Herring						"uart3_rxd_pw7";
102724ba675SRob Herring				nvidia,function = "uartc";
103724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
104724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
105724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
106724ba675SRob Herring			};
107724ba675SRob Herring			dap2_fs_pa2 {
108724ba675SRob Herring				nvidia,pins = "dap2_fs_pa2",
109724ba675SRob Herring						"dap2_sclk_pa3",
110724ba675SRob Herring						"dap2_din_pa4",
111724ba675SRob Herring						"dap2_dout_pa5";
112724ba675SRob Herring				nvidia,function = "i2s1";
113724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
114724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
115724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
116724ba675SRob Herring			};
117724ba675SRob Herring			sdmmc3_clk_pa6 {
118724ba675SRob Herring				nvidia,pins = "sdmmc3_clk_pa6";
119724ba675SRob Herring				nvidia,function = "sdmmc3";
120724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
121724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
122724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
123724ba675SRob Herring			};
124724ba675SRob Herring			sdmmc3_cmd_pa7 {
125724ba675SRob Herring				nvidia,pins = "sdmmc3_cmd_pa7",
126724ba675SRob Herring						"sdmmc3_dat3_pb4",
127724ba675SRob Herring						"sdmmc3_dat2_pb5",
128724ba675SRob Herring						"sdmmc3_dat1_pb6",
129724ba675SRob Herring						"sdmmc3_dat0_pb7",
130724ba675SRob Herring						"sdmmc3_dat4_pd1",
131724ba675SRob Herring						"sdmmc3_dat6_pd3",
132724ba675SRob Herring						"sdmmc3_dat7_pd4";
133724ba675SRob Herring				nvidia,function = "sdmmc3";
134724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
135724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
136724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
137724ba675SRob Herring			};
138724ba675SRob Herring			gmi_a17_pb0 {
139724ba675SRob Herring				nvidia,pins = "gmi_a17_pb0",
140724ba675SRob Herring						"gmi_a18_pb1";
141724ba675SRob Herring				nvidia,function = "uartd";
142724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
143724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
144724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
145724ba675SRob Herring			};
146724ba675SRob Herring			lcd_pwr0_pb2 {
147724ba675SRob Herring				nvidia,pins = "lcd_pwr0_pb2",
148724ba675SRob Herring						"lcd_pwr1_pc1",
149724ba675SRob Herring						"lcd_m1_pw1";
150724ba675SRob Herring				nvidia,function = "displaya";
151724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
152724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
153724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
154724ba675SRob Herring			};
155724ba675SRob Herring			lcd_pclk_pb3 {
156724ba675SRob Herring				nvidia,pins = "lcd_pclk_pb3",
157724ba675SRob Herring						"lcd_d0_pe0",
158724ba675SRob Herring						"lcd_d1_pe1",
159724ba675SRob Herring						"lcd_d2_pe2",
160724ba675SRob Herring						"lcd_d3_pe3",
161724ba675SRob Herring						"lcd_d4_pe4",
162724ba675SRob Herring						"lcd_d5_pe5",
163724ba675SRob Herring						"lcd_d6_pe6",
164724ba675SRob Herring						"lcd_d7_pe7",
165724ba675SRob Herring						"lcd_d8_pf0",
166724ba675SRob Herring						"lcd_d9_pf1",
167724ba675SRob Herring						"lcd_d10_pf2",
168724ba675SRob Herring						"lcd_d11_pf3",
169724ba675SRob Herring						"lcd_d12_pf4",
170724ba675SRob Herring						"lcd_d13_pf5",
171724ba675SRob Herring						"lcd_d14_pf6",
172724ba675SRob Herring						"lcd_d15_pf7",
173724ba675SRob Herring						"lcd_de_pj1",
174724ba675SRob Herring						"lcd_hsync_pj3",
175724ba675SRob Herring						"lcd_vsync_pj4",
176724ba675SRob Herring						"lcd_d16_pm0",
177724ba675SRob Herring						"lcd_d17_pm1",
178724ba675SRob Herring						"lcd_d18_pm2",
179724ba675SRob Herring						"lcd_d19_pm3",
180724ba675SRob Herring						"lcd_d20_pm4",
181724ba675SRob Herring						"lcd_d21_pm5",
182724ba675SRob Herring						"lcd_d22_pm6",
183724ba675SRob Herring						"lcd_d23_pm7",
184724ba675SRob Herring						"lcd_cs0_n_pn4",
185724ba675SRob Herring						"lcd_sdout_pn5",
186724ba675SRob Herring						"lcd_dc0_pn6",
187724ba675SRob Herring						"lcd_cs1_n_pw0",
188724ba675SRob Herring						"lcd_sdin_pz2",
189724ba675SRob Herring						"lcd_sck_pz4";
190724ba675SRob Herring				nvidia,function = "displaya";
191724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
192724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
193724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
194724ba675SRob Herring			};
195724ba675SRob Herring			uart3_rts_n_pc0 {
196724ba675SRob Herring				nvidia,pins = "uart3_rts_n_pc0",
197724ba675SRob Herring						"uart3_txd_pw6";
198724ba675SRob Herring				nvidia,function = "uartc";
199724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
200724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
201724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
202724ba675SRob Herring			};
203724ba675SRob Herring			uart2_txd_pc2 {
204724ba675SRob Herring				nvidia,pins = "uart2_txd_pc2",
205724ba675SRob Herring						"uart2_rts_n_pj6";
206724ba675SRob Herring				nvidia,function = "uartb";
207724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
208724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
209724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
210724ba675SRob Herring			};
211724ba675SRob Herring			uart2_rxd_pc3 {
212724ba675SRob Herring				nvidia,pins = "uart2_rxd_pc3",
213724ba675SRob Herring						"uart2_cts_n_pj5";
214724ba675SRob Herring				nvidia,function = "uartb";
215724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
216724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
217724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
218724ba675SRob Herring			};
219724ba675SRob Herring			gen1_i2c_scl_pc4 {
220724ba675SRob Herring				nvidia,pins = "gen1_i2c_scl_pc4",
221724ba675SRob Herring						"gen1_i2c_sda_pc5";
222724ba675SRob Herring				nvidia,function = "i2c1";
223724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
224724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
225724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
226724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
227724ba675SRob Herring			};
228724ba675SRob Herring			gmi_wp_n_pc7 {
229724ba675SRob Herring				nvidia,pins = "gmi_wp_n_pc7",
230724ba675SRob Herring						"gmi_wait_pi7",
231724ba675SRob Herring						"gmi_cs4_n_pk2",
232724ba675SRob Herring						"gmi_cs3_n_pk4";
233724ba675SRob Herring				nvidia,function = "rsvd1";
234724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
235724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
236724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
237724ba675SRob Herring			};
238724ba675SRob Herring			gmi_ad12_ph4 {
239724ba675SRob Herring				nvidia,pins = "gmi_ad12_ph4",
240724ba675SRob Herring						"gmi_cs0_n_pj0",
241724ba675SRob Herring						"gmi_cs1_n_pj2",
242724ba675SRob Herring						"gmi_cs2_n_pk3";
243724ba675SRob Herring				nvidia,function = "rsvd1";
244724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
245724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
246724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
247724ba675SRob Herring			};
248724ba675SRob Herring			sdmmc3_dat5_pd0 {
249724ba675SRob Herring				nvidia,pins = "sdmmc3_dat5_pd0";
250724ba675SRob Herring				nvidia,function = "sdmmc3";
251724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
252724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
253724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
254724ba675SRob Herring			};
255724ba675SRob Herring			gmi_ad0_pg0 {
256724ba675SRob Herring				nvidia,pins = "gmi_ad0_pg0",
257724ba675SRob Herring						"gmi_ad1_pg1",
258724ba675SRob Herring						"gmi_ad14_ph6",
259724ba675SRob Herring						"pu1";
260724ba675SRob Herring				nvidia,function = "rsvd1";
261724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
262724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
263724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
264724ba675SRob Herring			};
265724ba675SRob Herring			gmi_ad2_pg2 {
266724ba675SRob Herring				nvidia,pins = "gmi_ad2_pg2",
267724ba675SRob Herring						"gmi_ad3_pg3",
268724ba675SRob Herring						"gmi_ad6_pg6",
269724ba675SRob Herring						"gmi_ad7_pg7";
270724ba675SRob Herring				nvidia,function = "rsvd1";
271724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
272724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
273724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
274724ba675SRob Herring			};
275724ba675SRob Herring			gmi_ad4_pg4 {
276724ba675SRob Herring				nvidia,pins = "gmi_ad4_pg4",
277724ba675SRob Herring						"gmi_ad5_pg5";
278724ba675SRob Herring				nvidia,function = "nand";
279724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
280724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
281724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
282724ba675SRob Herring			};
283724ba675SRob Herring			gmi_ad8_ph0 {
284724ba675SRob Herring				nvidia,pins = "gmi_ad8_ph0";
285724ba675SRob Herring				nvidia,function = "pwm0";
286724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
287724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
288724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
289724ba675SRob Herring			};
290724ba675SRob Herring			gmi_ad9_ph1 {
291724ba675SRob Herring				nvidia,pins = "gmi_ad9_ph1";
292724ba675SRob Herring				nvidia,function = "rsvd4";
293724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
294724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
295724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
296724ba675SRob Herring			};
297724ba675SRob Herring			gmi_ad10_ph2 {
298724ba675SRob Herring				nvidia,pins = "gmi_ad10_ph2";
299724ba675SRob Herring				nvidia,function = "pwm2";
300724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
301724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
302724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
303724ba675SRob Herring			};
304724ba675SRob Herring			gmi_ad11_ph3 {
305724ba675SRob Herring				nvidia,pins = "gmi_ad11_ph3";
306724ba675SRob Herring				nvidia,function = "pwm3";
307724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
308724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
309724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
310724ba675SRob Herring			};
311724ba675SRob Herring			gmi_ad13_ph5 {
312724ba675SRob Herring				nvidia,pins = "gmi_ad13_ph5",
313724ba675SRob Herring						"gmi_wr_n_pi0",
314724ba675SRob Herring						"gmi_oe_n_pi1",
315724ba675SRob Herring						"gmi_adv_n_pk0";
316724ba675SRob Herring				nvidia,function = "rsvd1";
317724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
318724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
319724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
320724ba675SRob Herring			};
321724ba675SRob Herring			gmi_ad15_ph7 {
322724ba675SRob Herring				nvidia,pins = "gmi_ad15_ph7";
323724ba675SRob Herring				nvidia,function = "rsvd1";
324724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
325724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
326724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
327724ba675SRob Herring			};
328724ba675SRob Herring			gmi_dqs_pi2 {
329724ba675SRob Herring				nvidia,pins = "gmi_dqs_pi2",
330724ba675SRob Herring						"pu2",
331724ba675SRob Herring						"pv1";
332724ba675SRob Herring				nvidia,function = "rsvd1";
333724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
334724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
335724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
336724ba675SRob Herring			};
337724ba675SRob Herring			gmi_rst_n_pi4 {
338724ba675SRob Herring				nvidia,pins = "gmi_rst_n_pi4";
339724ba675SRob Herring				nvidia,function = "nand";
340724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
341724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
342724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
343724ba675SRob Herring			};
344724ba675SRob Herring			gmi_iordy_pi5 {
345724ba675SRob Herring				nvidia,pins = "gmi_iordy_pi5";
346724ba675SRob Herring				nvidia,function = "rsvd1";
347724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
348724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
349724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
350724ba675SRob Herring			};
351724ba675SRob Herring			gmi_cs7_n_pi6 {
352724ba675SRob Herring				nvidia,pins = "gmi_cs7_n_pi6",
353724ba675SRob Herring						"gmi_clk_pk1";
354724ba675SRob Herring				nvidia,function = "nand";
355724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
356724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
357724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
358724ba675SRob Herring			};
359724ba675SRob Herring			gmi_a16_pj7 {
360724ba675SRob Herring				nvidia,pins = "gmi_a16_pj7",
361724ba675SRob Herring						"gmi_a19_pk7";
362724ba675SRob Herring				nvidia,function = "uartd";
363724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
364724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
365724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
366724ba675SRob Herring			};
367724ba675SRob Herring			spdif_out_pk5 {
368724ba675SRob Herring				nvidia,pins = "spdif_out_pk5";
369724ba675SRob Herring				nvidia,function = "spdif";
370724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
371724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
372724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
373724ba675SRob Herring			};
374724ba675SRob Herring			spdif_in_pk6 {
375724ba675SRob Herring				nvidia,pins = "spdif_in_pk6";
376724ba675SRob Herring				nvidia,function = "spdif";
377724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
378724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
379724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
380724ba675SRob Herring			};
381724ba675SRob Herring			dap1_fs_pn0 {
382724ba675SRob Herring				nvidia,pins = "dap1_fs_pn0",
383724ba675SRob Herring						"dap1_din_pn1",
384724ba675SRob Herring						"dap1_dout_pn2",
385724ba675SRob Herring						"dap1_sclk_pn3";
386724ba675SRob Herring				nvidia,function = "i2s0";
387724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
388724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
389724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
390724ba675SRob Herring			};
391724ba675SRob Herring			hdmi_int_pn7 {
392724ba675SRob Herring				nvidia,pins = "hdmi_int_pn7";
393724ba675SRob Herring				nvidia,function = "hdmi";
394724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
395724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
396724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
397724ba675SRob Herring			};
398724ba675SRob Herring			ulpi_data7_po0 {
399724ba675SRob Herring				nvidia,pins = "ulpi_data7_po0";
400724ba675SRob Herring				nvidia,function = "uarta";
401724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
402724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
403724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
404724ba675SRob Herring			};
405724ba675SRob Herring			ulpi_data3_po4 {
406724ba675SRob Herring				nvidia,pins = "ulpi_data3_po4";
407724ba675SRob Herring				nvidia,function = "ulpi";
408724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
409724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
410724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
411724ba675SRob Herring			};
412724ba675SRob Herring			dap3_fs_pp0 {
413724ba675SRob Herring				nvidia,pins = "dap3_fs_pp0";
414724ba675SRob Herring				nvidia,function = "i2s2";
415724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
416724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
417724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
418724ba675SRob Herring			};
419724ba675SRob Herring			dap4_fs_pp4 {
420724ba675SRob Herring				nvidia,pins = "dap4_fs_pp4",
421724ba675SRob Herring						"dap4_din_pp5",
422724ba675SRob Herring						"dap4_dout_pp6",
423724ba675SRob Herring						"dap4_sclk_pp7";
424724ba675SRob Herring				nvidia,function = "i2s3";
425724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
426724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
427724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
428724ba675SRob Herring			};
429724ba675SRob Herring			kb_col0_pq0 {
430724ba675SRob Herring				nvidia,pins = "kb_col0_pq0",
431724ba675SRob Herring						"kb_col1_pq1",
432724ba675SRob Herring						"kb_row1_pr1";
433724ba675SRob Herring				nvidia,function = "kbc";
434724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
435724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
436724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
437724ba675SRob Herring			};
438724ba675SRob Herring			kb_col2_pq2 {
439724ba675SRob Herring				nvidia,pins = "kb_col2_pq2",
440724ba675SRob Herring						"kb_col3_pq3";
441724ba675SRob Herring				nvidia,function = "rsvd4";
442724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
443724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
444724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
445724ba675SRob Herring			};
446724ba675SRob Herring			kb_col4_pq4 {
447724ba675SRob Herring				nvidia,pins = "kb_col4_pq4",
448724ba675SRob Herring						"kb_col5_pq5",
449724ba675SRob Herring						"kb_col7_pq7",
450724ba675SRob Herring						"kb_row2_pr2",
451724ba675SRob Herring						"kb_row4_pr4",
452724ba675SRob Herring						"kb_row5_pr5",
453724ba675SRob Herring						"kb_row14_ps6";
454724ba675SRob Herring				nvidia,function = "kbc";
455724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
456724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
457724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
458724ba675SRob Herring			};
459724ba675SRob Herring			kb_row0_pr0 {
460724ba675SRob Herring				nvidia,pins = "kb_row0_pr0";
461724ba675SRob Herring				nvidia,function = "rsvd4";
462724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
463724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
464724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
465724ba675SRob Herring			};
466724ba675SRob Herring			kb_row6_pr6 {
467724ba675SRob Herring				nvidia,pins = "kb_row6_pr6",
468724ba675SRob Herring						"kb_row8_ps0",
469724ba675SRob Herring						"kb_row9_ps1",
470724ba675SRob Herring						"kb_row10_ps2";
471724ba675SRob Herring				nvidia,function = "kbc";
472724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
473724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
474724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
475724ba675SRob Herring			};
476724ba675SRob Herring			kb_row11_ps3 {
477724ba675SRob Herring				nvidia,pins = "kb_row11_ps3",
478724ba675SRob Herring						"kb_row12_ps4";
479724ba675SRob Herring				nvidia,function = "kbc";
480724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
481724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
482724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
483724ba675SRob Herring			};
484724ba675SRob Herring			gen2_i2c_scl_pt5 {
485724ba675SRob Herring				nvidia,pins = "gen2_i2c_scl_pt5",
486724ba675SRob Herring						"gen2_i2c_sda_pt6";
487724ba675SRob Herring				nvidia,function = "i2c2";
488724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
489724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
490724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
491724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
492724ba675SRob Herring			};
493724ba675SRob Herring			sdmmc4_cmd_pt7 {
494724ba675SRob Herring				nvidia,pins = "sdmmc4_cmd_pt7",
495724ba675SRob Herring						"sdmmc4_dat0_paa0",
496724ba675SRob Herring						"sdmmc4_dat1_paa1",
497724ba675SRob Herring						"sdmmc4_dat2_paa2",
498724ba675SRob Herring						"sdmmc4_dat3_paa3",
499724ba675SRob Herring						"sdmmc4_dat4_paa4",
500724ba675SRob Herring						"sdmmc4_dat5_paa5",
501724ba675SRob Herring						"sdmmc4_dat6_paa6",
502724ba675SRob Herring						"sdmmc4_dat7_paa7";
503724ba675SRob Herring				nvidia,function = "sdmmc4";
504724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
505724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
506724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
507724ba675SRob Herring			};
508724ba675SRob Herring			pu0 {
509724ba675SRob Herring				nvidia,pins = "pu0",
510724ba675SRob Herring						"pu6";
511724ba675SRob Herring				nvidia,function = "rsvd4";
512724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
513724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
514724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
515724ba675SRob Herring			};
516724ba675SRob Herring			jtag_rtck_pu7 {
517724ba675SRob Herring				nvidia,pins = "jtag_rtck_pu7";
518724ba675SRob Herring				nvidia,function = "rtck";
519724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
520724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
521724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
522724ba675SRob Herring			};
523724ba675SRob Herring			pv0 {
524724ba675SRob Herring				nvidia,pins = "pv0";
525724ba675SRob Herring				nvidia,function = "rsvd1";
526724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
527724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
528724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
529724ba675SRob Herring			};
530724ba675SRob Herring			ddc_scl_pv4 {
531724ba675SRob Herring				nvidia,pins = "ddc_scl_pv4",
532724ba675SRob Herring						"ddc_sda_pv5";
533724ba675SRob Herring				nvidia,function = "i2c4";
534724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
535724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
536724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
537724ba675SRob Herring			};
538724ba675SRob Herring			crt_hsync_pv6 {
539724ba675SRob Herring				nvidia,pins = "crt_hsync_pv6",
540724ba675SRob Herring						"crt_vsync_pv7";
541724ba675SRob Herring				nvidia,function = "crt";
542724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
543724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
544724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
545724ba675SRob Herring			};
546724ba675SRob Herring			spi2_cs1_n_pw2 {
547724ba675SRob Herring				nvidia,pins = "spi2_cs1_n_pw2",
548724ba675SRob Herring						"spi2_miso_px1",
549724ba675SRob Herring						"spi2_sck_px2";
550724ba675SRob Herring				nvidia,function = "spi2";
551724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
552724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
553724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
554724ba675SRob Herring			};
555724ba675SRob Herring			clk1_out_pw4 {
556724ba675SRob Herring				nvidia,pins = "clk1_out_pw4";
557724ba675SRob Herring				nvidia,function = "extperiph1";
558724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
559724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
560724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
561724ba675SRob Herring			};
562724ba675SRob Herring			clk2_out_pw5 {
563724ba675SRob Herring				nvidia,pins = "clk2_out_pw5";
564724ba675SRob Herring				nvidia,function = "extperiph2";
565724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
566724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
567724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
568724ba675SRob Herring			};
569724ba675SRob Herring			spi2_cs0_n_px3 {
570724ba675SRob Herring				nvidia,pins = "spi2_cs0_n_px3";
571724ba675SRob Herring				nvidia,function = "spi6";
572724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
573724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
574724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
575724ba675SRob Herring			};
576724ba675SRob Herring			spi1_mosi_px4 {
577724ba675SRob Herring				nvidia,pins = "spi1_mosi_px4",
578724ba675SRob Herring						"spi1_cs0_n_px6";
579724ba675SRob Herring				nvidia,function = "spi1";
580724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
581724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
582724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
583724ba675SRob Herring			};
584724ba675SRob Herring			ulpi_clk_py0 {
585724ba675SRob Herring				nvidia,pins = "ulpi_clk_py0",
586724ba675SRob Herring						"ulpi_dir_py1";
587724ba675SRob Herring				nvidia,function = "ulpi";
588724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
589724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
590724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
591724ba675SRob Herring			};
592724ba675SRob Herring			sdmmc1_dat3_py4 {
593724ba675SRob Herring				nvidia,pins = "sdmmc1_dat3_py4",
594724ba675SRob Herring						"sdmmc1_dat2_py5",
595724ba675SRob Herring						"sdmmc1_dat1_py6",
596724ba675SRob Herring						"sdmmc1_dat0_py7",
597724ba675SRob Herring						"sdmmc1_cmd_pz1";
598724ba675SRob Herring				nvidia,function = "sdmmc1";
599724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
600724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
601724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
602724ba675SRob Herring			};
603724ba675SRob Herring			sdmmc1_clk_pz0 {
604724ba675SRob Herring				nvidia,pins = "sdmmc1_clk_pz0";
605724ba675SRob Herring				nvidia,function = "sdmmc1";
606724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
607724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
608724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
609724ba675SRob Herring			};
610724ba675SRob Herring			lcd_wr_n_pz3 {
611724ba675SRob Herring				nvidia,pins = "lcd_wr_n_pz3";
612724ba675SRob Herring				nvidia,function = "displaya";
613724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
614724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
615724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
616724ba675SRob Herring			};
617724ba675SRob Herring			sys_clk_req_pz5 {
618724ba675SRob Herring				nvidia,pins = "sys_clk_req_pz5";
619724ba675SRob Herring				nvidia,function = "sysclk";
620724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
621724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
622724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
623724ba675SRob Herring			};
624724ba675SRob Herring			pwr_i2c_scl_pz6 {
625724ba675SRob Herring				nvidia,pins = "pwr_i2c_scl_pz6",
626724ba675SRob Herring						"pwr_i2c_sda_pz7";
627724ba675SRob Herring				nvidia,function = "i2cpwr";
628724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
629724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
630724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
631724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
632724ba675SRob Herring			};
633724ba675SRob Herring			pbb0 {
634724ba675SRob Herring				nvidia,pins = "pbb0",
635724ba675SRob Herring						"pcc1";
636724ba675SRob Herring				nvidia,function = "rsvd2";
637724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
638724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
639724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
640724ba675SRob Herring			};
641724ba675SRob Herring			cam_i2c_scl_pbb1 {
642724ba675SRob Herring				nvidia,pins = "cam_i2c_scl_pbb1",
643724ba675SRob Herring						"cam_i2c_sda_pbb2";
644724ba675SRob Herring				nvidia,function = "i2c3";
645724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
646724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
647724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
648724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
649724ba675SRob Herring			};
650724ba675SRob Herring			pbb3 {
651724ba675SRob Herring				nvidia,pins = "pbb3";
652724ba675SRob Herring				nvidia,function = "vgp3";
653724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
654724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
655724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
656724ba675SRob Herring			};
657724ba675SRob Herring			pbb4 {
658724ba675SRob Herring				nvidia,pins = "pbb4";
659724ba675SRob Herring				nvidia,function = "vgp4";
660724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
661724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
662724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
663724ba675SRob Herring			};
664724ba675SRob Herring			pbb5 {
665724ba675SRob Herring				nvidia,pins = "pbb5";
666724ba675SRob Herring				nvidia,function = "vgp5";
667724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
668724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
669724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
670724ba675SRob Herring			};
671724ba675SRob Herring			pbb6 {
672724ba675SRob Herring				nvidia,pins = "pbb6";
673724ba675SRob Herring				nvidia,function = "vgp6";
674724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
675724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
676724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
677724ba675SRob Herring			};
678724ba675SRob Herring			pbb7 {
679724ba675SRob Herring				nvidia,pins = "pbb7",
680724ba675SRob Herring						"pcc2";
681724ba675SRob Herring				nvidia,function = "i2s4";
682724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
683724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
684724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
685724ba675SRob Herring			};
686724ba675SRob Herring			cam_mclk_pcc0 {
687724ba675SRob Herring				nvidia,pins = "cam_mclk_pcc0";
688724ba675SRob Herring				nvidia,function = "vi_alt3";
689724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
690724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
691724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
692724ba675SRob Herring			};
693724ba675SRob Herring			sdmmc4_rst_n_pcc3 {
694724ba675SRob Herring				nvidia,pins = "sdmmc4_rst_n_pcc3";
695724ba675SRob Herring				nvidia,function = "rsvd2";
696724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
697724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
698724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
699724ba675SRob Herring			};
700724ba675SRob Herring			sdmmc4_clk_pcc4 {
701724ba675SRob Herring				nvidia,pins = "sdmmc4_clk_pcc4";
702724ba675SRob Herring				nvidia,function = "sdmmc4";
703724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
704724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
705724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
706724ba675SRob Herring			};
707724ba675SRob Herring			clk2_req_pcc5 {
708724ba675SRob Herring				nvidia,pins = "clk2_req_pcc5";
709724ba675SRob Herring				nvidia,function = "dap";
710724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
711724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
712724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
713724ba675SRob Herring			};
714724ba675SRob Herring			pex_l2_rst_n_pcc6 {
715724ba675SRob Herring				nvidia,pins = "pex_l2_rst_n_pcc6",
716724ba675SRob Herring						"pex_l2_clkreq_n_pcc7";
717724ba675SRob Herring				nvidia,function = "pcie";
718724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
719724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
720724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
721724ba675SRob Herring			};
722724ba675SRob Herring			pex_wake_n_pdd3 {
723724ba675SRob Herring				nvidia,pins = "pex_wake_n_pdd3",
724724ba675SRob Herring						"pex_l2_prsnt_n_pdd7";
725724ba675SRob Herring				nvidia,function = "pcie";
726724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
727724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
728724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
729724ba675SRob Herring			};
730724ba675SRob Herring			clk3_out_pee0 {
731724ba675SRob Herring				nvidia,pins = "clk3_out_pee0";
732724ba675SRob Herring				nvidia,function = "extperiph3";
733724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
734724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
735724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
736724ba675SRob Herring			};
737724ba675SRob Herring			clk1_req_pee2 {
738724ba675SRob Herring				nvidia,pins = "clk1_req_pee2";
739724ba675SRob Herring				nvidia,function = "dap";
740724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
741724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
742724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
743724ba675SRob Herring			};
744724ba675SRob Herring			hdmi_cec_pee3 {
745724ba675SRob Herring				nvidia,pins = "hdmi_cec_pee3";
746724ba675SRob Herring				nvidia,function = "cec";
747724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
748724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
749724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
750724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
751724ba675SRob Herring			};
752724ba675SRob Herring			owr {
753724ba675SRob Herring				nvidia,pins = "owr";
754724ba675SRob Herring				nvidia,function = "owr";
755724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
756724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
757724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
758724ba675SRob Herring			};
759724ba675SRob Herring			drive_dap1 {
760724ba675SRob Herring				nvidia,pins = "drive_dap1",
761724ba675SRob Herring						"drive_dap2",
762724ba675SRob Herring						"drive_dbg",
763724ba675SRob Herring						"drive_at5",
764724ba675SRob Herring						"drive_gme",
765724ba675SRob Herring						"drive_ddc",
766724ba675SRob Herring						"drive_ao1",
767724ba675SRob Herring						"drive_uart3";
768724ba675SRob Herring				nvidia,high-speed-mode = <0>;
769724ba675SRob Herring				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
770724ba675SRob Herring				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
771724ba675SRob Herring				nvidia,pull-down-strength = <31>;
772724ba675SRob Herring				nvidia,pull-up-strength = <31>;
773724ba675SRob Herring				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
774724ba675SRob Herring				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
775724ba675SRob Herring			};
776724ba675SRob Herring			drive_sdio1 {
777724ba675SRob Herring				nvidia,pins = "drive_sdio1",
778724ba675SRob Herring						"drive_sdio3";
779724ba675SRob Herring				nvidia,high-speed-mode = <0>;
780724ba675SRob Herring				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
781724ba675SRob Herring				nvidia,pull-down-strength = <46>;
782724ba675SRob Herring				nvidia,pull-up-strength = <42>;
783724ba675SRob Herring				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
784724ba675SRob Herring				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
785724ba675SRob Herring			};
786724ba675SRob Herring			drive_gma {
787724ba675SRob Herring				nvidia,pins = "drive_gma",
788724ba675SRob Herring						"drive_gmb",
789724ba675SRob Herring						"drive_gmc",
790724ba675SRob Herring						"drive_gmd";
791724ba675SRob Herring				nvidia,pull-down-strength = <9>;
792724ba675SRob Herring				nvidia,pull-up-strength = <9>;
793724ba675SRob Herring				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
794724ba675SRob Herring				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
795724ba675SRob Herring			};
796724ba675SRob Herring		};
797724ba675SRob Herring	};
798724ba675SRob Herring
799724ba675SRob Herring	uartb: serial@70006040 {
800724ba675SRob Herring		compatible = "nvidia,tegra30-hsuart";
801500b861dSThierry Reding		reset-names = "serial";
802724ba675SRob Herring		/delete-property/ reg-shift;
803724ba675SRob Herring		/* GPS BCM4751 */
804724ba675SRob Herring	};
805724ba675SRob Herring
806724ba675SRob Herring	uartc: serial@70006200 {
807724ba675SRob Herring		compatible = "nvidia,tegra30-hsuart";
808500b861dSThierry Reding		reset-names = "serial";
809724ba675SRob Herring		/delete-property/ reg-shift;
810724ba675SRob Herring		status = "okay";
811724ba675SRob Herring
812724ba675SRob Herring		nvidia,adjust-baud-rates = <0 9600 100>,
813724ba675SRob Herring					   <9600 115200 200>,
814724ba675SRob Herring					   <1000000 4000000 136>;
815724ba675SRob Herring
816724ba675SRob Herring		/* Azurewave AW-NH665 BCM4330B1 */
817724ba675SRob Herring		bluetooth {
818724ba675SRob Herring			compatible = "brcm,bcm4330-bt";
819724ba675SRob Herring
820724ba675SRob Herring			interrupt-parent = <&gpio>;
821724ba675SRob Herring			interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
822724ba675SRob Herring			interrupt-names = "host-wakeup";
823724ba675SRob Herring
824724ba675SRob Herring			max-speed = <4000000>;
825724ba675SRob Herring
826724ba675SRob Herring			clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
827724ba675SRob Herring			clock-names = "txco";
828724ba675SRob Herring
829724ba675SRob Herring			vbat-supply  = <&vdd_3v3_sys>;
830724ba675SRob Herring			vddio-supply = <&vdd_1v8>;
831724ba675SRob Herring
832724ba675SRob Herring			device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
833724ba675SRob Herring			shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
834724ba675SRob Herring		};
835724ba675SRob Herring	};
836724ba675SRob Herring
837724ba675SRob Herring	pwm: pwm@7000a000 {
838724ba675SRob Herring		status = "okay";
839724ba675SRob Herring	};
840724ba675SRob Herring
841724ba675SRob Herring	i2c@7000c400 {
842724ba675SRob Herring		clock-frequency = <400000>;
843724ba675SRob Herring		status = "okay";
844724ba675SRob Herring
845724ba675SRob Herring		touchscreen@10 {
846724ba675SRob Herring			compatible = "elan,ektf3624";
847724ba675SRob Herring			reg = <0x10>;
848724ba675SRob Herring
849724ba675SRob Herring			interrupt-parent = <&gpio>;
850724ba675SRob Herring			interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_LEVEL_LOW>;
851724ba675SRob Herring
852724ba675SRob Herring			reset-gpios = <&gpio TEGRA_GPIO(H, 6) GPIO_ACTIVE_LOW>;
853724ba675SRob Herring
854724ba675SRob Herring			vcc33-supply = <&vcc_3v3_ts>;
855724ba675SRob Herring			vccio-supply = <&vcc_3v3_ts>;
856724ba675SRob Herring
857724ba675SRob Herring			touchscreen-size-x = <2112>;
858724ba675SRob Herring			touchscreen-size-y = <1280>;
859724ba675SRob Herring			touchscreen-swapped-x-y;
860724ba675SRob Herring			touchscreen-inverted-x;
861724ba675SRob Herring		};
862724ba675SRob Herring	};
863724ba675SRob Herring
864724ba675SRob Herring	i2c@7000c500 {
865724ba675SRob Herring		clock-frequency = <100000>;
866724ba675SRob Herring		status = "okay";
867724ba675SRob Herring
868724ba675SRob Herring		compass@e {
869724ba675SRob Herring			compatible = "asahi-kasei,ak8974";
870724ba675SRob Herring			reg = <0x0e>;
871724ba675SRob Herring
872724ba675SRob Herring			interrupt-parent = <&gpio>;
873724ba675SRob Herring			interrupts = <TEGRA_GPIO(W, 0) IRQ_TYPE_EDGE_RISING>;
874724ba675SRob Herring
875724ba675SRob Herring			avdd-supply = <&vdd_3v3_sys>;
876724ba675SRob Herring			dvdd-supply = <&vdd_1v8>;
877724ba675SRob Herring
878724ba675SRob Herring			mount-matrix =	 "0", "-1",  "0",
879724ba675SRob Herring					"-1",  "0",  "0",
880724ba675SRob Herring					 "0",  "0", "-1";
881724ba675SRob Herring		};
882724ba675SRob Herring
883724ba675SRob Herring		light-sensor@1c {
884724ba675SRob Herring			compatible = "dynaimage,al3010";
885724ba675SRob Herring			reg = <0x1c>;
886724ba675SRob Herring
887724ba675SRob Herring			interrupt-parent = <&gpio>;
888724ba675SRob Herring			interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
889724ba675SRob Herring
890724ba675SRob Herring			vdd-supply = <&vdd_3v3_sys>;
891724ba675SRob Herring		};
892724ba675SRob Herring
893724ba675SRob Herring		accelerometer@68 {
894724ba675SRob Herring			compatible = "invensense,mpu6050";
895724ba675SRob Herring			reg = <0x68>;
896724ba675SRob Herring
897724ba675SRob Herring			interrupt-parent = <&gpio>;
898724ba675SRob Herring			interrupts = <TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_RISING>;
899724ba675SRob Herring
900724ba675SRob Herring			vdd-supply   = <&vdd_3v3_sys>;
901724ba675SRob Herring			vddio-supply = <&vdd_1v8>;
902724ba675SRob Herring
903724ba675SRob Herring			mount-matrix =	 "0", "-1",  "0",
904724ba675SRob Herring					"-1",  "0",  "0",
905724ba675SRob Herring					 "0",  "0", "-1";
906724ba675SRob Herring		};
907724ba675SRob Herring	};
908724ba675SRob Herring
909724ba675SRob Herring	i2c@7000d000 {
910724ba675SRob Herring		clock-frequency = <100000>;
911724ba675SRob Herring		status = "okay";
912724ba675SRob Herring
913724ba675SRob Herring		rt5640: audio-codec@1c {
914724ba675SRob Herring			compatible = "realtek,rt5640";
915724ba675SRob Herring			reg = <0x1c>;
916724ba675SRob Herring
917724ba675SRob Herring			realtek,dmic1-data-pin = <1>;
918724ba675SRob Herring		};
919724ba675SRob Herring
920724ba675SRob Herring		nct72: temperature-sensor@4c {
921724ba675SRob Herring			compatible = "onnn,nct1008";
922724ba675SRob Herring			reg = <0x4c>;
923724ba675SRob Herring			vcc-supply = <&vdd_3v3_sys>;
924724ba675SRob Herring
925724ba675SRob Herring			interrupt-parent = <&gpio>;
926724ba675SRob Herring			interrupts = <TEGRA_GPIO(S, 3) IRQ_TYPE_EDGE_FALLING>;
927724ba675SRob Herring
928724ba675SRob Herring			#thermal-sensor-cells = <1>;
929724ba675SRob Herring		};
930724ba675SRob Herring
931724ba675SRob Herring		fuel-gauge@55 {
932724ba675SRob Herring			compatible = "ti,bq27541";
933724ba675SRob Herring			reg = <0x55>;
934724ba675SRob Herring			power-supplies = <&power_supply>;
935724ba675SRob Herring		};
936724ba675SRob Herring
937724ba675SRob Herring		power_supply: charger@6a {
938724ba675SRob Herring			compatible = "summit,smb347";
939724ba675SRob Herring			reg = <0x6a>;
940724ba675SRob Herring
941724ba675SRob Herring			interrupt-parent = <&gpio>;
942724ba675SRob Herring			interrupts = <TEGRA_GPIO(V, 1) IRQ_TYPE_EDGE_BOTH>;
943724ba675SRob Herring
944724ba675SRob Herring			summit,enable-charge-control = <SMB3XX_CHG_ENABLE_PIN_ACTIVE_LOW>;
945724ba675SRob Herring			summit,inok-polarity = <SMB3XX_SYSOK_INOK_ACTIVE_LOW>;
946724ba675SRob Herring			summit,enable-usb-charging;
947724ba675SRob Herring
948724ba675SRob Herring			monitored-battery = <&battery_cell>;
949724ba675SRob Herring
950724ba675SRob Herring			usb_vbus: usb-vbus {
951724ba675SRob Herring				regulator-name = "usb_vbus";
952724ba675SRob Herring				regulator-min-microvolt = <5000000>;
953724ba675SRob Herring				regulator-max-microvolt = <5000000>;
954724ba675SRob Herring				regulator-min-microamp = <750000>;
955724ba675SRob Herring				regulator-max-microamp = <750000>;
956724ba675SRob Herring
957724ba675SRob Herring				/*
958724ba675SRob Herring				 * SMB347 INOK input pin is connected to PMIC's
959724ba675SRob Herring				 * ACOK output, which is fixed to ACTIVE_LOW as
960724ba675SRob Herring				 * long as battery voltage is in a good range.
961724ba675SRob Herring				 *
962724ba675SRob Herring				 * Active INOK disables SMB347 output, so polarity
963724ba675SRob Herring				 * needs to be toggled when we want to get the
964724ba675SRob Herring				 * output.
965724ba675SRob Herring				 */
966724ba675SRob Herring				summit,needs-inok-toggle;
967724ba675SRob Herring			};
968724ba675SRob Herring		};
969724ba675SRob Herring	};
970724ba675SRob Herring
971724ba675SRob Herring	pmc@7000e400 {
972724ba675SRob Herring		status = "okay";
973724ba675SRob Herring		nvidia,invert-interrupt;
974724ba675SRob Herring		nvidia,suspend-mode = <1>;
975724ba675SRob Herring		nvidia,cpu-pwr-good-time = <2000>;
976724ba675SRob Herring		nvidia,cpu-pwr-off-time = <200>;
977724ba675SRob Herring		nvidia,core-pwr-good-time = <3845 3845>;
978724ba675SRob Herring		nvidia,core-pwr-off-time = <0>;
979724ba675SRob Herring		nvidia,core-power-req-active-high;
980724ba675SRob Herring		nvidia,sys-clock-req-active-high;
981724ba675SRob Herring		core-supply = <&vdd_core>;
982724ba675SRob Herring	};
983724ba675SRob Herring
984724ba675SRob Herring	ahub@70080000 {
985724ba675SRob Herring		i2s@70080400 {
986724ba675SRob Herring			status = "okay";
987724ba675SRob Herring		};
988724ba675SRob Herring	};
989724ba675SRob Herring
990724ba675SRob Herring	sdmmc3: mmc@78000400 {
991724ba675SRob Herring		status = "okay";
992724ba675SRob Herring
993724ba675SRob Herring		#address-cells = <1>;
994724ba675SRob Herring		#size-cells = <0>;
995724ba675SRob Herring
996724ba675SRob Herring		assigned-clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
997724ba675SRob Herring		assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_C>;
998724ba675SRob Herring		assigned-clock-rates = <50000000>;
999724ba675SRob Herring
1000724ba675SRob Herring		max-frequency = <50000000>;
1001724ba675SRob Herring		keep-power-in-suspend;
1002724ba675SRob Herring		bus-width = <4>;
1003724ba675SRob Herring		non-removable;
1004724ba675SRob Herring
1005724ba675SRob Herring		mmc-pwrseq = <&brcm_wifi_pwrseq>;
1006724ba675SRob Herring		vmmc-supply = <&vdd_3v3_sys>;
1007724ba675SRob Herring		vqmmc-supply = <&vdd_1v8>;
1008724ba675SRob Herring
1009724ba675SRob Herring		/* Azurewave AW-NH665 BCM4330 */
1010724ba675SRob Herring		wifi@1 {
1011724ba675SRob Herring			reg = <1>;
1012724ba675SRob Herring			compatible = "brcm,bcm4329-fmac";
1013724ba675SRob Herring			interrupt-parent = <&gpio>;
1014724ba675SRob Herring			interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_HIGH>;
1015724ba675SRob Herring			interrupt-names = "host-wake";
1016724ba675SRob Herring		};
1017724ba675SRob Herring	};
1018724ba675SRob Herring
1019724ba675SRob Herring	sdmmc4: mmc@78000600 {
1020724ba675SRob Herring		status = "okay";
1021724ba675SRob Herring		bus-width = <8>;
1022724ba675SRob Herring		vmmc-supply = <&vcore_emmc>;
1023724ba675SRob Herring		vqmmc-supply = <&vdd_1v8>;
1024724ba675SRob Herring		non-removable;
1025724ba675SRob Herring	};
1026724ba675SRob Herring
1027724ba675SRob Herring	usb@7d000000 {
1028724ba675SRob Herring		compatible = "nvidia,tegra30-udc";
1029724ba675SRob Herring		status = "okay";
1030724ba675SRob Herring		dr_mode = "otg";
1031724ba675SRob Herring		vbus-supply = <&usb_vbus>;
1032724ba675SRob Herring	};
1033724ba675SRob Herring
1034724ba675SRob Herring	usb-phy@7d000000 {
1035724ba675SRob Herring		status = "okay";
1036724ba675SRob Herring		dr_mode = "otg";
1037724ba675SRob Herring		nvidia,hssync-start-delay = <0>;
1038724ba675SRob Herring		nvidia,xcvr-lsfslew = <2>;
1039724ba675SRob Herring		nvidia,xcvr-lsrslew = <2>;
1040724ba675SRob Herring	};
1041724ba675SRob Herring
1042724ba675SRob Herring	backlight: backlight {
1043724ba675SRob Herring		compatible = "pwm-backlight";
1044724ba675SRob Herring
1045724ba675SRob Herring		power-supply = <&vdd_5v0_sys>;
1046724ba675SRob Herring		pwms = <&pwm 0 50000>;
1047724ba675SRob Herring
1048724ba675SRob Herring		brightness-levels = <1 255>;
1049724ba675SRob Herring		num-interpolated-steps = <254>;
1050724ba675SRob Herring		default-brightness-level = <15>;
1051724ba675SRob Herring	};
1052724ba675SRob Herring
1053724ba675SRob Herring	battery_cell: battery-cell {
1054724ba675SRob Herring		compatible = "simple-battery";
1055724ba675SRob Herring		constant-charge-current-max-microamp = <1800000>;
1056724ba675SRob Herring		operating-range-celsius = <0 45>;
1057724ba675SRob Herring	};
1058724ba675SRob Herring
1059724ba675SRob Herring	/* PMIC has a built-in 32KHz oscillator which is used by PMC */
1060724ba675SRob Herring	clk32k_in: clock-32k {
1061724ba675SRob Herring		compatible = "fixed-clock";
1062724ba675SRob Herring		#clock-cells = <0>;
1063724ba675SRob Herring		clock-frequency = <32768>;
1064724ba675SRob Herring		clock-output-names = "pmic-oscillator";
1065724ba675SRob Herring	};
1066724ba675SRob Herring
1067724ba675SRob Herring	cpus {
1068724ba675SRob Herring		cpu0: cpu@0 {
1069724ba675SRob Herring			cpu-supply = <&vdd_cpu>;
1070724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
1071724ba675SRob Herring			#cooling-cells = <2>;
1072724ba675SRob Herring		};
1073724ba675SRob Herring
1074724ba675SRob Herring		cpu1: cpu@1 {
1075724ba675SRob Herring			cpu-supply = <&vdd_cpu>;
1076724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
1077724ba675SRob Herring			#cooling-cells = <2>;
1078724ba675SRob Herring		};
1079724ba675SRob Herring
1080724ba675SRob Herring		cpu2: cpu@2 {
1081724ba675SRob Herring			cpu-supply = <&vdd_cpu>;
1082724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
1083724ba675SRob Herring			#cooling-cells = <2>;
1084724ba675SRob Herring		};
1085724ba675SRob Herring
1086724ba675SRob Herring		cpu3: cpu@3 {
1087724ba675SRob Herring			cpu-supply = <&vdd_cpu>;
1088724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
1089724ba675SRob Herring			#cooling-cells = <2>;
1090724ba675SRob Herring		};
1091724ba675SRob Herring	};
1092724ba675SRob Herring
1093724ba675SRob Herring	display-panel {
1094724ba675SRob Herring		/*
1095*c9a706abSThierry Reding		 * Some device variants come with a Hydis HV070WX2-1E0, but
1096*c9a706abSThierry Reding		 * since they are all largely compatible, we'll go with the
1097*c9a706abSThierry Reding		 * Chunghwa one here.
1098724ba675SRob Herring		 */
1099*c9a706abSThierry Reding		compatible = "chunghwa,claa070wp03xg", "panel-lvds";
1100724ba675SRob Herring
1101724ba675SRob Herring		width-mm = <94>;
1102724ba675SRob Herring		height-mm = <150>;
1103724ba675SRob Herring		rotation = <180>;
1104724ba675SRob Herring
1105724ba675SRob Herring		data-mapping = "jeida-24";
1106724ba675SRob Herring
1107724ba675SRob Herring		/* DDC unconnected on Nexus 7 */
1108724ba675SRob Herring		/delete-property/ ddc-i2c-bus;
1109724ba675SRob Herring	};
1110724ba675SRob Herring
1111724ba675SRob Herring	gpio-keys {
1112724ba675SRob Herring		compatible = "gpio-keys";
1113724ba675SRob Herring
1114724ba675SRob Herring		key-power {
1115724ba675SRob Herring			label = "Power";
1116724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
1117724ba675SRob Herring			linux,code = <KEY_POWER>;
1118724ba675SRob Herring			debounce-interval = <10>;
1119724ba675SRob Herring			wakeup-event-action = <EV_ACT_ASSERTED>;
1120724ba675SRob Herring			wakeup-source;
1121724ba675SRob Herring		};
1122724ba675SRob Herring
1123724ba675SRob Herring		key-volume-down {
1124724ba675SRob Herring			label = "Volume Down";
1125724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>;
1126724ba675SRob Herring			linux,code = <KEY_VOLUMEDOWN>;
1127724ba675SRob Herring			debounce-interval = <10>;
1128724ba675SRob Herring			wakeup-event-action = <EV_ACT_ASSERTED>;
1129724ba675SRob Herring			wakeup-source;
1130724ba675SRob Herring		};
1131724ba675SRob Herring
1132724ba675SRob Herring		key-volume-up {
1133724ba675SRob Herring			label = "Volume Up";
1134724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>;
1135724ba675SRob Herring			linux,code = <KEY_VOLUMEUP>;
1136724ba675SRob Herring			debounce-interval = <10>;
1137724ba675SRob Herring			wakeup-event-action = <EV_ACT_ASSERTED>;
1138724ba675SRob Herring			wakeup-source;
1139724ba675SRob Herring		};
1140724ba675SRob Herring
1141724ba675SRob Herring		switch-hall-sensor {
1142724ba675SRob Herring			label = "Lid";
1143724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(S, 6) GPIO_ACTIVE_LOW>;
1144724ba675SRob Herring			linux,input-type = <EV_SW>;
1145724ba675SRob Herring			linux,code = <SW_LID>;
1146724ba675SRob Herring			debounce-interval = <500>;
1147724ba675SRob Herring			wakeup-event-action = <EV_ACT_DEASSERTED>;
1148724ba675SRob Herring			wakeup-source;
1149724ba675SRob Herring		};
1150724ba675SRob Herring	};
1151724ba675SRob Herring
1152724ba675SRob Herring	brcm_wifi_pwrseq: pwrseq-wifi {
1153724ba675SRob Herring		compatible = "mmc-pwrseq-simple";
1154724ba675SRob Herring
1155724ba675SRob Herring		clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
1156724ba675SRob Herring		clock-names = "ext_clock";
1157724ba675SRob Herring
1158724ba675SRob Herring		reset-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_LOW>;
1159724ba675SRob Herring		post-power-on-delay-ms = <300>;
1160724ba675SRob Herring		power-off-delay-us = <300>;
1161724ba675SRob Herring	};
1162724ba675SRob Herring
1163724ba675SRob Herring	vdd_5v0_sys: regulator-5v0 {
1164724ba675SRob Herring		compatible = "regulator-fixed";
1165724ba675SRob Herring		regulator-name = "vdd_5v0";
1166724ba675SRob Herring		regulator-min-microvolt = <5000000>;
1167724ba675SRob Herring		regulator-max-microvolt = <5000000>;
1168724ba675SRob Herring		regulator-always-on;
1169724ba675SRob Herring		regulator-boot-on;
1170724ba675SRob Herring	};
1171724ba675SRob Herring
1172724ba675SRob Herring	vdd_3v3_sys: regulator-3v3 {
1173724ba675SRob Herring		compatible = "regulator-fixed";
1174724ba675SRob Herring		regulator-name = "vdd_3v3";
1175724ba675SRob Herring		regulator-min-microvolt = <3300000>;
1176724ba675SRob Herring		regulator-max-microvolt = <3300000>;
1177724ba675SRob Herring		regulator-always-on;
1178724ba675SRob Herring		regulator-boot-on;
1179724ba675SRob Herring		vin-supply = <&vdd_5v0_sys>;
1180724ba675SRob Herring	};
1181724ba675SRob Herring
1182724ba675SRob Herring	vdd_pnl: regulator-panel {
1183724ba675SRob Herring		compatible = "regulator-fixed";
1184724ba675SRob Herring		regulator-name = "vdd_panel";
1185724ba675SRob Herring		regulator-min-microvolt = <3300000>;
1186724ba675SRob Herring		regulator-max-microvolt = <3300000>;
1187724ba675SRob Herring		regulator-enable-ramp-delay = <300000>;
1188724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(W, 1) GPIO_ACTIVE_HIGH>;
1189724ba675SRob Herring		enable-active-high;
1190724ba675SRob Herring		vin-supply = <&vdd_3v3_sys>;
1191724ba675SRob Herring	};
1192724ba675SRob Herring
1193724ba675SRob Herring	vcc_3v3_ts: regulator-ts {
1194724ba675SRob Herring		compatible = "regulator-fixed";
1195724ba675SRob Herring		regulator-name = "ldo_s-1167_3v3";
1196724ba675SRob Herring		regulator-min-microvolt = <3300000>;
1197724ba675SRob Herring		regulator-max-microvolt = <3300000>;
1198724ba675SRob Herring		regulator-always-on;
1199724ba675SRob Herring		regulator-boot-on;
1200724ba675SRob Herring		vin-supply = <&vdd_5v0_sys>;
1201724ba675SRob Herring	};
1202724ba675SRob Herring
1203724ba675SRob Herring	sound {
1204724ba675SRob Herring		compatible = "nvidia,tegra-audio-rt5640-grouper",
1205724ba675SRob Herring			     "nvidia,tegra-audio-rt5640";
1206724ba675SRob Herring		nvidia,model = "ASUS Google Nexus 7 ALC5642";
1207724ba675SRob Herring
1208724ba675SRob Herring		nvidia,audio-routing =
1209724ba675SRob Herring			"Headphones", "HPOR",
1210724ba675SRob Herring			"Headphones", "HPOL",
1211724ba675SRob Herring			"Speakers", "SPORP",
1212724ba675SRob Herring			"Speakers", "SPORN",
1213724ba675SRob Herring			"Speakers", "SPOLP",
1214724ba675SRob Herring			"Speakers", "SPOLN",
1215724ba675SRob Herring			"DMIC1", "Mic Jack";
1216724ba675SRob Herring
1217724ba675SRob Herring		nvidia,i2s-controller = <&tegra_i2s1>;
1218724ba675SRob Herring		nvidia,audio-codec = <&rt5640>;
1219724ba675SRob Herring
1220724ba675SRob Herring		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
1221724ba675SRob Herring
1222724ba675SRob Herring		clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
1223724ba675SRob Herring			 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1224724ba675SRob Herring			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1225724ba675SRob Herring		clock-names = "pll_a", "pll_a_out0", "mclk";
1226724ba675SRob Herring
1227724ba675SRob Herring		assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
1228724ba675SRob Herring				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1229724ba675SRob Herring
1230724ba675SRob Herring		assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1231724ba675SRob Herring					 <&tegra_car TEGRA30_CLK_EXTERN1>;
1232724ba675SRob Herring	};
1233724ba675SRob Herring
1234724ba675SRob Herring	thermal-zones {
1235724ba675SRob Herring		/*
1236724ba675SRob Herring		 * NCT72 has two sensors:
1237724ba675SRob Herring		 *
1238724ba675SRob Herring		 *	0: internal that monitors ambient/skin temperature
1239724ba675SRob Herring		 *	1: external that is connected to the CPU's diode
1240724ba675SRob Herring		 *
1241724ba675SRob Herring		 * Ideally we should use userspace thermal governor,
1242724ba675SRob Herring		 * but it's a much more complex solution.  The "skin"
1243724ba675SRob Herring		 * zone is a simpler solution which prevents Nexus 7
1244724ba675SRob Herring		 * from getting too hot from a user's tactile perspective.
1245724ba675SRob Herring		 * The CPU zone is intended to protect silicon from damage.
1246724ba675SRob Herring		 */
1247724ba675SRob Herring
1248724ba675SRob Herring		skin-thermal {
1249724ba675SRob Herring			polling-delay-passive = <1000>; /* milliseconds */
1250724ba675SRob Herring			polling-delay = <5000>; /* milliseconds */
1251724ba675SRob Herring
1252724ba675SRob Herring			thermal-sensors = <&nct72 0>;
1253724ba675SRob Herring
1254724ba675SRob Herring			trips {
1255724ba675SRob Herring				trip0: skin-alert {
1256724ba675SRob Herring					/* throttle at 57C until temperature drops to 56.8C */
1257724ba675SRob Herring					temperature = <57000>;
1258724ba675SRob Herring					hysteresis = <200>;
1259724ba675SRob Herring					type = "passive";
1260724ba675SRob Herring				};
1261724ba675SRob Herring
1262724ba675SRob Herring				trip1: skin-crit {
1263724ba675SRob Herring					/* shut down at 65C */
1264724ba675SRob Herring					temperature = <65000>;
1265724ba675SRob Herring					hysteresis = <2000>;
1266724ba675SRob Herring					type = "critical";
1267724ba675SRob Herring				};
1268724ba675SRob Herring			};
1269724ba675SRob Herring
1270724ba675SRob Herring			cooling-maps {
1271724ba675SRob Herring				map0 {
1272724ba675SRob Herring					trip = <&trip0>;
1273724ba675SRob Herring					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1274724ba675SRob Herring							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1275724ba675SRob Herring							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1276724ba675SRob Herring							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1277724ba675SRob Herring							 <&actmon THERMAL_NO_LIMIT
1278724ba675SRob Herring								  THERMAL_NO_LIMIT>;
1279724ba675SRob Herring				};
1280724ba675SRob Herring			};
1281724ba675SRob Herring		};
1282724ba675SRob Herring
1283724ba675SRob Herring		cpu-thermal {
1284724ba675SRob Herring			polling-delay-passive = <1000>; /* milliseconds */
1285724ba675SRob Herring			polling-delay = <5000>; /* milliseconds */
1286724ba675SRob Herring
1287724ba675SRob Herring			thermal-sensors = <&nct72 1>;
1288724ba675SRob Herring
1289724ba675SRob Herring			trips {
1290724ba675SRob Herring				trip2: cpu-alert {
1291724ba675SRob Herring					/* throttle at 85C until temperature drops to 84.8C */
1292724ba675SRob Herring					temperature = <85000>;
1293724ba675SRob Herring					hysteresis = <200>;
1294724ba675SRob Herring					type = "passive";
1295724ba675SRob Herring				};
1296724ba675SRob Herring
1297724ba675SRob Herring				trip3: cpu-crit {
1298724ba675SRob Herring					/* shut down at 90C */
1299724ba675SRob Herring					temperature = <90000>;
1300724ba675SRob Herring					hysteresis = <2000>;
1301724ba675SRob Herring					type = "critical";
1302724ba675SRob Herring				};
1303724ba675SRob Herring			};
1304724ba675SRob Herring
1305724ba675SRob Herring			cooling-maps {
1306724ba675SRob Herring				map1 {
1307724ba675SRob Herring					trip = <&trip2>;
1308724ba675SRob Herring					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1309724ba675SRob Herring							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1310724ba675SRob Herring							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1311724ba675SRob Herring							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1312724ba675SRob Herring							 <&actmon THERMAL_NO_LIMIT
1313724ba675SRob Herring								  THERMAL_NO_LIMIT>;
1314724ba675SRob Herring				};
1315724ba675SRob Herring			};
1316724ba675SRob Herring		};
1317724ba675SRob Herring	};
1318724ba675SRob Herring};
1319