1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2724ba675SRob Herring#include "tegra20.dtsi"
3724ba675SRob Herring
4724ba675SRob Herring/ {
5724ba675SRob Herring	model = "Avionic Design Tamonten SOM";
6724ba675SRob Herring	compatible = "ad,tamonten", "nvidia,tegra20";
7724ba675SRob Herring
8724ba675SRob Herring	aliases {
9724ba675SRob Herring		rtc0 = "/i2c@7000d000/tps6586x@34";
10724ba675SRob Herring		rtc1 = "/rtc@7000e000";
11724ba675SRob Herring		serial0 = &uartd;
12724ba675SRob Herring	};
13724ba675SRob Herring
14724ba675SRob Herring	chosen {
15724ba675SRob Herring		stdout-path = "serial0:115200n8";
16724ba675SRob Herring	};
17724ba675SRob Herring
18724ba675SRob Herring	memory@0 {
19724ba675SRob Herring		reg = <0x00000000 0x20000000>;
20724ba675SRob Herring	};
21724ba675SRob Herring
22724ba675SRob Herring	host1x@50000000 {
23724ba675SRob Herring		hdmi@54280000 {
24724ba675SRob Herring			vdd-supply = <&hdmi_vdd_reg>;
25724ba675SRob Herring			pll-supply = <&hdmi_pll_reg>;
26724ba675SRob Herring
27724ba675SRob Herring			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
28724ba675SRob Herring			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
29724ba675SRob Herring				GPIO_ACTIVE_HIGH>;
30724ba675SRob Herring		};
31724ba675SRob Herring	};
32724ba675SRob Herring
33724ba675SRob Herring	pinmux@70000014 {
34724ba675SRob Herring		pinctrl-names = "default";
35724ba675SRob Herring		pinctrl-0 = <&state_default>;
36724ba675SRob Herring
37724ba675SRob Herring		state_default: pinmux {
38724ba675SRob Herring			ata {
39724ba675SRob Herring				nvidia,pins = "ata";
40724ba675SRob Herring				nvidia,function = "ide";
41724ba675SRob Herring			};
42724ba675SRob Herring			atb {
43724ba675SRob Herring				nvidia,pins = "atb", "gma", "gme";
44724ba675SRob Herring				nvidia,function = "sdio4";
45724ba675SRob Herring			};
46724ba675SRob Herring			atc {
47724ba675SRob Herring				nvidia,pins = "atc";
48724ba675SRob Herring				nvidia,function = "nand";
49724ba675SRob Herring			};
50724ba675SRob Herring			atd {
51724ba675SRob Herring				nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
52724ba675SRob Herring					"spia", "spib", "spic";
53724ba675SRob Herring				nvidia,function = "gmi";
54724ba675SRob Herring			};
55724ba675SRob Herring			cdev1 {
56724ba675SRob Herring				nvidia,pins = "cdev1";
57724ba675SRob Herring				nvidia,function = "plla_out";
58724ba675SRob Herring			};
59724ba675SRob Herring			cdev2 {
60724ba675SRob Herring				nvidia,pins = "cdev2";
61724ba675SRob Herring				nvidia,function = "pllp_out4";
62724ba675SRob Herring			};
63724ba675SRob Herring			crtp {
64724ba675SRob Herring				nvidia,pins = "crtp";
65724ba675SRob Herring				nvidia,function = "crt";
66724ba675SRob Herring			};
67724ba675SRob Herring			csus {
68724ba675SRob Herring				nvidia,pins = "csus";
69724ba675SRob Herring				nvidia,function = "vi_sensor_clk";
70724ba675SRob Herring			};
71724ba675SRob Herring			dap1 {
72724ba675SRob Herring				nvidia,pins = "dap1";
73724ba675SRob Herring				nvidia,function = "dap1";
74724ba675SRob Herring			};
75724ba675SRob Herring			dap2 {
76724ba675SRob Herring				nvidia,pins = "dap2";
77724ba675SRob Herring				nvidia,function = "dap2";
78724ba675SRob Herring			};
79724ba675SRob Herring			dap3 {
80724ba675SRob Herring				nvidia,pins = "dap3";
81724ba675SRob Herring				nvidia,function = "dap3";
82724ba675SRob Herring			};
83724ba675SRob Herring			dap4 {
84724ba675SRob Herring				nvidia,pins = "dap4";
85724ba675SRob Herring				nvidia,function = "dap4";
86724ba675SRob Herring			};
87724ba675SRob Herring			dta {
88724ba675SRob Herring				nvidia,pins = "dta", "dtd";
89724ba675SRob Herring				nvidia,function = "sdio2";
90724ba675SRob Herring			};
91724ba675SRob Herring			dtb {
92724ba675SRob Herring				nvidia,pins = "dtb", "dtc", "dte";
93724ba675SRob Herring				nvidia,function = "rsvd1";
94724ba675SRob Herring			};
95724ba675SRob Herring			dtf {
96724ba675SRob Herring				nvidia,pins = "dtf";
97724ba675SRob Herring				nvidia,function = "i2c3";
98724ba675SRob Herring			};
99724ba675SRob Herring			gmc {
100724ba675SRob Herring				nvidia,pins = "gmc";
101724ba675SRob Herring				nvidia,function = "uartd";
102724ba675SRob Herring			};
103724ba675SRob Herring			gpu7 {
104724ba675SRob Herring				nvidia,pins = "gpu7";
105724ba675SRob Herring				nvidia,function = "rtck";
106724ba675SRob Herring			};
107724ba675SRob Herring			gpv {
108724ba675SRob Herring				nvidia,pins = "gpv", "slxa", "slxk";
109724ba675SRob Herring				nvidia,function = "pcie";
110724ba675SRob Herring			};
111724ba675SRob Herring			hdint {
112724ba675SRob Herring				nvidia,pins = "hdint";
113724ba675SRob Herring				nvidia,function = "hdmi";
114724ba675SRob Herring			};
115724ba675SRob Herring			i2cp {
116724ba675SRob Herring				nvidia,pins = "i2cp";
117724ba675SRob Herring				nvidia,function = "i2cp";
118724ba675SRob Herring			};
119724ba675SRob Herring			irrx {
120724ba675SRob Herring				nvidia,pins = "irrx", "irtx";
121724ba675SRob Herring				nvidia,function = "uarta";
122724ba675SRob Herring			};
123724ba675SRob Herring			kbca {
124724ba675SRob Herring				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
125724ba675SRob Herring					"kbce", "kbcf";
126724ba675SRob Herring				nvidia,function = "kbc";
127724ba675SRob Herring			};
128724ba675SRob Herring			lcsn {
129724ba675SRob Herring				nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
130724ba675SRob Herring					"ld3", "ld4", "ld5", "ld6", "ld7",
131724ba675SRob Herring					"ld8", "ld9", "ld10", "ld11", "ld12",
132724ba675SRob Herring					"ld13", "ld14", "ld15", "ld16", "ld17",
133724ba675SRob Herring					"ldc", "ldi", "lhp0", "lhp1", "lhp2",
134724ba675SRob Herring					"lhs", "lm0", "lm1", "lpp", "lpw0",
135724ba675SRob Herring					"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
136724ba675SRob Herring					"lsda", "lsdi", "lspi", "lvp0", "lvp1",
137724ba675SRob Herring					"lvs";
138724ba675SRob Herring				nvidia,function = "displaya";
139724ba675SRob Herring			};
140724ba675SRob Herring			owc {
141724ba675SRob Herring				nvidia,pins = "owc", "spdi", "spdo", "uac";
142724ba675SRob Herring				nvidia,function = "rsvd2";
143724ba675SRob Herring			};
144724ba675SRob Herring			pmc {
145724ba675SRob Herring				nvidia,pins = "pmc";
146724ba675SRob Herring				nvidia,function = "pwr_on";
147724ba675SRob Herring			};
148724ba675SRob Herring			rm {
149724ba675SRob Herring				nvidia,pins = "rm";
150724ba675SRob Herring				nvidia,function = "i2c1";
151724ba675SRob Herring			};
152724ba675SRob Herring			sdb {
153724ba675SRob Herring				nvidia,pins = "sdb", "sdc", "sdd";
154724ba675SRob Herring				nvidia,function = "pwm";
155724ba675SRob Herring			};
156724ba675SRob Herring			sdio1 {
157724ba675SRob Herring				nvidia,pins = "sdio1";
158724ba675SRob Herring				nvidia,function = "sdio1";
159724ba675SRob Herring			};
160724ba675SRob Herring			slxc {
161724ba675SRob Herring				nvidia,pins = "slxc", "slxd";
162724ba675SRob Herring				nvidia,function = "spdif";
163724ba675SRob Herring			};
164724ba675SRob Herring			spid {
165724ba675SRob Herring				nvidia,pins = "spid", "spie", "spif";
166724ba675SRob Herring				nvidia,function = "spi1";
167724ba675SRob Herring			};
168724ba675SRob Herring			spig {
169724ba675SRob Herring				nvidia,pins = "spig", "spih";
170724ba675SRob Herring				nvidia,function = "spi2_alt";
171724ba675SRob Herring			};
172724ba675SRob Herring			uaa {
173724ba675SRob Herring				nvidia,pins = "uaa", "uab", "uda";
174724ba675SRob Herring				nvidia,function = "ulpi";
175724ba675SRob Herring			};
176724ba675SRob Herring			uad {
177724ba675SRob Herring				nvidia,pins = "uad";
178724ba675SRob Herring				nvidia,function = "irda";
179724ba675SRob Herring			};
180724ba675SRob Herring			uca {
181724ba675SRob Herring				nvidia,pins = "uca", "ucb";
182724ba675SRob Herring				nvidia,function = "uartc";
183724ba675SRob Herring			};
184724ba675SRob Herring			conf_ata {
185724ba675SRob Herring				nvidia,pins = "ata", "atb", "atc", "atd", "ate",
186724ba675SRob Herring					"cdev1", "cdev2", "dap1", "dtb", "dtf",
187724ba675SRob Herring					"gma", "gmb", "gmc", "gmd", "gme", "gpu7",
188724ba675SRob Herring					"gpv", "i2cp", "irrx", "irtx", "pta",
189724ba675SRob Herring					"rm", "slxa", "slxk", "spia", "spib",
190724ba675SRob Herring					"uac";
191724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
192724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
193724ba675SRob Herring			};
194724ba675SRob Herring			conf_ck32 {
195724ba675SRob Herring				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
196724ba675SRob Herring					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
197724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
198724ba675SRob Herring			};
199724ba675SRob Herring			conf_csus {
200724ba675SRob Herring				nvidia,pins = "csus", "spid", "spif";
201724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
202724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
203724ba675SRob Herring			};
204724ba675SRob Herring			conf_crtp {
205724ba675SRob Herring				nvidia,pins = "crtp", "dap2", "dap3", "dap4",
206724ba675SRob Herring					"dtc", "dte", "gpu", "sdio1",
207724ba675SRob Herring					"slxc", "slxd", "spdi", "spdo", "spig",
208724ba675SRob Herring					"uda";
209724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
210724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
211724ba675SRob Herring			};
212724ba675SRob Herring			conf_ddc {
213724ba675SRob Herring				nvidia,pins = "ddc", "dta", "dtd", "kbca",
214724ba675SRob Herring					"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
215724ba675SRob Herring					"sdc", "uad", "uca";
216724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
217724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
218724ba675SRob Herring			};
219724ba675SRob Herring			conf_hdint {
220724ba675SRob Herring				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
221724ba675SRob Herring					"lpw1", "lsc1", "lsck", "lsda", "lsdi",
222724ba675SRob Herring					"lvp0", "owc", "sdb";
223724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
224724ba675SRob Herring			};
225724ba675SRob Herring			conf_sdd {
226724ba675SRob Herring				nvidia,pins = "sdd", "spic", "spie", "spih",
227724ba675SRob Herring					"uaa", "uab", "ucb";
228724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
229724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
230724ba675SRob Herring			};
231724ba675SRob Herring			conf_lc {
232724ba675SRob Herring				nvidia,pins = "lc", "ls";
233724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
234724ba675SRob Herring			};
235724ba675SRob Herring			conf_ld0 {
236724ba675SRob Herring				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
237724ba675SRob Herring					"ld5", "ld6", "ld7", "ld8", "ld9",
238724ba675SRob Herring					"ld10", "ld11", "ld12", "ld13", "ld14",
239724ba675SRob Herring					"ld15", "ld16", "ld17", "ldi", "lhp0",
240724ba675SRob Herring					"lhp1", "lhp2", "lhs", "lm0", "lpp",
241724ba675SRob Herring					"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
242724ba675SRob Herring					"lvs", "pmc";
243724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
244724ba675SRob Herring			};
245724ba675SRob Herring			conf_ld17_0 {
246724ba675SRob Herring				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
247724ba675SRob Herring					"ld23_22";
248724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
249724ba675SRob Herring			};
250724ba675SRob Herring		};
251724ba675SRob Herring
252724ba675SRob Herring		state_i2cmux_ddc: pinmux-i2cmux-ddc {
253724ba675SRob Herring			ddc {
254724ba675SRob Herring				nvidia,pins = "ddc";
255724ba675SRob Herring				nvidia,function = "i2c2";
256724ba675SRob Herring			};
257724ba675SRob Herring			pta {
258724ba675SRob Herring				nvidia,pins = "pta";
259724ba675SRob Herring				nvidia,function = "rsvd4";
260724ba675SRob Herring			};
261724ba675SRob Herring		};
262724ba675SRob Herring
263724ba675SRob Herring		state_i2cmux_idle: pinmux-i2cmux-idle {
264724ba675SRob Herring			ddc {
265724ba675SRob Herring				nvidia,pins = "ddc";
266724ba675SRob Herring				nvidia,function = "rsvd4";
267724ba675SRob Herring			};
268724ba675SRob Herring			pta {
269724ba675SRob Herring				nvidia,pins = "pta";
270724ba675SRob Herring				nvidia,function = "rsvd4";
271724ba675SRob Herring			};
272724ba675SRob Herring		};
273724ba675SRob Herring
274724ba675SRob Herring		state_i2cmux_pta: pinmux-i2cmux-pta {
275724ba675SRob Herring			ddc {
276724ba675SRob Herring				nvidia,pins = "ddc";
277724ba675SRob Herring				nvidia,function = "rsvd4";
278724ba675SRob Herring			};
279724ba675SRob Herring			pta {
280724ba675SRob Herring				nvidia,pins = "pta";
281724ba675SRob Herring				nvidia,function = "i2c2";
282724ba675SRob Herring			};
283724ba675SRob Herring		};
284724ba675SRob Herring	};
285724ba675SRob Herring
286724ba675SRob Herring	i2s@70002800 {
287724ba675SRob Herring		status = "okay";
288724ba675SRob Herring	};
289724ba675SRob Herring
290724ba675SRob Herring	serial@70006300 {
291*9766116aSThierry Reding		/delete-property/ dmas;
292*9766116aSThierry Reding		/delete-property/ dma-names;
293724ba675SRob Herring		status = "okay";
294724ba675SRob Herring	};
295724ba675SRob Herring
296724ba675SRob Herring	i2c@7000c000 {
297724ba675SRob Herring		clock-frequency = <400000>;
298724ba675SRob Herring		status = "okay";
299724ba675SRob Herring	};
300724ba675SRob Herring
301724ba675SRob Herring	i2c@7000c400 {
302724ba675SRob Herring		clock-frequency = <100000>;
303724ba675SRob Herring		status = "okay";
304724ba675SRob Herring	};
305724ba675SRob Herring
306724ba675SRob Herring	i2c@7000d000 {
307724ba675SRob Herring		clock-frequency = <400000>;
308724ba675SRob Herring		status = "okay";
309724ba675SRob Herring
310724ba675SRob Herring		pmic: tps6586x@34 {
311724ba675SRob Herring			compatible = "ti,tps6586x";
312724ba675SRob Herring			reg = <0x34>;
313724ba675SRob Herring			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
314724ba675SRob Herring
315724ba675SRob Herring			ti,system-power-controller;
316724ba675SRob Herring
317724ba675SRob Herring			#gpio-cells = <2>;
318724ba675SRob Herring			gpio-controller;
319724ba675SRob Herring
320724ba675SRob Herring			/* vdd_5v0_reg must be provided by the base board */
321724ba675SRob Herring			sys-supply = <&vdd_5v0_reg>;
322724ba675SRob Herring			vin-sm0-supply = <&sys_reg>;
323724ba675SRob Herring			vin-sm1-supply = <&sys_reg>;
324724ba675SRob Herring			vin-sm2-supply = <&sys_reg>;
325724ba675SRob Herring			vinldo01-supply = <&sm2_reg>;
326724ba675SRob Herring			vinldo23-supply = <&sm2_reg>;
327724ba675SRob Herring			vinldo4-supply = <&sm2_reg>;
328724ba675SRob Herring			vinldo678-supply = <&sm2_reg>;
329724ba675SRob Herring			vinldo9-supply = <&sm2_reg>;
330724ba675SRob Herring
331724ba675SRob Herring			regulators {
332724ba675SRob Herring				sys_reg: sys {
333724ba675SRob Herring					regulator-name = "vdd_sys";
334724ba675SRob Herring					regulator-always-on;
335724ba675SRob Herring				};
336724ba675SRob Herring
337724ba675SRob Herring				vdd_core: sm0 {
338724ba675SRob Herring					regulator-name = "vdd_sys_sm0,vdd_core";
339724ba675SRob Herring					regulator-min-microvolt = <1200000>;
340724ba675SRob Herring					regulator-max-microvolt = <1200000>;
341724ba675SRob Herring					regulator-always-on;
342724ba675SRob Herring				};
343724ba675SRob Herring
344724ba675SRob Herring				sm1 {
345724ba675SRob Herring					regulator-name = "vdd_sys_sm1,vdd_cpu";
346724ba675SRob Herring					regulator-min-microvolt = <1000000>;
347724ba675SRob Herring					regulator-max-microvolt = <1000000>;
348724ba675SRob Herring					regulator-always-on;
349724ba675SRob Herring				};
350724ba675SRob Herring
351724ba675SRob Herring				sm2_reg: sm2 {
352724ba675SRob Herring					regulator-name = "vdd_sys_sm2,vin_ldo*";
353724ba675SRob Herring					regulator-min-microvolt = <3700000>;
354724ba675SRob Herring					regulator-max-microvolt = <3700000>;
355724ba675SRob Herring					regulator-always-on;
356724ba675SRob Herring				};
357724ba675SRob Herring
358724ba675SRob Herring				pci_clk_reg: ldo0 {
359724ba675SRob Herring					regulator-name = "vdd_ldo0,vddio_pex_clk";
360724ba675SRob Herring					regulator-min-microvolt = <3300000>;
361724ba675SRob Herring					regulator-max-microvolt = <3300000>;
362724ba675SRob Herring				};
363724ba675SRob Herring
364724ba675SRob Herring				ldo1 {
365724ba675SRob Herring					regulator-name = "vdd_ldo1,avdd_pll*";
366724ba675SRob Herring					regulator-min-microvolt = <1100000>;
367724ba675SRob Herring					regulator-max-microvolt = <1100000>;
368724ba675SRob Herring					regulator-always-on;
369724ba675SRob Herring				};
370724ba675SRob Herring
371724ba675SRob Herring				ldo2 {
372724ba675SRob Herring					regulator-name = "vdd_ldo2,vdd_rtc";
373724ba675SRob Herring					regulator-min-microvolt = <1200000>;
374724ba675SRob Herring					regulator-max-microvolt = <1200000>;
375724ba675SRob Herring				};
376724ba675SRob Herring
377724ba675SRob Herring				ldo3 {
378724ba675SRob Herring					regulator-name = "vdd_ldo3,avdd_usb*";
379724ba675SRob Herring					regulator-min-microvolt = <3300000>;
380724ba675SRob Herring					regulator-max-microvolt = <3300000>;
381724ba675SRob Herring					regulator-always-on;
382724ba675SRob Herring				};
383724ba675SRob Herring
384724ba675SRob Herring				ldo4 {
385724ba675SRob Herring					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
386724ba675SRob Herring					regulator-min-microvolt = <1800000>;
387724ba675SRob Herring					regulator-max-microvolt = <1800000>;
388724ba675SRob Herring					regulator-always-on;
389724ba675SRob Herring				};
390724ba675SRob Herring
391724ba675SRob Herring				ldo5 {
392724ba675SRob Herring					regulator-name = "vdd_ldo5,vcore_mmc";
393724ba675SRob Herring					regulator-min-microvolt = <2850000>;
394724ba675SRob Herring					regulator-max-microvolt = <2850000>;
395724ba675SRob Herring				};
396724ba675SRob Herring
397724ba675SRob Herring				ldo6 {
398724ba675SRob Herring					regulator-name = "vdd_ldo6,avdd_vdac";
399724ba675SRob Herring					/*
400724ba675SRob Herring					 * According to the Tegra 2 Automotive
401724ba675SRob Herring					 * DataSheet, a typical value for this
402724ba675SRob Herring					 * would be 2.8V, but the PMIC only
403724ba675SRob Herring					 * supports 2.85V.
404724ba675SRob Herring					 */
405724ba675SRob Herring					regulator-min-microvolt = <2850000>;
406724ba675SRob Herring					regulator-max-microvolt = <2850000>;
407724ba675SRob Herring				};
408724ba675SRob Herring
409724ba675SRob Herring				hdmi_vdd_reg: ldo7 {
410724ba675SRob Herring					regulator-name = "vdd_ldo7,avdd_hdmi";
411724ba675SRob Herring					regulator-min-microvolt = <3300000>;
412724ba675SRob Herring					regulator-max-microvolt = <3300000>;
413724ba675SRob Herring				};
414724ba675SRob Herring
415724ba675SRob Herring				hdmi_pll_reg: ldo8 {
416724ba675SRob Herring					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
417724ba675SRob Herring					regulator-min-microvolt = <1800000>;
418724ba675SRob Herring					regulator-max-microvolt = <1800000>;
419724ba675SRob Herring				};
420724ba675SRob Herring
421724ba675SRob Herring				ldo9 {
422724ba675SRob Herring					regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam";
423724ba675SRob Herring					/*
424724ba675SRob Herring					 * According to the Tegra 2 Automotive
425724ba675SRob Herring					 * DataSheet, a typical value for this
426724ba675SRob Herring					 * would be 2.8V, but the PMIC only
427724ba675SRob Herring					 * supports 2.85V.
428724ba675SRob Herring					 */
429724ba675SRob Herring					regulator-min-microvolt = <2850000>;
430724ba675SRob Herring					regulator-max-microvolt = <2850000>;
431724ba675SRob Herring					regulator-always-on;
432724ba675SRob Herring				};
433724ba675SRob Herring
434724ba675SRob Herring				ldo_rtc {
435724ba675SRob Herring					regulator-name = "vdd_rtc_out";
436724ba675SRob Herring					regulator-min-microvolt = <3300000>;
437724ba675SRob Herring					regulator-max-microvolt = <3300000>;
438724ba675SRob Herring					regulator-always-on;
439724ba675SRob Herring				};
440724ba675SRob Herring			};
441724ba675SRob Herring		};
442724ba675SRob Herring
443724ba675SRob Herring		temperature-sensor@4c {
444724ba675SRob Herring			compatible = "onnn,nct1008";
445724ba675SRob Herring			reg = <0x4c>;
446724ba675SRob Herring		};
447724ba675SRob Herring	};
448724ba675SRob Herring
449724ba675SRob Herring	pmc@7000e400 {
450724ba675SRob Herring		nvidia,invert-interrupt;
451724ba675SRob Herring		nvidia,suspend-mode = <1>;
452724ba675SRob Herring		nvidia,cpu-pwr-good-time = <5000>;
453724ba675SRob Herring		nvidia,cpu-pwr-off-time = <5000>;
454724ba675SRob Herring		nvidia,core-pwr-good-time = <3845 3845>;
455724ba675SRob Herring		nvidia,core-pwr-off-time = <3875>;
456724ba675SRob Herring		nvidia,sys-clock-req-active-high;
457724ba675SRob Herring		core-supply = <&vdd_core>;
458724ba675SRob Herring	};
459724ba675SRob Herring
460724ba675SRob Herring	pcie@80003000 {
461724ba675SRob Herring		avdd-pex-supply = <&pci_vdd_reg>;
462724ba675SRob Herring		vdd-pex-supply = <&pci_vdd_reg>;
463724ba675SRob Herring		avdd-pex-pll-supply = <&pci_vdd_reg>;
464724ba675SRob Herring		avdd-plle-supply = <&pci_vdd_reg>;
465724ba675SRob Herring		vddio-pex-clk-supply = <&pci_clk_reg>;
466724ba675SRob Herring	};
467724ba675SRob Herring
468724ba675SRob Herring	usb@c5008000 {
469724ba675SRob Herring		status = "okay";
470724ba675SRob Herring	};
471724ba675SRob Herring
472724ba675SRob Herring	usb-phy@c5008000 {
473724ba675SRob Herring		status = "okay";
474724ba675SRob Herring	};
475724ba675SRob Herring
476724ba675SRob Herring	mmc@c8000600 {
477724ba675SRob Herring		cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
478724ba675SRob Herring		wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
479724ba675SRob Herring		bus-width = <4>;
480724ba675SRob Herring		status = "okay";
481724ba675SRob Herring	};
482724ba675SRob Herring
483724ba675SRob Herring	clk32k_in: clock-32k {
484724ba675SRob Herring		compatible = "fixed-clock";
485724ba675SRob Herring		clock-frequency = <32768>;
486724ba675SRob Herring		#clock-cells = <0>;
487724ba675SRob Herring	};
488724ba675SRob Herring
489724ba675SRob Herring	i2cmux {
490724ba675SRob Herring		compatible = "i2c-mux-pinctrl";
491724ba675SRob Herring		#address-cells = <1>;
492724ba675SRob Herring		#size-cells = <0>;
493724ba675SRob Herring
494724ba675SRob Herring		i2c-parent = <&{/i2c@7000c400}>;
495724ba675SRob Herring
496724ba675SRob Herring		pinctrl-names = "ddc", "pta", "idle";
497724ba675SRob Herring		pinctrl-0 = <&state_i2cmux_ddc>;
498724ba675SRob Herring		pinctrl-1 = <&state_i2cmux_pta>;
499724ba675SRob Herring		pinctrl-2 = <&state_i2cmux_idle>;
500724ba675SRob Herring
501724ba675SRob Herring		hdmi_ddc: i2c@0 {
502724ba675SRob Herring			reg = <0>;
503724ba675SRob Herring			#address-cells = <1>;
504724ba675SRob Herring			#size-cells = <0>;
505724ba675SRob Herring		};
506724ba675SRob Herring
507724ba675SRob Herring		i2c@1 {
508724ba675SRob Herring			reg = <1>;
509724ba675SRob Herring			#address-cells = <1>;
510724ba675SRob Herring			#size-cells = <0>;
511724ba675SRob Herring		};
512724ba675SRob Herring	};
513724ba675SRob Herring
514724ba675SRob Herring	pci_vdd_reg: regulator-1v05 {
515724ba675SRob Herring		compatible = "regulator-fixed";
516724ba675SRob Herring		regulator-name = "vdd_1v05";
517724ba675SRob Herring		regulator-min-microvolt = <1050000>;
518724ba675SRob Herring		regulator-max-microvolt = <1050000>;
519724ba675SRob Herring		gpio = <&pmic 2 0>;
520724ba675SRob Herring		enable-active-high;
521724ba675SRob Herring	};
522724ba675SRob Herring};
523