1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/dts-v1/;
3*724ba675SRob Herring
4*724ba675SRob Herring#include <dt-bindings/input/input.h>
5*724ba675SRob Herring#include "tegra20.dtsi"
6*724ba675SRob Herring
7*724ba675SRob Herring/ {
8*724ba675SRob Herring	model = "NVIDIA Seaboard";
9*724ba675SRob Herring	compatible = "nvidia,seaboard", "nvidia,tegra20";
10*724ba675SRob Herring
11*724ba675SRob Herring	aliases {
12*724ba675SRob Herring		rtc0 = "/i2c@7000d000/tps6586x@34";
13*724ba675SRob Herring		rtc1 = "/rtc@7000e000";
14*724ba675SRob Herring		serial0 = &uartd;
15*724ba675SRob Herring	};
16*724ba675SRob Herring
17*724ba675SRob Herring	chosen {
18*724ba675SRob Herring		stdout-path = "serial0:115200n8";
19*724ba675SRob Herring	};
20*724ba675SRob Herring
21*724ba675SRob Herring	memory@0 {
22*724ba675SRob Herring		reg = <0x00000000 0x40000000>;
23*724ba675SRob Herring	};
24*724ba675SRob Herring
25*724ba675SRob Herring	host1x@50000000 {
26*724ba675SRob Herring		dc@54200000 {
27*724ba675SRob Herring			rgb {
28*724ba675SRob Herring				status = "okay";
29*724ba675SRob Herring
30*724ba675SRob Herring				nvidia,panel = <&panel>;
31*724ba675SRob Herring			};
32*724ba675SRob Herring		};
33*724ba675SRob Herring
34*724ba675SRob Herring		hdmi@54280000 {
35*724ba675SRob Herring			status = "okay";
36*724ba675SRob Herring
37*724ba675SRob Herring			vdd-supply = <&hdmi_vdd_reg>;
38*724ba675SRob Herring			pll-supply = <&hdmi_pll_reg>;
39*724ba675SRob Herring			hdmi-supply = <&vdd_hdmi>;
40*724ba675SRob Herring
41*724ba675SRob Herring			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42*724ba675SRob Herring			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
43*724ba675SRob Herring				GPIO_ACTIVE_HIGH>;
44*724ba675SRob Herring		};
45*724ba675SRob Herring	};
46*724ba675SRob Herring
47*724ba675SRob Herring	pinmux@70000014 {
48*724ba675SRob Herring		pinctrl-names = "default";
49*724ba675SRob Herring		pinctrl-0 = <&state_default>;
50*724ba675SRob Herring
51*724ba675SRob Herring		state_default: pinmux {
52*724ba675SRob Herring			ata {
53*724ba675SRob Herring				nvidia,pins = "ata";
54*724ba675SRob Herring				nvidia,function = "ide";
55*724ba675SRob Herring			};
56*724ba675SRob Herring			atb {
57*724ba675SRob Herring				nvidia,pins = "atb", "gma", "gme";
58*724ba675SRob Herring				nvidia,function = "sdio4";
59*724ba675SRob Herring			};
60*724ba675SRob Herring			atc {
61*724ba675SRob Herring				nvidia,pins = "atc";
62*724ba675SRob Herring				nvidia,function = "nand";
63*724ba675SRob Herring			};
64*724ba675SRob Herring			atd {
65*724ba675SRob Herring				nvidia,pins = "atd", "ate", "gmb", "spia",
66*724ba675SRob Herring					"spib", "spic";
67*724ba675SRob Herring				nvidia,function = "gmi";
68*724ba675SRob Herring			};
69*724ba675SRob Herring			cdev1 {
70*724ba675SRob Herring				nvidia,pins = "cdev1";
71*724ba675SRob Herring				nvidia,function = "plla_out";
72*724ba675SRob Herring			};
73*724ba675SRob Herring			cdev2 {
74*724ba675SRob Herring				nvidia,pins = "cdev2";
75*724ba675SRob Herring				nvidia,function = "pllp_out4";
76*724ba675SRob Herring			};
77*724ba675SRob Herring			crtp {
78*724ba675SRob Herring				nvidia,pins = "crtp", "lm1";
79*724ba675SRob Herring				nvidia,function = "crt";
80*724ba675SRob Herring			};
81*724ba675SRob Herring			csus {
82*724ba675SRob Herring				nvidia,pins = "csus";
83*724ba675SRob Herring				nvidia,function = "vi_sensor_clk";
84*724ba675SRob Herring			};
85*724ba675SRob Herring			dap1 {
86*724ba675SRob Herring				nvidia,pins = "dap1";
87*724ba675SRob Herring				nvidia,function = "dap1";
88*724ba675SRob Herring			};
89*724ba675SRob Herring			dap2 {
90*724ba675SRob Herring				nvidia,pins = "dap2";
91*724ba675SRob Herring				nvidia,function = "dap2";
92*724ba675SRob Herring			};
93*724ba675SRob Herring			dap3 {
94*724ba675SRob Herring				nvidia,pins = "dap3";
95*724ba675SRob Herring				nvidia,function = "dap3";
96*724ba675SRob Herring			};
97*724ba675SRob Herring			dap4 {
98*724ba675SRob Herring				nvidia,pins = "dap4";
99*724ba675SRob Herring				nvidia,function = "dap4";
100*724ba675SRob Herring			};
101*724ba675SRob Herring			dta {
102*724ba675SRob Herring				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
103*724ba675SRob Herring				nvidia,function = "vi";
104*724ba675SRob Herring			};
105*724ba675SRob Herring			dtf {
106*724ba675SRob Herring				nvidia,pins = "dtf";
107*724ba675SRob Herring				nvidia,function = "i2c3";
108*724ba675SRob Herring			};
109*724ba675SRob Herring			gmc {
110*724ba675SRob Herring				nvidia,pins = "gmc";
111*724ba675SRob Herring				nvidia,function = "uartd";
112*724ba675SRob Herring			};
113*724ba675SRob Herring			gmd {
114*724ba675SRob Herring				nvidia,pins = "gmd";
115*724ba675SRob Herring				nvidia,function = "sflash";
116*724ba675SRob Herring			};
117*724ba675SRob Herring			gpu {
118*724ba675SRob Herring				nvidia,pins = "gpu";
119*724ba675SRob Herring				nvidia,function = "pwm";
120*724ba675SRob Herring			};
121*724ba675SRob Herring			gpu7 {
122*724ba675SRob Herring				nvidia,pins = "gpu7";
123*724ba675SRob Herring				nvidia,function = "rtck";
124*724ba675SRob Herring			};
125*724ba675SRob Herring			gpv {
126*724ba675SRob Herring				nvidia,pins = "gpv", "slxa", "slxk";
127*724ba675SRob Herring				nvidia,function = "pcie";
128*724ba675SRob Herring			};
129*724ba675SRob Herring			hdint {
130*724ba675SRob Herring				nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
131*724ba675SRob Herring					"lsck", "lsda";
132*724ba675SRob Herring				nvidia,function = "hdmi";
133*724ba675SRob Herring			};
134*724ba675SRob Herring			i2cp {
135*724ba675SRob Herring				nvidia,pins = "i2cp";
136*724ba675SRob Herring				nvidia,function = "i2cp";
137*724ba675SRob Herring			};
138*724ba675SRob Herring			irrx {
139*724ba675SRob Herring				nvidia,pins = "irrx", "irtx";
140*724ba675SRob Herring				nvidia,function = "uartb";
141*724ba675SRob Herring			};
142*724ba675SRob Herring			kbca {
143*724ba675SRob Herring				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
144*724ba675SRob Herring					"kbce", "kbcf";
145*724ba675SRob Herring				nvidia,function = "kbc";
146*724ba675SRob Herring			};
147*724ba675SRob Herring			lcsn {
148*724ba675SRob Herring				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
149*724ba675SRob Herring					"lsdi", "lvp0";
150*724ba675SRob Herring				nvidia,function = "rsvd4";
151*724ba675SRob Herring			};
152*724ba675SRob Herring			ld0 {
153*724ba675SRob Herring				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
154*724ba675SRob Herring					"ld5", "ld6", "ld7", "ld8", "ld9",
155*724ba675SRob Herring					"ld10", "ld11", "ld12", "ld13", "ld14",
156*724ba675SRob Herring					"ld15", "ld16", "ld17", "ldi", "lhp0",
157*724ba675SRob Herring					"lhp1", "lhp2", "lhs", "lpp", "lsc0",
158*724ba675SRob Herring					"lspi", "lvp1", "lvs";
159*724ba675SRob Herring				nvidia,function = "displaya";
160*724ba675SRob Herring			};
161*724ba675SRob Herring			owc {
162*724ba675SRob Herring				nvidia,pins = "owc", "spdi", "spdo", "uac";
163*724ba675SRob Herring				nvidia,function = "rsvd2";
164*724ba675SRob Herring			};
165*724ba675SRob Herring			pmc {
166*724ba675SRob Herring				nvidia,pins = "pmc";
167*724ba675SRob Herring				nvidia,function = "pwr_on";
168*724ba675SRob Herring			};
169*724ba675SRob Herring			rm {
170*724ba675SRob Herring				nvidia,pins = "rm";
171*724ba675SRob Herring				nvidia,function = "i2c1";
172*724ba675SRob Herring			};
173*724ba675SRob Herring			sdb {
174*724ba675SRob Herring				nvidia,pins = "sdb", "sdc", "sdd";
175*724ba675SRob Herring				nvidia,function = "sdio3";
176*724ba675SRob Herring			};
177*724ba675SRob Herring			sdio1 {
178*724ba675SRob Herring				nvidia,pins = "sdio1";
179*724ba675SRob Herring				nvidia,function = "sdio1";
180*724ba675SRob Herring			};
181*724ba675SRob Herring			slxc {
182*724ba675SRob Herring				nvidia,pins = "slxc", "slxd";
183*724ba675SRob Herring				nvidia,function = "spdif";
184*724ba675SRob Herring			};
185*724ba675SRob Herring			spid {
186*724ba675SRob Herring				nvidia,pins = "spid", "spie", "spif";
187*724ba675SRob Herring				nvidia,function = "spi1";
188*724ba675SRob Herring			};
189*724ba675SRob Herring			spig {
190*724ba675SRob Herring				nvidia,pins = "spig", "spih";
191*724ba675SRob Herring				nvidia,function = "spi2_alt";
192*724ba675SRob Herring			};
193*724ba675SRob Herring			uaa {
194*724ba675SRob Herring				nvidia,pins = "uaa", "uab", "uda";
195*724ba675SRob Herring				nvidia,function = "ulpi";
196*724ba675SRob Herring			};
197*724ba675SRob Herring			uad {
198*724ba675SRob Herring				nvidia,pins = "uad";
199*724ba675SRob Herring				nvidia,function = "irda";
200*724ba675SRob Herring			};
201*724ba675SRob Herring			uca {
202*724ba675SRob Herring				nvidia,pins = "uca", "ucb";
203*724ba675SRob Herring				nvidia,function = "uartc";
204*724ba675SRob Herring			};
205*724ba675SRob Herring			conf_ata {
206*724ba675SRob Herring				nvidia,pins = "ata", "atb", "atc", "atd",
207*724ba675SRob Herring					"cdev1", "cdev2", "dap1", "dap2",
208*724ba675SRob Herring					"dap4", "ddc", "dtf", "gma", "gmc", "gmd",
209*724ba675SRob Herring					"gme", "gpu", "gpu7", "i2cp", "irrx",
210*724ba675SRob Herring					"irtx", "pta", "rm", "sdc", "sdd",
211*724ba675SRob Herring					"slxd", "slxk", "spdi", "spdo", "uac",
212*724ba675SRob Herring					"uad", "uca", "ucb", "uda";
213*724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214*724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
215*724ba675SRob Herring			};
216*724ba675SRob Herring			conf_ate {
217*724ba675SRob Herring				nvidia,pins = "ate", "csus", "dap3",
218*724ba675SRob Herring					"gpv", "owc", "slxc", "spib", "spid",
219*724ba675SRob Herring					"spie";
220*724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
221*724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
222*724ba675SRob Herring			};
223*724ba675SRob Herring			conf_ck32 {
224*724ba675SRob Herring				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
225*724ba675SRob Herring					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
226*724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
227*724ba675SRob Herring			};
228*724ba675SRob Herring			conf_crtp {
229*724ba675SRob Herring				nvidia,pins = "crtp", "gmb", "slxa", "spia",
230*724ba675SRob Herring					"spig", "spih";
231*724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
232*724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
233*724ba675SRob Herring			};
234*724ba675SRob Herring			conf_dta {
235*724ba675SRob Herring				nvidia,pins = "dta", "dtb", "dtc", "dtd";
236*724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
237*724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
238*724ba675SRob Herring			};
239*724ba675SRob Herring			conf_dte {
240*724ba675SRob Herring				nvidia,pins = "dte", "spif";
241*724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
242*724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
243*724ba675SRob Herring			};
244*724ba675SRob Herring			conf_hdint {
245*724ba675SRob Herring				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
246*724ba675SRob Herring					"lpw1", "lsc1", "lsck", "lsda", "lsdi",
247*724ba675SRob Herring					"lvp0";
248*724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
249*724ba675SRob Herring			};
250*724ba675SRob Herring			conf_kbca {
251*724ba675SRob Herring				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
252*724ba675SRob Herring					"kbce", "kbcf", "sdio1", "spic", "uaa",
253*724ba675SRob Herring					"uab";
254*724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
255*724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
256*724ba675SRob Herring			};
257*724ba675SRob Herring			conf_lc {
258*724ba675SRob Herring				nvidia,pins = "lc", "ls";
259*724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
260*724ba675SRob Herring			};
261*724ba675SRob Herring			conf_ld0 {
262*724ba675SRob Herring				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
263*724ba675SRob Herring					"ld5", "ld6", "ld7", "ld8", "ld9",
264*724ba675SRob Herring					"ld10", "ld11", "ld12", "ld13", "ld14",
265*724ba675SRob Herring					"ld15", "ld16", "ld17", "ldi", "lhp0",
266*724ba675SRob Herring					"lhp1", "lhp2", "lhs", "lm0", "lpp",
267*724ba675SRob Herring					"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
268*724ba675SRob Herring					"lvs", "pmc", "sdb";
269*724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
270*724ba675SRob Herring			};
271*724ba675SRob Herring			conf_ld17_0 {
272*724ba675SRob Herring				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
273*724ba675SRob Herring					"ld23_22";
274*724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
275*724ba675SRob Herring			};
276*724ba675SRob Herring			drive_sdio1 {
277*724ba675SRob Herring				nvidia,pins = "drive_sdio1";
278*724ba675SRob Herring				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
279*724ba675SRob Herring				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
280*724ba675SRob Herring				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
281*724ba675SRob Herring				nvidia,pull-down-strength = <31>;
282*724ba675SRob Herring				nvidia,pull-up-strength = <31>;
283*724ba675SRob Herring				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
284*724ba675SRob Herring				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
285*724ba675SRob Herring			};
286*724ba675SRob Herring		};
287*724ba675SRob Herring
288*724ba675SRob Herring		state_i2cmux_ddc: pinmux-i2cmux-ddc {
289*724ba675SRob Herring			ddc {
290*724ba675SRob Herring				nvidia,pins = "ddc";
291*724ba675SRob Herring				nvidia,function = "i2c2";
292*724ba675SRob Herring			};
293*724ba675SRob Herring			pta {
294*724ba675SRob Herring				nvidia,pins = "pta";
295*724ba675SRob Herring				nvidia,function = "rsvd4";
296*724ba675SRob Herring			};
297*724ba675SRob Herring		};
298*724ba675SRob Herring
299*724ba675SRob Herring		state_i2cmux_idle: pinmux-i2cmux-idle {
300*724ba675SRob Herring			ddc {
301*724ba675SRob Herring				nvidia,pins = "ddc";
302*724ba675SRob Herring				nvidia,function = "rsvd4";
303*724ba675SRob Herring			};
304*724ba675SRob Herring			pta {
305*724ba675SRob Herring				nvidia,pins = "pta";
306*724ba675SRob Herring				nvidia,function = "rsvd4";
307*724ba675SRob Herring			};
308*724ba675SRob Herring		};
309*724ba675SRob Herring
310*724ba675SRob Herring		state_i2cmux_pta: pinmux-i2cmux-pta {
311*724ba675SRob Herring			ddc {
312*724ba675SRob Herring				nvidia,pins = "ddc";
313*724ba675SRob Herring				nvidia,function = "rsvd4";
314*724ba675SRob Herring			};
315*724ba675SRob Herring			pta {
316*724ba675SRob Herring				nvidia,pins = "pta";
317*724ba675SRob Herring				nvidia,function = "i2c2";
318*724ba675SRob Herring			};
319*724ba675SRob Herring		};
320*724ba675SRob Herring	};
321*724ba675SRob Herring
322*724ba675SRob Herring	i2s@70002800 {
323*724ba675SRob Herring		status = "okay";
324*724ba675SRob Herring	};
325*724ba675SRob Herring
326*724ba675SRob Herring	serial@70006300 {
327*724ba675SRob Herring		status = "okay";
328*724ba675SRob Herring	};
329*724ba675SRob Herring
330*724ba675SRob Herring	pwm: pwm@7000a000 {
331*724ba675SRob Herring		status = "okay";
332*724ba675SRob Herring	};
333*724ba675SRob Herring
334*724ba675SRob Herring	i2c@7000c000 {
335*724ba675SRob Herring		status = "okay";
336*724ba675SRob Herring		clock-frequency = <400000>;
337*724ba675SRob Herring
338*724ba675SRob Herring		wm8903: wm8903@1a {
339*724ba675SRob Herring			compatible = "wlf,wm8903";
340*724ba675SRob Herring			reg = <0x1a>;
341*724ba675SRob Herring			interrupt-parent = <&gpio>;
342*724ba675SRob Herring			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
343*724ba675SRob Herring
344*724ba675SRob Herring			gpio-controller;
345*724ba675SRob Herring			#gpio-cells = <2>;
346*724ba675SRob Herring
347*724ba675SRob Herring			micdet-cfg = <0>;
348*724ba675SRob Herring			micdet-delay = <100>;
349*724ba675SRob Herring			gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
350*724ba675SRob Herring		};
351*724ba675SRob Herring
352*724ba675SRob Herring		/* ALS and proximity sensor */
353*724ba675SRob Herring		isl29018@44 {
354*724ba675SRob Herring			compatible = "isil,isl29018";
355*724ba675SRob Herring			reg = <0x44>;
356*724ba675SRob Herring			interrupt-parent = <&gpio>;
357*724ba675SRob Herring			interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
358*724ba675SRob Herring		};
359*724ba675SRob Herring
360*724ba675SRob Herring		gyrometer@68 {
361*724ba675SRob Herring			compatible = "invensense,mpu3050";
362*724ba675SRob Herring			reg = <0x68>;
363*724ba675SRob Herring			interrupt-parent = <&gpio>;
364*724ba675SRob Herring			interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>;
365*724ba675SRob Herring		};
366*724ba675SRob Herring	};
367*724ba675SRob Herring
368*724ba675SRob Herring	i2c@7000c400 {
369*724ba675SRob Herring		status = "okay";
370*724ba675SRob Herring		clock-frequency = <100000>;
371*724ba675SRob Herring	};
372*724ba675SRob Herring
373*724ba675SRob Herring	i2c@7000c500 {
374*724ba675SRob Herring		status = "okay";
375*724ba675SRob Herring		clock-frequency = <400000>;
376*724ba675SRob Herring	};
377*724ba675SRob Herring
378*724ba675SRob Herring	i2c@7000d000 {
379*724ba675SRob Herring		status = "okay";
380*724ba675SRob Herring		clock-frequency = <400000>;
381*724ba675SRob Herring
382*724ba675SRob Herring		magnetometer@c {
383*724ba675SRob Herring			compatible = "asahi-kasei,ak8975";
384*724ba675SRob Herring			reg = <0xc>;
385*724ba675SRob Herring			interrupt-parent = <&gpio>;
386*724ba675SRob Herring			interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
387*724ba675SRob Herring		};
388*724ba675SRob Herring
389*724ba675SRob Herring		pmic: tps6586x@34 {
390*724ba675SRob Herring			compatible = "ti,tps6586x";
391*724ba675SRob Herring			reg = <0x34>;
392*724ba675SRob Herring			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
393*724ba675SRob Herring
394*724ba675SRob Herring			ti,system-power-controller;
395*724ba675SRob Herring
396*724ba675SRob Herring			#gpio-cells = <2>;
397*724ba675SRob Herring			gpio-controller;
398*724ba675SRob Herring
399*724ba675SRob Herring			sys-supply = <&vdd_5v0_reg>;
400*724ba675SRob Herring			vin-sm0-supply = <&sys_reg>;
401*724ba675SRob Herring			vin-sm1-supply = <&sys_reg>;
402*724ba675SRob Herring			vin-sm2-supply = <&sys_reg>;
403*724ba675SRob Herring			vinldo01-supply = <&sm2_reg>;
404*724ba675SRob Herring			vinldo23-supply = <&sm2_reg>;
405*724ba675SRob Herring			vinldo4-supply = <&sm2_reg>;
406*724ba675SRob Herring			vinldo678-supply = <&sm2_reg>;
407*724ba675SRob Herring			vinldo9-supply = <&sm2_reg>;
408*724ba675SRob Herring
409*724ba675SRob Herring			regulators {
410*724ba675SRob Herring				sys_reg: sys {
411*724ba675SRob Herring					regulator-name = "vdd_sys";
412*724ba675SRob Herring					regulator-always-on;
413*724ba675SRob Herring				};
414*724ba675SRob Herring
415*724ba675SRob Herring				vdd_core: sm0 {
416*724ba675SRob Herring					regulator-name = "vdd_sm0,vdd_core";
417*724ba675SRob Herring					regulator-min-microvolt = <1300000>;
418*724ba675SRob Herring					regulator-max-microvolt = <1300000>;
419*724ba675SRob Herring					regulator-always-on;
420*724ba675SRob Herring				};
421*724ba675SRob Herring
422*724ba675SRob Herring				sm1 {
423*724ba675SRob Herring					regulator-name = "vdd_sm1,vdd_cpu";
424*724ba675SRob Herring					regulator-min-microvolt = <1125000>;
425*724ba675SRob Herring					regulator-max-microvolt = <1125000>;
426*724ba675SRob Herring					regulator-always-on;
427*724ba675SRob Herring				};
428*724ba675SRob Herring
429*724ba675SRob Herring				sm2_reg: sm2 {
430*724ba675SRob Herring					regulator-name = "vdd_sm2,vin_ldo*";
431*724ba675SRob Herring					regulator-min-microvolt = <3700000>;
432*724ba675SRob Herring					regulator-max-microvolt = <3700000>;
433*724ba675SRob Herring					regulator-always-on;
434*724ba675SRob Herring				};
435*724ba675SRob Herring
436*724ba675SRob Herring				/* LDO0 is not connected to anything */
437*724ba675SRob Herring
438*724ba675SRob Herring				ldo1 {
439*724ba675SRob Herring					regulator-name = "vdd_ldo1,avdd_pll*";
440*724ba675SRob Herring					regulator-min-microvolt = <1100000>;
441*724ba675SRob Herring					regulator-max-microvolt = <1100000>;
442*724ba675SRob Herring					regulator-always-on;
443*724ba675SRob Herring				};
444*724ba675SRob Herring
445*724ba675SRob Herring				ldo2 {
446*724ba675SRob Herring					regulator-name = "vdd_ldo2,vdd_rtc";
447*724ba675SRob Herring					regulator-min-microvolt = <1200000>;
448*724ba675SRob Herring					regulator-max-microvolt = <1200000>;
449*724ba675SRob Herring				};
450*724ba675SRob Herring
451*724ba675SRob Herring				ldo3 {
452*724ba675SRob Herring					regulator-name = "vdd_ldo3,avdd_usb*";
453*724ba675SRob Herring					regulator-min-microvolt = <3300000>;
454*724ba675SRob Herring					regulator-max-microvolt = <3300000>;
455*724ba675SRob Herring					regulator-always-on;
456*724ba675SRob Herring				};
457*724ba675SRob Herring
458*724ba675SRob Herring				ldo4 {
459*724ba675SRob Herring					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
460*724ba675SRob Herring					regulator-min-microvolt = <1800000>;
461*724ba675SRob Herring					regulator-max-microvolt = <1800000>;
462*724ba675SRob Herring					regulator-always-on;
463*724ba675SRob Herring				};
464*724ba675SRob Herring
465*724ba675SRob Herring				ldo5 {
466*724ba675SRob Herring					regulator-name = "vdd_ldo5,vcore_mmc";
467*724ba675SRob Herring					regulator-min-microvolt = <2850000>;
468*724ba675SRob Herring					regulator-max-microvolt = <2850000>;
469*724ba675SRob Herring					regulator-always-on;
470*724ba675SRob Herring				};
471*724ba675SRob Herring
472*724ba675SRob Herring				ldo6 {
473*724ba675SRob Herring					regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
474*724ba675SRob Herring					regulator-min-microvolt = <1800000>;
475*724ba675SRob Herring					regulator-max-microvolt = <1800000>;
476*724ba675SRob Herring				};
477*724ba675SRob Herring
478*724ba675SRob Herring				hdmi_vdd_reg: ldo7 {
479*724ba675SRob Herring					regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
480*724ba675SRob Herring					regulator-min-microvolt = <3300000>;
481*724ba675SRob Herring					regulator-max-microvolt = <3300000>;
482*724ba675SRob Herring				};
483*724ba675SRob Herring
484*724ba675SRob Herring				hdmi_pll_reg: ldo8 {
485*724ba675SRob Herring					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
486*724ba675SRob Herring					regulator-min-microvolt = <1800000>;
487*724ba675SRob Herring					regulator-max-microvolt = <1800000>;
488*724ba675SRob Herring				};
489*724ba675SRob Herring
490*724ba675SRob Herring				ldo9 {
491*724ba675SRob Herring					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
492*724ba675SRob Herring					regulator-min-microvolt = <2850000>;
493*724ba675SRob Herring					regulator-max-microvolt = <2850000>;
494*724ba675SRob Herring					regulator-always-on;
495*724ba675SRob Herring				};
496*724ba675SRob Herring
497*724ba675SRob Herring				ldo_rtc {
498*724ba675SRob Herring					regulator-name = "vdd_rtc_out,vdd_cell";
499*724ba675SRob Herring					regulator-min-microvolt = <3300000>;
500*724ba675SRob Herring					regulator-max-microvolt = <3300000>;
501*724ba675SRob Herring					regulator-always-on;
502*724ba675SRob Herring				};
503*724ba675SRob Herring			};
504*724ba675SRob Herring		};
505*724ba675SRob Herring
506*724ba675SRob Herring		temperature-sensor@4c {
507*724ba675SRob Herring			compatible = "onnn,nct1008";
508*724ba675SRob Herring			reg = <0x4c>;
509*724ba675SRob Herring		};
510*724ba675SRob Herring	};
511*724ba675SRob Herring
512*724ba675SRob Herring	kbc@7000e200 {
513*724ba675SRob Herring		status = "okay";
514*724ba675SRob Herring		nvidia,debounce-delay-ms = <32>;
515*724ba675SRob Herring		nvidia,repeat-delay-ms = <160>;
516*724ba675SRob Herring		nvidia,ghost-filter;
517*724ba675SRob Herring		nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
518*724ba675SRob Herring		nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
519*724ba675SRob Herring		linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
520*724ba675SRob Herring				MATRIX_KEY(0x00, 0x03, KEY_S)
521*724ba675SRob Herring				MATRIX_KEY(0x00, 0x04, KEY_A)
522*724ba675SRob Herring				MATRIX_KEY(0x00, 0x05, KEY_Z)
523*724ba675SRob Herring				MATRIX_KEY(0x00, 0x07, KEY_FN)
524*724ba675SRob Herring
525*724ba675SRob Herring				MATRIX_KEY(0x01, 0x07, KEY_LEFTMETA)
526*724ba675SRob Herring				MATRIX_KEY(0x02, 0x06, KEY_RIGHTALT)
527*724ba675SRob Herring				MATRIX_KEY(0x02, 0x07, KEY_LEFTALT)
528*724ba675SRob Herring
529*724ba675SRob Herring				MATRIX_KEY(0x03, 0x00, KEY_5)
530*724ba675SRob Herring				MATRIX_KEY(0x03, 0x01, KEY_4)
531*724ba675SRob Herring				MATRIX_KEY(0x03, 0x02, KEY_R)
532*724ba675SRob Herring				MATRIX_KEY(0x03, 0x03, KEY_E)
533*724ba675SRob Herring				MATRIX_KEY(0x03, 0x04, KEY_F)
534*724ba675SRob Herring				MATRIX_KEY(0x03, 0x05, KEY_D)
535*724ba675SRob Herring				MATRIX_KEY(0x03, 0x06, KEY_X)
536*724ba675SRob Herring
537*724ba675SRob Herring				MATRIX_KEY(0x04, 0x00, KEY_7)
538*724ba675SRob Herring				MATRIX_KEY(0x04, 0x01, KEY_6)
539*724ba675SRob Herring				MATRIX_KEY(0x04, 0x02, KEY_T)
540*724ba675SRob Herring				MATRIX_KEY(0x04, 0x03, KEY_H)
541*724ba675SRob Herring				MATRIX_KEY(0x04, 0x04, KEY_G)
542*724ba675SRob Herring				MATRIX_KEY(0x04, 0x05, KEY_V)
543*724ba675SRob Herring				MATRIX_KEY(0x04, 0x06, KEY_C)
544*724ba675SRob Herring				MATRIX_KEY(0x04, 0x07, KEY_SPACE)
545*724ba675SRob Herring
546*724ba675SRob Herring				MATRIX_KEY(0x05, 0x00, KEY_9)
547*724ba675SRob Herring				MATRIX_KEY(0x05, 0x01, KEY_8)
548*724ba675SRob Herring				MATRIX_KEY(0x05, 0x02, KEY_U)
549*724ba675SRob Herring				MATRIX_KEY(0x05, 0x03, KEY_Y)
550*724ba675SRob Herring				MATRIX_KEY(0x05, 0x04, KEY_J)
551*724ba675SRob Herring				MATRIX_KEY(0x05, 0x05, KEY_N)
552*724ba675SRob Herring				MATRIX_KEY(0x05, 0x06, KEY_B)
553*724ba675SRob Herring				MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
554*724ba675SRob Herring
555*724ba675SRob Herring				MATRIX_KEY(0x06, 0x00, KEY_MINUS)
556*724ba675SRob Herring				MATRIX_KEY(0x06, 0x01, KEY_0)
557*724ba675SRob Herring				MATRIX_KEY(0x06, 0x02, KEY_O)
558*724ba675SRob Herring				MATRIX_KEY(0x06, 0x03, KEY_I)
559*724ba675SRob Herring				MATRIX_KEY(0x06, 0x04, KEY_L)
560*724ba675SRob Herring				MATRIX_KEY(0x06, 0x05, KEY_K)
561*724ba675SRob Herring				MATRIX_KEY(0x06, 0x06, KEY_COMMA)
562*724ba675SRob Herring				MATRIX_KEY(0x06, 0x07, KEY_M)
563*724ba675SRob Herring
564*724ba675SRob Herring				MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
565*724ba675SRob Herring				MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
566*724ba675SRob Herring				MATRIX_KEY(0x07, 0x03, KEY_ENTER)
567*724ba675SRob Herring				MATRIX_KEY(0x07, 0x07, KEY_MENU)
568*724ba675SRob Herring
569*724ba675SRob Herring				MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT)
570*724ba675SRob Herring				MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT)
571*724ba675SRob Herring
572*724ba675SRob Herring				MATRIX_KEY(0x09, 0x05, KEY_RIGHTCTRL)
573*724ba675SRob Herring				MATRIX_KEY(0x09, 0x07, KEY_LEFTCTRL)
574*724ba675SRob Herring
575*724ba675SRob Herring				MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
576*724ba675SRob Herring				MATRIX_KEY(0x0B, 0x01, KEY_P)
577*724ba675SRob Herring				MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
578*724ba675SRob Herring				MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
579*724ba675SRob Herring				MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
580*724ba675SRob Herring				MATRIX_KEY(0x0B, 0x05, KEY_DOT)
581*724ba675SRob Herring
582*724ba675SRob Herring				MATRIX_KEY(0x0C, 0x00, KEY_F10)
583*724ba675SRob Herring				MATRIX_KEY(0x0C, 0x01, KEY_F9)
584*724ba675SRob Herring				MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
585*724ba675SRob Herring				MATRIX_KEY(0x0C, 0x03, KEY_3)
586*724ba675SRob Herring				MATRIX_KEY(0x0C, 0x04, KEY_2)
587*724ba675SRob Herring				MATRIX_KEY(0x0C, 0x05, KEY_UP)
588*724ba675SRob Herring				MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
589*724ba675SRob Herring				MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
590*724ba675SRob Herring
591*724ba675SRob Herring				MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
592*724ba675SRob Herring				MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
593*724ba675SRob Herring				MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
594*724ba675SRob Herring				MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
595*724ba675SRob Herring				MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
596*724ba675SRob Herring				MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
597*724ba675SRob Herring				MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
598*724ba675SRob Herring
599*724ba675SRob Herring				MATRIX_KEY(0x0E, 0x00, KEY_F11)
600*724ba675SRob Herring				MATRIX_KEY(0x0E, 0x01, KEY_F12)
601*724ba675SRob Herring				MATRIX_KEY(0x0E, 0x02, KEY_F8)
602*724ba675SRob Herring				MATRIX_KEY(0x0E, 0x03, KEY_Q)
603*724ba675SRob Herring				MATRIX_KEY(0x0E, 0x04, KEY_F4)
604*724ba675SRob Herring				MATRIX_KEY(0x0E, 0x05, KEY_F3)
605*724ba675SRob Herring				MATRIX_KEY(0x0E, 0x06, KEY_1)
606*724ba675SRob Herring				MATRIX_KEY(0x0E, 0x07, KEY_F7)
607*724ba675SRob Herring
608*724ba675SRob Herring				MATRIX_KEY(0x0F, 0x00, KEY_ESC)
609*724ba675SRob Herring				MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
610*724ba675SRob Herring				MATRIX_KEY(0x0F, 0x02, KEY_F5)
611*724ba675SRob Herring				MATRIX_KEY(0x0F, 0x03, KEY_TAB)
612*724ba675SRob Herring				MATRIX_KEY(0x0F, 0x04, KEY_F1)
613*724ba675SRob Herring				MATRIX_KEY(0x0F, 0x05, KEY_F2)
614*724ba675SRob Herring				MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
615*724ba675SRob Herring				MATRIX_KEY(0x0F, 0x07, KEY_F6)
616*724ba675SRob Herring
617*724ba675SRob Herring				/* Software Handled Function Keys */
618*724ba675SRob Herring				MATRIX_KEY(0x14, 0x00, KEY_KP7)
619*724ba675SRob Herring
620*724ba675SRob Herring				MATRIX_KEY(0x15, 0x00, KEY_KP9)
621*724ba675SRob Herring				MATRIX_KEY(0x15, 0x01, KEY_KP8)
622*724ba675SRob Herring				MATRIX_KEY(0x15, 0x02, KEY_KP4)
623*724ba675SRob Herring				MATRIX_KEY(0x15, 0x04, KEY_KP1)
624*724ba675SRob Herring
625*724ba675SRob Herring				MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
626*724ba675SRob Herring				MATRIX_KEY(0x16, 0x02, KEY_KP6)
627*724ba675SRob Herring				MATRIX_KEY(0x16, 0x03, KEY_KP5)
628*724ba675SRob Herring				MATRIX_KEY(0x16, 0x04, KEY_KP3)
629*724ba675SRob Herring				MATRIX_KEY(0x16, 0x05, KEY_KP2)
630*724ba675SRob Herring				MATRIX_KEY(0x16, 0x07, KEY_KP0)
631*724ba675SRob Herring
632*724ba675SRob Herring				MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
633*724ba675SRob Herring				MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
634*724ba675SRob Herring				MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
635*724ba675SRob Herring				MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
636*724ba675SRob Herring
637*724ba675SRob Herring				MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
638*724ba675SRob Herring
639*724ba675SRob Herring				MATRIX_KEY(0x1D, 0x03, KEY_HOME)
640*724ba675SRob Herring				MATRIX_KEY(0x1D, 0x04, KEY_END)
641*724ba675SRob Herring				MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSDOWN)
642*724ba675SRob Herring				MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
643*724ba675SRob Herring				MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSUP)
644*724ba675SRob Herring
645*724ba675SRob Herring				MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
646*724ba675SRob Herring				MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
647*724ba675SRob Herring				MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
648*724ba675SRob Herring
649*724ba675SRob Herring				MATRIX_KEY(0x1F, 0x04, KEY_HELP)>;
650*724ba675SRob Herring	};
651*724ba675SRob Herring
652*724ba675SRob Herring	pmc@7000e400 {
653*724ba675SRob Herring		nvidia,invert-interrupt;
654*724ba675SRob Herring		nvidia,suspend-mode = <1>;
655*724ba675SRob Herring		nvidia,cpu-pwr-good-time = <5000>;
656*724ba675SRob Herring		nvidia,cpu-pwr-off-time = <5000>;
657*724ba675SRob Herring		nvidia,core-pwr-good-time = <3845 3845>;
658*724ba675SRob Herring		nvidia,core-pwr-off-time = <3875>;
659*724ba675SRob Herring		nvidia,sys-clock-req-active-high;
660*724ba675SRob Herring		core-supply = <&vdd_core>;
661*724ba675SRob Herring	};
662*724ba675SRob Herring
663*724ba675SRob Herring	memory-controller@7000f400 {
664*724ba675SRob Herring		emc-table@190000 {
665*724ba675SRob Herring			reg = <190000>;
666*724ba675SRob Herring			compatible = "nvidia,tegra20-emc-table";
667*724ba675SRob Herring			clock-frequency = <190000>;
668*724ba675SRob Herring			nvidia,emc-registers = <0x0000000c 0x00000026
669*724ba675SRob Herring				0x00000009 0x00000003 0x00000004 0x00000004
670*724ba675SRob Herring				0x00000002 0x0000000c 0x00000003 0x00000003
671*724ba675SRob Herring				0x00000002 0x00000001 0x00000004 0x00000005
672*724ba675SRob Herring				0x00000004 0x00000009 0x0000000d 0x0000059f
673*724ba675SRob Herring				0x00000000 0x00000003 0x00000003 0x00000003
674*724ba675SRob Herring				0x00000003 0x00000001 0x0000000b 0x000000c8
675*724ba675SRob Herring				0x00000003 0x00000007 0x00000004 0x0000000f
676*724ba675SRob Herring				0x00000002 0x00000000 0x00000000 0x00000002
677*724ba675SRob Herring				0x00000000 0x00000000 0x00000083 0xa06204ae
678*724ba675SRob Herring				0x007dc010 0x00000000 0x00000000 0x00000000
679*724ba675SRob Herring				0x00000000 0x00000000 0x00000000 0x00000000>;
680*724ba675SRob Herring		};
681*724ba675SRob Herring
682*724ba675SRob Herring		emc-table@380000 {
683*724ba675SRob Herring			reg = <380000>;
684*724ba675SRob Herring			compatible = "nvidia,tegra20-emc-table";
685*724ba675SRob Herring			clock-frequency = <380000>;
686*724ba675SRob Herring			nvidia,emc-registers = <0x00000017 0x0000004b
687*724ba675SRob Herring				0x00000012 0x00000006 0x00000004 0x00000005
688*724ba675SRob Herring				0x00000003 0x0000000c 0x00000006 0x00000006
689*724ba675SRob Herring				0x00000003 0x00000001 0x00000004 0x00000005
690*724ba675SRob Herring				0x00000004 0x00000009 0x0000000d 0x00000b5f
691*724ba675SRob Herring				0x00000000 0x00000003 0x00000003 0x00000006
692*724ba675SRob Herring				0x00000006 0x00000001 0x00000011 0x000000c8
693*724ba675SRob Herring				0x00000003 0x0000000e 0x00000007 0x0000000f
694*724ba675SRob Herring				0x00000002 0x00000000 0x00000000 0x00000002
695*724ba675SRob Herring				0x00000000 0x00000000 0x00000083 0xe044048b
696*724ba675SRob Herring				0x007d8010 0x00000000 0x00000000 0x00000000
697*724ba675SRob Herring				0x00000000 0x00000000 0x00000000 0x00000000>;
698*724ba675SRob Herring		};
699*724ba675SRob Herring	};
700*724ba675SRob Herring
701*724ba675SRob Herring	usb@c5000000 {
702*724ba675SRob Herring		status = "okay";
703*724ba675SRob Herring		dr_mode = "otg";
704*724ba675SRob Herring	};
705*724ba675SRob Herring
706*724ba675SRob Herring	usb-phy@c5000000 {
707*724ba675SRob Herring		status = "okay";
708*724ba675SRob Herring		vbus-supply = <&vbus_reg>;
709*724ba675SRob Herring		dr_mode = "otg";
710*724ba675SRob Herring	};
711*724ba675SRob Herring
712*724ba675SRob Herring	usb@c5004000 {
713*724ba675SRob Herring		status = "okay";
714*724ba675SRob Herring	};
715*724ba675SRob Herring
716*724ba675SRob Herring	usb-phy@c5004000 {
717*724ba675SRob Herring		status = "okay";
718*724ba675SRob Herring		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
719*724ba675SRob Herring			GPIO_ACTIVE_LOW>;
720*724ba675SRob Herring	};
721*724ba675SRob Herring
722*724ba675SRob Herring	usb@c5008000 {
723*724ba675SRob Herring		status = "okay";
724*724ba675SRob Herring	};
725*724ba675SRob Herring
726*724ba675SRob Herring	usb-phy@c5008000 {
727*724ba675SRob Herring		status = "okay";
728*724ba675SRob Herring	};
729*724ba675SRob Herring
730*724ba675SRob Herring	mmc@c8000000 {
731*724ba675SRob Herring		status = "okay";
732*724ba675SRob Herring		power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
733*724ba675SRob Herring		bus-width = <4>;
734*724ba675SRob Herring		keep-power-in-suspend;
735*724ba675SRob Herring	};
736*724ba675SRob Herring
737*724ba675SRob Herring	mmc@c8000400 {
738*724ba675SRob Herring		status = "okay";
739*724ba675SRob Herring		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
740*724ba675SRob Herring		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
741*724ba675SRob Herring		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
742*724ba675SRob Herring		bus-width = <4>;
743*724ba675SRob Herring	};
744*724ba675SRob Herring
745*724ba675SRob Herring	mmc@c8000600 {
746*724ba675SRob Herring		status = "okay";
747*724ba675SRob Herring		bus-width = <8>;
748*724ba675SRob Herring		non-removable;
749*724ba675SRob Herring	};
750*724ba675SRob Herring
751*724ba675SRob Herring	backlight: backlight {
752*724ba675SRob Herring		compatible = "pwm-backlight";
753*724ba675SRob Herring
754*724ba675SRob Herring		enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
755*724ba675SRob Herring		power-supply = <&vdd_bl_reg>;
756*724ba675SRob Herring		pwms = <&pwm 2 5000000>;
757*724ba675SRob Herring
758*724ba675SRob Herring		brightness-levels = <0 4 8 16 32 64 128 255>;
759*724ba675SRob Herring		default-brightness-level = <6>;
760*724ba675SRob Herring	};
761*724ba675SRob Herring
762*724ba675SRob Herring	clk32k_in: clock-32k {
763*724ba675SRob Herring		compatible = "fixed-clock";
764*724ba675SRob Herring		clock-frequency = <32768>;
765*724ba675SRob Herring		#clock-cells = <0>;
766*724ba675SRob Herring	};
767*724ba675SRob Herring
768*724ba675SRob Herring	gpio-keys {
769*724ba675SRob Herring		compatible = "gpio-keys";
770*724ba675SRob Herring
771*724ba675SRob Herring		key-power {
772*724ba675SRob Herring			label = "Power";
773*724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
774*724ba675SRob Herring			linux,code = <KEY_POWER>;
775*724ba675SRob Herring			wakeup-source;
776*724ba675SRob Herring		};
777*724ba675SRob Herring
778*724ba675SRob Herring		switch-lid {
779*724ba675SRob Herring			label = "Lid";
780*724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
781*724ba675SRob Herring			linux,input-type = <5>; /* EV_SW */
782*724ba675SRob Herring			linux,code = <0>; /* SW_LID */
783*724ba675SRob Herring			debounce-interval = <1>;
784*724ba675SRob Herring			wakeup-source;
785*724ba675SRob Herring		};
786*724ba675SRob Herring	};
787*724ba675SRob Herring
788*724ba675SRob Herring	i2cmux {
789*724ba675SRob Herring		compatible = "i2c-mux-pinctrl";
790*724ba675SRob Herring		#address-cells = <1>;
791*724ba675SRob Herring		#size-cells = <0>;
792*724ba675SRob Herring
793*724ba675SRob Herring		i2c-parent = <&{/i2c@7000c400}>;
794*724ba675SRob Herring
795*724ba675SRob Herring		pinctrl-names = "ddc", "pta", "idle";
796*724ba675SRob Herring		pinctrl-0 = <&state_i2cmux_ddc>;
797*724ba675SRob Herring		pinctrl-1 = <&state_i2cmux_pta>;
798*724ba675SRob Herring		pinctrl-2 = <&state_i2cmux_idle>;
799*724ba675SRob Herring
800*724ba675SRob Herring		hdmi_ddc: i2c@0 {
801*724ba675SRob Herring			reg = <0>;
802*724ba675SRob Herring			#address-cells = <1>;
803*724ba675SRob Herring			#size-cells = <0>;
804*724ba675SRob Herring		};
805*724ba675SRob Herring
806*724ba675SRob Herring		lvds_ddc: i2c@1 {
807*724ba675SRob Herring			reg = <1>;
808*724ba675SRob Herring			#address-cells = <1>;
809*724ba675SRob Herring			#size-cells = <0>;
810*724ba675SRob Herring
811*724ba675SRob Herring			smart-battery@b {
812*724ba675SRob Herring				compatible = "ti,bq20z75", "sbs,sbs-battery";
813*724ba675SRob Herring				reg = <0xb>;
814*724ba675SRob Herring				sbs,i2c-retry-count = <2>;
815*724ba675SRob Herring				sbs,poll-retry-count = <10>;
816*724ba675SRob Herring			};
817*724ba675SRob Herring		};
818*724ba675SRob Herring	};
819*724ba675SRob Herring
820*724ba675SRob Herring	panel: panel {
821*724ba675SRob Herring		compatible = "chunghwa,claa101wa01a";
822*724ba675SRob Herring
823*724ba675SRob Herring		power-supply = <&vdd_pnl_reg>;
824*724ba675SRob Herring		enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
825*724ba675SRob Herring
826*724ba675SRob Herring		backlight = <&backlight>;
827*724ba675SRob Herring		ddc-i2c-bus = <&lvds_ddc>;
828*724ba675SRob Herring	};
829*724ba675SRob Herring
830*724ba675SRob Herring	vdd_5v0_reg: regulator-5v0 {
831*724ba675SRob Herring		compatible = "regulator-fixed";
832*724ba675SRob Herring		regulator-name = "vdd_5v0";
833*724ba675SRob Herring		regulator-min-microvolt = <5000000>;
834*724ba675SRob Herring		regulator-max-microvolt = <5000000>;
835*724ba675SRob Herring		regulator-always-on;
836*724ba675SRob Herring	};
837*724ba675SRob Herring
838*724ba675SRob Herring	regulator-1v5 {
839*724ba675SRob Herring		compatible = "regulator-fixed";
840*724ba675SRob Herring		regulator-name = "vdd_1v5";
841*724ba675SRob Herring		regulator-min-microvolt = <1500000>;
842*724ba675SRob Herring		regulator-max-microvolt = <1500000>;
843*724ba675SRob Herring		gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
844*724ba675SRob Herring	};
845*724ba675SRob Herring
846*724ba675SRob Herring	regulator-1v2 {
847*724ba675SRob Herring		compatible = "regulator-fixed";
848*724ba675SRob Herring		regulator-name = "vdd_1v2";
849*724ba675SRob Herring		regulator-min-microvolt = <1200000>;
850*724ba675SRob Herring		regulator-max-microvolt = <1200000>;
851*724ba675SRob Herring		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
852*724ba675SRob Herring		enable-active-high;
853*724ba675SRob Herring	};
854*724ba675SRob Herring
855*724ba675SRob Herring	vbus_reg: regulator-vbus {
856*724ba675SRob Herring		compatible = "regulator-fixed";
857*724ba675SRob Herring		regulator-name = "vdd_vbus_wup1";
858*724ba675SRob Herring		regulator-min-microvolt = <5000000>;
859*724ba675SRob Herring		regulator-max-microvolt = <5000000>;
860*724ba675SRob Herring		enable-active-high;
861*724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
862*724ba675SRob Herring		regulator-always-on;
863*724ba675SRob Herring		regulator-boot-on;
864*724ba675SRob Herring	};
865*724ba675SRob Herring
866*724ba675SRob Herring	vdd_pnl_reg: regulator-pnl {
867*724ba675SRob Herring		compatible = "regulator-fixed";
868*724ba675SRob Herring		regulator-name = "vdd_pnl";
869*724ba675SRob Herring		regulator-min-microvolt = <2800000>;
870*724ba675SRob Herring		regulator-max-microvolt = <2800000>;
871*724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
872*724ba675SRob Herring		enable-active-high;
873*724ba675SRob Herring	};
874*724ba675SRob Herring
875*724ba675SRob Herring	vdd_bl_reg: regulator-bl {
876*724ba675SRob Herring		compatible = "regulator-fixed";
877*724ba675SRob Herring		regulator-name = "vdd_bl";
878*724ba675SRob Herring		regulator-min-microvolt = <2800000>;
879*724ba675SRob Herring		regulator-max-microvolt = <2800000>;
880*724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
881*724ba675SRob Herring		enable-active-high;
882*724ba675SRob Herring	};
883*724ba675SRob Herring
884*724ba675SRob Herring	vdd_hdmi: regulator-hdmi {
885*724ba675SRob Herring		compatible = "regulator-fixed";
886*724ba675SRob Herring		regulator-name = "VDDIO_HDMI";
887*724ba675SRob Herring		regulator-min-microvolt = <5000000>;
888*724ba675SRob Herring		regulator-max-microvolt = <5000000>;
889*724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
890*724ba675SRob Herring		enable-active-high;
891*724ba675SRob Herring		vin-supply = <&vdd_5v0_reg>;
892*724ba675SRob Herring	};
893*724ba675SRob Herring
894*724ba675SRob Herring	sound {
895*724ba675SRob Herring		compatible = "nvidia,tegra-audio-wm8903-seaboard",
896*724ba675SRob Herring			     "nvidia,tegra-audio-wm8903";
897*724ba675SRob Herring		nvidia,model = "NVIDIA Tegra Seaboard";
898*724ba675SRob Herring
899*724ba675SRob Herring		nvidia,audio-routing =
900*724ba675SRob Herring			"Headphone Jack", "HPOUTR",
901*724ba675SRob Herring			"Headphone Jack", "HPOUTL",
902*724ba675SRob Herring			"Int Spk", "ROP",
903*724ba675SRob Herring			"Int Spk", "RON",
904*724ba675SRob Herring			"Int Spk", "LOP",
905*724ba675SRob Herring			"Int Spk", "LON",
906*724ba675SRob Herring			"Mic Jack", "MICBIAS",
907*724ba675SRob Herring			"IN1R", "Mic Jack";
908*724ba675SRob Herring
909*724ba675SRob Herring		nvidia,i2s-controller = <&tegra_i2s1>;
910*724ba675SRob Herring		nvidia,audio-codec = <&wm8903>;
911*724ba675SRob Herring
912*724ba675SRob Herring		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
913*724ba675SRob Herring		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_LOW>;
914*724ba675SRob Herring
915*724ba675SRob Herring		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
916*724ba675SRob Herring			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
917*724ba675SRob Herring			 <&tegra_car TEGRA20_CLK_CDEV1>;
918*724ba675SRob Herring		clock-names = "pll_a", "pll_a_out0", "mclk";
919*724ba675SRob Herring	};
920*724ba675SRob Herring};
921