1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include <dt-bindings/input/input.h> 5#include <dt-bindings/thermal/thermal.h> 6 7#include "tegra20.dtsi" 8#include "tegra20-cpu-opp.dtsi" 9#include "tegra20-cpu-opp-microvolt.dtsi" 10 11/ { 12 model = "Toshiba AC100 / Dynabook AZ"; 13 compatible = "compal,paz00", "nvidia,tegra20"; 14 15 aliases { 16 mmc0 = &sdmmc4; /* eMMC */ 17 mmc1 = &sdmmc1; /* MicroSD */ 18 rtc0 = "/i2c@7000d000/tps6586x@34"; 19 rtc1 = "/rtc@7000e000"; 20 serial0 = &uarta; 21 serial1 = &uartc; 22 }; 23 24 chosen { 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 memory@0 { 29 reg = <0x00000000 0x20000000>; 30 }; 31 32 host1x@50000000 { 33 dc@54200000 { 34 rgb { 35 status = "okay"; 36 37 nvidia,panel = <&panel>; 38 }; 39 }; 40 41 hdmi@54280000 { 42 status = "okay"; 43 44 vdd-supply = <&hdmi_vdd_reg>; 45 pll-supply = <&hdmi_pll_reg>; 46 47 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 48 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) 49 GPIO_ACTIVE_HIGH>; 50 }; 51 }; 52 53 pinmux@70000014 { 54 pinctrl-names = "default"; 55 pinctrl-0 = <&state_default>; 56 57 state_default: pinmux { 58 ata { 59 nvidia,pins = "ata", "atc", "atd", "ate", 60 "dap2", "gmb", "gmc", "gmd", "spia", 61 "spib", "spic", "spid", "spie"; 62 nvidia,function = "gmi"; 63 }; 64 atb { 65 nvidia,pins = "atb", "gma", "gme"; 66 nvidia,function = "sdio4"; 67 }; 68 cdev1 { 69 nvidia,pins = "cdev1"; 70 nvidia,function = "plla_out"; 71 }; 72 cdev2 { 73 nvidia,pins = "cdev2"; 74 nvidia,function = "pllp_out4"; 75 }; 76 crtp { 77 nvidia,pins = "crtp"; 78 nvidia,function = "crt"; 79 }; 80 csus { 81 nvidia,pins = "csus"; 82 nvidia,function = "pllc_out1"; 83 }; 84 dap1 { 85 nvidia,pins = "dap1"; 86 nvidia,function = "dap1"; 87 }; 88 dap3 { 89 nvidia,pins = "dap3"; 90 nvidia,function = "dap3"; 91 }; 92 dap4 { 93 nvidia,pins = "dap4"; 94 nvidia,function = "dap4"; 95 }; 96 ddc { 97 nvidia,pins = "ddc"; 98 nvidia,function = "i2c2"; 99 }; 100 dta { 101 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; 102 nvidia,function = "rsvd1"; 103 }; 104 dtf { 105 nvidia,pins = "dtf"; 106 nvidia,function = "i2c3"; 107 }; 108 gpu { 109 nvidia,pins = "gpu", "sdb", "sdd"; 110 nvidia,function = "pwm"; 111 }; 112 gpu7 { 113 nvidia,pins = "gpu7"; 114 nvidia,function = "rtck"; 115 }; 116 gpv { 117 nvidia,pins = "gpv", "slxa", "slxk"; 118 nvidia,function = "pcie"; 119 }; 120 hdint { 121 nvidia,pins = "hdint", "pta"; 122 nvidia,function = "hdmi"; 123 }; 124 i2cp { 125 nvidia,pins = "i2cp"; 126 nvidia,function = "i2cp"; 127 }; 128 irrx { 129 nvidia,pins = "irrx", "irtx"; 130 nvidia,function = "uarta"; 131 }; 132 kbca { 133 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf"; 134 nvidia,function = "kbc"; 135 }; 136 kbcb { 137 nvidia,pins = "kbcb", "kbcd"; 138 nvidia,function = "sdio2"; 139 }; 140 lcsn { 141 nvidia,pins = "lcsn", "ld0", "ld1", "ld2", 142 "ld3", "ld4", "ld5", "ld6", "ld7", 143 "ld8", "ld9", "ld10", "ld11", "ld12", 144 "ld13", "ld14", "ld15", "ld16", "ld17", 145 "ldc", "ldi", "lhp0", "lhp1", "lhp2", 146 "lhs", "lm0", "lm1", "lpp", "lpw0", 147 "lpw1", "lpw2", "lsc0", "lsc1", "lsck", 148 "lsda", "lsdi", "lspi", "lvp0", "lvp1", 149 "lvs"; 150 nvidia,function = "displaya"; 151 }; 152 owc { 153 nvidia,pins = "owc"; 154 nvidia,function = "owr"; 155 }; 156 pmc { 157 nvidia,pins = "pmc"; 158 nvidia,function = "pwr_on"; 159 }; 160 rm { 161 nvidia,pins = "rm"; 162 nvidia,function = "i2c1"; 163 }; 164 sdc { 165 nvidia,pins = "sdc"; 166 nvidia,function = "twc"; 167 }; 168 sdio1 { 169 nvidia,pins = "sdio1"; 170 nvidia,function = "sdio1"; 171 }; 172 slxc { 173 nvidia,pins = "slxc", "slxd"; 174 nvidia,function = "spi4"; 175 }; 176 spdi { 177 nvidia,pins = "spdi", "spdo"; 178 nvidia,function = "rsvd2"; 179 }; 180 spif { 181 nvidia,pins = "spif", "uac"; 182 nvidia,function = "rsvd4"; 183 }; 184 spig { 185 nvidia,pins = "spig", "spih"; 186 nvidia,function = "spi2_alt"; 187 }; 188 uaa { 189 nvidia,pins = "uaa", "uab", "uda"; 190 nvidia,function = "ulpi"; 191 }; 192 uad { 193 nvidia,pins = "uad"; 194 nvidia,function = "spdif"; 195 }; 196 uca { 197 nvidia,pins = "uca", "ucb"; 198 nvidia,function = "uartc"; 199 }; 200 conf_ata { 201 nvidia,pins = "ata", "atb", "atc", "atd", "ate", 202 "cdev1", "cdev2", "dap1", "dap2", "dtf", 203 "gma", "gmb", "gmc", "gmd", "gme", 204 "gpu", "gpu7", "gpv", "i2cp", "pta", 205 "rm", "sdio1", "slxk", "spdo", "uac", 206 "uda"; 207 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 208 nvidia,tristate = <TEGRA_PIN_DISABLE>; 209 }; 210 conf_ck32 { 211 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", 212 "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; 213 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 214 }; 215 conf_crtp { 216 nvidia,pins = "crtp", "dap3", "dap4", "dtb", 217 "dtc", "dte", "slxa", "slxc", "slxd", 218 "spdi"; 219 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 220 nvidia,tristate = <TEGRA_PIN_ENABLE>; 221 }; 222 conf_csus { 223 nvidia,pins = "csus", "spia", "spib", "spid", 224 "spif"; 225 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 226 nvidia,tristate = <TEGRA_PIN_ENABLE>; 227 }; 228 conf_ddc { 229 nvidia,pins = "ddc", "irrx", "irtx", "kbca", 230 "kbcb", "kbcc", "kbcd", "kbce", "kbcf", 231 "spic", "spig", "uaa", "uab"; 232 nvidia,pull = <TEGRA_PIN_PULL_UP>; 233 nvidia,tristate = <TEGRA_PIN_DISABLE>; 234 }; 235 conf_dta { 236 nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd", 237 "spie", "spih", "uad", "uca", "ucb"; 238 nvidia,pull = <TEGRA_PIN_PULL_UP>; 239 nvidia,tristate = <TEGRA_PIN_ENABLE>; 240 }; 241 conf_hdint { 242 nvidia,pins = "hdint", "ld0", "ld1", "ld2", 243 "ld3", "ld4", "ld5", "ld6", "ld7", 244 "ld8", "ld9", "ld10", "ld11", "ld12", 245 "ld13", "ld14", "ld15", "ld16", "ld17", 246 "ldc", "ldi", "lhs", "lsc0", "lspi", 247 "lvs", "pmc"; 248 nvidia,tristate = <TEGRA_PIN_DISABLE>; 249 }; 250 conf_lc { 251 nvidia,pins = "lc", "ls"; 252 nvidia,pull = <TEGRA_PIN_PULL_UP>; 253 }; 254 conf_lcsn { 255 nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2", 256 "lm0", "lm1", "lpp", "lpw0", "lpw1", 257 "lpw2", "lsc1", "lsck", "lsda", "lsdi", 258 "lvp0", "lvp1", "sdb"; 259 nvidia,tristate = <TEGRA_PIN_ENABLE>; 260 }; 261 conf_ld17_0 { 262 nvidia,pins = "ld17_0", "ld19_18", "ld21_20", 263 "ld23_22"; 264 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 265 }; 266 }; 267 }; 268 269 spdif@70002400 { 270 status = "okay"; 271 272 nvidia,fixed-parent-rate; 273 }; 274 275 i2s@70002800 { 276 status = "okay"; 277 278 nvidia,fixed-parent-rate; 279 }; 280 281 serial@70006000 { 282 /delete-property/ dmas; 283 /delete-property/ dma-names; 284 status = "okay"; 285 }; 286 287 serial@70006200 { 288 /delete-property/ dmas; 289 /delete-property/ dma-names; 290 status = "okay"; 291 }; 292 293 pwm: pwm@7000a000 { 294 status = "okay"; 295 }; 296 297 lvds_ddc: i2c@7000c000 { 298 status = "okay"; 299 clock-frequency = <400000>; 300 301 alc5632: alc5632@1e { 302 compatible = "realtek,alc5632"; 303 reg = <0x1e>; 304 gpio-controller; 305 #gpio-cells = <2>; 306 }; 307 }; 308 309 hdmi_ddc: i2c@7000c400 { 310 status = "okay"; 311 clock-frequency = <100000>; 312 }; 313 314 nvec@7000c500 { 315 compatible = "nvidia,nvec"; 316 reg = <0x7000c500 0x100>; 317 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 318 #address-cells = <1>; 319 #size-cells = <0>; 320 clock-frequency = <80000>; 321 request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; 322 slave-addr = <138>; 323 clocks = <&tegra_car TEGRA20_CLK_I2C3>, 324 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>; 325 clock-names = "div-clk", "fast-clk"; 326 resets = <&tegra_car 67>; 327 reset-names = "i2c"; 328 }; 329 330 i2c@7000d000 { 331 status = "okay"; 332 clock-frequency = <400000>; 333 334 pmic: tps6586x@34 { 335 compatible = "ti,tps6586x"; 336 reg = <0x34>; 337 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 338 339 #gpio-cells = <2>; 340 gpio-controller; 341 342 sys-supply = <&p5valw_reg>; 343 vin-sm0-supply = <&sys_reg>; 344 vin-sm1-supply = <&sys_reg>; 345 vin-sm2-supply = <&sys_reg>; 346 vinldo01-supply = <&sm2_reg>; 347 vinldo23-supply = <&sm2_reg>; 348 vinldo4-supply = <&sm2_reg>; 349 vinldo678-supply = <&sm2_reg>; 350 vinldo9-supply = <&sm2_reg>; 351 352 regulators { 353 sys_reg: sys { 354 regulator-name = "vdd_sys"; 355 regulator-always-on; 356 }; 357 358 core_vdd_reg: sm0 { 359 regulator-name = "+1.2vs_sm0,vdd_core"; 360 regulator-min-microvolt = <950000>; 361 regulator-max-microvolt = <1300000>; 362 regulator-coupled-with = <&rtc_vdd_reg &cpu_vdd_reg>; 363 regulator-coupled-max-spread = <170000 550000>; 364 regulator-always-on; 365 366 nvidia,tegra-core-regulator; 367 }; 368 369 cpu_vdd_reg: sm1 { 370 regulator-name = "+1.0vs_sm1,vdd_cpu"; 371 regulator-min-microvolt = <750000>; 372 regulator-max-microvolt = <1100000>; 373 regulator-coupled-with = <&core_vdd_reg &rtc_vdd_reg>; 374 regulator-coupled-max-spread = <550000 550000>; 375 regulator-always-on; 376 377 nvidia,tegra-cpu-regulator; 378 }; 379 380 sm2_reg: sm2 { 381 regulator-name = "+3.7vs_sm2,vin_ldo*"; 382 regulator-min-microvolt = <3700000>; 383 regulator-max-microvolt = <3700000>; 384 regulator-always-on; 385 }; 386 387 /* LDO0 is not connected to anything */ 388 389 ldo1 { 390 regulator-name = "+1.1vs_ldo1,avdd_pll*"; 391 regulator-min-microvolt = <1100000>; 392 regulator-max-microvolt = <1100000>; 393 regulator-always-on; 394 }; 395 396 rtc_vdd_reg: ldo2 { 397 regulator-name = "+1.2vs_ldo2,vdd_rtc"; 398 regulator-min-microvolt = <950000>; 399 regulator-max-microvolt = <1300000>; 400 regulator-coupled-with = <&core_vdd_reg &cpu_vdd_reg>; 401 regulator-coupled-max-spread = <170000 550000>; 402 regulator-always-on; 403 404 nvidia,tegra-rtc-regulator; 405 }; 406 407 ldo3 { 408 regulator-name = "+3.3vs_ldo3,avdd_usb*"; 409 regulator-min-microvolt = <3300000>; 410 regulator-max-microvolt = <3300000>; 411 regulator-always-on; 412 }; 413 414 ldo4 { 415 regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys"; 416 regulator-min-microvolt = <1800000>; 417 regulator-max-microvolt = <1800000>; 418 regulator-always-on; 419 }; 420 421 ldo5 { 422 regulator-name = "+2.85vs_ldo5,vcore_mmc"; 423 regulator-min-microvolt = <2850000>; 424 regulator-max-microvolt = <2850000>; 425 regulator-always-on; 426 }; 427 428 ldo6 { 429 /* 430 * Research indicates this should be 431 * 1.8v; other boards that use this 432 * rail for the same purpose need it 433 * set to 1.8v. The schematic signal 434 * name is incorrect; perhaps copied 435 * from an incorrect NVIDIA reference. 436 */ 437 regulator-name = "+2.85vs_ldo6,avdd_vdac"; 438 regulator-min-microvolt = <1800000>; 439 regulator-max-microvolt = <1800000>; 440 }; 441 442 hdmi_vdd_reg: ldo7 { 443 regulator-name = "+3.3vs_ldo7,avdd_hdmi"; 444 regulator-min-microvolt = <3300000>; 445 regulator-max-microvolt = <3300000>; 446 }; 447 448 hdmi_pll_reg: ldo8 { 449 regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; 450 regulator-min-microvolt = <1800000>; 451 regulator-max-microvolt = <1800000>; 452 }; 453 454 ldo9 { 455 regulator-name = "+2.85vs_ldo9,vdd_ddr_rx"; 456 regulator-min-microvolt = <2850000>; 457 regulator-max-microvolt = <2850000>; 458 regulator-always-on; 459 }; 460 461 ldo_rtc { 462 regulator-name = "+3.3vs_rtc"; 463 regulator-min-microvolt = <3300000>; 464 regulator-max-microvolt = <3300000>; 465 regulator-always-on; 466 }; 467 }; 468 }; 469 470 adt7461: temperature-sensor@4c { 471 compatible = "adi,adt7461"; 472 reg = <0x4c>; 473 474 interrupt-parent = <&gpio>; 475 interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>; 476 477 #thermal-sensor-cells = <1>; 478 }; 479 }; 480 481 pmc@7000e400 { 482 nvidia,invert-interrupt; 483 nvidia,suspend-mode = <1>; 484 nvidia,cpu-pwr-good-time = <2000>; 485 nvidia,cpu-pwr-off-time = <0>; 486 nvidia,core-pwr-good-time = <3845 3845>; 487 nvidia,core-pwr-off-time = <0>; 488 nvidia,sys-clock-req-active-high; 489 core-supply = <&core_vdd_reg>; 490 }; 491 492 memory-controller@7000f400 { 493 nvidia,use-ram-code; 494 495 emc-tables@0 { 496 nvidia,ram-code = <0x0>; 497 #address-cells = <1>; 498 #size-cells = <0>; 499 reg = <0>; 500 501 emc-table@166500 { 502 reg = <166500>; 503 compatible = "nvidia,tegra20-emc-table"; 504 clock-frequency = <166500>; 505 nvidia,emc-registers = <0x0000000a 0x00000016 506 0x00000008 0x00000003 0x00000004 0x00000004 507 0x00000002 0x0000000c 0x00000003 0x00000003 508 0x00000002 0x00000001 0x00000004 0x00000005 509 0x00000004 0x00000009 0x0000000d 0x000004df 510 0x00000000 0x00000003 0x00000003 0x00000003 511 0x00000003 0x00000001 0x0000000a 0x000000c8 512 0x00000003 0x00000006 0x00000004 0x00000008 513 0x00000002 0x00000000 0x00000000 0x00000002 514 0x00000000 0x00000000 0x00000083 0xe03b0323 515 0x007fe010 0x00001414 0x00000000 0x00000000 516 0x00000000 0x00000000 0x00000000 0x00000000>; 517 }; 518 519 emc-table@333000 { 520 reg = <333000>; 521 compatible = "nvidia,tegra20-emc-table"; 522 clock-frequency = <333000>; 523 nvidia,emc-registers = <0x00000018 0x00000033 524 0x00000012 0x00000004 0x00000004 0x00000005 525 0x00000003 0x0000000c 0x00000006 0x00000006 526 0x00000003 0x00000001 0x00000004 0x00000005 527 0x00000004 0x00000009 0x0000000d 0x00000bff 528 0x00000000 0x00000003 0x00000003 0x00000006 529 0x00000006 0x00000001 0x00000011 0x000000c8 530 0x00000003 0x0000000e 0x00000007 0x00000008 531 0x00000002 0x00000000 0x00000000 0x00000002 532 0x00000000 0x00000000 0x00000083 0xf0440303 533 0x007fe010 0x00001414 0x00000000 0x00000000 534 0x00000000 0x00000000 0x00000000 0x00000000>; 535 }; 536 }; 537 }; 538 539 usb@c5000000 { 540 compatible = "nvidia,tegra20-udc"; 541 status = "okay"; 542 dr_mode = "peripheral"; 543 }; 544 545 usb-phy@c5000000 { 546 status = "okay"; 547 }; 548 549 usb@c5004000 { 550 status = "okay"; 551 }; 552 553 usb-phy@c5004000 { 554 status = "okay"; 555 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0) 556 GPIO_ACTIVE_LOW>; 557 }; 558 559 usb@c5008000 { 560 status = "okay"; 561 }; 562 563 usb-phy@c5008000 { 564 status = "okay"; 565 }; 566 567 sdmmc1: mmc@c8000000 { 568 status = "okay"; 569 cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>; 570 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; 571 power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>; 572 bus-width = <4>; 573 }; 574 575 sdmmc4: mmc@c8000600 { 576 status = "okay"; 577 bus-width = <8>; 578 non-removable; 579 }; 580 581 backlight: backlight { 582 compatible = "pwm-backlight"; 583 584 enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>; 585 pwms = <&pwm 0 5000000>; 586 587 brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>; 588 default-brightness-level = <10>; 589 590 /* close enough */ 591 power-supply = <&vdd_pnl_reg>; 592 }; 593 594 clk32k_in: clock-32k { 595 compatible = "fixed-clock"; 596 clock-frequency = <32768>; 597 #clock-cells = <0>; 598 }; 599 600 cpus { 601 cpu0: cpu@0 { 602 cpu-supply = <&cpu_vdd_reg>; 603 operating-points-v2 = <&cpu0_opp_table>; 604 #cooling-cells = <2>; 605 }; 606 607 cpu1: cpu@1 { 608 cpu-supply = <&cpu_vdd_reg>; 609 operating-points-v2 = <&cpu0_opp_table>; 610 #cooling-cells = <2>; 611 }; 612 }; 613 614 gpio-keys { 615 compatible = "gpio-keys"; 616 617 key-wakeup { 618 label = "Wakeup"; 619 gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>; 620 linux,code = <KEY_WAKEUP>; 621 wakeup-source; 622 }; 623 }; 624 625 gpio-leds { 626 compatible = "gpio-leds"; 627 628 led-0 { 629 label = "wifi-led"; 630 gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; 631 linux,default-trigger = "rfkill0"; 632 }; 633 }; 634 635 opp-table-emc { 636 /delete-node/ opp-760000000; 637 }; 638 639 panel: panel { 640 compatible = "samsung,ltn101nt05"; 641 642 ddc-i2c-bus = <&lvds_ddc>; 643 power-supply = <&vdd_pnl_reg>; 644 enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>; 645 646 backlight = <&backlight>; 647 }; 648 649 p5valw_reg: regulator-5v0alw { 650 compatible = "regulator-fixed"; 651 regulator-name = "+5valw"; 652 regulator-min-microvolt = <5000000>; 653 regulator-max-microvolt = <5000000>; 654 regulator-always-on; 655 }; 656 657 vdd_pnl_reg: regulator-3v0 { 658 compatible = "regulator-fixed"; 659 regulator-name = "+3VS,vdd_pnl"; 660 regulator-min-microvolt = <3300000>; 661 regulator-max-microvolt = <3300000>; 662 regulator-boot-on; 663 gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>; 664 enable-active-high; 665 }; 666 667 sound { 668 compatible = "nvidia,tegra-audio-alc5632-paz00", 669 "nvidia,tegra-audio-alc5632"; 670 671 nvidia,model = "Compal PAZ00"; 672 673 nvidia,audio-routing = 674 "Int Spk", "SPKOUT", 675 "Int Spk", "SPKOUTN", 676 "Headset Mic", "MICBIAS1", 677 "MIC1", "Headset Mic", 678 "Headset Stereophone", "HPR", 679 "Headset Stereophone", "HPL", 680 "DMICDAT", "Digital Mic"; 681 682 nvidia,audio-codec = <&alc5632>; 683 nvidia,i2s-controller = <&tegra_i2s1>; 684 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) 685 GPIO_ACTIVE_HIGH>; 686 687 clocks = <&tegra_car TEGRA20_CLK_PLL_A>, 688 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, 689 <&tegra_car TEGRA20_CLK_CDEV1>; 690 clock-names = "pll_a", "pll_a_out0", "mclk"; 691 }; 692 693 thermal-zones { 694 cpu-thermal { 695 polling-delay-passive = <500>; /* milliseconds */ 696 polling-delay = <1500>; /* milliseconds */ 697 698 thermal-sensors = <&adt7461 1>; 699 700 trips { 701 trip0: cpu-alert0 { 702 /* start throttling at 80C */ 703 temperature = <80000>; 704 hysteresis = <200>; 705 type = "passive"; 706 }; 707 708 trip1: cpu-crit { 709 /* shut down at 85C */ 710 temperature = <85000>; 711 hysteresis = <2000>; 712 type = "critical"; 713 }; 714 }; 715 716 cooling-maps { 717 map0 { 718 trip = <&trip0>; 719 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 720 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 721 }; 722 }; 723 }; 724 }; 725}; 726