1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2724ba675SRob Herring/dts-v1/;
3724ba675SRob Herring
4724ba675SRob Herring#include <dt-bindings/input/atmel-maxtouch.h>
5724ba675SRob Herring#include <dt-bindings/input/gpio-keys.h>
6724ba675SRob Herring#include <dt-bindings/input/input.h>
7724ba675SRob Herring#include <dt-bindings/thermal/thermal.h>
8724ba675SRob Herring
9724ba675SRob Herring#include "tegra20.dtsi"
10724ba675SRob Herring#include "tegra20-cpu-opp.dtsi"
11724ba675SRob Herring#include "tegra20-cpu-opp-microvolt.dtsi"
12724ba675SRob Herring
13724ba675SRob Herring/ {
14724ba675SRob Herring	model = "Acer Iconia Tab A500";
15724ba675SRob Herring	compatible = "acer,picasso", "nvidia,tegra20";
16724ba675SRob Herring
17724ba675SRob Herring	aliases {
18724ba675SRob Herring		mmc0 = &sdmmc4; /* eMMC */
19724ba675SRob Herring		mmc1 = &sdmmc3; /* MicroSD */
20724ba675SRob Herring		mmc2 = &sdmmc1; /* WiFi */
21724ba675SRob Herring
22724ba675SRob Herring		rtc0 = &pmic;
23724ba675SRob Herring		rtc1 = "/rtc@7000e000";
24724ba675SRob Herring
25724ba675SRob Herring		serial0 = &uartd; /* Docking station */
26724ba675SRob Herring		serial1 = &uartc; /* Bluetooth */
27724ba675SRob Herring		serial2 = &uartb; /* GPS */
28724ba675SRob Herring	};
29724ba675SRob Herring
30724ba675SRob Herring	/*
31724ba675SRob Herring	 * The decompressor and also some bootloaders rely on a
32724ba675SRob Herring	 * pre-existing /chosen node to be available to insert the
33724ba675SRob Herring	 * command line and merge other ATAGS info.
34724ba675SRob Herring	 */
35724ba675SRob Herring	chosen {};
36724ba675SRob Herring
37724ba675SRob Herring	memory@0 {
38724ba675SRob Herring		reg = <0x00000000 0x40000000>;
39724ba675SRob Herring	};
40724ba675SRob Herring
41724ba675SRob Herring	reserved-memory {
42724ba675SRob Herring		#address-cells = <1>;
43724ba675SRob Herring		#size-cells = <1>;
44724ba675SRob Herring		ranges;
45724ba675SRob Herring
46724ba675SRob Herring		ramoops@2ffe0000 {
47724ba675SRob Herring			compatible = "ramoops";
48724ba675SRob Herring			reg = <0x2ffe0000 0x10000>;	/* 64kB */
49724ba675SRob Herring			console-size = <0x8000>;	/* 32kB */
50724ba675SRob Herring			record-size = <0x400>;		/*  1kB */
51724ba675SRob Herring			ecc-size = <16>;
52724ba675SRob Herring		};
53724ba675SRob Herring
54724ba675SRob Herring		linux,cma@30000000 {
55724ba675SRob Herring			compatible = "shared-dma-pool";
56724ba675SRob Herring			alloc-ranges = <0x30000000 0x10000000>;
57724ba675SRob Herring			size = <0x10000000>; /* 256MiB */
58724ba675SRob Herring			linux,cma-default;
59724ba675SRob Herring			reusable;
60724ba675SRob Herring		};
61724ba675SRob Herring	};
62724ba675SRob Herring
63724ba675SRob Herring	host1x@50000000 {
64724ba675SRob Herring		dc@54200000 {
65724ba675SRob Herring			rgb {
66724ba675SRob Herring				status = "okay";
67724ba675SRob Herring
68724ba675SRob Herring				port@0 {
69724ba675SRob Herring					lcd_output: endpoint {
70724ba675SRob Herring						remote-endpoint = <&lvds_encoder_input>;
71724ba675SRob Herring						bus-width = <18>;
72724ba675SRob Herring					};
73724ba675SRob Herring				};
74724ba675SRob Herring			};
75724ba675SRob Herring		};
76724ba675SRob Herring
77724ba675SRob Herring		hdmi@54280000 {
78724ba675SRob Herring			status = "okay";
79724ba675SRob Herring
80724ba675SRob Herring			vdd-supply = <&hdmi_vdd_reg>;
81724ba675SRob Herring			pll-supply = <&hdmi_pll_reg>;
82724ba675SRob Herring			hdmi-supply = <&vdd_5v0_sys>;
83724ba675SRob Herring
84724ba675SRob Herring			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
85724ba675SRob Herring			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
86724ba675SRob Herring				GPIO_ACTIVE_HIGH>;
87724ba675SRob Herring		};
88724ba675SRob Herring	};
89724ba675SRob Herring
90724ba675SRob Herring	pinmux@70000014 {
91724ba675SRob Herring		pinctrl-names = "default";
92724ba675SRob Herring		pinctrl-0 = <&state_default>;
93724ba675SRob Herring
94724ba675SRob Herring		state_default: pinmux {
95724ba675SRob Herring			ata {
96724ba675SRob Herring				nvidia,pins = "ata";
97724ba675SRob Herring				nvidia,function = "ide";
98724ba675SRob Herring			};
99724ba675SRob Herring			atb {
100724ba675SRob Herring				nvidia,pins = "atb", "gma", "gme";
101724ba675SRob Herring				nvidia,function = "sdio4";
102724ba675SRob Herring			};
103724ba675SRob Herring			atc {
104724ba675SRob Herring				nvidia,pins = "atc";
105724ba675SRob Herring				nvidia,function = "nand";
106724ba675SRob Herring			};
107724ba675SRob Herring			atd {
108724ba675SRob Herring				nvidia,pins = "atd", "ate", "gmb", "spia",
109724ba675SRob Herring					"spib", "spic";
110724ba675SRob Herring				nvidia,function = "gmi";
111724ba675SRob Herring			};
112724ba675SRob Herring			cdev1 {
113724ba675SRob Herring				nvidia,pins = "cdev1";
114724ba675SRob Herring				nvidia,function = "plla_out";
115724ba675SRob Herring			};
116724ba675SRob Herring			cdev2 {
117724ba675SRob Herring				nvidia,pins = "cdev2";
118724ba675SRob Herring				nvidia,function = "pllp_out4";
119724ba675SRob Herring			};
120724ba675SRob Herring			crtp {
121724ba675SRob Herring				nvidia,pins = "crtp", "lm1";
122724ba675SRob Herring				nvidia,function = "crt";
123724ba675SRob Herring			};
124724ba675SRob Herring			csus {
125724ba675SRob Herring				nvidia,pins = "csus";
126724ba675SRob Herring				nvidia,function = "vi_sensor_clk";
127724ba675SRob Herring			};
128724ba675SRob Herring			dap1 {
129724ba675SRob Herring				nvidia,pins = "dap1";
130724ba675SRob Herring				nvidia,function = "dap1";
131724ba675SRob Herring			};
132724ba675SRob Herring			dap2 {
133724ba675SRob Herring				nvidia,pins = "dap2";
134724ba675SRob Herring				nvidia,function = "dap2";
135724ba675SRob Herring			};
136724ba675SRob Herring			dap3 {
137724ba675SRob Herring				nvidia,pins = "dap3";
138724ba675SRob Herring				nvidia,function = "dap3";
139724ba675SRob Herring			};
140724ba675SRob Herring			dap4 {
141724ba675SRob Herring				nvidia,pins = "dap4";
142724ba675SRob Herring				nvidia,function = "dap4";
143724ba675SRob Herring			};
144724ba675SRob Herring			dta {
145724ba675SRob Herring				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
146724ba675SRob Herring				nvidia,function = "vi";
147724ba675SRob Herring			};
148724ba675SRob Herring			dtf {
149724ba675SRob Herring				nvidia,pins = "dtf";
150724ba675SRob Herring				nvidia,function = "i2c3";
151724ba675SRob Herring			};
152724ba675SRob Herring			gmc {
153724ba675SRob Herring				nvidia,pins = "gmc";
154724ba675SRob Herring				nvidia,function = "uartd";
155724ba675SRob Herring			};
156724ba675SRob Herring			gmd {
157724ba675SRob Herring				nvidia,pins = "gmd";
158724ba675SRob Herring				nvidia,function = "sflash";
159724ba675SRob Herring			};
160724ba675SRob Herring			gpu {
161724ba675SRob Herring				nvidia,pins = "gpu";
162724ba675SRob Herring				nvidia,function = "pwm";
163724ba675SRob Herring			};
164724ba675SRob Herring			gpu7 {
165724ba675SRob Herring				nvidia,pins = "gpu7";
166724ba675SRob Herring				nvidia,function = "rtck";
167724ba675SRob Herring			};
168724ba675SRob Herring			gpv {
169724ba675SRob Herring				nvidia,pins = "gpv", "slxa";
170724ba675SRob Herring				nvidia,function = "pcie";
171724ba675SRob Herring			};
172724ba675SRob Herring			hdint {
173724ba675SRob Herring				nvidia,pins = "hdint";
174724ba675SRob Herring				nvidia,function = "hdmi";
175724ba675SRob Herring			};
176724ba675SRob Herring			i2cp {
177724ba675SRob Herring				nvidia,pins = "i2cp";
178724ba675SRob Herring				nvidia,function = "i2cp";
179724ba675SRob Herring			};
180724ba675SRob Herring			irrx {
181724ba675SRob Herring				nvidia,pins = "irrx", "irtx";
182724ba675SRob Herring				nvidia,function = "uartb";
183724ba675SRob Herring			};
184724ba675SRob Herring			kbca {
185724ba675SRob Herring				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
186724ba675SRob Herring					"kbce", "kbcf";
187724ba675SRob Herring				nvidia,function = "kbc";
188724ba675SRob Herring			};
189724ba675SRob Herring			lcsn {
190724ba675SRob Herring				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
191724ba675SRob Herring					"lsdi", "lvp0";
192724ba675SRob Herring				nvidia,function = "rsvd4";
193724ba675SRob Herring			};
194724ba675SRob Herring			ld0 {
195724ba675SRob Herring				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
196724ba675SRob Herring					"ld5", "ld6", "ld7", "ld8", "ld9",
197724ba675SRob Herring					"ld10", "ld11", "ld12", "ld13", "ld14",
198724ba675SRob Herring					"ld15", "ld16", "ld17", "ldi", "lhp0",
199724ba675SRob Herring					"lhp1", "lhp2", "lhs", "lpp", "lsc0",
200724ba675SRob Herring					"lsc1", "lsck", "lsda", "lspi", "lvp1",
201724ba675SRob Herring					"lvs";
202724ba675SRob Herring				nvidia,function = "displaya";
203724ba675SRob Herring			};
204724ba675SRob Herring			owc {
205724ba675SRob Herring				nvidia,pins = "owc", "spdi", "spdo", "uac";
206724ba675SRob Herring				nvidia,function = "rsvd2";
207724ba675SRob Herring			};
208724ba675SRob Herring			pmc {
209724ba675SRob Herring				nvidia,pins = "pmc";
210724ba675SRob Herring				nvidia,function = "pwr_on";
211724ba675SRob Herring			};
212724ba675SRob Herring			rm {
213724ba675SRob Herring				nvidia,pins = "rm";
214724ba675SRob Herring				nvidia,function = "i2c1";
215724ba675SRob Herring			};
216724ba675SRob Herring			sdb {
217724ba675SRob Herring				nvidia,pins = "sdb", "sdc", "sdd", "slxc", "slxk";
218724ba675SRob Herring				nvidia,function = "sdio3";
219724ba675SRob Herring			};
220724ba675SRob Herring			sdio1 {
221724ba675SRob Herring				nvidia,pins = "sdio1";
222724ba675SRob Herring				nvidia,function = "sdio1";
223724ba675SRob Herring			};
224724ba675SRob Herring			slxd {
225724ba675SRob Herring				nvidia,pins = "slxd";
226724ba675SRob Herring				nvidia,function = "spdif";
227724ba675SRob Herring			};
228724ba675SRob Herring			spid {
229724ba675SRob Herring				nvidia,pins = "spid", "spie", "spif";
230724ba675SRob Herring				nvidia,function = "spi1";
231724ba675SRob Herring			};
232724ba675SRob Herring			spig {
233724ba675SRob Herring				nvidia,pins = "spig", "spih";
234724ba675SRob Herring				nvidia,function = "spi2_alt";
235724ba675SRob Herring			};
236724ba675SRob Herring			uaa {
237724ba675SRob Herring				nvidia,pins = "uaa", "uab", "uda";
238724ba675SRob Herring				nvidia,function = "ulpi";
239724ba675SRob Herring			};
240724ba675SRob Herring			uad {
241724ba675SRob Herring				nvidia,pins = "uad";
242724ba675SRob Herring				nvidia,function = "irda";
243724ba675SRob Herring			};
244724ba675SRob Herring			uca {
245724ba675SRob Herring				nvidia,pins = "uca", "ucb";
246724ba675SRob Herring				nvidia,function = "uartc";
247724ba675SRob Herring			};
248724ba675SRob Herring			conf_ata {
249724ba675SRob Herring				nvidia,pins = "ata", "atb", "atc", "atd",
250724ba675SRob Herring					"cdev1", "cdev2", "csus", "dap1",
251724ba675SRob Herring					"dap4", "dte", "dtf", "gma", "gmc",
252724ba675SRob Herring					"gme", "gpu", "gpu7", "gpv", "i2cp",
253724ba675SRob Herring					"irrx", "irtx", "pta", "rm",
254724ba675SRob Herring					"sdc", "sdd", "slxc", "slxd", "slxk",
255724ba675SRob Herring					"spdi", "spdo", "uac", "uad", "uda";
256724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
257724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
258724ba675SRob Herring			};
259724ba675SRob Herring			conf_ate {
260724ba675SRob Herring				nvidia,pins = "ate", "dap2", "dap3",
261724ba675SRob Herring					"gmd", "owc", "spia", "spib", "spic",
262724ba675SRob Herring					"spid", "spie";
263724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
264724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
265724ba675SRob Herring			};
266724ba675SRob Herring			conf_ck32 {
267724ba675SRob Herring				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
268724ba675SRob Herring					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
269724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
270724ba675SRob Herring			};
271724ba675SRob Herring			conf_crtp {
272724ba675SRob Herring				nvidia,pins = "crtp", "gmb", "slxa", "spig",
273724ba675SRob Herring					"spih";
274724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
275724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
276724ba675SRob Herring			};
277724ba675SRob Herring			conf_dta {
278724ba675SRob Herring				nvidia,pins = "dta", "dtb", "dtc", "dtd", "kbcb";
279724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
280724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
281724ba675SRob Herring			};
282724ba675SRob Herring			conf_dte {
283724ba675SRob Herring				nvidia,pins = "spif";
284724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
285724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
286724ba675SRob Herring			};
287724ba675SRob Herring			conf_hdint {
288724ba675SRob Herring				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
289724ba675SRob Herring					"lpw1", "lsck", "lsda", "lsdi",
290724ba675SRob Herring					"lvp0";
291724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
292724ba675SRob Herring			};
293724ba675SRob Herring			conf_kbca {
294724ba675SRob Herring				nvidia,pins = "kbca", "kbcc", "kbcd",
295724ba675SRob Herring					"kbce", "kbcf", "sdio1", "uaa",
296724ba675SRob Herring					"uab", "uca", "ucb";
297724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
298724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
299724ba675SRob Herring			};
300724ba675SRob Herring			conf_lc {
301724ba675SRob Herring				nvidia,pins = "lc", "ls";
302724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
303724ba675SRob Herring			};
304724ba675SRob Herring			conf_ld0 {
305724ba675SRob Herring				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
306724ba675SRob Herring					"ld5", "ld6", "ld7", "ld8", "ld9",
307724ba675SRob Herring					"ld10", "ld11", "ld12", "ld13", "ld14",
308724ba675SRob Herring					"ld15", "ld16", "ld17", "ldi", "lhp0",
309724ba675SRob Herring					"lhp1", "lhp2", "lhs", "lm0", "lpp",
310724ba675SRob Herring					"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
311724ba675SRob Herring					"lvp1", "lvs", "pmc", "sdb";
312724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
313724ba675SRob Herring			};
314724ba675SRob Herring			conf_ld17_0 {
315724ba675SRob Herring				nvidia,pins = "ld17_0";
316724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
317724ba675SRob Herring			};
318724ba675SRob Herring			drive_ddc {
319724ba675SRob Herring				nvidia,pins = "drive_ddc",
320724ba675SRob Herring						"drive_vi1",
321724ba675SRob Herring						"drive_sdio1";
322724ba675SRob Herring				nvidia,pull-up-strength = <31>;
323724ba675SRob Herring				nvidia,pull-down-strength = <31>;
324724ba675SRob Herring				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
325724ba675SRob Herring				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
326724ba675SRob Herring				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
327724ba675SRob Herring				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
328724ba675SRob Herring				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
329724ba675SRob Herring			};
330724ba675SRob Herring			drive_dbg {
331724ba675SRob Herring				nvidia,pins = "drive_dbg",
332724ba675SRob Herring						"drive_vi2",
333724ba675SRob Herring						"drive_at1",
334724ba675SRob Herring						"drive_ao1";
335724ba675SRob Herring				nvidia,pull-up-strength = <31>;
336724ba675SRob Herring				nvidia,pull-down-strength = <31>;
337724ba675SRob Herring				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
338724ba675SRob Herring				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
339724ba675SRob Herring				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
340724ba675SRob Herring				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
341724ba675SRob Herring				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
342724ba675SRob Herring			};
343724ba675SRob Herring		};
344724ba675SRob Herring
345724ba675SRob Herring		state_i2cmux_ddc: pinmux-i2cmux-ddc {
346724ba675SRob Herring			ddc {
347724ba675SRob Herring				nvidia,pins = "ddc";
348724ba675SRob Herring				nvidia,function = "i2c2";
349724ba675SRob Herring			};
350724ba675SRob Herring
351724ba675SRob Herring			pta {
352724ba675SRob Herring				nvidia,pins = "pta";
353724ba675SRob Herring				nvidia,function = "rsvd4";
354724ba675SRob Herring			};
355724ba675SRob Herring		};
356724ba675SRob Herring
357724ba675SRob Herring		state_i2cmux_idle: pinmux-i2cmux-idle {
358724ba675SRob Herring			ddc {
359724ba675SRob Herring				nvidia,pins = "ddc";
360724ba675SRob Herring				nvidia,function = "rsvd4";
361724ba675SRob Herring			};
362724ba675SRob Herring
363724ba675SRob Herring			pta {
364724ba675SRob Herring				nvidia,pins = "pta";
365724ba675SRob Herring				nvidia,function = "rsvd4";
366724ba675SRob Herring			};
367724ba675SRob Herring		};
368724ba675SRob Herring
369724ba675SRob Herring		state_i2cmux_pta: pinmux-i2cmux-pta {
370724ba675SRob Herring			ddc {
371724ba675SRob Herring				nvidia,pins = "ddc";
372724ba675SRob Herring				nvidia,function = "rsvd4";
373724ba675SRob Herring			};
374724ba675SRob Herring
375724ba675SRob Herring			pta {
376724ba675SRob Herring				nvidia,pins = "pta";
377724ba675SRob Herring				nvidia,function = "i2c2";
378724ba675SRob Herring			};
379724ba675SRob Herring		};
380724ba675SRob Herring	};
381724ba675SRob Herring
382724ba675SRob Herring	tegra_spdif: spdif@70002400 {
383724ba675SRob Herring		status = "okay";
384724ba675SRob Herring
385724ba675SRob Herring		nvidia,fixed-parent-rate;
386724ba675SRob Herring	};
387724ba675SRob Herring
388724ba675SRob Herring	tegra_i2s1: i2s@70002800 {
389724ba675SRob Herring		status = "okay";
390724ba675SRob Herring
391724ba675SRob Herring		nvidia,fixed-parent-rate;
392724ba675SRob Herring	};
393724ba675SRob Herring
394724ba675SRob Herring	uartb: serial@70006040 {
395724ba675SRob Herring		compatible = "nvidia,tegra20-hsuart";
396*500b861dSThierry Reding		reset-names = "serial";
397724ba675SRob Herring		/delete-property/ reg-shift;
398724ba675SRob Herring		/* GPS BCM4751 */
399724ba675SRob Herring	};
400724ba675SRob Herring
401724ba675SRob Herring	uartc: serial@70006200 {
402724ba675SRob Herring		compatible = "nvidia,tegra20-hsuart";
403*500b861dSThierry Reding		reset-names = "serial";
404724ba675SRob Herring		/delete-property/ reg-shift;
405724ba675SRob Herring		status = "okay";
406724ba675SRob Herring
407724ba675SRob Herring		/* Azurewave AW-NH665 BCM4329B1 */
408724ba675SRob Herring		bluetooth {
409724ba675SRob Herring			compatible = "brcm,bcm4329-bt";
410724ba675SRob Herring
411724ba675SRob Herring			interrupt-parent = <&gpio>;
412724ba675SRob Herring			interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
413724ba675SRob Herring			interrupt-names = "host-wakeup";
414724ba675SRob Herring
415724ba675SRob Herring			/* PLLP 216MHz / 16 / 4 */
416724ba675SRob Herring			max-speed = <3375000>;
417724ba675SRob Herring
418724ba675SRob Herring			clocks = <&rtc_32k_wifi>;
419724ba675SRob Herring			clock-names = "txco";
420724ba675SRob Herring
421724ba675SRob Herring			vbat-supply  = <&vdd_3v3_sys>;
422724ba675SRob Herring			vddio-supply = <&vdd_1v8_sys>;
423724ba675SRob Herring
424724ba675SRob Herring			device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
425724ba675SRob Herring			shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
426724ba675SRob Herring		};
427724ba675SRob Herring	};
428724ba675SRob Herring
429724ba675SRob Herring	uartd: serial@70006300 {
430724ba675SRob Herring		/* Docking station */
431724ba675SRob Herring	};
432724ba675SRob Herring
433724ba675SRob Herring	pwm: pwm@7000a000 {
434724ba675SRob Herring		status = "okay";
435724ba675SRob Herring	};
436724ba675SRob Herring
437724ba675SRob Herring	i2c@7000c000 {
438724ba675SRob Herring		clock-frequency = <400000>;
439724ba675SRob Herring		status = "okay";
440724ba675SRob Herring
441724ba675SRob Herring		wm8903: audio-codec@1a {
442724ba675SRob Herring			compatible = "wlf,wm8903";
443724ba675SRob Herring			reg = <0x1a>;
444724ba675SRob Herring
445724ba675SRob Herring			interrupt-parent = <&gpio>;
446724ba675SRob Herring			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_EDGE_BOTH>;
447724ba675SRob Herring
448724ba675SRob Herring			gpio-controller;
449724ba675SRob Herring			#gpio-cells = <2>;
450724ba675SRob Herring
451724ba675SRob Herring			micdet-cfg = <0>;
452724ba675SRob Herring			micdet-delay = <100>;
453724ba675SRob Herring
454724ba675SRob Herring			gpio-cfg = <
455724ba675SRob Herring				0x0000 /* MIC_LR_OUT#    GPIO, output, low */
456724ba675SRob Herring				0x0000 /* FM2018-enable  GPIO, output, low */
457724ba675SRob Herring				0x0000 /* Speaker-enable GPIO, output, low */
458724ba675SRob Herring				0x0200 /* Interrupt, output */
459724ba675SRob Herring				0x01a0 /* BCLK, input, active high */
460724ba675SRob Herring			>;
461724ba675SRob Herring
462724ba675SRob Herring			AVDD-supply  = <&vdd_1v8_sys>;
463724ba675SRob Herring			CPVDD-supply = <&vdd_1v8_sys>;
464724ba675SRob Herring			DBVDD-supply = <&vdd_1v8_sys>;
465724ba675SRob Herring			DCVDD-supply = <&vdd_1v8_sys>;
466724ba675SRob Herring		};
467724ba675SRob Herring
468724ba675SRob Herring		touchscreen@4c {
469724ba675SRob Herring			compatible = "atmel,maxtouch";
470724ba675SRob Herring			reg = <0x4c>;
471724ba675SRob Herring
472724ba675SRob Herring			interrupt-parent = <&gpio>;
473724ba675SRob Herring			interrupts = <TEGRA_GPIO(V, 6) IRQ_TYPE_LEVEL_LOW>;
474724ba675SRob Herring
475724ba675SRob Herring			reset-gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
476724ba675SRob Herring
477724ba675SRob Herring			vdda-supply = <&vdd_3v3_sys>;
478724ba675SRob Herring			vdd-supply  = <&vdd_3v3_sys>;
479724ba675SRob Herring
480724ba675SRob Herring			atmel,wakeup-method = <ATMEL_MXT_WAKEUP_I2C_SCL>;
481724ba675SRob Herring		};
482724ba675SRob Herring
483724ba675SRob Herring		gyroscope@68 {
484724ba675SRob Herring			compatible = "invensense,mpu3050";
485724ba675SRob Herring			reg = <0x68>;
486724ba675SRob Herring
487724ba675SRob Herring			interrupt-parent = <&gpio>;
488724ba675SRob Herring			interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_EDGE_RISING>;
489724ba675SRob Herring
490724ba675SRob Herring			vdd-supply    = <&vdd_3v3_sys>;
491724ba675SRob Herring			vlogic-supply = <&vdd_1v8_sys>;
492724ba675SRob Herring
493724ba675SRob Herring			mount-matrix =	 "0",  "1",  "0",
494724ba675SRob Herring					 "1",  "0",  "0",
495724ba675SRob Herring					 "0",  "0", "-1";
496724ba675SRob Herring
497724ba675SRob Herring			i2c-gate {
498724ba675SRob Herring				#address-cells = <1>;
499724ba675SRob Herring				#size-cells = <0>;
500724ba675SRob Herring
501724ba675SRob Herring				accelerometer@f {
502724ba675SRob Herring					compatible = "kionix,kxtf9";
503724ba675SRob Herring					reg = <0x0f>;
504724ba675SRob Herring
505724ba675SRob Herring					interrupt-parent = <&gpio>;
506724ba675SRob Herring					interrupts = <TEGRA_GPIO(S, 7) IRQ_TYPE_EDGE_RISING>;
507724ba675SRob Herring
508724ba675SRob Herring					vdd-supply   = <&vdd_1v8_sys>;
509724ba675SRob Herring					vddio-supply = <&vdd_1v8_sys>;
510724ba675SRob Herring
511724ba675SRob Herring					mount-matrix =	 "0",  "1",  "0",
512724ba675SRob Herring							 "1",  "0",  "0",
513724ba675SRob Herring							 "0",  "0", "-1";
514724ba675SRob Herring				};
515724ba675SRob Herring			};
516724ba675SRob Herring		};
517724ba675SRob Herring	};
518724ba675SRob Herring
519724ba675SRob Herring	i2c@7000c400 {
520724ba675SRob Herring		clock-frequency = <10000>;
521724ba675SRob Herring		status = "okay";
522724ba675SRob Herring	};
523724ba675SRob Herring
524724ba675SRob Herring	i2c@7000d000 {
525724ba675SRob Herring		clock-frequency = <100000>;
526724ba675SRob Herring		status = "okay";
527724ba675SRob Herring
528724ba675SRob Herring		magnetometer@c {
529724ba675SRob Herring			compatible = "asahi-kasei,ak8975";
530724ba675SRob Herring			reg = <0x0c>;
531724ba675SRob Herring
532724ba675SRob Herring			interrupt-parent = <&gpio>;
533724ba675SRob Herring			interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_EDGE_RISING>;
534724ba675SRob Herring
535724ba675SRob Herring			vdd-supply = <&vdd_3v3_sys>;
536724ba675SRob Herring			vid-supply = <&vdd_1v8_sys>;
537724ba675SRob Herring
538724ba675SRob Herring			mount-matrix =	"1",  "0",  "0",
539724ba675SRob Herring					"0", "-1",  "0",
540724ba675SRob Herring					"0",  "0", "-1";
541724ba675SRob Herring		};
542724ba675SRob Herring
543724ba675SRob Herring		pmic: pmic@34 {
544724ba675SRob Herring			compatible = "ti,tps6586x";
545724ba675SRob Herring			reg = <0x34>;
546724ba675SRob Herring
547724ba675SRob Herring			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
548724ba675SRob Herring
549724ba675SRob Herring			#gpio-cells = <2>;
550724ba675SRob Herring			gpio-controller;
551724ba675SRob Herring
552724ba675SRob Herring			sys-supply       = <&vdd_5v0_sys>;
553724ba675SRob Herring			vin-sm0-supply   = <&sys_reg>;
554724ba675SRob Herring			vin-sm1-supply   = <&sys_reg>;
555724ba675SRob Herring			vin-sm2-supply   = <&sys_reg>;
556724ba675SRob Herring			vinldo01-supply  = <&sm2_reg>;
557724ba675SRob Herring			vinldo23-supply  = <&sm2_reg>;
558724ba675SRob Herring			vinldo4-supply   = <&sm2_reg>;
559724ba675SRob Herring			vinldo678-supply = <&sm2_reg>;
560724ba675SRob Herring			vinldo9-supply   = <&sm2_reg>;
561724ba675SRob Herring
562724ba675SRob Herring			regulators {
563724ba675SRob Herring				sys_reg: sys {
564724ba675SRob Herring					regulator-name = "vdd_sys";
565724ba675SRob Herring					regulator-always-on;
566724ba675SRob Herring				};
567724ba675SRob Herring
568724ba675SRob Herring				vdd_core: sm0 {
569724ba675SRob Herring					regulator-name = "vdd_sm0,vdd_core";
570724ba675SRob Herring					regulator-min-microvolt = <950000>;
571724ba675SRob Herring					regulator-max-microvolt = <1300000>;
572724ba675SRob Herring					regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
573724ba675SRob Herring					regulator-coupled-max-spread = <170000 550000>;
574724ba675SRob Herring					regulator-always-on;
575724ba675SRob Herring					regulator-boot-on;
576724ba675SRob Herring
577724ba675SRob Herring					nvidia,tegra-core-regulator;
578724ba675SRob Herring				};
579724ba675SRob Herring
580724ba675SRob Herring				vdd_cpu: sm1 {
581724ba675SRob Herring					regulator-name = "vdd_sm1,vdd_cpu";
582724ba675SRob Herring					regulator-min-microvolt = <750000>;
583724ba675SRob Herring					regulator-max-microvolt = <1125000>;
584724ba675SRob Herring					regulator-coupled-with = <&vdd_core &rtc_vdd>;
585724ba675SRob Herring					regulator-coupled-max-spread = <550000 550000>;
586724ba675SRob Herring					regulator-always-on;
587724ba675SRob Herring					regulator-boot-on;
588724ba675SRob Herring
589724ba675SRob Herring					nvidia,tegra-cpu-regulator;
590724ba675SRob Herring				};
591724ba675SRob Herring
592724ba675SRob Herring				sm2_reg: sm2 {
593724ba675SRob Herring					regulator-name = "vdd_sm2,vin_ldo*";
594724ba675SRob Herring					regulator-min-microvolt = <3700000>;
595724ba675SRob Herring					regulator-max-microvolt = <3700000>;
596724ba675SRob Herring					regulator-always-on;
597724ba675SRob Herring				};
598724ba675SRob Herring
599724ba675SRob Herring				/* LDO0 is not connected to anything */
600724ba675SRob Herring
601724ba675SRob Herring				ldo1 {
602724ba675SRob Herring					regulator-name = "vdd_ldo1,avdd_pll*";
603724ba675SRob Herring					regulator-min-microvolt = <1100000>;
604724ba675SRob Herring					regulator-max-microvolt = <1100000>;
605724ba675SRob Herring					regulator-always-on;
606724ba675SRob Herring					regulator-boot-on;
607724ba675SRob Herring				};
608724ba675SRob Herring
609724ba675SRob Herring				rtc_vdd: ldo2 {
610724ba675SRob Herring					regulator-name = "vdd_ldo2,vdd_rtc";
611724ba675SRob Herring					regulator-min-microvolt = <950000>;
612724ba675SRob Herring					regulator-max-microvolt = <1300000>;
613724ba675SRob Herring					regulator-coupled-with = <&vdd_core &vdd_cpu>;
614724ba675SRob Herring					regulator-coupled-max-spread = <170000 550000>;
615724ba675SRob Herring					regulator-always-on;
616724ba675SRob Herring					regulator-boot-on;
617724ba675SRob Herring
618724ba675SRob Herring					nvidia,tegra-rtc-regulator;
619724ba675SRob Herring				};
620724ba675SRob Herring
621724ba675SRob Herring				ldo3 {
622724ba675SRob Herring					regulator-name = "vdd_ldo3,avdd_usb*";
623724ba675SRob Herring					regulator-min-microvolt = <3300000>;
624724ba675SRob Herring					regulator-max-microvolt = <3300000>;
625724ba675SRob Herring					regulator-always-on;
626724ba675SRob Herring				};
627724ba675SRob Herring
628724ba675SRob Herring				ldo4 {
629724ba675SRob Herring					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
630724ba675SRob Herring					regulator-min-microvolt = <1800000>;
631724ba675SRob Herring					regulator-max-microvolt = <1800000>;
632724ba675SRob Herring					regulator-always-on;
633724ba675SRob Herring					regulator-boot-on;
634724ba675SRob Herring				};
635724ba675SRob Herring
636724ba675SRob Herring				vcore_emmc: ldo5 {
637724ba675SRob Herring					regulator-name = "vdd_ldo5,vcore_mmc";
638724ba675SRob Herring					regulator-min-microvolt = <2850000>;
639724ba675SRob Herring					regulator-max-microvolt = <2850000>;
640724ba675SRob Herring					regulator-always-on;
641724ba675SRob Herring				};
642724ba675SRob Herring
643724ba675SRob Herring				avdd_vdac_reg: ldo6 {
644724ba675SRob Herring					regulator-name = "vdd_ldo6,avdd_vdac";
645724ba675SRob Herring					regulator-min-microvolt = <2850000>;
646724ba675SRob Herring					regulator-max-microvolt = <2850000>;
647724ba675SRob Herring				};
648724ba675SRob Herring
649724ba675SRob Herring				hdmi_vdd_reg: ldo7 {
650724ba675SRob Herring					regulator-name = "vdd_ldo7,avdd_hdmi";
651724ba675SRob Herring					regulator-min-microvolt = <3300000>;
652724ba675SRob Herring					regulator-max-microvolt = <3300000>;
653724ba675SRob Herring				};
654724ba675SRob Herring
655724ba675SRob Herring				hdmi_pll_reg: ldo8 {
656724ba675SRob Herring					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
657724ba675SRob Herring					regulator-min-microvolt = <1800000>;
658724ba675SRob Herring					regulator-max-microvolt = <1800000>;
659724ba675SRob Herring				};
660724ba675SRob Herring
661724ba675SRob Herring				ldo9 {
662724ba675SRob Herring					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
663724ba675SRob Herring					regulator-min-microvolt = <2850000>;
664724ba675SRob Herring					regulator-max-microvolt = <2850000>;
665724ba675SRob Herring					regulator-always-on;
666724ba675SRob Herring					regulator-boot-on;
667724ba675SRob Herring				};
668724ba675SRob Herring
669724ba675SRob Herring				ldo_rtc {
670724ba675SRob Herring					regulator-name = "vdd_rtc_out,vdd_cell";
671724ba675SRob Herring					regulator-min-microvolt = <3300000>;
672724ba675SRob Herring					regulator-max-microvolt = <3300000>;
673724ba675SRob Herring					regulator-always-on;
674724ba675SRob Herring					regulator-boot-on;
675724ba675SRob Herring				};
676724ba675SRob Herring			};
677724ba675SRob Herring		};
678724ba675SRob Herring
679724ba675SRob Herring		nct1008: temperature-sensor@4c {
680724ba675SRob Herring			compatible = "onnn,nct1008";
681724ba675SRob Herring			reg = <0x4c>;
682724ba675SRob Herring			vcc-supply = <&vdd_3v3_sys>;
683724ba675SRob Herring
684724ba675SRob Herring			interrupt-parent = <&gpio>;
685724ba675SRob Herring			interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
686724ba675SRob Herring
687724ba675SRob Herring			#thermal-sensor-cells = <1>;
688724ba675SRob Herring		};
689724ba675SRob Herring	};
690724ba675SRob Herring
691724ba675SRob Herring	pmc@7000e400 {
692724ba675SRob Herring		nvidia,invert-interrupt;
693724ba675SRob Herring		nvidia,suspend-mode = <1>;
694724ba675SRob Herring		nvidia,cpu-pwr-good-time = <2000>;
695724ba675SRob Herring		nvidia,cpu-pwr-off-time = <100>;
696724ba675SRob Herring		nvidia,core-pwr-good-time = <3845 3845>;
697724ba675SRob Herring		nvidia,core-pwr-off-time = <458>;
698724ba675SRob Herring		nvidia,sys-clock-req-active-high;
699724ba675SRob Herring		core-supply = <&vdd_core>;
700724ba675SRob Herring	};
701724ba675SRob Herring
702724ba675SRob Herring	memory-controller@7000f400 {
703724ba675SRob Herring		nvidia,use-ram-code;
704724ba675SRob Herring
705724ba675SRob Herring		emc-tables@0 {
706724ba675SRob Herring			nvidia,ram-code = <0>; /* elpida-8gb */
707724ba675SRob Herring			reg = <0>;
708724ba675SRob Herring
709724ba675SRob Herring			#address-cells = <1>;
710724ba675SRob Herring			#size-cells = <0>;
711724ba675SRob Herring
712724ba675SRob Herring			emc-table@25000 {
713724ba675SRob Herring				reg = <25000>;
714724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
715724ba675SRob Herring				clock-frequency = <25000>;
716724ba675SRob Herring				nvidia,emc-registers = <0x00000002 0x00000006
717724ba675SRob Herring					0x00000003 0x00000003 0x00000006 0x00000004
718724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
719724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000004
720724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x0000004d
721724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
722724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x00000004
723724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
724724ba675SRob Herring					0x00000002 0x00000068 0x00000000 0x00000003
725724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa0ae04ae
726724ba675SRob Herring					0x00070000 0x00000000 0x00000000 0x00000003
727724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
728724ba675SRob Herring			};
729724ba675SRob Herring
730724ba675SRob Herring			emc-table@50000 {
731724ba675SRob Herring				reg = <50000>;
732724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
733724ba675SRob Herring				clock-frequency = <50000>;
734724ba675SRob Herring				nvidia,emc-registers = <0x00000003 0x00000007
735724ba675SRob Herring					0x00000003 0x00000003 0x00000006 0x00000004
736724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
737724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000005
738724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x0000009f
739724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
740724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x00000007
741724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
742724ba675SRob Herring					0x00000002 0x000000d0 0x00000000 0x00000000
743724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa0ae04ae
744724ba675SRob Herring					0x00070000 0x00000000 0x00000000 0x00000005
745724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
746724ba675SRob Herring			};
747724ba675SRob Herring
748724ba675SRob Herring			emc-table@75000 {
749724ba675SRob Herring				reg = <75000>;
750724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
751724ba675SRob Herring				clock-frequency = <75000>;
752724ba675SRob Herring				nvidia,emc-registers = <0x00000005 0x0000000a
753724ba675SRob Herring					0x00000004 0x00000003 0x00000006 0x00000004
754724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
755724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000005
756724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x000000ff
757724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
758724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x0000000b
759724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
760724ba675SRob Herring					0x00000002 0x00000138 0x00000000 0x00000000
761724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa0ae04ae
762724ba675SRob Herring					0x00070000 0x00000000 0x00000000 0x00000007
763724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
764724ba675SRob Herring			};
765724ba675SRob Herring
766724ba675SRob Herring			emc-table@150000 {
767724ba675SRob Herring				reg = <150000>;
768724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
769724ba675SRob Herring				clock-frequency = <150000>;
770724ba675SRob Herring				nvidia,emc-registers = <0x00000009 0x00000014
771724ba675SRob Herring					0x00000007 0x00000003 0x00000006 0x00000004
772724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
773724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000005
774724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x0000021f
775724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
776724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x00000015
777724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
778724ba675SRob Herring					0x00000002 0x00000270 0x00000000 0x00000001
779724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa07c04ae
780724ba675SRob Herring					0x007dd510 0x00000000 0x00000000 0x0000000e
781724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
782724ba675SRob Herring			};
783724ba675SRob Herring
784724ba675SRob Herring			emc-table@300000 {
785724ba675SRob Herring				reg = <300000>;
786724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
787724ba675SRob Herring				clock-frequency = <300000>;
788724ba675SRob Herring				nvidia,emc-registers = <0x00000012 0x00000027
789724ba675SRob Herring					0x0000000d 0x00000006 0x00000007 0x00000005
790724ba675SRob Herring					0x00000003 0x00000009 0x00000006 0x00000006
791724ba675SRob Herring					0x00000003 0x00000003 0x00000002 0x00000006
792724ba675SRob Herring					0x00000003 0x00000009 0x0000000c 0x0000045f
793724ba675SRob Herring					0x00000000 0x00000004 0x00000004 0x00000006
794724ba675SRob Herring					0x00000008 0x00000001 0x0000000e 0x0000002a
795724ba675SRob Herring					0x00000003 0x0000000f 0x00000007 0x00000005
796724ba675SRob Herring					0x00000002 0x000004e1 0x00000005 0x00000002
797724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xe059048b
798724ba675SRob Herring					0x007e1510 0x00000000 0x00000000 0x0000001b
799724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
800724ba675SRob Herring			};
801724ba675SRob Herring		};
802724ba675SRob Herring
803724ba675SRob Herring		emc-tables@1 {
804724ba675SRob Herring			nvidia,ram-code = <1>; /* elpida-4gb */
805724ba675SRob Herring			reg = <1>;
806724ba675SRob Herring
807724ba675SRob Herring			#address-cells = <1>;
808724ba675SRob Herring			#size-cells = <0>;
809724ba675SRob Herring
810724ba675SRob Herring			emc-table@25000 {
811724ba675SRob Herring				reg = <25000>;
812724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
813724ba675SRob Herring				clock-frequency = <25000>;
814724ba675SRob Herring				nvidia,emc-registers = <0x00000002 0x00000006
815724ba675SRob Herring					0x00000003 0x00000003 0x00000006 0x00000004
816724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
817724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000004
818724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x0000004d
819724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
820724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x00000004
821724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
822724ba675SRob Herring					0x00000002 0x00000068 0x00000000 0x00000003
823724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa0ae04ae
824724ba675SRob Herring					0x0007c000 0x00000000 0x00000000 0x00000003
825724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
826724ba675SRob Herring			};
827724ba675SRob Herring
828724ba675SRob Herring			emc-table@50000 {
829724ba675SRob Herring				reg = <50000>;
830724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
831724ba675SRob Herring				clock-frequency = <50000>;
832724ba675SRob Herring				nvidia,emc-registers = <0x00000003 0x00000007
833724ba675SRob Herring					0x00000003 0x00000003 0x00000006 0x00000004
834724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
835724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000005
836724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x0000009f
837724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
838724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x00000007
839724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
840724ba675SRob Herring					0x00000002 0x000000d0 0x00000000 0x00000000
841724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa0ae04ae
842724ba675SRob Herring					0x0007c000 0x00000000 0x00000000 0x00000005
843724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
844724ba675SRob Herring			};
845724ba675SRob Herring
846724ba675SRob Herring			emc-table@75000 {
847724ba675SRob Herring				reg = <75000>;
848724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
849724ba675SRob Herring				clock-frequency = <75000>;
850724ba675SRob Herring				nvidia,emc-registers = <0x00000005 0x0000000a
851724ba675SRob Herring					0x00000004 0x00000003 0x00000006 0x00000004
852724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
853724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000005
854724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x000000ff
855724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
856724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x0000000b
857724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
858724ba675SRob Herring					0x00000002 0x00000138 0x00000000 0x00000000
859724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa0ae04ae
860724ba675SRob Herring					0x0007c000 0x00000000 0x00000000 0x00000007
861724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
862724ba675SRob Herring			};
863724ba675SRob Herring
864724ba675SRob Herring			emc-table@150000 {
865724ba675SRob Herring				reg = <150000>;
866724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
867724ba675SRob Herring				clock-frequency = <150000>;
868724ba675SRob Herring				nvidia,emc-registers = <0x00000009 0x00000014
869724ba675SRob Herring					0x00000007 0x00000003 0x00000006 0x00000004
870724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
871724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000005
872724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x0000021f
873724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
874724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x00000015
875724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
876724ba675SRob Herring					0x00000002 0x00000270 0x00000000 0x00000001
877724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa07c04ae
878724ba675SRob Herring					0x007e4010 0x00000000 0x00000000 0x0000000e
879724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
880724ba675SRob Herring			};
881724ba675SRob Herring
882724ba675SRob Herring			emc-table@300000 {
883724ba675SRob Herring				reg = <300000>;
884724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
885724ba675SRob Herring				clock-frequency = <300000>;
886724ba675SRob Herring				nvidia,emc-registers = <0x00000012 0x00000027
887724ba675SRob Herring					0x0000000d 0x00000006 0x00000007 0x00000005
888724ba675SRob Herring					0x00000003 0x00000009 0x00000006 0x00000006
889724ba675SRob Herring					0x00000003 0x00000003 0x00000002 0x00000006
890724ba675SRob Herring					0x00000003 0x00000009 0x0000000c 0x0000045f
891724ba675SRob Herring					0x00000000 0x00000004 0x00000004 0x00000006
892724ba675SRob Herring					0x00000008 0x00000001 0x0000000e 0x0000002a
893724ba675SRob Herring					0x00000003 0x0000000f 0x00000007 0x00000005
894724ba675SRob Herring					0x00000002 0x000004e1 0x00000005 0x00000002
895724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xe059048b
896724ba675SRob Herring					0x007e0010 0x00000000 0x00000000 0x0000001b
897724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
898724ba675SRob Herring			};
899724ba675SRob Herring		};
900724ba675SRob Herring
901724ba675SRob Herring		emc-tables@2 {
902724ba675SRob Herring			nvidia,ram-code = <2>; /* hynix-8gb */
903724ba675SRob Herring			reg = <2>;
904724ba675SRob Herring
905724ba675SRob Herring			#address-cells = <1>;
906724ba675SRob Herring			#size-cells = <0>;
907724ba675SRob Herring
908724ba675SRob Herring			emc-table@25000 {
909724ba675SRob Herring				reg = <25000>;
910724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
911724ba675SRob Herring				clock-frequency = <25000>;
912724ba675SRob Herring				nvidia,emc-registers = <0x00000002 0x00000006
913724ba675SRob Herring					0x00000003 0x00000003 0x00000006 0x00000004
914724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
915724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000004
916724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x0000004d
917724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
918724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x00000004
919724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
920724ba675SRob Herring					0x00000002 0x00000068 0x00000000 0x00000003
921724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa0ae04ae
922724ba675SRob Herring					0x00070000 0x00000000 0x00000000 0x00000003
923724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
924724ba675SRob Herring			};
925724ba675SRob Herring
926724ba675SRob Herring			emc-table@50000 {
927724ba675SRob Herring				reg = <50000>;
928724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
929724ba675SRob Herring				clock-frequency = <50000>;
930724ba675SRob Herring				nvidia,emc-registers = <0x00000003 0x00000007
931724ba675SRob Herring					0x00000003 0x00000003 0x00000006 0x00000004
932724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
933724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000005
934724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x0000009f
935724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
936724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x00000007
937724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
938724ba675SRob Herring					0x00000002 0x000000d0 0x00000000 0x00000000
939724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa0ae04ae
940724ba675SRob Herring					0x00070000 0x00000000 0x00000000 0x00000005
941724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
942724ba675SRob Herring			};
943724ba675SRob Herring
944724ba675SRob Herring			emc-table@75000 {
945724ba675SRob Herring				reg = <75000>;
946724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
947724ba675SRob Herring				clock-frequency = <75000>;
948724ba675SRob Herring				nvidia,emc-registers = <0x00000005 0x0000000a
949724ba675SRob Herring					0x00000004 0x00000003 0x00000006 0x00000004
950724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
951724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000005
952724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x000000ff
953724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
954724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x0000000b
955724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
956724ba675SRob Herring					0x00000002 0x00000138 0x00000000 0x00000000
957724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa0ae04ae
958724ba675SRob Herring					0x00070000 0x00000000 0x00000000 0x00000007
959724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
960724ba675SRob Herring			};
961724ba675SRob Herring
962724ba675SRob Herring			emc-table@150000 {
963724ba675SRob Herring				reg = <150000>;
964724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
965724ba675SRob Herring				clock-frequency = <150000>;
966724ba675SRob Herring				nvidia,emc-registers = <0x00000009 0x00000014
967724ba675SRob Herring					0x00000007 0x00000003 0x00000006 0x00000004
968724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
969724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000005
970724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x0000021f
971724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
972724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x00000015
973724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
974724ba675SRob Herring					0x00000002 0x00000270 0x00000000 0x00000001
975724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa07c04ae
976724ba675SRob Herring					0x007dd010 0x00000000 0x00000000 0x0000000e
977724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
978724ba675SRob Herring			};
979724ba675SRob Herring
980724ba675SRob Herring			emc-table@300000 {
981724ba675SRob Herring				reg = <300000>;
982724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
983724ba675SRob Herring				clock-frequency = <300000>;
984724ba675SRob Herring				nvidia,emc-registers = <0x00000012 0x00000027
985724ba675SRob Herring					0x0000000d 0x00000006 0x00000007 0x00000005
986724ba675SRob Herring					0x00000003 0x00000009 0x00000006 0x00000006
987724ba675SRob Herring					0x00000003 0x00000003 0x00000002 0x00000006
988724ba675SRob Herring					0x00000003 0x00000009 0x0000000c 0x0000045f
989724ba675SRob Herring					0x00000000 0x00000004 0x00000004 0x00000006
990724ba675SRob Herring					0x00000008 0x00000001 0x0000000e 0x0000002a
991724ba675SRob Herring					0x00000003 0x0000000f 0x00000007 0x00000005
992724ba675SRob Herring					0x00000002 0x000004e1 0x00000005 0x00000002
993724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xe059048b
994724ba675SRob Herring					0x007e2010 0x00000000 0x00000000 0x0000001b
995724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
996724ba675SRob Herring			};
997724ba675SRob Herring		};
998724ba675SRob Herring
999724ba675SRob Herring		emc-tables@3 {
1000724ba675SRob Herring			nvidia,ram-code = <3>; /* hynix-4gb */
1001724ba675SRob Herring			reg = <3>;
1002724ba675SRob Herring
1003724ba675SRob Herring			#address-cells = <1>;
1004724ba675SRob Herring			#size-cells = <0>;
1005724ba675SRob Herring
1006724ba675SRob Herring			emc-table@25000 {
1007724ba675SRob Herring				reg = <25000>;
1008724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
1009724ba675SRob Herring				clock-frequency = <25000>;
1010724ba675SRob Herring				nvidia,emc-registers = <0x00000002 0x00000006
1011724ba675SRob Herring					0x00000003 0x00000003 0x00000006 0x00000004
1012724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
1013724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000004
1014724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x0000004d
1015724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
1016724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x00000004
1017724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
1018724ba675SRob Herring					0x00000002 0x00000068 0x00000000 0x00000003
1019724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa0ae04ae
1020724ba675SRob Herring					0x0007c000 0x00000000 0x00000000 0x00000003
1021724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
1022724ba675SRob Herring			};
1023724ba675SRob Herring
1024724ba675SRob Herring			emc-table@50000 {
1025724ba675SRob Herring				reg = <50000>;
1026724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
1027724ba675SRob Herring				clock-frequency = <50000>;
1028724ba675SRob Herring				nvidia,emc-registers = <0x00000003 0x00000007
1029724ba675SRob Herring					0x00000003 0x00000003 0x00000006 0x00000004
1030724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
1031724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000005
1032724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x0000009f
1033724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
1034724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x00000007
1035724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
1036724ba675SRob Herring					0x00000002 0x000000d0 0x00000000 0x00000000
1037724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa0ae04ae
1038724ba675SRob Herring					0x0007c000 0x00078000 0x00000000 0x00000005
1039724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
1040724ba675SRob Herring			};
1041724ba675SRob Herring
1042724ba675SRob Herring			emc-table@75000 {
1043724ba675SRob Herring				reg = <75000>;
1044724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
1045724ba675SRob Herring				clock-frequency = <75000>;
1046724ba675SRob Herring				nvidia,emc-registers = <0x00000005 0x0000000a
1047724ba675SRob Herring					0x00000004 0x00000003 0x00000006 0x00000004
1048724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
1049724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000005
1050724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x000000ff
1051724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
1052724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x0000000b
1053724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
1054724ba675SRob Herring					0x00000002 0x00000138 0x00000000 0x00000000
1055724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa0ae04ae
1056724ba675SRob Herring					0x0007c000 0x00000000 0x00000000 0x00000007
1057724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
1058724ba675SRob Herring			};
1059724ba675SRob Herring
1060724ba675SRob Herring			emc-table@150000 {
1061724ba675SRob Herring				reg = <150000>;
1062724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
1063724ba675SRob Herring				clock-frequency = <150000>;
1064724ba675SRob Herring				nvidia,emc-registers = <0x00000009 0x00000014
1065724ba675SRob Herring					0x00000007 0x00000003 0x00000006 0x00000004
1066724ba675SRob Herring					0x00000002 0x00000009 0x00000003 0x00000003
1067724ba675SRob Herring					0x00000002 0x00000002 0x00000002 0x00000005
1068724ba675SRob Herring					0x00000003 0x00000008 0x0000000b 0x0000021f
1069724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
1070724ba675SRob Herring					0x00000008 0x00000001 0x0000000a 0x00000015
1071724ba675SRob Herring					0x00000003 0x00000008 0x00000004 0x00000006
1072724ba675SRob Herring					0x00000002 0x00000270 0x00000000 0x00000001
1073724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xa07c04ae
1074724ba675SRob Herring					0x007e4010 0x00000000 0x00000000 0x0000000e
1075724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
1076724ba675SRob Herring			};
1077724ba675SRob Herring
1078724ba675SRob Herring			emc-table@300000 {
1079724ba675SRob Herring				reg = <300000>;
1080724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
1081724ba675SRob Herring				clock-frequency = <300000>;
1082724ba675SRob Herring				nvidia,emc-registers = <0x00000012 0x00000027
1083724ba675SRob Herring					0x0000000d 0x00000006 0x00000007 0x00000005
1084724ba675SRob Herring					0x00000003 0x00000009 0x00000006 0x00000006
1085724ba675SRob Herring					0x00000003 0x00000003 0x00000002 0x00000006
1086724ba675SRob Herring					0x00000003 0x00000009 0x0000000c 0x0000045f
1087724ba675SRob Herring					0x00000000 0x00000004 0x00000004 0x00000006
1088724ba675SRob Herring					0x00000008 0x00000001 0x0000000e 0x0000002a
1089724ba675SRob Herring					0x00000003 0x0000000f 0x00000007 0x00000005
1090724ba675SRob Herring					0x00000002 0x000004e1 0x00000005 0x00000002
1091724ba675SRob Herring					0x00000000 0x00000000 0x00000282 0xe059048b
1092724ba675SRob Herring					0x007e0010 0x00000000 0x00000000 0x0000001b
1093724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
1094724ba675SRob Herring			};
1095724ba675SRob Herring		};
1096724ba675SRob Herring	};
1097724ba675SRob Herring
1098724ba675SRob Herring	usb@c5000000 {
1099724ba675SRob Herring		compatible = "nvidia,tegra20-udc";
1100724ba675SRob Herring		status = "okay";
1101724ba675SRob Herring		dr_mode = "peripheral";
1102724ba675SRob Herring	};
1103724ba675SRob Herring
1104724ba675SRob Herring	usb-phy@c5000000 {
1105724ba675SRob Herring		status = "okay";
1106724ba675SRob Herring		dr_mode = "peripheral";
1107724ba675SRob Herring		nvidia,xcvr-setup-use-fuses;
1108724ba675SRob Herring		nvidia,xcvr-lsfslew = <2>;
1109724ba675SRob Herring		nvidia,xcvr-lsrslew = <2>;
1110724ba675SRob Herring	};
1111724ba675SRob Herring
1112724ba675SRob Herring	usb@c5008000 {
1113724ba675SRob Herring		status = "okay";
1114724ba675SRob Herring	};
1115724ba675SRob Herring
1116724ba675SRob Herring	usb-phy@c5008000 {
1117724ba675SRob Herring		status = "okay";
1118724ba675SRob Herring		nvidia,xcvr-setup-use-fuses;
1119724ba675SRob Herring		nvidia,xcvr-lsfslew = <2>;
1120724ba675SRob Herring		nvidia,xcvr-lsrslew = <2>;
1121724ba675SRob Herring		vbus-supply = <&vdd_5v0_sys>;
1122724ba675SRob Herring	};
1123724ba675SRob Herring
1124724ba675SRob Herring	sdmmc1: mmc@c8000000 {
1125724ba675SRob Herring		status = "okay";
1126724ba675SRob Herring
1127724ba675SRob Herring		#address-cells = <1>;
1128724ba675SRob Herring		#size-cells = <0>;
1129724ba675SRob Herring
1130724ba675SRob Herring		assigned-clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
1131724ba675SRob Herring		assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
1132724ba675SRob Herring		assigned-clock-rates = <50000000>;
1133724ba675SRob Herring
1134724ba675SRob Herring		max-frequency = <50000000>;
1135724ba675SRob Herring		keep-power-in-suspend;
1136724ba675SRob Herring		bus-width = <4>;
1137724ba675SRob Herring		non-removable;
1138724ba675SRob Herring
1139724ba675SRob Herring		mmc-pwrseq = <&brcm_wifi_pwrseq>;
1140724ba675SRob Herring		vmmc-supply = <&vdd_3v3_sys>;
1141724ba675SRob Herring		vqmmc-supply = <&vdd_1v8_sys>;
1142724ba675SRob Herring
1143724ba675SRob Herring		/* Azurewave AW-NH611 BCM4329 */
1144724ba675SRob Herring		wifi@1 {
1145724ba675SRob Herring			reg = <1>;
1146724ba675SRob Herring			compatible = "brcm,bcm4329-fmac";
1147724ba675SRob Herring			interrupt-parent = <&gpio>;
1148724ba675SRob Herring			interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
1149724ba675SRob Herring			interrupt-names = "host-wake";
1150724ba675SRob Herring		};
1151724ba675SRob Herring	};
1152724ba675SRob Herring
1153724ba675SRob Herring	sdmmc3: mmc@c8000400 {
1154724ba675SRob Herring		status = "okay";
1155724ba675SRob Herring		bus-width = <4>;
1156724ba675SRob Herring		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1157724ba675SRob Herring		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
1158724ba675SRob Herring		vmmc-supply = <&vdd_3v3_sys>;
1159724ba675SRob Herring		vqmmc-supply = <&vdd_3v3_sys>;
1160724ba675SRob Herring	};
1161724ba675SRob Herring
1162724ba675SRob Herring	sdmmc4: mmc@c8000600 {
1163724ba675SRob Herring		status = "okay";
1164724ba675SRob Herring		bus-width = <8>;
1165724ba675SRob Herring		vmmc-supply = <&vcore_emmc>;
1166724ba675SRob Herring		vqmmc-supply = <&vdd_3v3_sys>;
1167724ba675SRob Herring		non-removable;
1168724ba675SRob Herring	};
1169724ba675SRob Herring
1170724ba675SRob Herring	mains: ac-adapter-detect {
1171724ba675SRob Herring		compatible = "gpio-charger";
1172724ba675SRob Herring		charger-type = "mains";
1173724ba675SRob Herring		gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
1174724ba675SRob Herring	};
1175724ba675SRob Herring
1176724ba675SRob Herring	backlight: backlight {
1177724ba675SRob Herring		compatible = "pwm-backlight";
1178724ba675SRob Herring
1179724ba675SRob Herring		enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
1180724ba675SRob Herring		power-supply = <&vdd_3v3_sys>;
1181724ba675SRob Herring		pwms = <&pwm 2 41667>;
1182724ba675SRob Herring
1183724ba675SRob Herring		brightness-levels = <7 255>;
1184724ba675SRob Herring		num-interpolated-steps = <248>;
1185724ba675SRob Herring		default-brightness-level = <20>;
1186724ba675SRob Herring	};
1187724ba675SRob Herring
1188724ba675SRob Herring	bat1010: battery-2s1p {
1189724ba675SRob Herring		compatible = "simple-battery";
1190724ba675SRob Herring		charge-full-design-microamp-hours = <3260000>;
1191724ba675SRob Herring		energy-full-design-microwatt-hours = <24000000>;
1192724ba675SRob Herring		operating-range-celsius = <0 40>;
1193724ba675SRob Herring	};
1194724ba675SRob Herring
1195724ba675SRob Herring	/* PMIC has a built-in 32KHz oscillator which is used by PMC */
1196724ba675SRob Herring	clk32k_in: clock-32k-in {
1197724ba675SRob Herring		compatible = "fixed-clock";
1198724ba675SRob Herring		#clock-cells = <0>;
1199724ba675SRob Herring		clock-frequency = <32768>;
1200724ba675SRob Herring		clock-output-names = "tps658621-out32k";
1201724ba675SRob Herring	};
1202724ba675SRob Herring
1203724ba675SRob Herring	/*
1204724ba675SRob Herring	 * This standalone onboard fixed-clock always-ON 32KHz
1205724ba675SRob Herring	 * oscillator is used as a reference clock-source by the
1206724ba675SRob Herring	 * Azurewave WiFi/BT module.
1207724ba675SRob Herring	 */
1208724ba675SRob Herring	rtc_32k_wifi: clock-32k-wifi {
1209724ba675SRob Herring		compatible = "fixed-clock";
1210724ba675SRob Herring		#clock-cells = <0>;
1211724ba675SRob Herring		clock-frequency = <32768>;
1212724ba675SRob Herring		clock-output-names = "kk3270032";
1213724ba675SRob Herring	};
1214724ba675SRob Herring
1215724ba675SRob Herring	cpus {
1216724ba675SRob Herring		cpu0: cpu@0 {
1217724ba675SRob Herring			cpu-supply = <&vdd_cpu>;
1218724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
1219724ba675SRob Herring			#cooling-cells = <2>;
1220724ba675SRob Herring		};
1221724ba675SRob Herring
1222724ba675SRob Herring		cpu1: cpu@1 {
1223724ba675SRob Herring			cpu-supply = <&vdd_cpu>;
1224724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
1225724ba675SRob Herring			#cooling-cells = <2>;
1226724ba675SRob Herring		};
1227724ba675SRob Herring	};
1228724ba675SRob Herring
1229724ba675SRob Herring	display-panel {
1230724ba675SRob Herring		compatible = "auo,b101ew05", "panel-lvds";
1231724ba675SRob Herring
1232724ba675SRob Herring		ddc-i2c-bus = <&panel_ddc>;
1233724ba675SRob Herring		power-supply = <&vdd_pnl>;
1234724ba675SRob Herring		backlight = <&backlight>;
1235724ba675SRob Herring
1236724ba675SRob Herring		width-mm = <218>;
1237724ba675SRob Herring		height-mm = <135>;
1238724ba675SRob Herring
1239724ba675SRob Herring		data-mapping = "jeida-18";
1240724ba675SRob Herring
1241724ba675SRob Herring		panel-timing {
1242724ba675SRob Herring			clock-frequency = <71200000>;
1243724ba675SRob Herring			hactive = <1280>;
1244724ba675SRob Herring			vactive = <800>;
1245724ba675SRob Herring			hfront-porch = <8>;
1246724ba675SRob Herring			hback-porch = <18>;
1247724ba675SRob Herring			hsync-len = <184>;
1248724ba675SRob Herring			vsync-len = <3>;
1249724ba675SRob Herring			vfront-porch = <4>;
1250724ba675SRob Herring			vback-porch = <8>;
1251724ba675SRob Herring		};
1252724ba675SRob Herring
1253724ba675SRob Herring		port {
1254724ba675SRob Herring			panel_input: endpoint {
1255724ba675SRob Herring				remote-endpoint = <&lvds_encoder_output>;
1256724ba675SRob Herring			};
1257724ba675SRob Herring		};
1258724ba675SRob Herring	};
1259724ba675SRob Herring
1260724ba675SRob Herring	gpio-keys {
1261724ba675SRob Herring		compatible = "gpio-keys";
1262724ba675SRob Herring
1263724ba675SRob Herring		key-power {
1264724ba675SRob Herring			label = "Power";
1265724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
1266724ba675SRob Herring			linux,code = <KEY_POWER>;
1267724ba675SRob Herring			debounce-interval = <10>;
1268724ba675SRob Herring			wakeup-event-action = <EV_ACT_ASSERTED>;
1269724ba675SRob Herring			wakeup-source;
1270724ba675SRob Herring		};
1271724ba675SRob Herring
1272724ba675SRob Herring		key-rotation-lock {
1273724ba675SRob Herring			label = "Rotate-lock";
1274724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_HIGH>;
1275724ba675SRob Herring			linux,code = <SW_ROTATE_LOCK>;
1276724ba675SRob Herring			linux,input-type = <EV_SW>;
1277724ba675SRob Herring			debounce-interval = <10>;
1278724ba675SRob Herring		};
1279724ba675SRob Herring
1280724ba675SRob Herring		key-volume-down {
1281724ba675SRob Herring			label = "Volume Down";
1282724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
1283724ba675SRob Herring			linux,code = <KEY_VOLUMEDOWN>;
1284724ba675SRob Herring			debounce-interval = <10>;
1285724ba675SRob Herring			wakeup-event-action = <EV_ACT_ASSERTED>;
1286724ba675SRob Herring			wakeup-source;
1287724ba675SRob Herring		};
1288724ba675SRob Herring
1289724ba675SRob Herring		key-volume-up {
1290724ba675SRob Herring			label = "Volume Up";
1291724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
1292724ba675SRob Herring			linux,code = <KEY_VOLUMEUP>;
1293724ba675SRob Herring			debounce-interval = <10>;
1294724ba675SRob Herring			wakeup-event-action = <EV_ACT_ASSERTED>;
1295724ba675SRob Herring			wakeup-source;
1296724ba675SRob Herring		};
1297724ba675SRob Herring	};
1298724ba675SRob Herring
1299724ba675SRob Herring	haptic-feedback {
1300724ba675SRob Herring		compatible = "gpio-vibrator";
1301724ba675SRob Herring		enable-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
1302724ba675SRob Herring		vcc-supply = <&vdd_3v3_sys>;
1303724ba675SRob Herring	};
1304724ba675SRob Herring
1305724ba675SRob Herring	i2cmux {
1306724ba675SRob Herring		compatible = "i2c-mux-pinctrl";
1307724ba675SRob Herring		#address-cells = <1>;
1308724ba675SRob Herring		#size-cells = <0>;
1309724ba675SRob Herring
1310724ba675SRob Herring		i2c-parent = <&{/i2c@7000c400}>;
1311724ba675SRob Herring
1312724ba675SRob Herring		pinctrl-names = "ddc", "pta", "idle";
1313724ba675SRob Herring		pinctrl-0 = <&state_i2cmux_ddc>;
1314724ba675SRob Herring		pinctrl-1 = <&state_i2cmux_pta>;
1315724ba675SRob Herring		pinctrl-2 = <&state_i2cmux_idle>;
1316724ba675SRob Herring
1317724ba675SRob Herring		hdmi_ddc: i2c@0 {
1318724ba675SRob Herring			reg = <0>;
1319724ba675SRob Herring			#address-cells = <1>;
1320724ba675SRob Herring			#size-cells = <0>;
1321724ba675SRob Herring		};
1322724ba675SRob Herring
1323724ba675SRob Herring		panel_ddc: i2c@1 {
1324724ba675SRob Herring			reg = <1>;
1325724ba675SRob Herring			#address-cells = <1>;
1326724ba675SRob Herring			#size-cells = <0>;
1327724ba675SRob Herring
1328724ba675SRob Herring			embedded-controller@58 {
1329724ba675SRob Herring				compatible = "acer,a500-iconia-ec", "ene,kb930";
1330724ba675SRob Herring				reg = <0x58>;
1331724ba675SRob Herring
1332724ba675SRob Herring				system-power-controller;
1333724ba675SRob Herring
1334724ba675SRob Herring				monitored-battery = <&bat1010>;
1335724ba675SRob Herring				power-supplies = <&mains>;
1336724ba675SRob Herring			};
1337724ba675SRob Herring		};
1338724ba675SRob Herring	};
1339724ba675SRob Herring
1340724ba675SRob Herring	lvds-encoder {
1341724ba675SRob Herring		compatible = "ti,sn75lvds83", "lvds-encoder";
1342724ba675SRob Herring
1343724ba675SRob Herring		powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
1344724ba675SRob Herring		power-supply = <&vdd_3v3_sys>;
1345724ba675SRob Herring
1346724ba675SRob Herring		ports {
1347724ba675SRob Herring			#address-cells = <1>;
1348724ba675SRob Herring			#size-cells = <0>;
1349724ba675SRob Herring
1350724ba675SRob Herring			port@0 {
1351724ba675SRob Herring				reg = <0>;
1352724ba675SRob Herring
1353724ba675SRob Herring				lvds_encoder_input: endpoint {
1354724ba675SRob Herring					remote-endpoint = <&lcd_output>;
1355724ba675SRob Herring				};
1356724ba675SRob Herring			};
1357724ba675SRob Herring
1358724ba675SRob Herring			port@1 {
1359724ba675SRob Herring				reg = <1>;
1360724ba675SRob Herring
1361724ba675SRob Herring				lvds_encoder_output: endpoint {
1362724ba675SRob Herring					remote-endpoint = <&panel_input>;
1363724ba675SRob Herring				};
1364724ba675SRob Herring			};
1365724ba675SRob Herring		};
1366724ba675SRob Herring	};
1367724ba675SRob Herring
1368724ba675SRob Herring	opp-table-emc {
1369724ba675SRob Herring		/delete-node/ opp-666000000;
1370724ba675SRob Herring		/delete-node/ opp-760000000;
1371724ba675SRob Herring	};
1372724ba675SRob Herring
1373724ba675SRob Herring	vdd_5v0_sys: regulator-5v0 {
1374724ba675SRob Herring		compatible = "regulator-fixed";
1375724ba675SRob Herring		regulator-name = "vdd_5v0";
1376724ba675SRob Herring		regulator-min-microvolt = <5000000>;
1377724ba675SRob Herring		regulator-max-microvolt = <5000000>;
1378724ba675SRob Herring		regulator-always-on;
1379724ba675SRob Herring	};
1380724ba675SRob Herring
1381724ba675SRob Herring	vdd_3v3_sys: regulator-3v3 {
1382724ba675SRob Herring		compatible = "regulator-fixed";
1383724ba675SRob Herring		regulator-name = "vdd_3v3_vs";
1384724ba675SRob Herring		regulator-min-microvolt = <3300000>;
1385724ba675SRob Herring		regulator-max-microvolt = <3300000>;
1386724ba675SRob Herring		regulator-always-on;
1387724ba675SRob Herring		vin-supply = <&vdd_5v0_sys>;
1388724ba675SRob Herring	};
1389724ba675SRob Herring
1390724ba675SRob Herring	vdd_1v8_sys: regulator-1v8 {
1391724ba675SRob Herring		compatible = "regulator-fixed";
1392724ba675SRob Herring		regulator-name = "vdd_1v8_vs";
1393724ba675SRob Herring		regulator-min-microvolt = <1800000>;
1394724ba675SRob Herring		regulator-max-microvolt = <1800000>;
1395724ba675SRob Herring		regulator-always-on;
1396724ba675SRob Herring		vin-supply = <&vdd_5v0_sys>;
1397724ba675SRob Herring	};
1398724ba675SRob Herring
1399724ba675SRob Herring	vdd_pnl: regulator-panel {
1400724ba675SRob Herring		compatible = "regulator-fixed";
1401724ba675SRob Herring		regulator-name = "vdd_panel";
1402724ba675SRob Herring		regulator-min-microvolt = <3300000>;
1403724ba675SRob Herring		regulator-max-microvolt = <3300000>;
1404724ba675SRob Herring		regulator-enable-ramp-delay = <300000>;
1405724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
1406724ba675SRob Herring		enable-active-high;
1407724ba675SRob Herring		vin-supply = <&vdd_5v0_sys>;
1408724ba675SRob Herring	};
1409724ba675SRob Herring
1410724ba675SRob Herring	sound {
1411724ba675SRob Herring		compatible = "nvidia,tegra-audio-wm8903-picasso",
1412724ba675SRob Herring			     "nvidia,tegra-audio-wm8903";
1413724ba675SRob Herring		nvidia,model = "Acer Iconia Tab A500 WM8903";
1414724ba675SRob Herring
1415724ba675SRob Herring		nvidia,audio-routing =
1416724ba675SRob Herring			"Headphone Jack", "HPOUTR",
1417724ba675SRob Herring			"Headphone Jack", "HPOUTL",
1418724ba675SRob Herring			"Int Spk", "LINEOUTL",
1419724ba675SRob Herring			"Int Spk", "LINEOUTR",
1420724ba675SRob Herring			"Mic Jack", "MICBIAS",
1421724ba675SRob Herring			"IN2L", "Mic Jack",
1422724ba675SRob Herring			"IN2R", "Mic Jack",
1423724ba675SRob Herring			"IN1L", "Int Mic",
1424724ba675SRob Herring			"IN1R", "Int Mic";
1425724ba675SRob Herring
1426724ba675SRob Herring		nvidia,i2s-controller = <&tegra_i2s1>;
1427724ba675SRob Herring		nvidia,audio-codec = <&wm8903>;
1428724ba675SRob Herring
1429724ba675SRob Herring		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
1430724ba675SRob Herring		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
1431724ba675SRob Herring		nvidia,int-mic-en-gpios = <&wm8903 1 GPIO_ACTIVE_HIGH>;
1432724ba675SRob Herring		nvidia,headset;
1433724ba675SRob Herring
1434724ba675SRob Herring		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
1435724ba675SRob Herring			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
1436724ba675SRob Herring			 <&tegra_car TEGRA20_CLK_CDEV1>;
1437724ba675SRob Herring		clock-names = "pll_a", "pll_a_out0", "mclk";
1438724ba675SRob Herring	};
1439724ba675SRob Herring
1440724ba675SRob Herring	thermal-zones {
1441724ba675SRob Herring		/*
1442724ba675SRob Herring		 * NCT1008 has two sensors:
1443724ba675SRob Herring		 *
1444724ba675SRob Herring		 *	0: internal that monitors ambient/skin temperature
1445724ba675SRob Herring		 *	1: external that is connected to the CPU's diode
1446724ba675SRob Herring		 *
1447724ba675SRob Herring		 * Ideally we should use userspace thermal governor,
1448724ba675SRob Herring		 * but it's a much more complex solution.  The "skin"
1449724ba675SRob Herring		 * zone is a simpler solution which prevents A500 from
1450724ba675SRob Herring		 * getting too hot from a user's tactile perspective.
1451724ba675SRob Herring		 * The CPU zone is intended to protect silicon from damage.
1452724ba675SRob Herring		 */
1453724ba675SRob Herring
1454724ba675SRob Herring		skin-thermal {
1455724ba675SRob Herring			polling-delay-passive = <1000>; /* milliseconds */
1456724ba675SRob Herring			polling-delay = <5000>; /* milliseconds */
1457724ba675SRob Herring
1458724ba675SRob Herring			thermal-sensors = <&nct1008 0>;
1459724ba675SRob Herring
1460724ba675SRob Herring			trips {
1461724ba675SRob Herring				trip0: skin-alert {
1462724ba675SRob Herring					/* start throttling at 60C */
1463724ba675SRob Herring					temperature = <60000>;
1464724ba675SRob Herring					hysteresis = <200>;
1465724ba675SRob Herring					type = "passive";
1466724ba675SRob Herring				};
1467724ba675SRob Herring
1468724ba675SRob Herring				trip1: skin-crit {
1469724ba675SRob Herring					/* shut down at 70C */
1470724ba675SRob Herring					temperature = <70000>;
1471724ba675SRob Herring					hysteresis = <2000>;
1472724ba675SRob Herring					type = "critical";
1473724ba675SRob Herring				};
1474724ba675SRob Herring			};
1475724ba675SRob Herring
1476724ba675SRob Herring			cooling-maps {
1477724ba675SRob Herring				map0 {
1478724ba675SRob Herring					trip = <&trip0>;
1479724ba675SRob Herring					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1480724ba675SRob Herring							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1481724ba675SRob Herring				};
1482724ba675SRob Herring			};
1483724ba675SRob Herring		};
1484724ba675SRob Herring
1485724ba675SRob Herring		cpu-thermal {
1486724ba675SRob Herring			polling-delay-passive = <1000>; /* milliseconds */
1487724ba675SRob Herring			polling-delay = <5000>; /* milliseconds */
1488724ba675SRob Herring
1489724ba675SRob Herring			thermal-sensors = <&nct1008 1>;
1490724ba675SRob Herring
1491724ba675SRob Herring			trips {
1492724ba675SRob Herring				trip2: cpu-alert {
1493724ba675SRob Herring					/* throttle at 85C until temperature drops to 84.8C */
1494724ba675SRob Herring					temperature = <85000>;
1495724ba675SRob Herring					hysteresis = <200>;
1496724ba675SRob Herring					type = "passive";
1497724ba675SRob Herring				};
1498724ba675SRob Herring
1499724ba675SRob Herring				trip3: cpu-crit {
1500724ba675SRob Herring					/* shut down at 90C */
1501724ba675SRob Herring					temperature = <90000>;
1502724ba675SRob Herring					hysteresis = <2000>;
1503724ba675SRob Herring					type = "critical";
1504724ba675SRob Herring				};
1505724ba675SRob Herring			};
1506724ba675SRob Herring
1507724ba675SRob Herring			cooling-maps {
1508724ba675SRob Herring				map1 {
1509724ba675SRob Herring					trip = <&trip2>;
1510724ba675SRob Herring					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1511724ba675SRob Herring							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1512724ba675SRob Herring				};
1513724ba675SRob Herring			};
1514724ba675SRob Herring		};
1515724ba675SRob Herring	};
1516724ba675SRob Herring
1517724ba675SRob Herring	brcm_wifi_pwrseq: wifi-pwrseq {
1518724ba675SRob Herring		compatible = "mmc-pwrseq-simple";
1519724ba675SRob Herring
1520724ba675SRob Herring		clocks = <&rtc_32k_wifi>;
1521724ba675SRob Herring		clock-names = "ext_clock";
1522724ba675SRob Herring
1523724ba675SRob Herring		reset-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
1524724ba675SRob Herring		post-power-on-delay-ms = <300>;
1525724ba675SRob Herring		power-off-delay-us = <300>;
1526724ba675SRob Herring	};
1527724ba675SRob Herring};
1528