1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2*724ba675SRob Herring/dts-v1/; 3*724ba675SRob Herring 4*724ba675SRob Herring#include "tegra124-nyan.dtsi" 5*724ba675SRob Herring 6*724ba675SRob Herring#include "tegra124-nyan-blaze-emc.dtsi" 7*724ba675SRob Herring 8*724ba675SRob Herring/ { 9*724ba675SRob Herring model = "HP Chromebook 14"; 10*724ba675SRob Herring compatible = "google,nyan-blaze-rev10", "google,nyan-blaze-rev9", 11*724ba675SRob Herring "google,nyan-blaze-rev8", "google,nyan-blaze-rev7", 12*724ba675SRob Herring "google,nyan-blaze-rev6", "google,nyan-blaze-rev5", 13*724ba675SRob Herring "google,nyan-blaze-rev4", "google,nyan-blaze-rev3", 14*724ba675SRob Herring "google,nyan-blaze-rev2", "google,nyan-blaze-rev1", 15*724ba675SRob Herring "google,nyan-blaze-rev0", "google,nyan-blaze", 16*724ba675SRob Herring "google,nyan", "nvidia,tegra124"; 17*724ba675SRob Herring 18*724ba675SRob Herring host1x@50000000 { 19*724ba675SRob Herring dpaux@545c0000 { 20*724ba675SRob Herring aux-bus { 21*724ba675SRob Herring panel: panel { 22*724ba675SRob Herring compatible = "samsung,ltn140at29-301"; 23*724ba675SRob Herring power-supply = <&vdd_3v3_panel>; 24*724ba675SRob Herring backlight = <&backlight>; 25*724ba675SRob Herring }; 26*724ba675SRob Herring }; 27*724ba675SRob Herring }; 28*724ba675SRob Herring }; 29*724ba675SRob Herring 30*724ba675SRob Herring pinmux@70000868 { 31*724ba675SRob Herring pinctrl-names = "default"; 32*724ba675SRob Herring pinctrl-0 = <&pinmux_default>; 33*724ba675SRob Herring 34*724ba675SRob Herring pinmux_default: pinmux { 35*724ba675SRob Herring clk_32k_out_pa0 { 36*724ba675SRob Herring nvidia,pins = "clk_32k_out_pa0"; 37*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 38*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 39*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 40*724ba675SRob Herring }; 41*724ba675SRob Herring uart3_cts_n_pa1 { 42*724ba675SRob Herring nvidia,pins = "uart3_cts_n_pa1"; 43*724ba675SRob Herring nvidia,function = "gmi"; 44*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 45*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 46*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 47*724ba675SRob Herring }; 48*724ba675SRob Herring dap2_fs_pa2 { 49*724ba675SRob Herring nvidia,pins = "dap2_fs_pa2"; 50*724ba675SRob Herring nvidia,function = "i2s1"; 51*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 52*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 53*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 54*724ba675SRob Herring }; 55*724ba675SRob Herring dap2_sclk_pa3 { 56*724ba675SRob Herring nvidia,pins = "dap2_sclk_pa3"; 57*724ba675SRob Herring nvidia,function = "i2s1"; 58*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 59*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 60*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 61*724ba675SRob Herring }; 62*724ba675SRob Herring dap2_din_pa4 { 63*724ba675SRob Herring nvidia,pins = "dap2_din_pa4"; 64*724ba675SRob Herring nvidia,function = "i2s1"; 65*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 66*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 67*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 68*724ba675SRob Herring }; 69*724ba675SRob Herring dap2_dout_pa5 { 70*724ba675SRob Herring nvidia,pins = "dap2_dout_pa5"; 71*724ba675SRob Herring nvidia,function = "i2s1"; 72*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 73*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 74*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 75*724ba675SRob Herring }; 76*724ba675SRob Herring sdmmc3_clk_pa6 { 77*724ba675SRob Herring nvidia,pins = "sdmmc3_clk_pa6"; 78*724ba675SRob Herring nvidia,function = "sdmmc3"; 79*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 80*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 81*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 82*724ba675SRob Herring }; 83*724ba675SRob Herring sdmmc3_cmd_pa7 { 84*724ba675SRob Herring nvidia,pins = "sdmmc3_cmd_pa7"; 85*724ba675SRob Herring nvidia,function = "sdmmc3"; 86*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 87*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 88*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 89*724ba675SRob Herring }; 90*724ba675SRob Herring pb0 { 91*724ba675SRob Herring nvidia,pins = "pb0"; 92*724ba675SRob Herring nvidia,function = "rsvd2"; 93*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 94*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 95*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 96*724ba675SRob Herring }; 97*724ba675SRob Herring pb1 { 98*724ba675SRob Herring nvidia,pins = "pb1"; 99*724ba675SRob Herring nvidia,function = "rsvd2"; 100*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 101*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 102*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 103*724ba675SRob Herring }; 104*724ba675SRob Herring sdmmc3_dat3_pb4 { 105*724ba675SRob Herring nvidia,pins = "sdmmc3_dat3_pb4"; 106*724ba675SRob Herring nvidia,function = "sdmmc3"; 107*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 108*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 109*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 110*724ba675SRob Herring }; 111*724ba675SRob Herring sdmmc3_dat2_pb5 { 112*724ba675SRob Herring nvidia,pins = "sdmmc3_dat2_pb5"; 113*724ba675SRob Herring nvidia,function = "sdmmc3"; 114*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 115*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 116*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 117*724ba675SRob Herring }; 118*724ba675SRob Herring sdmmc3_dat1_pb6 { 119*724ba675SRob Herring nvidia,pins = "sdmmc3_dat1_pb6"; 120*724ba675SRob Herring nvidia,function = "sdmmc3"; 121*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 122*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 123*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 124*724ba675SRob Herring }; 125*724ba675SRob Herring sdmmc3_dat0_pb7 { 126*724ba675SRob Herring nvidia,pins = "sdmmc3_dat0_pb7"; 127*724ba675SRob Herring nvidia,function = "sdmmc3"; 128*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 129*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 130*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 131*724ba675SRob Herring }; 132*724ba675SRob Herring uart3_rts_n_pc0 { 133*724ba675SRob Herring nvidia,pins = "uart3_rts_n_pc0"; 134*724ba675SRob Herring nvidia,function = "gmi"; 135*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 136*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 137*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 138*724ba675SRob Herring }; 139*724ba675SRob Herring uart2_txd_pc2 { 140*724ba675SRob Herring nvidia,pins = "uart2_txd_pc2"; 141*724ba675SRob Herring nvidia,function = "irda"; 142*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 143*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 144*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 145*724ba675SRob Herring }; 146*724ba675SRob Herring uart2_rxd_pc3 { 147*724ba675SRob Herring nvidia,pins = "uart2_rxd_pc3"; 148*724ba675SRob Herring nvidia,function = "irda"; 149*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 150*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 151*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 152*724ba675SRob Herring }; 153*724ba675SRob Herring gen1_i2c_scl_pc4 { 154*724ba675SRob Herring nvidia,pins = "gen1_i2c_scl_pc4"; 155*724ba675SRob Herring nvidia,function = "i2c1"; 156*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 157*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 158*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 159*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 160*724ba675SRob Herring }; 161*724ba675SRob Herring gen1_i2c_sda_pc5 { 162*724ba675SRob Herring nvidia,pins = "gen1_i2c_sda_pc5"; 163*724ba675SRob Herring nvidia,function = "i2c1"; 164*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 165*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 166*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 167*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 168*724ba675SRob Herring }; 169*724ba675SRob Herring pc7 { 170*724ba675SRob Herring nvidia,pins = "pc7"; 171*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 172*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 173*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 174*724ba675SRob Herring }; 175*724ba675SRob Herring pg0 { 176*724ba675SRob Herring nvidia,pins = "pg0"; 177*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 178*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 179*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 180*724ba675SRob Herring }; 181*724ba675SRob Herring pg1 { 182*724ba675SRob Herring nvidia,pins = "pg1"; 183*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 184*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 185*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 186*724ba675SRob Herring }; 187*724ba675SRob Herring pg2 { 188*724ba675SRob Herring nvidia,pins = "pg2"; 189*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 190*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 191*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 192*724ba675SRob Herring }; 193*724ba675SRob Herring pg3 { 194*724ba675SRob Herring nvidia,pins = "pg3"; 195*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 196*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 197*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 198*724ba675SRob Herring }; 199*724ba675SRob Herring pg4 { 200*724ba675SRob Herring nvidia,pins = "pg4"; 201*724ba675SRob Herring nvidia,function = "spi4"; 202*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 203*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 204*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 205*724ba675SRob Herring }; 206*724ba675SRob Herring pg5 { 207*724ba675SRob Herring nvidia,pins = "pg5"; 208*724ba675SRob Herring nvidia,function = "spi4"; 209*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 210*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 211*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 212*724ba675SRob Herring }; 213*724ba675SRob Herring pg6 { 214*724ba675SRob Herring nvidia,pins = "pg6"; 215*724ba675SRob Herring nvidia,function = "spi4"; 216*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 217*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 218*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 219*724ba675SRob Herring }; 220*724ba675SRob Herring pg7 { 221*724ba675SRob Herring nvidia,pins = "pg7"; 222*724ba675SRob Herring nvidia,function = "spi4"; 223*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 224*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 225*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 226*724ba675SRob Herring }; 227*724ba675SRob Herring ph0 { 228*724ba675SRob Herring nvidia,pins = "ph0"; 229*724ba675SRob Herring nvidia,function = "gmi"; 230*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 231*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 232*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 233*724ba675SRob Herring }; 234*724ba675SRob Herring ph1 { 235*724ba675SRob Herring nvidia,pins = "ph1"; 236*724ba675SRob Herring nvidia,function = "pwm1"; 237*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 238*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 239*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 240*724ba675SRob Herring }; 241*724ba675SRob Herring ph2 { 242*724ba675SRob Herring nvidia,pins = "ph2"; 243*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 244*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 245*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 246*724ba675SRob Herring }; 247*724ba675SRob Herring ph3 { 248*724ba675SRob Herring nvidia,pins = "ph3"; 249*724ba675SRob Herring nvidia,function = "gmi"; 250*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 251*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 252*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 253*724ba675SRob Herring }; 254*724ba675SRob Herring ph4 { 255*724ba675SRob Herring nvidia,pins = "ph4"; 256*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 257*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 258*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 259*724ba675SRob Herring }; 260*724ba675SRob Herring ph5 { 261*724ba675SRob Herring nvidia,pins = "ph5"; 262*724ba675SRob Herring nvidia,function = "rsvd2"; 263*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 264*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 265*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 266*724ba675SRob Herring }; 267*724ba675SRob Herring ph6 { 268*724ba675SRob Herring nvidia,pins = "ph6"; 269*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 270*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 271*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 272*724ba675SRob Herring }; 273*724ba675SRob Herring ph7 { 274*724ba675SRob Herring nvidia,pins = "ph7"; 275*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 276*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 277*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 278*724ba675SRob Herring }; 279*724ba675SRob Herring pi0 { 280*724ba675SRob Herring nvidia,pins = "pi0"; 281*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 282*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 283*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 284*724ba675SRob Herring }; 285*724ba675SRob Herring pi1 { 286*724ba675SRob Herring nvidia,pins = "pi1"; 287*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 288*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 289*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 290*724ba675SRob Herring }; 291*724ba675SRob Herring pi2 { 292*724ba675SRob Herring nvidia,pins = "pi2"; 293*724ba675SRob Herring nvidia,function = "rsvd4"; 294*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 295*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 296*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 297*724ba675SRob Herring }; 298*724ba675SRob Herring pi3 { 299*724ba675SRob Herring nvidia,pins = "pi3"; 300*724ba675SRob Herring nvidia,function = "spi4"; 301*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 302*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 303*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 304*724ba675SRob Herring }; 305*724ba675SRob Herring pi4 { 306*724ba675SRob Herring nvidia,pins = "pi4"; 307*724ba675SRob Herring nvidia,function = "gmi"; 308*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 309*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 310*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 311*724ba675SRob Herring }; 312*724ba675SRob Herring pi5 { 313*724ba675SRob Herring nvidia,pins = "pi5"; 314*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 315*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 316*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 317*724ba675SRob Herring }; 318*724ba675SRob Herring pi6 { 319*724ba675SRob Herring nvidia,pins = "pi6"; 320*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 321*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 322*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 323*724ba675SRob Herring }; 324*724ba675SRob Herring pi7 { 325*724ba675SRob Herring nvidia,pins = "pi7"; 326*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 327*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 328*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 329*724ba675SRob Herring }; 330*724ba675SRob Herring pj0 { 331*724ba675SRob Herring nvidia,pins = "pj0"; 332*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 333*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 334*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 335*724ba675SRob Herring }; 336*724ba675SRob Herring pj2 { 337*724ba675SRob Herring nvidia,pins = "pj2"; 338*724ba675SRob Herring nvidia,function = "rsvd1"; 339*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 340*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 341*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 342*724ba675SRob Herring }; 343*724ba675SRob Herring uart2_cts_n_pj5 { 344*724ba675SRob Herring nvidia,pins = "uart2_cts_n_pj5"; 345*724ba675SRob Herring nvidia,function = "gmi"; 346*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 347*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 348*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 349*724ba675SRob Herring }; 350*724ba675SRob Herring uart2_rts_n_pj6 { 351*724ba675SRob Herring nvidia,pins = "uart2_rts_n_pj6"; 352*724ba675SRob Herring nvidia,function = "gmi"; 353*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 354*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 355*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 356*724ba675SRob Herring }; 357*724ba675SRob Herring pj7 { 358*724ba675SRob Herring nvidia,pins = "pj7"; 359*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 360*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 361*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 362*724ba675SRob Herring }; 363*724ba675SRob Herring pk0 { 364*724ba675SRob Herring nvidia,pins = "pk0"; 365*724ba675SRob Herring nvidia,function = "rsvd1"; 366*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 367*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 368*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 369*724ba675SRob Herring }; 370*724ba675SRob Herring pk1 { 371*724ba675SRob Herring nvidia,pins = "pk1"; 372*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 373*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 374*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 375*724ba675SRob Herring }; 376*724ba675SRob Herring pk2 { 377*724ba675SRob Herring nvidia,pins = "pk2"; 378*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 379*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 380*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 381*724ba675SRob Herring }; 382*724ba675SRob Herring pk3 { 383*724ba675SRob Herring nvidia,pins = "pk3"; 384*724ba675SRob Herring nvidia,function = "gmi"; 385*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 386*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 387*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 388*724ba675SRob Herring }; 389*724ba675SRob Herring pk4 { 390*724ba675SRob Herring nvidia,pins = "pk4"; 391*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 392*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 393*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 394*724ba675SRob Herring }; 395*724ba675SRob Herring spdif_out_pk5 { 396*724ba675SRob Herring nvidia,pins = "spdif_out_pk5"; 397*724ba675SRob Herring nvidia,function = "rsvd2"; 398*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 399*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 400*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 401*724ba675SRob Herring }; 402*724ba675SRob Herring spdif_in_pk6 { 403*724ba675SRob Herring nvidia,pins = "spdif_in_pk6"; 404*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 405*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 406*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 407*724ba675SRob Herring }; 408*724ba675SRob Herring pk7 { 409*724ba675SRob Herring nvidia,pins = "pk7"; 410*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 411*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 412*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 413*724ba675SRob Herring }; 414*724ba675SRob Herring dap1_fs_pn0 { 415*724ba675SRob Herring nvidia,pins = "dap1_fs_pn0"; 416*724ba675SRob Herring nvidia,function = "rsvd4"; 417*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 418*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 419*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 420*724ba675SRob Herring }; 421*724ba675SRob Herring dap1_din_pn1 { 422*724ba675SRob Herring nvidia,pins = "dap1_din_pn1"; 423*724ba675SRob Herring nvidia,function = "rsvd4"; 424*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 425*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 426*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 427*724ba675SRob Herring }; 428*724ba675SRob Herring dap1_dout_pn2 { 429*724ba675SRob Herring nvidia,pins = "dap1_dout_pn2"; 430*724ba675SRob Herring nvidia,function = "i2s0"; 431*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 432*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 433*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 434*724ba675SRob Herring }; 435*724ba675SRob Herring dap1_sclk_pn3 { 436*724ba675SRob Herring nvidia,pins = "dap1_sclk_pn3"; 437*724ba675SRob Herring nvidia,function = "rsvd4"; 438*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 439*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 440*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 441*724ba675SRob Herring }; 442*724ba675SRob Herring usb_vbus_en0_pn4 { 443*724ba675SRob Herring nvidia,pins = "usb_vbus_en0_pn4"; 444*724ba675SRob Herring nvidia,function = "usb"; 445*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 446*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 447*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 448*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_DISABLE>; 449*724ba675SRob Herring }; 450*724ba675SRob Herring usb_vbus_en1_pn5 { 451*724ba675SRob Herring nvidia,pins = "usb_vbus_en1_pn5"; 452*724ba675SRob Herring nvidia,function = "usb"; 453*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 454*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 455*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 456*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_DISABLE>; 457*724ba675SRob Herring }; 458*724ba675SRob Herring hdmi_int_pn7 { 459*724ba675SRob Herring nvidia,pins = "hdmi_int_pn7"; 460*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 461*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 462*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 463*724ba675SRob Herring nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; 464*724ba675SRob Herring }; 465*724ba675SRob Herring ulpi_data7_po0 { 466*724ba675SRob Herring nvidia,pins = "ulpi_data7_po0"; 467*724ba675SRob Herring nvidia,function = "ulpi"; 468*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 469*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 470*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 471*724ba675SRob Herring }; 472*724ba675SRob Herring ulpi_data0_po1 { 473*724ba675SRob Herring nvidia,pins = "ulpi_data0_po1"; 474*724ba675SRob Herring nvidia,function = "ulpi"; 475*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 476*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 477*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 478*724ba675SRob Herring }; 479*724ba675SRob Herring ulpi_data1_po2 { 480*724ba675SRob Herring nvidia,pins = "ulpi_data1_po2"; 481*724ba675SRob Herring nvidia,function = "ulpi"; 482*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 483*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 484*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 485*724ba675SRob Herring }; 486*724ba675SRob Herring ulpi_data2_po3 { 487*724ba675SRob Herring nvidia,pins = "ulpi_data2_po3"; 488*724ba675SRob Herring nvidia,function = "ulpi"; 489*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 490*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 491*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 492*724ba675SRob Herring }; 493*724ba675SRob Herring ulpi_data3_po4 { 494*724ba675SRob Herring nvidia,pins = "ulpi_data3_po4"; 495*724ba675SRob Herring nvidia,function = "ulpi"; 496*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 497*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 498*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 499*724ba675SRob Herring }; 500*724ba675SRob Herring ulpi_data4_po5 { 501*724ba675SRob Herring nvidia,pins = "ulpi_data4_po5"; 502*724ba675SRob Herring nvidia,function = "ulpi"; 503*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 504*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 505*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 506*724ba675SRob Herring }; 507*724ba675SRob Herring ulpi_data5_po6 { 508*724ba675SRob Herring nvidia,pins = "ulpi_data5_po6"; 509*724ba675SRob Herring nvidia,function = "ulpi"; 510*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 511*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 512*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 513*724ba675SRob Herring }; 514*724ba675SRob Herring ulpi_data6_po7 { 515*724ba675SRob Herring nvidia,pins = "ulpi_data6_po7"; 516*724ba675SRob Herring nvidia,function = "ulpi"; 517*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 518*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 519*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 520*724ba675SRob Herring }; 521*724ba675SRob Herring dap3_fs_pp0 { 522*724ba675SRob Herring nvidia,pins = "dap3_fs_pp0"; 523*724ba675SRob Herring nvidia,function = "i2s2"; 524*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 525*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 526*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 527*724ba675SRob Herring }; 528*724ba675SRob Herring dap3_din_pp1 { 529*724ba675SRob Herring nvidia,pins = "dap3_din_pp1"; 530*724ba675SRob Herring nvidia,function = "i2s2"; 531*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 532*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 533*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 534*724ba675SRob Herring }; 535*724ba675SRob Herring dap3_dout_pp2 { 536*724ba675SRob Herring nvidia,pins = "dap3_dout_pp2"; 537*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 538*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 539*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 540*724ba675SRob Herring }; 541*724ba675SRob Herring dap3_sclk_pp3 { 542*724ba675SRob Herring nvidia,pins = "dap3_sclk_pp3"; 543*724ba675SRob Herring nvidia,function = "rsvd3"; 544*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 545*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 546*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 547*724ba675SRob Herring }; 548*724ba675SRob Herring dap4_fs_pp4 { 549*724ba675SRob Herring nvidia,pins = "dap4_fs_pp4"; 550*724ba675SRob Herring nvidia,function = "rsvd4"; 551*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 552*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 553*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 554*724ba675SRob Herring }; 555*724ba675SRob Herring dap4_din_pp5 { 556*724ba675SRob Herring nvidia,pins = "dap4_din_pp5"; 557*724ba675SRob Herring nvidia,function = "rsvd3"; 558*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 559*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 560*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 561*724ba675SRob Herring }; 562*724ba675SRob Herring dap4_dout_pp6 { 563*724ba675SRob Herring nvidia,pins = "dap4_dout_pp6"; 564*724ba675SRob Herring nvidia,function = "rsvd4"; 565*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 566*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 567*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 568*724ba675SRob Herring }; 569*724ba675SRob Herring dap4_sclk_pp7 { 570*724ba675SRob Herring nvidia,pins = "dap4_sclk_pp7"; 571*724ba675SRob Herring nvidia,function = "rsvd3"; 572*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 573*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 574*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 575*724ba675SRob Herring }; 576*724ba675SRob Herring kb_col0_pq0 { 577*724ba675SRob Herring nvidia,pins = "kb_col0_pq0"; 578*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 579*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 580*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 581*724ba675SRob Herring }; 582*724ba675SRob Herring kb_col1_pq1 { 583*724ba675SRob Herring nvidia,pins = "kb_col1_pq1"; 584*724ba675SRob Herring nvidia,function = "rsvd2"; 585*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 586*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 587*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 588*724ba675SRob Herring }; 589*724ba675SRob Herring kb_col2_pq2 { 590*724ba675SRob Herring nvidia,pins = "kb_col2_pq2"; 591*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 592*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 593*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 594*724ba675SRob Herring }; 595*724ba675SRob Herring kb_col3_pq3 { 596*724ba675SRob Herring nvidia,pins = "kb_col3_pq3"; 597*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 598*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 599*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 600*724ba675SRob Herring }; 601*724ba675SRob Herring kb_col4_pq4 { 602*724ba675SRob Herring nvidia,pins = "kb_col4_pq4"; 603*724ba675SRob Herring nvidia,function = "sdmmc3"; 604*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 605*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 606*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 607*724ba675SRob Herring }; 608*724ba675SRob Herring kb_col5_pq5 { 609*724ba675SRob Herring nvidia,pins = "kb_col5_pq5"; 610*724ba675SRob Herring nvidia,function = "rsvd2"; 611*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 612*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 613*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 614*724ba675SRob Herring }; 615*724ba675SRob Herring kb_col6_pq6 { 616*724ba675SRob Herring nvidia,pins = "kb_col6_pq6"; 617*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 618*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 619*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 620*724ba675SRob Herring }; 621*724ba675SRob Herring kb_col7_pq7 { 622*724ba675SRob Herring nvidia,pins = "kb_col7_pq7"; 623*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 624*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 625*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 626*724ba675SRob Herring }; 627*724ba675SRob Herring kb_row0_pr0 { 628*724ba675SRob Herring nvidia,pins = "kb_row0_pr0"; 629*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 630*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 631*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 632*724ba675SRob Herring }; 633*724ba675SRob Herring kb_row1_pr1 { 634*724ba675SRob Herring nvidia,pins = "kb_row1_pr1"; 635*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 636*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 637*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 638*724ba675SRob Herring }; 639*724ba675SRob Herring kb_row2_pr2 { 640*724ba675SRob Herring nvidia,pins = "kb_row2_pr2"; 641*724ba675SRob Herring nvidia,function = "rsvd2"; 642*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 643*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 644*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 645*724ba675SRob Herring }; 646*724ba675SRob Herring kb_row3_pr3 { 647*724ba675SRob Herring nvidia,pins = "kb_row3_pr3"; 648*724ba675SRob Herring nvidia,function = "kbc"; 649*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 650*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 651*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 652*724ba675SRob Herring }; 653*724ba675SRob Herring kb_row4_pr4 { 654*724ba675SRob Herring nvidia,pins = "kb_row4_pr4"; 655*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 656*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 657*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 658*724ba675SRob Herring }; 659*724ba675SRob Herring kb_row5_pr5 { 660*724ba675SRob Herring nvidia,pins = "kb_row5_pr5"; 661*724ba675SRob Herring nvidia,function = "rsvd3"; 662*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 663*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 664*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 665*724ba675SRob Herring }; 666*724ba675SRob Herring kb_row6_pr6 { 667*724ba675SRob Herring nvidia,pins = "kb_row6_pr6"; 668*724ba675SRob Herring nvidia,function = "kbc"; 669*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 670*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 671*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 672*724ba675SRob Herring }; 673*724ba675SRob Herring kb_row7_pr7 { 674*724ba675SRob Herring nvidia,pins = "kb_row7_pr7"; 675*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 676*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 677*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 678*724ba675SRob Herring }; 679*724ba675SRob Herring kb_row8_ps0 { 680*724ba675SRob Herring nvidia,pins = "kb_row8_ps0"; 681*724ba675SRob Herring nvidia,function = "rsvd2"; 682*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 683*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 684*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 685*724ba675SRob Herring }; 686*724ba675SRob Herring kb_row9_ps1 { 687*724ba675SRob Herring nvidia,pins = "kb_row9_ps1"; 688*724ba675SRob Herring nvidia,function = "uarta"; 689*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 690*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 691*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 692*724ba675SRob Herring }; 693*724ba675SRob Herring kb_row10_ps2 { 694*724ba675SRob Herring nvidia,pins = "kb_row10_ps2"; 695*724ba675SRob Herring nvidia,function = "uarta"; 696*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 697*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 698*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 699*724ba675SRob Herring }; 700*724ba675SRob Herring kb_row11_ps3 { 701*724ba675SRob Herring nvidia,pins = "kb_row11_ps3"; 702*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 703*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 704*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 705*724ba675SRob Herring }; 706*724ba675SRob Herring kb_row12_ps4 { 707*724ba675SRob Herring nvidia,pins = "kb_row12_ps4"; 708*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 709*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 710*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 711*724ba675SRob Herring }; 712*724ba675SRob Herring kb_row13_ps5 { 713*724ba675SRob Herring nvidia,pins = "kb_row13_ps5"; 714*724ba675SRob Herring nvidia,function = "rsvd2"; 715*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 716*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 717*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 718*724ba675SRob Herring }; 719*724ba675SRob Herring kb_row14_ps6 { 720*724ba675SRob Herring nvidia,pins = "kb_row14_ps6"; 721*724ba675SRob Herring nvidia,function = "rsvd2"; 722*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 723*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 724*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 725*724ba675SRob Herring }; 726*724ba675SRob Herring kb_row15_ps7 { 727*724ba675SRob Herring nvidia,pins = "kb_row15_ps7"; 728*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 729*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 730*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 731*724ba675SRob Herring }; 732*724ba675SRob Herring kb_row16_pt0 { 733*724ba675SRob Herring nvidia,pins = "kb_row16_pt0"; 734*724ba675SRob Herring nvidia,function = "rsvd2"; 735*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 736*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 737*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 738*724ba675SRob Herring }; 739*724ba675SRob Herring kb_row17_pt1 { 740*724ba675SRob Herring nvidia,pins = "kb_row17_pt1"; 741*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 742*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 743*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 744*724ba675SRob Herring }; 745*724ba675SRob Herring gen2_i2c_scl_pt5 { 746*724ba675SRob Herring nvidia,pins = "gen2_i2c_scl_pt5"; 747*724ba675SRob Herring nvidia,function = "i2c2"; 748*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 749*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 750*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 751*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 752*724ba675SRob Herring }; 753*724ba675SRob Herring gen2_i2c_sda_pt6 { 754*724ba675SRob Herring nvidia,pins = "gen2_i2c_sda_pt6"; 755*724ba675SRob Herring nvidia,function = "i2c2"; 756*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 757*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 758*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 759*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 760*724ba675SRob Herring }; 761*724ba675SRob Herring sdmmc4_cmd_pt7 { 762*724ba675SRob Herring nvidia,pins = "sdmmc4_cmd_pt7"; 763*724ba675SRob Herring nvidia,function = "sdmmc4"; 764*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 765*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 766*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 767*724ba675SRob Herring }; 768*724ba675SRob Herring pu0 { 769*724ba675SRob Herring nvidia,pins = "pu0"; 770*724ba675SRob Herring nvidia,function = "rsvd4"; 771*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 772*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 773*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 774*724ba675SRob Herring }; 775*724ba675SRob Herring pu1 { 776*724ba675SRob Herring nvidia,pins = "pu1"; 777*724ba675SRob Herring nvidia,function = "rsvd1"; 778*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 779*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 780*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 781*724ba675SRob Herring }; 782*724ba675SRob Herring pu2 { 783*724ba675SRob Herring nvidia,pins = "pu2"; 784*724ba675SRob Herring nvidia,function = "rsvd1"; 785*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 786*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 787*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 788*724ba675SRob Herring }; 789*724ba675SRob Herring pu3 { 790*724ba675SRob Herring nvidia,pins = "pu3"; 791*724ba675SRob Herring nvidia,function = "gmi"; 792*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 793*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 794*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 795*724ba675SRob Herring }; 796*724ba675SRob Herring pu4 { 797*724ba675SRob Herring nvidia,pins = "pu4"; 798*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 799*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 800*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 801*724ba675SRob Herring }; 802*724ba675SRob Herring pu5 { 803*724ba675SRob Herring nvidia,pins = "pu5"; 804*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 805*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 806*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 807*724ba675SRob Herring }; 808*724ba675SRob Herring pu6 { 809*724ba675SRob Herring nvidia,pins = "pu6"; 810*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 811*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 812*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 813*724ba675SRob Herring }; 814*724ba675SRob Herring pv0 { 815*724ba675SRob Herring nvidia,pins = "pv0"; 816*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 817*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 818*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 819*724ba675SRob Herring }; 820*724ba675SRob Herring pv1 { 821*724ba675SRob Herring nvidia,pins = "pv1"; 822*724ba675SRob Herring nvidia,function = "rsvd1"; 823*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 824*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 825*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 826*724ba675SRob Herring }; 827*724ba675SRob Herring sdmmc3_cd_n_pv2 { 828*724ba675SRob Herring nvidia,pins = "sdmmc3_cd_n_pv2"; 829*724ba675SRob Herring nvidia,function = "sdmmc3"; 830*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 831*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 832*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 833*724ba675SRob Herring }; 834*724ba675SRob Herring sdmmc1_wp_n_pv3 { 835*724ba675SRob Herring nvidia,pins = "sdmmc1_wp_n_pv3"; 836*724ba675SRob Herring nvidia,function = "sdmmc1"; 837*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 838*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 839*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 840*724ba675SRob Herring }; 841*724ba675SRob Herring ddc_scl_pv4 { 842*724ba675SRob Herring nvidia,pins = "ddc_scl_pv4"; 843*724ba675SRob Herring nvidia,function = "i2c4"; 844*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 845*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 846*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 847*724ba675SRob Herring nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; 848*724ba675SRob Herring }; 849*724ba675SRob Herring ddc_sda_pv5 { 850*724ba675SRob Herring nvidia,pins = "ddc_sda_pv5"; 851*724ba675SRob Herring nvidia,function = "i2c4"; 852*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 853*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 854*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 855*724ba675SRob Herring nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; 856*724ba675SRob Herring }; 857*724ba675SRob Herring gpio_w2_aud_pw2 { 858*724ba675SRob Herring nvidia,pins = "gpio_w2_aud_pw2"; 859*724ba675SRob Herring nvidia,function = "rsvd2"; 860*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 861*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 862*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 863*724ba675SRob Herring }; 864*724ba675SRob Herring gpio_w3_aud_pw3 { 865*724ba675SRob Herring nvidia,pins = "gpio_w3_aud_pw3"; 866*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 867*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 868*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 869*724ba675SRob Herring }; 870*724ba675SRob Herring dap_mclk1_pw4 { 871*724ba675SRob Herring nvidia,pins = "dap_mclk1_pw4"; 872*724ba675SRob Herring nvidia,function = "extperiph1"; 873*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 874*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 875*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 876*724ba675SRob Herring }; 877*724ba675SRob Herring clk2_out_pw5 { 878*724ba675SRob Herring nvidia,pins = "clk2_out_pw5"; 879*724ba675SRob Herring nvidia,function = "rsvd2"; 880*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 881*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 882*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 883*724ba675SRob Herring }; 884*724ba675SRob Herring uart3_txd_pw6 { 885*724ba675SRob Herring nvidia,pins = "uart3_txd_pw6"; 886*724ba675SRob Herring nvidia,function = "rsvd2"; 887*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 888*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 889*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 890*724ba675SRob Herring }; 891*724ba675SRob Herring uart3_rxd_pw7 { 892*724ba675SRob Herring nvidia,pins = "uart3_rxd_pw7"; 893*724ba675SRob Herring nvidia,function = "rsvd2"; 894*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 895*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 896*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 897*724ba675SRob Herring }; 898*724ba675SRob Herring dvfs_pwm_px0 { 899*724ba675SRob Herring nvidia,pins = "dvfs_pwm_px0"; 900*724ba675SRob Herring nvidia,function = "cldvfs"; 901*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 902*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 903*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 904*724ba675SRob Herring }; 905*724ba675SRob Herring gpio_x1_aud_px1 { 906*724ba675SRob Herring nvidia,pins = "gpio_x1_aud_px1"; 907*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 908*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 909*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 910*724ba675SRob Herring }; 911*724ba675SRob Herring dvfs_clk_px2 { 912*724ba675SRob Herring nvidia,pins = "dvfs_clk_px2"; 913*724ba675SRob Herring nvidia,function = "cldvfs"; 914*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 915*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 916*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 917*724ba675SRob Herring }; 918*724ba675SRob Herring gpio_x3_aud_px3 { 919*724ba675SRob Herring nvidia,pins = "gpio_x3_aud_px3"; 920*724ba675SRob Herring nvidia,function = "rsvd4"; 921*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 922*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 923*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 924*724ba675SRob Herring }; 925*724ba675SRob Herring gpio_x4_aud_px4 { 926*724ba675SRob Herring nvidia,pins = "gpio_x4_aud_px4"; 927*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 928*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 929*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 930*724ba675SRob Herring }; 931*724ba675SRob Herring gpio_x5_aud_px5 { 932*724ba675SRob Herring nvidia,pins = "gpio_x5_aud_px5"; 933*724ba675SRob Herring nvidia,function = "rsvd4"; 934*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 935*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 936*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 937*724ba675SRob Herring }; 938*724ba675SRob Herring gpio_x6_aud_px6 { 939*724ba675SRob Herring nvidia,pins = "gpio_x6_aud_px6"; 940*724ba675SRob Herring nvidia,function = "gmi"; 941*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 942*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 943*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 944*724ba675SRob Herring }; 945*724ba675SRob Herring gpio_x7_aud_px7 { 946*724ba675SRob Herring nvidia,pins = "gpio_x7_aud_px7"; 947*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 948*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 949*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 950*724ba675SRob Herring }; 951*724ba675SRob Herring ulpi_clk_py0 { 952*724ba675SRob Herring nvidia,pins = "ulpi_clk_py0"; 953*724ba675SRob Herring nvidia,function = "spi1"; 954*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 955*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 956*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 957*724ba675SRob Herring }; 958*724ba675SRob Herring ulpi_dir_py1 { 959*724ba675SRob Herring nvidia,pins = "ulpi_dir_py1"; 960*724ba675SRob Herring nvidia,function = "spi1"; 961*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 962*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 963*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 964*724ba675SRob Herring }; 965*724ba675SRob Herring ulpi_nxt_py2 { 966*724ba675SRob Herring nvidia,pins = "ulpi_nxt_py2"; 967*724ba675SRob Herring nvidia,function = "spi1"; 968*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 969*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 970*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 971*724ba675SRob Herring }; 972*724ba675SRob Herring ulpi_stp_py3 { 973*724ba675SRob Herring nvidia,pins = "ulpi_stp_py3"; 974*724ba675SRob Herring nvidia,function = "spi1"; 975*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 976*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 977*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 978*724ba675SRob Herring }; 979*724ba675SRob Herring sdmmc1_dat3_py4 { 980*724ba675SRob Herring nvidia,pins = "sdmmc1_dat3_py4"; 981*724ba675SRob Herring nvidia,function = "sdmmc1"; 982*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 983*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 984*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 985*724ba675SRob Herring }; 986*724ba675SRob Herring sdmmc1_dat2_py5 { 987*724ba675SRob Herring nvidia,pins = "sdmmc1_dat2_py5"; 988*724ba675SRob Herring nvidia,function = "sdmmc1"; 989*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 990*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 991*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 992*724ba675SRob Herring }; 993*724ba675SRob Herring sdmmc1_dat1_py6 { 994*724ba675SRob Herring nvidia,pins = "sdmmc1_dat1_py6"; 995*724ba675SRob Herring nvidia,function = "sdmmc1"; 996*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 997*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 998*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 999*724ba675SRob Herring }; 1000*724ba675SRob Herring sdmmc1_dat0_py7 { 1001*724ba675SRob Herring nvidia,pins = "sdmmc1_dat0_py7"; 1002*724ba675SRob Herring nvidia,function = "sdmmc1"; 1003*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1004*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1005*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1006*724ba675SRob Herring }; 1007*724ba675SRob Herring sdmmc1_clk_pz0 { 1008*724ba675SRob Herring nvidia,pins = "sdmmc1_clk_pz0"; 1009*724ba675SRob Herring nvidia,function = "sdmmc1"; 1010*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1011*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1012*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1013*724ba675SRob Herring }; 1014*724ba675SRob Herring sdmmc1_cmd_pz1 { 1015*724ba675SRob Herring nvidia,pins = "sdmmc1_cmd_pz1"; 1016*724ba675SRob Herring nvidia,function = "sdmmc1"; 1017*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1018*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1019*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1020*724ba675SRob Herring }; 1021*724ba675SRob Herring pwr_i2c_scl_pz6 { 1022*724ba675SRob Herring nvidia,pins = "pwr_i2c_scl_pz6"; 1023*724ba675SRob Herring nvidia,function = "i2cpwr"; 1024*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1025*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1026*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1027*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 1028*724ba675SRob Herring }; 1029*724ba675SRob Herring pwr_i2c_sda_pz7 { 1030*724ba675SRob Herring nvidia,pins = "pwr_i2c_sda_pz7"; 1031*724ba675SRob Herring nvidia,function = "i2cpwr"; 1032*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1033*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1034*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1035*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 1036*724ba675SRob Herring }; 1037*724ba675SRob Herring sdmmc4_dat0_paa0 { 1038*724ba675SRob Herring nvidia,pins = "sdmmc4_dat0_paa0"; 1039*724ba675SRob Herring nvidia,function = "sdmmc4"; 1040*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1041*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1042*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1043*724ba675SRob Herring }; 1044*724ba675SRob Herring sdmmc4_dat1_paa1 { 1045*724ba675SRob Herring nvidia,pins = "sdmmc4_dat1_paa1"; 1046*724ba675SRob Herring nvidia,function = "sdmmc4"; 1047*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1048*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1049*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1050*724ba675SRob Herring }; 1051*724ba675SRob Herring sdmmc4_dat2_paa2 { 1052*724ba675SRob Herring nvidia,pins = "sdmmc4_dat2_paa2"; 1053*724ba675SRob Herring nvidia,function = "sdmmc4"; 1054*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1055*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1056*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1057*724ba675SRob Herring }; 1058*724ba675SRob Herring sdmmc4_dat3_paa3 { 1059*724ba675SRob Herring nvidia,pins = "sdmmc4_dat3_paa3"; 1060*724ba675SRob Herring nvidia,function = "sdmmc4"; 1061*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1062*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1063*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1064*724ba675SRob Herring }; 1065*724ba675SRob Herring sdmmc4_dat4_paa4 { 1066*724ba675SRob Herring nvidia,pins = "sdmmc4_dat4_paa4"; 1067*724ba675SRob Herring nvidia,function = "sdmmc4"; 1068*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1069*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1070*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1071*724ba675SRob Herring }; 1072*724ba675SRob Herring sdmmc4_dat5_paa5 { 1073*724ba675SRob Herring nvidia,pins = "sdmmc4_dat5_paa5"; 1074*724ba675SRob Herring nvidia,function = "sdmmc4"; 1075*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1076*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1077*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1078*724ba675SRob Herring }; 1079*724ba675SRob Herring sdmmc4_dat6_paa6 { 1080*724ba675SRob Herring nvidia,pins = "sdmmc4_dat6_paa6"; 1081*724ba675SRob Herring nvidia,function = "sdmmc4"; 1082*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1083*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1084*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1085*724ba675SRob Herring }; 1086*724ba675SRob Herring sdmmc4_dat7_paa7 { 1087*724ba675SRob Herring nvidia,pins = "sdmmc4_dat7_paa7"; 1088*724ba675SRob Herring nvidia,function = "sdmmc4"; 1089*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1090*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1091*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1092*724ba675SRob Herring }; 1093*724ba675SRob Herring pbb0 { 1094*724ba675SRob Herring nvidia,pins = "pbb0"; 1095*724ba675SRob Herring nvidia,function = "vgp6"; 1096*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1097*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1098*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1099*724ba675SRob Herring }; 1100*724ba675SRob Herring cam_i2c_scl_pbb1 { 1101*724ba675SRob Herring nvidia,pins = "cam_i2c_scl_pbb1"; 1102*724ba675SRob Herring nvidia,function = "i2c3"; 1103*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1104*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1105*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1106*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 1107*724ba675SRob Herring }; 1108*724ba675SRob Herring cam_i2c_sda_pbb2 { 1109*724ba675SRob Herring nvidia,pins = "cam_i2c_sda_pbb2"; 1110*724ba675SRob Herring nvidia,function = "i2c3"; 1111*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1112*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1113*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1114*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 1115*724ba675SRob Herring }; 1116*724ba675SRob Herring pbb3 { 1117*724ba675SRob Herring nvidia,pins = "pbb3"; 1118*724ba675SRob Herring nvidia,function = "vgp3"; 1119*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1120*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1121*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1122*724ba675SRob Herring }; 1123*724ba675SRob Herring pbb4 { 1124*724ba675SRob Herring nvidia,pins = "pbb4"; 1125*724ba675SRob Herring nvidia,function = "vgp4"; 1126*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1127*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1128*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1129*724ba675SRob Herring }; 1130*724ba675SRob Herring pbb5 { 1131*724ba675SRob Herring nvidia,pins = "pbb5"; 1132*724ba675SRob Herring nvidia,function = "rsvd3"; 1133*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1134*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1135*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1136*724ba675SRob Herring }; 1137*724ba675SRob Herring pbb6 { 1138*724ba675SRob Herring nvidia,pins = "pbb6"; 1139*724ba675SRob Herring nvidia,function = "rsvd2"; 1140*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1141*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1142*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1143*724ba675SRob Herring }; 1144*724ba675SRob Herring pbb7 { 1145*724ba675SRob Herring nvidia,pins = "pbb7"; 1146*724ba675SRob Herring nvidia,function = "rsvd2"; 1147*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1148*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1149*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1150*724ba675SRob Herring }; 1151*724ba675SRob Herring cam_mclk_pcc0 { 1152*724ba675SRob Herring nvidia,pins = "cam_mclk_pcc0"; 1153*724ba675SRob Herring nvidia,function = "vi"; 1154*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1155*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1156*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1157*724ba675SRob Herring }; 1158*724ba675SRob Herring pcc1 { 1159*724ba675SRob Herring nvidia,pins = "pcc1"; 1160*724ba675SRob Herring nvidia,function = "rsvd2"; 1161*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1162*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1163*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1164*724ba675SRob Herring }; 1165*724ba675SRob Herring pcc2 { 1166*724ba675SRob Herring nvidia,pins = "pcc2"; 1167*724ba675SRob Herring nvidia,function = "rsvd2"; 1168*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1169*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1170*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1171*724ba675SRob Herring }; 1172*724ba675SRob Herring sdmmc4_clk_pcc4 { 1173*724ba675SRob Herring nvidia,pins = "sdmmc4_clk_pcc4"; 1174*724ba675SRob Herring nvidia,function = "sdmmc4"; 1175*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1176*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1177*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1178*724ba675SRob Herring }; 1179*724ba675SRob Herring clk2_req_pcc5 { 1180*724ba675SRob Herring nvidia,pins = "clk2_req_pcc5"; 1181*724ba675SRob Herring nvidia,function = "rsvd2"; 1182*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1183*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1184*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1185*724ba675SRob Herring }; 1186*724ba675SRob Herring pex_l0_rst_n_pdd1 { 1187*724ba675SRob Herring nvidia,pins = "pex_l0_rst_n_pdd1"; 1188*724ba675SRob Herring nvidia,function = "rsvd2"; 1189*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1190*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1191*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1192*724ba675SRob Herring }; 1193*724ba675SRob Herring pex_l0_clkreq_n_pdd2 { 1194*724ba675SRob Herring nvidia,pins = "pex_l0_clkreq_n_pdd2"; 1195*724ba675SRob Herring nvidia,function = "rsvd2"; 1196*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1197*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1198*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1199*724ba675SRob Herring }; 1200*724ba675SRob Herring pex_wake_n_pdd3 { 1201*724ba675SRob Herring nvidia,pins = "pex_wake_n_pdd3"; 1202*724ba675SRob Herring nvidia,function = "rsvd2"; 1203*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1204*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1205*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1206*724ba675SRob Herring }; 1207*724ba675SRob Herring pex_l1_rst_n_pdd5 { 1208*724ba675SRob Herring nvidia,pins = "pex_l1_rst_n_pdd5"; 1209*724ba675SRob Herring nvidia,function = "rsvd2"; 1210*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1211*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1212*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1213*724ba675SRob Herring }; 1214*724ba675SRob Herring pex_l1_clkreq_n_pdd6 { 1215*724ba675SRob Herring nvidia,pins = "pex_l1_clkreq_n_pdd6"; 1216*724ba675SRob Herring nvidia,function = "rsvd2"; 1217*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1218*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1219*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1220*724ba675SRob Herring }; 1221*724ba675SRob Herring clk3_out_pee0 { 1222*724ba675SRob Herring nvidia,pins = "clk3_out_pee0"; 1223*724ba675SRob Herring nvidia,function = "rsvd2"; 1224*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1225*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1226*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1227*724ba675SRob Herring }; 1228*724ba675SRob Herring clk3_req_pee1 { 1229*724ba675SRob Herring nvidia,pins = "clk3_req_pee1"; 1230*724ba675SRob Herring nvidia,function = "rsvd2"; 1231*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1232*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1233*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1234*724ba675SRob Herring }; 1235*724ba675SRob Herring dap_mclk1_req_pee2 { 1236*724ba675SRob Herring nvidia,pins = "dap_mclk1_req_pee2"; 1237*724ba675SRob Herring nvidia,function = "rsvd4"; 1238*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1239*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1240*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1241*724ba675SRob Herring }; 1242*724ba675SRob Herring hdmi_cec_pee3 { 1243*724ba675SRob Herring nvidia,pins = "hdmi_cec_pee3"; 1244*724ba675SRob Herring nvidia,function = "cec"; 1245*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1246*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1247*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1248*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 1249*724ba675SRob Herring }; 1250*724ba675SRob Herring sdmmc3_clk_lb_out_pee4 { 1251*724ba675SRob Herring nvidia,pins = "sdmmc3_clk_lb_out_pee4"; 1252*724ba675SRob Herring nvidia,function = "sdmmc3"; 1253*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1254*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1255*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1256*724ba675SRob Herring }; 1257*724ba675SRob Herring sdmmc3_clk_lb_in_pee5 { 1258*724ba675SRob Herring nvidia,pins = "sdmmc3_clk_lb_in_pee5"; 1259*724ba675SRob Herring nvidia,function = "sdmmc3"; 1260*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1261*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1262*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1263*724ba675SRob Herring }; 1264*724ba675SRob Herring dp_hpd_pff0 { 1265*724ba675SRob Herring nvidia,pins = "dp_hpd_pff0"; 1266*724ba675SRob Herring nvidia,function = "dp"; 1267*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1268*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1269*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1270*724ba675SRob Herring }; 1271*724ba675SRob Herring usb_vbus_en2_pff1 { 1272*724ba675SRob Herring nvidia,pins = "usb_vbus_en2_pff1"; 1273*724ba675SRob Herring nvidia,function = "rsvd2"; 1274*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1275*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1276*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1277*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1278*724ba675SRob Herring }; 1279*724ba675SRob Herring pff2 { 1280*724ba675SRob Herring nvidia,pins = "pff2"; 1281*724ba675SRob Herring nvidia,function = "rsvd2"; 1282*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1283*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1284*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1285*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1286*724ba675SRob Herring }; 1287*724ba675SRob Herring core_pwr_req { 1288*724ba675SRob Herring nvidia,pins = "core_pwr_req"; 1289*724ba675SRob Herring nvidia,function = "pwron"; 1290*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1291*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1292*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1293*724ba675SRob Herring }; 1294*724ba675SRob Herring cpu_pwr_req { 1295*724ba675SRob Herring nvidia,pins = "cpu_pwr_req"; 1296*724ba675SRob Herring nvidia,function = "cpu"; 1297*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1298*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1299*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1300*724ba675SRob Herring }; 1301*724ba675SRob Herring pwr_int_n { 1302*724ba675SRob Herring nvidia,pins = "pwr_int_n"; 1303*724ba675SRob Herring nvidia,function = "pmi"; 1304*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1305*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1306*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1307*724ba675SRob Herring }; 1308*724ba675SRob Herring reset_out_n { 1309*724ba675SRob Herring nvidia,pins = "reset_out_n"; 1310*724ba675SRob Herring nvidia,function = "reset_out_n"; 1311*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1312*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1313*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1314*724ba675SRob Herring }; 1315*724ba675SRob Herring owr { 1316*724ba675SRob Herring nvidia,pins = "owr"; 1317*724ba675SRob Herring nvidia,function = "rsvd2"; 1318*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1319*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1320*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1321*724ba675SRob Herring nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; 1322*724ba675SRob Herring }; 1323*724ba675SRob Herring clk_32k_in { 1324*724ba675SRob Herring nvidia,pins = "clk_32k_in"; 1325*724ba675SRob Herring nvidia,function = "clk"; 1326*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1327*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1328*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1329*724ba675SRob Herring }; 1330*724ba675SRob Herring jtag_rtck { 1331*724ba675SRob Herring nvidia,pins = "jtag_rtck"; 1332*724ba675SRob Herring nvidia,function = "rtck"; 1333*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1334*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1335*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1336*724ba675SRob Herring }; 1337*724ba675SRob Herring }; 1338*724ba675SRob Herring }; 1339*724ba675SRob Herring 1340*724ba675SRob Herring sound { 1341*724ba675SRob Herring compatible = "nvidia,tegra-audio-max98090-nyan-blaze", 1342*724ba675SRob Herring "nvidia,tegra-audio-max98090-nyan", 1343*724ba675SRob Herring "nvidia,tegra-audio-max98090"; 1344*724ba675SRob Herring nvidia,model = "GoogleNyanBlaze"; 1345*724ba675SRob Herring }; 1346*724ba675SRob Herring}; 1347