1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2*724ba675SRob Herring/dts-v1/; 3*724ba675SRob Herring 4*724ba675SRob Herring#include "tegra124-nyan.dtsi" 5*724ba675SRob Herring 6*724ba675SRob Herring#include "tegra124-nyan-big-emc.dtsi" 7*724ba675SRob Herring 8*724ba675SRob Herring/ { 9*724ba675SRob Herring model = "Acer Chromebook 13 CB5-311"; 10*724ba675SRob Herring compatible = "google,nyan-big-rev7", "google,nyan-big-rev6", 11*724ba675SRob Herring "google,nyan-big-rev5", "google,nyan-big-rev4", 12*724ba675SRob Herring "google,nyan-big-rev3", "google,nyan-big-rev2", 13*724ba675SRob Herring "google,nyan-big-rev1", "google,nyan-big-rev0", 14*724ba675SRob Herring "google,nyan-big", "google,nyan", "nvidia,tegra124"; 15*724ba675SRob Herring 16*724ba675SRob Herring host1x@50000000 { 17*724ba675SRob Herring dpaux@545c0000 { 18*724ba675SRob Herring aux-bus { 19*724ba675SRob Herring panel: panel { 20*724ba675SRob Herring compatible = "auo,b133xtn01"; 21*724ba675SRob Herring power-supply = <&vdd_3v3_panel>; 22*724ba675SRob Herring backlight = <&backlight>; 23*724ba675SRob Herring }; 24*724ba675SRob Herring }; 25*724ba675SRob Herring }; 26*724ba675SRob Herring }; 27*724ba675SRob Herring 28*724ba675SRob Herring pinmux@70000868 { 29*724ba675SRob Herring pinctrl-names = "default"; 30*724ba675SRob Herring pinctrl-0 = <&pinmux_default>; 31*724ba675SRob Herring 32*724ba675SRob Herring pinmux_default: pinmux { 33*724ba675SRob Herring clk_32k_out_pa0 { 34*724ba675SRob Herring nvidia,pins = "clk_32k_out_pa0"; 35*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 36*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 37*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 38*724ba675SRob Herring }; 39*724ba675SRob Herring uart3_cts_n_pa1 { 40*724ba675SRob Herring nvidia,pins = "uart3_cts_n_pa1"; 41*724ba675SRob Herring nvidia,function = "gmi"; 42*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 43*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 44*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 45*724ba675SRob Herring }; 46*724ba675SRob Herring dap2_fs_pa2 { 47*724ba675SRob Herring nvidia,pins = "dap2_fs_pa2"; 48*724ba675SRob Herring nvidia,function = "i2s1"; 49*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 50*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 51*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 52*724ba675SRob Herring }; 53*724ba675SRob Herring dap2_sclk_pa3 { 54*724ba675SRob Herring nvidia,pins = "dap2_sclk_pa3"; 55*724ba675SRob Herring nvidia,function = "i2s1"; 56*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 57*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 58*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 59*724ba675SRob Herring }; 60*724ba675SRob Herring dap2_din_pa4 { 61*724ba675SRob Herring nvidia,pins = "dap2_din_pa4"; 62*724ba675SRob Herring nvidia,function = "i2s1"; 63*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 64*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 65*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 66*724ba675SRob Herring }; 67*724ba675SRob Herring dap2_dout_pa5 { 68*724ba675SRob Herring nvidia,pins = "dap2_dout_pa5"; 69*724ba675SRob Herring nvidia,function = "i2s1"; 70*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 71*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 72*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 73*724ba675SRob Herring }; 74*724ba675SRob Herring sdmmc3_clk_pa6 { 75*724ba675SRob Herring nvidia,pins = "sdmmc3_clk_pa6"; 76*724ba675SRob Herring nvidia,function = "sdmmc3"; 77*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 78*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 79*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 80*724ba675SRob Herring }; 81*724ba675SRob Herring sdmmc3_cmd_pa7 { 82*724ba675SRob Herring nvidia,pins = "sdmmc3_cmd_pa7"; 83*724ba675SRob Herring nvidia,function = "sdmmc3"; 84*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 85*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 86*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 87*724ba675SRob Herring }; 88*724ba675SRob Herring pb0 { 89*724ba675SRob Herring nvidia,pins = "pb0"; 90*724ba675SRob Herring nvidia,function = "rsvd2"; 91*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 92*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 93*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 94*724ba675SRob Herring }; 95*724ba675SRob Herring pb1 { 96*724ba675SRob Herring nvidia,pins = "pb1"; 97*724ba675SRob Herring nvidia,function = "rsvd2"; 98*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 99*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 100*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 101*724ba675SRob Herring }; 102*724ba675SRob Herring sdmmc3_dat3_pb4 { 103*724ba675SRob Herring nvidia,pins = "sdmmc3_dat3_pb4"; 104*724ba675SRob Herring nvidia,function = "sdmmc3"; 105*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 106*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 107*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 108*724ba675SRob Herring }; 109*724ba675SRob Herring sdmmc3_dat2_pb5 { 110*724ba675SRob Herring nvidia,pins = "sdmmc3_dat2_pb5"; 111*724ba675SRob Herring nvidia,function = "sdmmc3"; 112*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 113*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 114*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 115*724ba675SRob Herring }; 116*724ba675SRob Herring sdmmc3_dat1_pb6 { 117*724ba675SRob Herring nvidia,pins = "sdmmc3_dat1_pb6"; 118*724ba675SRob Herring nvidia,function = "sdmmc3"; 119*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 120*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 121*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 122*724ba675SRob Herring }; 123*724ba675SRob Herring sdmmc3_dat0_pb7 { 124*724ba675SRob Herring nvidia,pins = "sdmmc3_dat0_pb7"; 125*724ba675SRob Herring nvidia,function = "sdmmc3"; 126*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 127*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 128*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 129*724ba675SRob Herring }; 130*724ba675SRob Herring uart3_rts_n_pc0 { 131*724ba675SRob Herring nvidia,pins = "uart3_rts_n_pc0"; 132*724ba675SRob Herring nvidia,function = "gmi"; 133*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 134*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 135*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 136*724ba675SRob Herring }; 137*724ba675SRob Herring uart2_txd_pc2 { 138*724ba675SRob Herring nvidia,pins = "uart2_txd_pc2"; 139*724ba675SRob Herring nvidia,function = "irda"; 140*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 141*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 142*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 143*724ba675SRob Herring }; 144*724ba675SRob Herring uart2_rxd_pc3 { 145*724ba675SRob Herring nvidia,pins = "uart2_rxd_pc3"; 146*724ba675SRob Herring nvidia,function = "irda"; 147*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 148*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 149*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 150*724ba675SRob Herring }; 151*724ba675SRob Herring gen1_i2c_scl_pc4 { 152*724ba675SRob Herring nvidia,pins = "gen1_i2c_scl_pc4"; 153*724ba675SRob Herring nvidia,function = "i2c1"; 154*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 155*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 156*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 157*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 158*724ba675SRob Herring }; 159*724ba675SRob Herring gen1_i2c_sda_pc5 { 160*724ba675SRob Herring nvidia,pins = "gen1_i2c_sda_pc5"; 161*724ba675SRob Herring nvidia,function = "i2c1"; 162*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 163*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 164*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 165*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 166*724ba675SRob Herring }; 167*724ba675SRob Herring pc7 { 168*724ba675SRob Herring nvidia,pins = "pc7"; 169*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 170*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 171*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 172*724ba675SRob Herring }; 173*724ba675SRob Herring pg0 { 174*724ba675SRob Herring nvidia,pins = "pg0"; 175*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 176*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 177*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 178*724ba675SRob Herring }; 179*724ba675SRob Herring pg1 { 180*724ba675SRob Herring nvidia,pins = "pg1"; 181*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 182*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 183*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 184*724ba675SRob Herring }; 185*724ba675SRob Herring pg2 { 186*724ba675SRob Herring nvidia,pins = "pg2"; 187*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 188*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 189*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 190*724ba675SRob Herring }; 191*724ba675SRob Herring pg3 { 192*724ba675SRob Herring nvidia,pins = "pg3"; 193*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 194*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 195*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 196*724ba675SRob Herring }; 197*724ba675SRob Herring pg4 { 198*724ba675SRob Herring nvidia,pins = "pg4"; 199*724ba675SRob Herring nvidia,function = "spi4"; 200*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 201*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 202*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 203*724ba675SRob Herring }; 204*724ba675SRob Herring pg5 { 205*724ba675SRob Herring nvidia,pins = "pg5"; 206*724ba675SRob Herring nvidia,function = "spi4"; 207*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 208*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 209*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 210*724ba675SRob Herring }; 211*724ba675SRob Herring pg6 { 212*724ba675SRob Herring nvidia,pins = "pg6"; 213*724ba675SRob Herring nvidia,function = "spi4"; 214*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 215*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 216*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 217*724ba675SRob Herring }; 218*724ba675SRob Herring pg7 { 219*724ba675SRob Herring nvidia,pins = "pg7"; 220*724ba675SRob Herring nvidia,function = "spi4"; 221*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 222*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 223*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 224*724ba675SRob Herring }; 225*724ba675SRob Herring ph0 { 226*724ba675SRob Herring nvidia,pins = "ph0"; 227*724ba675SRob Herring nvidia,function = "gmi"; 228*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 229*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 230*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 231*724ba675SRob Herring }; 232*724ba675SRob Herring ph1 { 233*724ba675SRob Herring nvidia,pins = "ph1"; 234*724ba675SRob Herring nvidia,function = "pwm1"; 235*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 236*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 237*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 238*724ba675SRob Herring }; 239*724ba675SRob Herring ph2 { 240*724ba675SRob Herring nvidia,pins = "ph2"; 241*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 242*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 243*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 244*724ba675SRob Herring }; 245*724ba675SRob Herring ph3 { 246*724ba675SRob Herring nvidia,pins = "ph3"; 247*724ba675SRob Herring nvidia,function = "gmi"; 248*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 249*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 250*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 251*724ba675SRob Herring }; 252*724ba675SRob Herring ph4 { 253*724ba675SRob Herring nvidia,pins = "ph4"; 254*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 255*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 256*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 257*724ba675SRob Herring }; 258*724ba675SRob Herring ph5 { 259*724ba675SRob Herring nvidia,pins = "ph5"; 260*724ba675SRob Herring nvidia,function = "rsvd2"; 261*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 262*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 263*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 264*724ba675SRob Herring }; 265*724ba675SRob Herring ph6 { 266*724ba675SRob Herring nvidia,pins = "ph6"; 267*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 268*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 269*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 270*724ba675SRob Herring }; 271*724ba675SRob Herring ph7 { 272*724ba675SRob Herring nvidia,pins = "ph7"; 273*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 274*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 275*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 276*724ba675SRob Herring }; 277*724ba675SRob Herring pi0 { 278*724ba675SRob Herring nvidia,pins = "pi0"; 279*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 280*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 281*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 282*724ba675SRob Herring }; 283*724ba675SRob Herring pi1 { 284*724ba675SRob Herring nvidia,pins = "pi1"; 285*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 286*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 287*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 288*724ba675SRob Herring }; 289*724ba675SRob Herring pi2 { 290*724ba675SRob Herring nvidia,pins = "pi2"; 291*724ba675SRob Herring nvidia,function = "rsvd4"; 292*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 293*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 294*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 295*724ba675SRob Herring }; 296*724ba675SRob Herring pi3 { 297*724ba675SRob Herring nvidia,pins = "pi3"; 298*724ba675SRob Herring nvidia,function = "spi4"; 299*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 300*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 301*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 302*724ba675SRob Herring }; 303*724ba675SRob Herring pi4 { 304*724ba675SRob Herring nvidia,pins = "pi4"; 305*724ba675SRob Herring nvidia,function = "gmi"; 306*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 307*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 308*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 309*724ba675SRob Herring }; 310*724ba675SRob Herring pi5 { 311*724ba675SRob Herring nvidia,pins = "pi5"; 312*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 313*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 314*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 315*724ba675SRob Herring }; 316*724ba675SRob Herring pi6 { 317*724ba675SRob Herring nvidia,pins = "pi6"; 318*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 319*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 320*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 321*724ba675SRob Herring }; 322*724ba675SRob Herring pi7 { 323*724ba675SRob Herring nvidia,pins = "pi7"; 324*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 325*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 326*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 327*724ba675SRob Herring }; 328*724ba675SRob Herring pj0 { 329*724ba675SRob Herring nvidia,pins = "pj0"; 330*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 331*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 332*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 333*724ba675SRob Herring }; 334*724ba675SRob Herring pj2 { 335*724ba675SRob Herring nvidia,pins = "pj2"; 336*724ba675SRob Herring nvidia,function = "rsvd1"; 337*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 338*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 339*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 340*724ba675SRob Herring }; 341*724ba675SRob Herring uart2_cts_n_pj5 { 342*724ba675SRob Herring nvidia,pins = "uart2_cts_n_pj5"; 343*724ba675SRob Herring nvidia,function = "gmi"; 344*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 345*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 346*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 347*724ba675SRob Herring }; 348*724ba675SRob Herring uart2_rts_n_pj6 { 349*724ba675SRob Herring nvidia,pins = "uart2_rts_n_pj6"; 350*724ba675SRob Herring nvidia,function = "gmi"; 351*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 352*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 353*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 354*724ba675SRob Herring }; 355*724ba675SRob Herring pj7 { 356*724ba675SRob Herring nvidia,pins = "pj7"; 357*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 358*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 359*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 360*724ba675SRob Herring }; 361*724ba675SRob Herring pk0 { 362*724ba675SRob Herring nvidia,pins = "pk0"; 363*724ba675SRob Herring nvidia,function = "rsvd1"; 364*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 365*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 366*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 367*724ba675SRob Herring }; 368*724ba675SRob Herring pk1 { 369*724ba675SRob Herring nvidia,pins = "pk1"; 370*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 371*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 372*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 373*724ba675SRob Herring }; 374*724ba675SRob Herring pk2 { 375*724ba675SRob Herring nvidia,pins = "pk2"; 376*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 377*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 378*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 379*724ba675SRob Herring }; 380*724ba675SRob Herring pk3 { 381*724ba675SRob Herring nvidia,pins = "pk3"; 382*724ba675SRob Herring nvidia,function = "gmi"; 383*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 384*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 385*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 386*724ba675SRob Herring }; 387*724ba675SRob Herring pk4 { 388*724ba675SRob Herring nvidia,pins = "pk4"; 389*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 390*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 391*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 392*724ba675SRob Herring }; 393*724ba675SRob Herring spdif_out_pk5 { 394*724ba675SRob Herring nvidia,pins = "spdif_out_pk5"; 395*724ba675SRob Herring nvidia,function = "rsvd2"; 396*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 397*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 398*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 399*724ba675SRob Herring }; 400*724ba675SRob Herring spdif_in_pk6 { 401*724ba675SRob Herring nvidia,pins = "spdif_in_pk6"; 402*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 403*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 404*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 405*724ba675SRob Herring }; 406*724ba675SRob Herring pk7 { 407*724ba675SRob Herring nvidia,pins = "pk7"; 408*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 409*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 410*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 411*724ba675SRob Herring }; 412*724ba675SRob Herring dap1_fs_pn0 { 413*724ba675SRob Herring nvidia,pins = "dap1_fs_pn0"; 414*724ba675SRob Herring nvidia,function = "rsvd4"; 415*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 416*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 417*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 418*724ba675SRob Herring }; 419*724ba675SRob Herring dap1_din_pn1 { 420*724ba675SRob Herring nvidia,pins = "dap1_din_pn1"; 421*724ba675SRob Herring nvidia,function = "rsvd4"; 422*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 423*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 424*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 425*724ba675SRob Herring }; 426*724ba675SRob Herring dap1_dout_pn2 { 427*724ba675SRob Herring nvidia,pins = "dap1_dout_pn2"; 428*724ba675SRob Herring nvidia,function = "i2s0"; 429*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 430*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 431*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 432*724ba675SRob Herring }; 433*724ba675SRob Herring dap1_sclk_pn3 { 434*724ba675SRob Herring nvidia,pins = "dap1_sclk_pn3"; 435*724ba675SRob Herring nvidia,function = "rsvd4"; 436*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 437*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 438*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 439*724ba675SRob Herring }; 440*724ba675SRob Herring usb_vbus_en0_pn4 { 441*724ba675SRob Herring nvidia,pins = "usb_vbus_en0_pn4"; 442*724ba675SRob Herring nvidia,function = "usb"; 443*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 444*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 445*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 446*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 447*724ba675SRob Herring }; 448*724ba675SRob Herring usb_vbus_en1_pn5 { 449*724ba675SRob Herring nvidia,pins = "usb_vbus_en1_pn5"; 450*724ba675SRob Herring nvidia,function = "usb"; 451*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 452*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 453*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 454*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 455*724ba675SRob Herring }; 456*724ba675SRob Herring hdmi_int_pn7 { 457*724ba675SRob Herring nvidia,pins = "hdmi_int_pn7"; 458*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 459*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 460*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 461*724ba675SRob Herring nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; 462*724ba675SRob Herring }; 463*724ba675SRob Herring ulpi_data7_po0 { 464*724ba675SRob Herring nvidia,pins = "ulpi_data7_po0"; 465*724ba675SRob Herring nvidia,function = "ulpi"; 466*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 467*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 468*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 469*724ba675SRob Herring }; 470*724ba675SRob Herring ulpi_data0_po1 { 471*724ba675SRob Herring nvidia,pins = "ulpi_data0_po1"; 472*724ba675SRob Herring nvidia,function = "ulpi"; 473*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 474*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 475*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 476*724ba675SRob Herring }; 477*724ba675SRob Herring ulpi_data1_po2 { 478*724ba675SRob Herring nvidia,pins = "ulpi_data1_po2"; 479*724ba675SRob Herring nvidia,function = "ulpi"; 480*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 481*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 482*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 483*724ba675SRob Herring }; 484*724ba675SRob Herring ulpi_data2_po3 { 485*724ba675SRob Herring nvidia,pins = "ulpi_data2_po3"; 486*724ba675SRob Herring nvidia,function = "ulpi"; 487*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 488*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 489*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 490*724ba675SRob Herring }; 491*724ba675SRob Herring ulpi_data3_po4 { 492*724ba675SRob Herring nvidia,pins = "ulpi_data3_po4"; 493*724ba675SRob Herring nvidia,function = "ulpi"; 494*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 495*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 496*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 497*724ba675SRob Herring }; 498*724ba675SRob Herring ulpi_data4_po5 { 499*724ba675SRob Herring nvidia,pins = "ulpi_data4_po5"; 500*724ba675SRob Herring nvidia,function = "ulpi"; 501*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 502*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 503*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 504*724ba675SRob Herring }; 505*724ba675SRob Herring ulpi_data5_po6 { 506*724ba675SRob Herring nvidia,pins = "ulpi_data5_po6"; 507*724ba675SRob Herring nvidia,function = "ulpi"; 508*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 509*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 510*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 511*724ba675SRob Herring }; 512*724ba675SRob Herring ulpi_data6_po7 { 513*724ba675SRob Herring nvidia,pins = "ulpi_data6_po7"; 514*724ba675SRob Herring nvidia,function = "ulpi"; 515*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 516*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 517*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 518*724ba675SRob Herring }; 519*724ba675SRob Herring dap3_fs_pp0 { 520*724ba675SRob Herring nvidia,pins = "dap3_fs_pp0"; 521*724ba675SRob Herring nvidia,function = "i2s2"; 522*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 523*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 524*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 525*724ba675SRob Herring }; 526*724ba675SRob Herring dap3_din_pp1 { 527*724ba675SRob Herring nvidia,pins = "dap3_din_pp1"; 528*724ba675SRob Herring nvidia,function = "i2s2"; 529*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 530*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 531*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 532*724ba675SRob Herring }; 533*724ba675SRob Herring dap3_dout_pp2 { 534*724ba675SRob Herring nvidia,pins = "dap3_dout_pp2"; 535*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 536*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 537*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 538*724ba675SRob Herring }; 539*724ba675SRob Herring dap3_sclk_pp3 { 540*724ba675SRob Herring nvidia,pins = "dap3_sclk_pp3"; 541*724ba675SRob Herring nvidia,function = "rsvd3"; 542*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 543*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 544*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 545*724ba675SRob Herring }; 546*724ba675SRob Herring dap4_fs_pp4 { 547*724ba675SRob Herring nvidia,pins = "dap4_fs_pp4"; 548*724ba675SRob Herring nvidia,function = "rsvd4"; 549*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 550*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 551*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 552*724ba675SRob Herring }; 553*724ba675SRob Herring dap4_din_pp5 { 554*724ba675SRob Herring nvidia,pins = "dap4_din_pp5"; 555*724ba675SRob Herring nvidia,function = "rsvd3"; 556*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 557*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 558*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 559*724ba675SRob Herring }; 560*724ba675SRob Herring dap4_dout_pp6 { 561*724ba675SRob Herring nvidia,pins = "dap4_dout_pp6"; 562*724ba675SRob Herring nvidia,function = "rsvd4"; 563*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 564*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 565*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 566*724ba675SRob Herring }; 567*724ba675SRob Herring dap4_sclk_pp7 { 568*724ba675SRob Herring nvidia,pins = "dap4_sclk_pp7"; 569*724ba675SRob Herring nvidia,function = "rsvd3"; 570*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 571*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 572*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 573*724ba675SRob Herring }; 574*724ba675SRob Herring kb_col0_pq0 { 575*724ba675SRob Herring nvidia,pins = "kb_col0_pq0"; 576*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 577*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 578*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 579*724ba675SRob Herring }; 580*724ba675SRob Herring kb_col1_pq1 { 581*724ba675SRob Herring nvidia,pins = "kb_col1_pq1"; 582*724ba675SRob Herring nvidia,function = "rsvd2"; 583*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 584*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 585*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 586*724ba675SRob Herring }; 587*724ba675SRob Herring kb_col2_pq2 { 588*724ba675SRob Herring nvidia,pins = "kb_col2_pq2"; 589*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 590*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 591*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 592*724ba675SRob Herring }; 593*724ba675SRob Herring kb_col3_pq3 { 594*724ba675SRob Herring nvidia,pins = "kb_col3_pq3"; 595*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 596*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 597*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 598*724ba675SRob Herring }; 599*724ba675SRob Herring kb_col4_pq4 { 600*724ba675SRob Herring nvidia,pins = "kb_col4_pq4"; 601*724ba675SRob Herring nvidia,function = "sdmmc3"; 602*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 603*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 604*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 605*724ba675SRob Herring }; 606*724ba675SRob Herring kb_col5_pq5 { 607*724ba675SRob Herring nvidia,pins = "kb_col5_pq5"; 608*724ba675SRob Herring nvidia,function = "rsvd2"; 609*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 610*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 611*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 612*724ba675SRob Herring }; 613*724ba675SRob Herring kb_col6_pq6 { 614*724ba675SRob Herring nvidia,pins = "kb_col6_pq6"; 615*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 616*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 617*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 618*724ba675SRob Herring }; 619*724ba675SRob Herring kb_col7_pq7 { 620*724ba675SRob Herring nvidia,pins = "kb_col7_pq7"; 621*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 622*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 623*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 624*724ba675SRob Herring }; 625*724ba675SRob Herring kb_row0_pr0 { 626*724ba675SRob Herring nvidia,pins = "kb_row0_pr0"; 627*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 628*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 629*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 630*724ba675SRob Herring }; 631*724ba675SRob Herring kb_row1_pr1 { 632*724ba675SRob Herring nvidia,pins = "kb_row1_pr1"; 633*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 634*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 635*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 636*724ba675SRob Herring }; 637*724ba675SRob Herring kb_row2_pr2 { 638*724ba675SRob Herring nvidia,pins = "kb_row2_pr2"; 639*724ba675SRob Herring nvidia,function = "rsvd2"; 640*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 641*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 642*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 643*724ba675SRob Herring }; 644*724ba675SRob Herring kb_row3_pr3 { 645*724ba675SRob Herring nvidia,pins = "kb_row3_pr3"; 646*724ba675SRob Herring nvidia,function = "kbc"; 647*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 648*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 649*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 650*724ba675SRob Herring }; 651*724ba675SRob Herring kb_row4_pr4 { 652*724ba675SRob Herring nvidia,pins = "kb_row4_pr4"; 653*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 654*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 655*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 656*724ba675SRob Herring }; 657*724ba675SRob Herring kb_row5_pr5 { 658*724ba675SRob Herring nvidia,pins = "kb_row5_pr5"; 659*724ba675SRob Herring nvidia,function = "rsvd3"; 660*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 661*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 662*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 663*724ba675SRob Herring }; 664*724ba675SRob Herring kb_row6_pr6 { 665*724ba675SRob Herring nvidia,pins = "kb_row6_pr6"; 666*724ba675SRob Herring nvidia,function = "kbc"; 667*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 668*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 669*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 670*724ba675SRob Herring }; 671*724ba675SRob Herring kb_row7_pr7 { 672*724ba675SRob Herring nvidia,pins = "kb_row7_pr7"; 673*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 674*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 675*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 676*724ba675SRob Herring }; 677*724ba675SRob Herring kb_row8_ps0 { 678*724ba675SRob Herring nvidia,pins = "kb_row8_ps0"; 679*724ba675SRob Herring nvidia,function = "rsvd2"; 680*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 681*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 682*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 683*724ba675SRob Herring }; 684*724ba675SRob Herring kb_row9_ps1 { 685*724ba675SRob Herring nvidia,pins = "kb_row9_ps1"; 686*724ba675SRob Herring nvidia,function = "uarta"; 687*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 688*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 689*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 690*724ba675SRob Herring }; 691*724ba675SRob Herring kb_row10_ps2 { 692*724ba675SRob Herring nvidia,pins = "kb_row10_ps2"; 693*724ba675SRob Herring nvidia,function = "uarta"; 694*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 695*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 696*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 697*724ba675SRob Herring }; 698*724ba675SRob Herring kb_row11_ps3 { 699*724ba675SRob Herring nvidia,pins = "kb_row11_ps3"; 700*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 701*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 702*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 703*724ba675SRob Herring }; 704*724ba675SRob Herring kb_row12_ps4 { 705*724ba675SRob Herring nvidia,pins = "kb_row12_ps4"; 706*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 707*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 708*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 709*724ba675SRob Herring }; 710*724ba675SRob Herring kb_row13_ps5 { 711*724ba675SRob Herring nvidia,pins = "kb_row13_ps5"; 712*724ba675SRob Herring nvidia,function = "rsvd2"; 713*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 714*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 715*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 716*724ba675SRob Herring }; 717*724ba675SRob Herring kb_row14_ps6 { 718*724ba675SRob Herring nvidia,pins = "kb_row14_ps6"; 719*724ba675SRob Herring nvidia,function = "rsvd2"; 720*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 721*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 722*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 723*724ba675SRob Herring }; 724*724ba675SRob Herring kb_row15_ps7 { 725*724ba675SRob Herring nvidia,pins = "kb_row15_ps7"; 726*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 727*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 728*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 729*724ba675SRob Herring }; 730*724ba675SRob Herring kb_row16_pt0 { 731*724ba675SRob Herring nvidia,pins = "kb_row16_pt0"; 732*724ba675SRob Herring nvidia,function = "rsvd2"; 733*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 734*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 735*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 736*724ba675SRob Herring }; 737*724ba675SRob Herring kb_row17_pt1 { 738*724ba675SRob Herring nvidia,pins = "kb_row17_pt1"; 739*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 740*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 741*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 742*724ba675SRob Herring }; 743*724ba675SRob Herring gen2_i2c_scl_pt5 { 744*724ba675SRob Herring nvidia,pins = "gen2_i2c_scl_pt5"; 745*724ba675SRob Herring nvidia,function = "i2c2"; 746*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 747*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 748*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 749*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 750*724ba675SRob Herring }; 751*724ba675SRob Herring gen2_i2c_sda_pt6 { 752*724ba675SRob Herring nvidia,pins = "gen2_i2c_sda_pt6"; 753*724ba675SRob Herring nvidia,function = "i2c2"; 754*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 755*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 756*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 757*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 758*724ba675SRob Herring }; 759*724ba675SRob Herring sdmmc4_cmd_pt7 { 760*724ba675SRob Herring nvidia,pins = "sdmmc4_cmd_pt7"; 761*724ba675SRob Herring nvidia,function = "sdmmc4"; 762*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 763*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 764*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 765*724ba675SRob Herring }; 766*724ba675SRob Herring pu0 { 767*724ba675SRob Herring nvidia,pins = "pu0"; 768*724ba675SRob Herring nvidia,function = "rsvd4"; 769*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 770*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 771*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 772*724ba675SRob Herring }; 773*724ba675SRob Herring pu1 { 774*724ba675SRob Herring nvidia,pins = "pu1"; 775*724ba675SRob Herring nvidia,function = "rsvd1"; 776*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 777*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 778*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 779*724ba675SRob Herring }; 780*724ba675SRob Herring pu2 { 781*724ba675SRob Herring nvidia,pins = "pu2"; 782*724ba675SRob Herring nvidia,function = "rsvd1"; 783*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 784*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 785*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 786*724ba675SRob Herring }; 787*724ba675SRob Herring pu3 { 788*724ba675SRob Herring nvidia,pins = "pu3"; 789*724ba675SRob Herring nvidia,function = "gmi"; 790*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 791*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 792*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 793*724ba675SRob Herring }; 794*724ba675SRob Herring pu4 { 795*724ba675SRob Herring nvidia,pins = "pu4"; 796*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 797*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 798*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 799*724ba675SRob Herring }; 800*724ba675SRob Herring pu5 { 801*724ba675SRob Herring nvidia,pins = "pu5"; 802*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 803*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 804*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 805*724ba675SRob Herring }; 806*724ba675SRob Herring pu6 { 807*724ba675SRob Herring nvidia,pins = "pu6"; 808*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 809*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 810*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 811*724ba675SRob Herring }; 812*724ba675SRob Herring pv0 { 813*724ba675SRob Herring nvidia,pins = "pv0"; 814*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 815*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 816*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 817*724ba675SRob Herring }; 818*724ba675SRob Herring pv1 { 819*724ba675SRob Herring nvidia,pins = "pv1"; 820*724ba675SRob Herring nvidia,function = "rsvd1"; 821*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 822*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 823*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 824*724ba675SRob Herring }; 825*724ba675SRob Herring sdmmc3_cd_n_pv2 { 826*724ba675SRob Herring nvidia,pins = "sdmmc3_cd_n_pv2"; 827*724ba675SRob Herring nvidia,function = "sdmmc3"; 828*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 829*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 830*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 831*724ba675SRob Herring }; 832*724ba675SRob Herring sdmmc1_wp_n_pv3 { 833*724ba675SRob Herring nvidia,pins = "sdmmc1_wp_n_pv3"; 834*724ba675SRob Herring nvidia,function = "sdmmc1"; 835*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 836*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 837*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 838*724ba675SRob Herring }; 839*724ba675SRob Herring ddc_scl_pv4 { 840*724ba675SRob Herring nvidia,pins = "ddc_scl_pv4"; 841*724ba675SRob Herring nvidia,function = "i2c4"; 842*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 843*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 844*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 845*724ba675SRob Herring nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; 846*724ba675SRob Herring }; 847*724ba675SRob Herring ddc_sda_pv5 { 848*724ba675SRob Herring nvidia,pins = "ddc_sda_pv5"; 849*724ba675SRob Herring nvidia,function = "i2c4"; 850*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 851*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 852*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 853*724ba675SRob Herring nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; 854*724ba675SRob Herring }; 855*724ba675SRob Herring gpio_w2_aud_pw2 { 856*724ba675SRob Herring nvidia,pins = "gpio_w2_aud_pw2"; 857*724ba675SRob Herring nvidia,function = "rsvd2"; 858*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 859*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 860*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 861*724ba675SRob Herring }; 862*724ba675SRob Herring gpio_w3_aud_pw3 { 863*724ba675SRob Herring nvidia,pins = "gpio_w3_aud_pw3"; 864*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 865*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 866*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 867*724ba675SRob Herring }; 868*724ba675SRob Herring dap_mclk1_pw4 { 869*724ba675SRob Herring nvidia,pins = "dap_mclk1_pw4"; 870*724ba675SRob Herring nvidia,function = "extperiph1"; 871*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 872*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 873*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 874*724ba675SRob Herring }; 875*724ba675SRob Herring clk2_out_pw5 { 876*724ba675SRob Herring nvidia,pins = "clk2_out_pw5"; 877*724ba675SRob Herring nvidia,function = "rsvd2"; 878*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 879*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 880*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 881*724ba675SRob Herring }; 882*724ba675SRob Herring uart3_txd_pw6 { 883*724ba675SRob Herring nvidia,pins = "uart3_txd_pw6"; 884*724ba675SRob Herring nvidia,function = "rsvd2"; 885*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 886*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 887*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 888*724ba675SRob Herring }; 889*724ba675SRob Herring uart3_rxd_pw7 { 890*724ba675SRob Herring nvidia,pins = "uart3_rxd_pw7"; 891*724ba675SRob Herring nvidia,function = "rsvd2"; 892*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 893*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 894*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 895*724ba675SRob Herring }; 896*724ba675SRob Herring dvfs_pwm_px0 { 897*724ba675SRob Herring nvidia,pins = "dvfs_pwm_px0"; 898*724ba675SRob Herring nvidia,function = "cldvfs"; 899*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 900*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 901*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 902*724ba675SRob Herring }; 903*724ba675SRob Herring gpio_x1_aud_px1 { 904*724ba675SRob Herring nvidia,pins = "gpio_x1_aud_px1"; 905*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 906*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 907*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 908*724ba675SRob Herring }; 909*724ba675SRob Herring dvfs_clk_px2 { 910*724ba675SRob Herring nvidia,pins = "dvfs_clk_px2"; 911*724ba675SRob Herring nvidia,function = "cldvfs"; 912*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 913*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 914*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 915*724ba675SRob Herring }; 916*724ba675SRob Herring gpio_x3_aud_px3 { 917*724ba675SRob Herring nvidia,pins = "gpio_x3_aud_px3"; 918*724ba675SRob Herring nvidia,function = "rsvd4"; 919*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 920*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 921*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 922*724ba675SRob Herring }; 923*724ba675SRob Herring gpio_x4_aud_px4 { 924*724ba675SRob Herring nvidia,pins = "gpio_x4_aud_px4"; 925*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 926*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 927*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 928*724ba675SRob Herring }; 929*724ba675SRob Herring gpio_x5_aud_px5 { 930*724ba675SRob Herring nvidia,pins = "gpio_x5_aud_px5"; 931*724ba675SRob Herring nvidia,function = "rsvd4"; 932*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 933*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 934*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 935*724ba675SRob Herring }; 936*724ba675SRob Herring gpio_x6_aud_px6 { 937*724ba675SRob Herring nvidia,pins = "gpio_x6_aud_px6"; 938*724ba675SRob Herring nvidia,function = "gmi"; 939*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 940*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 941*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 942*724ba675SRob Herring }; 943*724ba675SRob Herring gpio_x7_aud_px7 { 944*724ba675SRob Herring nvidia,pins = "gpio_x7_aud_px7"; 945*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 946*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 947*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 948*724ba675SRob Herring }; 949*724ba675SRob Herring ulpi_clk_py0 { 950*724ba675SRob Herring nvidia,pins = "ulpi_clk_py0"; 951*724ba675SRob Herring nvidia,function = "spi1"; 952*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 953*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 954*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 955*724ba675SRob Herring }; 956*724ba675SRob Herring ulpi_dir_py1 { 957*724ba675SRob Herring nvidia,pins = "ulpi_dir_py1"; 958*724ba675SRob Herring nvidia,function = "spi1"; 959*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 960*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 961*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 962*724ba675SRob Herring }; 963*724ba675SRob Herring ulpi_nxt_py2 { 964*724ba675SRob Herring nvidia,pins = "ulpi_nxt_py2"; 965*724ba675SRob Herring nvidia,function = "spi1"; 966*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 967*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 968*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 969*724ba675SRob Herring }; 970*724ba675SRob Herring ulpi_stp_py3 { 971*724ba675SRob Herring nvidia,pins = "ulpi_stp_py3"; 972*724ba675SRob Herring nvidia,function = "spi1"; 973*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 974*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 975*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 976*724ba675SRob Herring }; 977*724ba675SRob Herring sdmmc1_dat3_py4 { 978*724ba675SRob Herring nvidia,pins = "sdmmc1_dat3_py4"; 979*724ba675SRob Herring nvidia,function = "sdmmc1"; 980*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 981*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 982*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 983*724ba675SRob Herring }; 984*724ba675SRob Herring sdmmc1_dat2_py5 { 985*724ba675SRob Herring nvidia,pins = "sdmmc1_dat2_py5"; 986*724ba675SRob Herring nvidia,function = "sdmmc1"; 987*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 988*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 989*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 990*724ba675SRob Herring }; 991*724ba675SRob Herring sdmmc1_dat1_py6 { 992*724ba675SRob Herring nvidia,pins = "sdmmc1_dat1_py6"; 993*724ba675SRob Herring nvidia,function = "sdmmc1"; 994*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 995*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 996*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 997*724ba675SRob Herring }; 998*724ba675SRob Herring sdmmc1_dat0_py7 { 999*724ba675SRob Herring nvidia,pins = "sdmmc1_dat0_py7"; 1000*724ba675SRob Herring nvidia,function = "sdmmc1"; 1001*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1002*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1003*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1004*724ba675SRob Herring }; 1005*724ba675SRob Herring sdmmc1_clk_pz0 { 1006*724ba675SRob Herring nvidia,pins = "sdmmc1_clk_pz0"; 1007*724ba675SRob Herring nvidia,function = "sdmmc1"; 1008*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1009*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1010*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1011*724ba675SRob Herring }; 1012*724ba675SRob Herring sdmmc1_cmd_pz1 { 1013*724ba675SRob Herring nvidia,pins = "sdmmc1_cmd_pz1"; 1014*724ba675SRob Herring nvidia,function = "sdmmc1"; 1015*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1016*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1017*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1018*724ba675SRob Herring }; 1019*724ba675SRob Herring pwr_i2c_scl_pz6 { 1020*724ba675SRob Herring nvidia,pins = "pwr_i2c_scl_pz6"; 1021*724ba675SRob Herring nvidia,function = "i2cpwr"; 1022*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1023*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1024*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1025*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 1026*724ba675SRob Herring }; 1027*724ba675SRob Herring pwr_i2c_sda_pz7 { 1028*724ba675SRob Herring nvidia,pins = "pwr_i2c_sda_pz7"; 1029*724ba675SRob Herring nvidia,function = "i2cpwr"; 1030*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1031*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1032*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1033*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 1034*724ba675SRob Herring }; 1035*724ba675SRob Herring sdmmc4_dat0_paa0 { 1036*724ba675SRob Herring nvidia,pins = "sdmmc4_dat0_paa0"; 1037*724ba675SRob Herring nvidia,function = "sdmmc4"; 1038*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1039*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1040*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1041*724ba675SRob Herring }; 1042*724ba675SRob Herring sdmmc4_dat1_paa1 { 1043*724ba675SRob Herring nvidia,pins = "sdmmc4_dat1_paa1"; 1044*724ba675SRob Herring nvidia,function = "sdmmc4"; 1045*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1046*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1047*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1048*724ba675SRob Herring }; 1049*724ba675SRob Herring sdmmc4_dat2_paa2 { 1050*724ba675SRob Herring nvidia,pins = "sdmmc4_dat2_paa2"; 1051*724ba675SRob Herring nvidia,function = "sdmmc4"; 1052*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1053*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1054*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1055*724ba675SRob Herring }; 1056*724ba675SRob Herring sdmmc4_dat3_paa3 { 1057*724ba675SRob Herring nvidia,pins = "sdmmc4_dat3_paa3"; 1058*724ba675SRob Herring nvidia,function = "sdmmc4"; 1059*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1060*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1061*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1062*724ba675SRob Herring }; 1063*724ba675SRob Herring sdmmc4_dat4_paa4 { 1064*724ba675SRob Herring nvidia,pins = "sdmmc4_dat4_paa4"; 1065*724ba675SRob Herring nvidia,function = "sdmmc4"; 1066*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1067*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1068*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1069*724ba675SRob Herring }; 1070*724ba675SRob Herring sdmmc4_dat5_paa5 { 1071*724ba675SRob Herring nvidia,pins = "sdmmc4_dat5_paa5"; 1072*724ba675SRob Herring nvidia,function = "sdmmc4"; 1073*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1074*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1075*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1076*724ba675SRob Herring }; 1077*724ba675SRob Herring sdmmc4_dat6_paa6 { 1078*724ba675SRob Herring nvidia,pins = "sdmmc4_dat6_paa6"; 1079*724ba675SRob Herring nvidia,function = "sdmmc4"; 1080*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1081*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1082*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1083*724ba675SRob Herring }; 1084*724ba675SRob Herring sdmmc4_dat7_paa7 { 1085*724ba675SRob Herring nvidia,pins = "sdmmc4_dat7_paa7"; 1086*724ba675SRob Herring nvidia,function = "sdmmc4"; 1087*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1088*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1089*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1090*724ba675SRob Herring }; 1091*724ba675SRob Herring pbb0 { 1092*724ba675SRob Herring nvidia,pins = "pbb0"; 1093*724ba675SRob Herring nvidia,function = "vgp6"; 1094*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1095*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1096*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1097*724ba675SRob Herring }; 1098*724ba675SRob Herring cam_i2c_scl_pbb1 { 1099*724ba675SRob Herring nvidia,pins = "cam_i2c_scl_pbb1"; 1100*724ba675SRob Herring nvidia,function = "i2c3"; 1101*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1102*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1103*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1104*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 1105*724ba675SRob Herring }; 1106*724ba675SRob Herring cam_i2c_sda_pbb2 { 1107*724ba675SRob Herring nvidia,pins = "cam_i2c_sda_pbb2"; 1108*724ba675SRob Herring nvidia,function = "i2c3"; 1109*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1110*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1111*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1112*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 1113*724ba675SRob Herring }; 1114*724ba675SRob Herring pbb3 { 1115*724ba675SRob Herring nvidia,pins = "pbb3"; 1116*724ba675SRob Herring nvidia,function = "vgp3"; 1117*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1118*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1119*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1120*724ba675SRob Herring }; 1121*724ba675SRob Herring pbb4 { 1122*724ba675SRob Herring nvidia,pins = "pbb4"; 1123*724ba675SRob Herring nvidia,function = "vgp4"; 1124*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1125*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1126*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1127*724ba675SRob Herring }; 1128*724ba675SRob Herring pbb5 { 1129*724ba675SRob Herring nvidia,pins = "pbb5"; 1130*724ba675SRob Herring nvidia,function = "rsvd3"; 1131*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1132*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1133*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1134*724ba675SRob Herring }; 1135*724ba675SRob Herring pbb6 { 1136*724ba675SRob Herring nvidia,pins = "pbb6"; 1137*724ba675SRob Herring nvidia,function = "rsvd2"; 1138*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1139*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1140*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1141*724ba675SRob Herring }; 1142*724ba675SRob Herring pbb7 { 1143*724ba675SRob Herring nvidia,pins = "pbb7"; 1144*724ba675SRob Herring nvidia,function = "rsvd2"; 1145*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1146*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1147*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1148*724ba675SRob Herring }; 1149*724ba675SRob Herring cam_mclk_pcc0 { 1150*724ba675SRob Herring nvidia,pins = "cam_mclk_pcc0"; 1151*724ba675SRob Herring nvidia,function = "vi"; 1152*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1153*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1154*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1155*724ba675SRob Herring }; 1156*724ba675SRob Herring pcc1 { 1157*724ba675SRob Herring nvidia,pins = "pcc1"; 1158*724ba675SRob Herring nvidia,function = "rsvd2"; 1159*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1160*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1161*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1162*724ba675SRob Herring }; 1163*724ba675SRob Herring pcc2 { 1164*724ba675SRob Herring nvidia,pins = "pcc2"; 1165*724ba675SRob Herring nvidia,function = "rsvd2"; 1166*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1167*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1168*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1169*724ba675SRob Herring }; 1170*724ba675SRob Herring sdmmc4_clk_pcc4 { 1171*724ba675SRob Herring nvidia,pins = "sdmmc4_clk_pcc4"; 1172*724ba675SRob Herring nvidia,function = "sdmmc4"; 1173*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1174*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1175*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1176*724ba675SRob Herring }; 1177*724ba675SRob Herring clk2_req_pcc5 { 1178*724ba675SRob Herring nvidia,pins = "clk2_req_pcc5"; 1179*724ba675SRob Herring nvidia,function = "rsvd2"; 1180*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1181*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1182*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1183*724ba675SRob Herring }; 1184*724ba675SRob Herring pex_l0_rst_n_pdd1 { 1185*724ba675SRob Herring nvidia,pins = "pex_l0_rst_n_pdd1"; 1186*724ba675SRob Herring nvidia,function = "rsvd2"; 1187*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1188*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1189*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1190*724ba675SRob Herring }; 1191*724ba675SRob Herring pex_l0_clkreq_n_pdd2 { 1192*724ba675SRob Herring nvidia,pins = "pex_l0_clkreq_n_pdd2"; 1193*724ba675SRob Herring nvidia,function = "rsvd2"; 1194*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1195*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1196*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1197*724ba675SRob Herring }; 1198*724ba675SRob Herring pex_wake_n_pdd3 { 1199*724ba675SRob Herring nvidia,pins = "pex_wake_n_pdd3"; 1200*724ba675SRob Herring nvidia,function = "rsvd2"; 1201*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1202*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1203*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1204*724ba675SRob Herring }; 1205*724ba675SRob Herring pex_l1_rst_n_pdd5 { 1206*724ba675SRob Herring nvidia,pins = "pex_l1_rst_n_pdd5"; 1207*724ba675SRob Herring nvidia,function = "rsvd2"; 1208*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1209*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1210*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1211*724ba675SRob Herring }; 1212*724ba675SRob Herring pex_l1_clkreq_n_pdd6 { 1213*724ba675SRob Herring nvidia,pins = "pex_l1_clkreq_n_pdd6"; 1214*724ba675SRob Herring nvidia,function = "rsvd2"; 1215*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1216*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1217*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1218*724ba675SRob Herring }; 1219*724ba675SRob Herring clk3_out_pee0 { 1220*724ba675SRob Herring nvidia,pins = "clk3_out_pee0"; 1221*724ba675SRob Herring nvidia,function = "rsvd2"; 1222*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1223*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1224*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1225*724ba675SRob Herring }; 1226*724ba675SRob Herring clk3_req_pee1 { 1227*724ba675SRob Herring nvidia,pins = "clk3_req_pee1"; 1228*724ba675SRob Herring nvidia,function = "rsvd2"; 1229*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1230*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1231*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1232*724ba675SRob Herring }; 1233*724ba675SRob Herring dap_mclk1_req_pee2 { 1234*724ba675SRob Herring nvidia,pins = "dap_mclk1_req_pee2"; 1235*724ba675SRob Herring nvidia,function = "rsvd4"; 1236*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1237*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1238*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1239*724ba675SRob Herring }; 1240*724ba675SRob Herring hdmi_cec_pee3 { 1241*724ba675SRob Herring nvidia,pins = "hdmi_cec_pee3"; 1242*724ba675SRob Herring nvidia,function = "cec"; 1243*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1244*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1245*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1246*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 1247*724ba675SRob Herring }; 1248*724ba675SRob Herring sdmmc3_clk_lb_out_pee4 { 1249*724ba675SRob Herring nvidia,pins = "sdmmc3_clk_lb_out_pee4"; 1250*724ba675SRob Herring nvidia,function = "sdmmc3"; 1251*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1252*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1253*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1254*724ba675SRob Herring }; 1255*724ba675SRob Herring sdmmc3_clk_lb_in_pee5 { 1256*724ba675SRob Herring nvidia,pins = "sdmmc3_clk_lb_in_pee5"; 1257*724ba675SRob Herring nvidia,function = "sdmmc3"; 1258*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 1259*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1260*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1261*724ba675SRob Herring }; 1262*724ba675SRob Herring dp_hpd_pff0 { 1263*724ba675SRob Herring nvidia,pins = "dp_hpd_pff0"; 1264*724ba675SRob Herring nvidia,function = "dp"; 1265*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1266*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1267*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1268*724ba675SRob Herring }; 1269*724ba675SRob Herring usb_vbus_en2_pff1 { 1270*724ba675SRob Herring nvidia,pins = "usb_vbus_en2_pff1"; 1271*724ba675SRob Herring nvidia,function = "rsvd2"; 1272*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1273*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1274*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1275*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1276*724ba675SRob Herring }; 1277*724ba675SRob Herring pff2 { 1278*724ba675SRob Herring nvidia,pins = "pff2"; 1279*724ba675SRob Herring nvidia,function = "rsvd2"; 1280*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1281*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1282*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1283*724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1284*724ba675SRob Herring }; 1285*724ba675SRob Herring core_pwr_req { 1286*724ba675SRob Herring nvidia,pins = "core_pwr_req"; 1287*724ba675SRob Herring nvidia,function = "pwron"; 1288*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1289*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1290*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1291*724ba675SRob Herring }; 1292*724ba675SRob Herring cpu_pwr_req { 1293*724ba675SRob Herring nvidia,pins = "cpu_pwr_req"; 1294*724ba675SRob Herring nvidia,function = "cpu"; 1295*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1296*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1297*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1298*724ba675SRob Herring }; 1299*724ba675SRob Herring pwr_int_n { 1300*724ba675SRob Herring nvidia,pins = "pwr_int_n"; 1301*724ba675SRob Herring nvidia,function = "pmi"; 1302*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1303*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1304*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1305*724ba675SRob Herring }; 1306*724ba675SRob Herring reset_out_n { 1307*724ba675SRob Herring nvidia,pins = "reset_out_n"; 1308*724ba675SRob Herring nvidia,function = "reset_out_n"; 1309*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1310*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1311*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1312*724ba675SRob Herring }; 1313*724ba675SRob Herring owr { 1314*724ba675SRob Herring nvidia,pins = "owr"; 1315*724ba675SRob Herring nvidia,function = "rsvd2"; 1316*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1317*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 1318*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1319*724ba675SRob Herring nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; 1320*724ba675SRob Herring }; 1321*724ba675SRob Herring clk_32k_in { 1322*724ba675SRob Herring nvidia,pins = "clk_32k_in"; 1323*724ba675SRob Herring nvidia,function = "clk"; 1324*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1325*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1326*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1327*724ba675SRob Herring }; 1328*724ba675SRob Herring jtag_rtck { 1329*724ba675SRob Herring nvidia,pins = "jtag_rtck"; 1330*724ba675SRob Herring nvidia,function = "rtck"; 1331*724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1332*724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 1333*724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1334*724ba675SRob Herring }; 1335*724ba675SRob Herring }; 1336*724ba675SRob Herring }; 1337*724ba675SRob Herring 1338*724ba675SRob Herring mmc@700b0400 { /* SD Card on this bus */ 1339*724ba675SRob Herring wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>; 1340*724ba675SRob Herring }; 1341*724ba675SRob Herring 1342*724ba675SRob Herring sound { 1343*724ba675SRob Herring compatible = "nvidia,tegra-audio-max98090-nyan-big", 1344*724ba675SRob Herring "nvidia,tegra-audio-max98090-nyan", 1345*724ba675SRob Herring "nvidia,tegra-audio-max98090"; 1346*724ba675SRob Herring nvidia,model = "GoogleNyanBig"; 1347*724ba675SRob Herring }; 1348*724ba675SRob Herring}; 1349