1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring
3*724ba675SRob Herring#include <dt-bindings/clock/tegra124-car.h>
4*724ba675SRob Herring
5*724ba675SRob Herring/ {
6*724ba675SRob Herring	clock@60006000 {
7*724ba675SRob Herring		emc-timings-1 {
8*724ba675SRob Herring			nvidia,ram-code = <1>;
9*724ba675SRob Herring
10*724ba675SRob Herring			timing-12750000 {
11*724ba675SRob Herring				clock-frequency = <12750000>;
12*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
13*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
14*724ba675SRob Herring				clock-names = "emc-parent";
15*724ba675SRob Herring			};
16*724ba675SRob Herring
17*724ba675SRob Herring			timing-20400000 {
18*724ba675SRob Herring				clock-frequency = <20400000>;
19*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
20*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
21*724ba675SRob Herring				clock-names = "emc-parent";
22*724ba675SRob Herring			};
23*724ba675SRob Herring
24*724ba675SRob Herring			timing-40800000 {
25*724ba675SRob Herring				clock-frequency = <40800000>;
26*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
27*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
28*724ba675SRob Herring				clock-names = "emc-parent";
29*724ba675SRob Herring			};
30*724ba675SRob Herring
31*724ba675SRob Herring			timing-68000000 {
32*724ba675SRob Herring				clock-frequency = <68000000>;
33*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
34*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
35*724ba675SRob Herring				clock-names = "emc-parent";
36*724ba675SRob Herring			};
37*724ba675SRob Herring
38*724ba675SRob Herring			timing-102000000 {
39*724ba675SRob Herring				clock-frequency = <102000000>;
40*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
41*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
42*724ba675SRob Herring				clock-names = "emc-parent";
43*724ba675SRob Herring			};
44*724ba675SRob Herring
45*724ba675SRob Herring			timing-204000000 {
46*724ba675SRob Herring				clock-frequency = <204000000>;
47*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
48*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
49*724ba675SRob Herring				clock-names = "emc-parent";
50*724ba675SRob Herring			};
51*724ba675SRob Herring
52*724ba675SRob Herring			timing-300000000 {
53*724ba675SRob Herring				clock-frequency = <300000000>;
54*724ba675SRob Herring				nvidia,parent-clock-frequency = <600000000>;
55*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_C>;
56*724ba675SRob Herring				clock-names = "emc-parent";
57*724ba675SRob Herring			};
58*724ba675SRob Herring
59*724ba675SRob Herring			timing-396000000 {
60*724ba675SRob Herring				clock-frequency = <396000000>;
61*724ba675SRob Herring				nvidia,parent-clock-frequency = <792000000>;
62*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_M>;
63*724ba675SRob Herring				clock-names = "emc-parent";
64*724ba675SRob Herring			};
65*724ba675SRob Herring
66*724ba675SRob Herring			timing-528000000 {
67*724ba675SRob Herring				clock-frequency = <528000000>;
68*724ba675SRob Herring				nvidia,parent-clock-frequency = <528000000>;
69*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;
70*724ba675SRob Herring				clock-names = "emc-parent";
71*724ba675SRob Herring			};
72*724ba675SRob Herring
73*724ba675SRob Herring			timing-600000000 {
74*724ba675SRob Herring				clock-frequency = <600000000>;
75*724ba675SRob Herring				nvidia,parent-clock-frequency = <600000000>;
76*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_C_UD>;
77*724ba675SRob Herring				clock-names = "emc-parent";
78*724ba675SRob Herring			};
79*724ba675SRob Herring
80*724ba675SRob Herring			timing-792000000 {
81*724ba675SRob Herring				clock-frequency = <792000000>;
82*724ba675SRob Herring				nvidia,parent-clock-frequency = <792000000>;
83*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;
84*724ba675SRob Herring				clock-names = "emc-parent";
85*724ba675SRob Herring			};
86*724ba675SRob Herring		};
87*724ba675SRob Herring
88*724ba675SRob Herring		emc-timings-4 {
89*724ba675SRob Herring			nvidia,ram-code = <4>;
90*724ba675SRob Herring
91*724ba675SRob Herring			timing-12750000 {
92*724ba675SRob Herring				clock-frequency = <12750000>;
93*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
94*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
95*724ba675SRob Herring				clock-names = "emc-parent";
96*724ba675SRob Herring			};
97*724ba675SRob Herring
98*724ba675SRob Herring			timing-20400000 {
99*724ba675SRob Herring				clock-frequency = <20400000>;
100*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
101*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
102*724ba675SRob Herring				clock-names = "emc-parent";
103*724ba675SRob Herring			};
104*724ba675SRob Herring
105*724ba675SRob Herring			timing-40800000 {
106*724ba675SRob Herring				clock-frequency = <40800000>;
107*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
108*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
109*724ba675SRob Herring				clock-names = "emc-parent";
110*724ba675SRob Herring			};
111*724ba675SRob Herring
112*724ba675SRob Herring			timing-68000000 {
113*724ba675SRob Herring				clock-frequency = <68000000>;
114*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
115*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
116*724ba675SRob Herring				clock-names = "emc-parent";
117*724ba675SRob Herring			};
118*724ba675SRob Herring
119*724ba675SRob Herring			timing-102000000 {
120*724ba675SRob Herring				clock-frequency = <102000000>;
121*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
122*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
123*724ba675SRob Herring				clock-names = "emc-parent";
124*724ba675SRob Herring			};
125*724ba675SRob Herring
126*724ba675SRob Herring			timing-204000000 {
127*724ba675SRob Herring				clock-frequency = <204000000>;
128*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
129*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
130*724ba675SRob Herring				clock-names = "emc-parent";
131*724ba675SRob Herring			};
132*724ba675SRob Herring
133*724ba675SRob Herring			timing-300000000 {
134*724ba675SRob Herring				clock-frequency = <300000000>;
135*724ba675SRob Herring				nvidia,parent-clock-frequency = <600000000>;
136*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_C>;
137*724ba675SRob Herring				clock-names = "emc-parent";
138*724ba675SRob Herring			};
139*724ba675SRob Herring
140*724ba675SRob Herring			timing-396000000 {
141*724ba675SRob Herring				clock-frequency = <396000000>;
142*724ba675SRob Herring				nvidia,parent-clock-frequency = <792000000>;
143*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_M>;
144*724ba675SRob Herring				clock-names = "emc-parent";
145*724ba675SRob Herring			};
146*724ba675SRob Herring
147*724ba675SRob Herring			timing-528000000 {
148*724ba675SRob Herring				clock-frequency = <528000000>;
149*724ba675SRob Herring				nvidia,parent-clock-frequency = <528000000>;
150*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;
151*724ba675SRob Herring				clock-names = "emc-parent";
152*724ba675SRob Herring			};
153*724ba675SRob Herring
154*724ba675SRob Herring			timing-600000000 {
155*724ba675SRob Herring				clock-frequency = <600000000>;
156*724ba675SRob Herring				nvidia,parent-clock-frequency = <600000000>;
157*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_C_UD>;
158*724ba675SRob Herring				clock-names = "emc-parent";
159*724ba675SRob Herring			};
160*724ba675SRob Herring
161*724ba675SRob Herring			timing-792000000 {
162*724ba675SRob Herring				clock-frequency = <792000000>;
163*724ba675SRob Herring				nvidia,parent-clock-frequency = <792000000>;
164*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;
165*724ba675SRob Herring				clock-names = "emc-parent";
166*724ba675SRob Herring			};
167*724ba675SRob Herring		};
168*724ba675SRob Herring
169*724ba675SRob Herring		emc-timings-6 {
170*724ba675SRob Herring			nvidia,ram-code = <6>;
171*724ba675SRob Herring
172*724ba675SRob Herring			timing-12750000 {
173*724ba675SRob Herring				clock-frequency = <12750000>;
174*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
175*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
176*724ba675SRob Herring				clock-names = "emc-parent";
177*724ba675SRob Herring			};
178*724ba675SRob Herring
179*724ba675SRob Herring			timing-20400000 {
180*724ba675SRob Herring				clock-frequency = <20400000>;
181*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
182*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
183*724ba675SRob Herring				clock-names = "emc-parent";
184*724ba675SRob Herring			};
185*724ba675SRob Herring
186*724ba675SRob Herring			timing-40800000 {
187*724ba675SRob Herring				clock-frequency = <40800000>;
188*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
189*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
190*724ba675SRob Herring				clock-names = "emc-parent";
191*724ba675SRob Herring			};
192*724ba675SRob Herring
193*724ba675SRob Herring			timing-68000000 {
194*724ba675SRob Herring				clock-frequency = <68000000>;
195*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
196*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
197*724ba675SRob Herring				clock-names = "emc-parent";
198*724ba675SRob Herring			};
199*724ba675SRob Herring
200*724ba675SRob Herring			timing-102000000 {
201*724ba675SRob Herring				clock-frequency = <102000000>;
202*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
203*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
204*724ba675SRob Herring				clock-names = "emc-parent";
205*724ba675SRob Herring			};
206*724ba675SRob Herring
207*724ba675SRob Herring			timing-204000000 {
208*724ba675SRob Herring				clock-frequency = <204000000>;
209*724ba675SRob Herring				nvidia,parent-clock-frequency = <408000000>;
210*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
211*724ba675SRob Herring				clock-names = "emc-parent";
212*724ba675SRob Herring			};
213*724ba675SRob Herring
214*724ba675SRob Herring			timing-300000000 {
215*724ba675SRob Herring				clock-frequency = <300000000>;
216*724ba675SRob Herring				nvidia,parent-clock-frequency = <600000000>;
217*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_C>;
218*724ba675SRob Herring				clock-names = "emc-parent";
219*724ba675SRob Herring			};
220*724ba675SRob Herring
221*724ba675SRob Herring			timing-396000000 {
222*724ba675SRob Herring				clock-frequency = <396000000>;
223*724ba675SRob Herring				nvidia,parent-clock-frequency = <792000000>;
224*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_M>;
225*724ba675SRob Herring				clock-names = "emc-parent";
226*724ba675SRob Herring			};
227*724ba675SRob Herring
228*724ba675SRob Herring			timing-528000000 {
229*724ba675SRob Herring				clock-frequency = <528000000>;
230*724ba675SRob Herring				nvidia,parent-clock-frequency = <528000000>;
231*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;
232*724ba675SRob Herring				clock-names = "emc-parent";
233*724ba675SRob Herring			};
234*724ba675SRob Herring
235*724ba675SRob Herring			timing-600000000 {
236*724ba675SRob Herring				clock-frequency = <600000000>;
237*724ba675SRob Herring				nvidia,parent-clock-frequency = <600000000>;
238*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_C_UD>;
239*724ba675SRob Herring				clock-names = "emc-parent";
240*724ba675SRob Herring			};
241*724ba675SRob Herring
242*724ba675SRob Herring			timing-792000000 {
243*724ba675SRob Herring				clock-frequency = <792000000>;
244*724ba675SRob Herring				nvidia,parent-clock-frequency = <792000000>;
245*724ba675SRob Herring				clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;
246*724ba675SRob Herring				clock-names = "emc-parent";
247*724ba675SRob Herring			};
248*724ba675SRob Herring		};
249*724ba675SRob Herring	};
250*724ba675SRob Herring
251*724ba675SRob Herring	apbmisc@70000800 {
252*724ba675SRob Herring		nvidia,long-ram-code;
253*724ba675SRob Herring	};
254*724ba675SRob Herring
255*724ba675SRob Herring	memory-controller@70019000 {
256*724ba675SRob Herring		emc-timings-1 {
257*724ba675SRob Herring			nvidia,ram-code = <1>;
258*724ba675SRob Herring
259*724ba675SRob Herring			timing-12750000 {
260*724ba675SRob Herring				clock-frequency = <12750000>;
261*724ba675SRob Herring
262*724ba675SRob Herring				nvidia,emem-configuration = <
263*724ba675SRob Herring					0x40040001 /* MC_EMEM_ARB_CFG */
264*724ba675SRob Herring					0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
265*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
266*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
267*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
268*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
269*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
270*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
271*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
272*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
273*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
274*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
275*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
276*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
277*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
278*724ba675SRob Herring					0x000a0402 /* MC_EMEM_ARB_DA_COVERS */
279*724ba675SRob Herring					0x77e30303 /* MC_EMEM_ARB_MISC0 */
280*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
281*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
282*724ba675SRob Herring				>;
283*724ba675SRob Herring			};
284*724ba675SRob Herring
285*724ba675SRob Herring			timing-20400000 {
286*724ba675SRob Herring				clock-frequency = <20400000>;
287*724ba675SRob Herring
288*724ba675SRob Herring				nvidia,emem-configuration = <
289*724ba675SRob Herring					0x40020001 /* MC_EMEM_ARB_CFG */
290*724ba675SRob Herring					0x80000012 /* MC_EMEM_ARB_OUTSTANDING_REQ */
291*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
292*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
293*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
294*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
295*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
296*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
297*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
298*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
299*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
300*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
301*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
302*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
303*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
304*724ba675SRob Herring					0x000a0402 /* MC_EMEM_ARB_DA_COVERS */
305*724ba675SRob Herring					0x76230303 /* MC_EMEM_ARB_MISC0 */
306*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
307*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
308*724ba675SRob Herring				>;
309*724ba675SRob Herring			};
310*724ba675SRob Herring
311*724ba675SRob Herring			timing-40800000 {
312*724ba675SRob Herring				clock-frequency = <40800000>;
313*724ba675SRob Herring
314*724ba675SRob Herring				nvidia,emem-configuration = <
315*724ba675SRob Herring					0xa0000001 /* MC_EMEM_ARB_CFG */
316*724ba675SRob Herring					0x80000017 /* MC_EMEM_ARB_OUTSTANDING_REQ */
317*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
318*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
319*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
320*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
321*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
322*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
323*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
324*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
325*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
326*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
327*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
328*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
329*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
330*724ba675SRob Herring					0x000a0402 /* MC_EMEM_ARB_DA_COVERS */
331*724ba675SRob Herring					0x74a30303 /* MC_EMEM_ARB_MISC0 */
332*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
333*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
334*724ba675SRob Herring				>;
335*724ba675SRob Herring			};
336*724ba675SRob Herring
337*724ba675SRob Herring			timing-68000000 {
338*724ba675SRob Herring				clock-frequency = <68000000>;
339*724ba675SRob Herring
340*724ba675SRob Herring				nvidia,emem-configuration = <
341*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_CFG */
342*724ba675SRob Herring					0x8000001e /* MC_EMEM_ARB_OUTSTANDING_REQ */
343*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
344*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
345*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
346*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
347*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
348*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
349*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
350*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
351*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
352*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
353*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
354*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
355*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
356*724ba675SRob Herring					0x000a0402 /* MC_EMEM_ARB_DA_COVERS */
357*724ba675SRob Herring					0x74230403 /* MC_EMEM_ARB_MISC0 */
358*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
359*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
360*724ba675SRob Herring				>;
361*724ba675SRob Herring			};
362*724ba675SRob Herring
363*724ba675SRob Herring			timing-102000000 {
364*724ba675SRob Herring				clock-frequency = <102000000>;
365*724ba675SRob Herring
366*724ba675SRob Herring				nvidia,emem-configuration = <
367*724ba675SRob Herring					0x08000001 /* MC_EMEM_ARB_CFG */
368*724ba675SRob Herring					0x80000026 /* MC_EMEM_ARB_OUTSTANDING_REQ */
369*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
370*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
371*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RC */
372*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
373*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
374*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
375*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
376*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
377*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
378*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
379*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
380*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
381*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
382*724ba675SRob Herring					0x000a0403 /* MC_EMEM_ARB_DA_COVERS */
383*724ba675SRob Herring					0x73c30504 /* MC_EMEM_ARB_MISC0 */
384*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
385*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
386*724ba675SRob Herring				>;
387*724ba675SRob Herring			};
388*724ba675SRob Herring
389*724ba675SRob Herring			timing-204000000 {
390*724ba675SRob Herring				clock-frequency = <204000000>;
391*724ba675SRob Herring
392*724ba675SRob Herring				nvidia,emem-configuration = <
393*724ba675SRob Herring					0x01000003 /* MC_EMEM_ARB_CFG */
394*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
395*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
396*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
397*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RC */
398*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
399*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
400*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
401*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
402*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
403*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
404*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
405*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
406*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
407*724ba675SRob Herring					0x06040203 /* MC_EMEM_ARB_DA_TURNS */
408*724ba675SRob Herring					0x000a0405 /* MC_EMEM_ARB_DA_COVERS */
409*724ba675SRob Herring					0x73840a06 /* MC_EMEM_ARB_MISC0 */
410*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
411*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
412*724ba675SRob Herring				>;
413*724ba675SRob Herring			};
414*724ba675SRob Herring
415*724ba675SRob Herring			timing-300000000 {
416*724ba675SRob Herring				clock-frequency = <300000000>;
417*724ba675SRob Herring
418*724ba675SRob Herring				nvidia,emem-configuration = <
419*724ba675SRob Herring					0x08000004 /* MC_EMEM_ARB_CFG */
420*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
421*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
422*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RP */
423*724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_RC */
424*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_RAS */
425*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_FAW */
426*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
427*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
428*724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */
429*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
430*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
431*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
432*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
433*724ba675SRob Herring					0x06040202 /* MC_EMEM_ARB_DA_TURNS */
434*724ba675SRob Herring					0x000b0607 /* MC_EMEM_ARB_DA_COVERS */
435*724ba675SRob Herring					0x77450e08 /* MC_EMEM_ARB_MISC0 */
436*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
437*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
438*724ba675SRob Herring				>;
439*724ba675SRob Herring			};
440*724ba675SRob Herring
441*724ba675SRob Herring			timing-396000000 {
442*724ba675SRob Herring				clock-frequency = <396000000>;
443*724ba675SRob Herring
444*724ba675SRob Herring				nvidia,emem-configuration = <
445*724ba675SRob Herring					0x0f000005 /* MC_EMEM_ARB_CFG */
446*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
447*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
448*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RP */
449*724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_TIMING_RC */
450*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RAS */
451*724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_FAW */
452*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
453*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
454*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
455*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
456*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
457*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
458*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
459*724ba675SRob Herring					0x06040202 /* MC_EMEM_ARB_DA_TURNS */
460*724ba675SRob Herring					0x000d0709 /* MC_EMEM_ARB_DA_COVERS */
461*724ba675SRob Herring					0x7586120a /* MC_EMEM_ARB_MISC0 */
462*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
463*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
464*724ba675SRob Herring				>;
465*724ba675SRob Herring			};
466*724ba675SRob Herring
467*724ba675SRob Herring			timing-528000000 {
468*724ba675SRob Herring				clock-frequency = <528000000>;
469*724ba675SRob Herring
470*724ba675SRob Herring				nvidia,emem-configuration = <
471*724ba675SRob Herring					0x0f000007 /* MC_EMEM_ARB_CFG */
472*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
473*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RCD */
474*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RP */
475*724ba675SRob Herring					0x0000000d /* MC_EMEM_ARB_TIMING_RC */
476*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_RAS */
477*724ba675SRob Herring					0x0000000a /* MC_EMEM_ARB_TIMING_FAW */
478*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
479*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
480*724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_TIMING_WAP2PRE */
481*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
482*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
483*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_R2W */
484*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
485*724ba675SRob Herring					0x06050202 /* MC_EMEM_ARB_DA_TURNS */
486*724ba675SRob Herring					0x0010090d /* MC_EMEM_ARB_DA_COVERS */
487*724ba675SRob Herring					0x7428180e /* MC_EMEM_ARB_MISC0 */
488*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
489*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
490*724ba675SRob Herring				>;
491*724ba675SRob Herring			};
492*724ba675SRob Herring
493*724ba675SRob Herring			timing-600000000 {
494*724ba675SRob Herring				clock-frequency = <600000000>;
495*724ba675SRob Herring
496*724ba675SRob Herring				nvidia,emem-configuration = <
497*724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_CFG */
498*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
499*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RCD */
500*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_RP */
501*724ba675SRob Herring					0x0000000e /* MC_EMEM_ARB_TIMING_RC */
502*724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_TIMING_RAS */
503*724ba675SRob Herring					0x0000000b /* MC_EMEM_ARB_TIMING_FAW */
504*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
505*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
506*724ba675SRob Herring					0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */
507*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
508*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
509*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_R2W */
510*724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_W2R */
511*724ba675SRob Herring					0x07050202 /* MC_EMEM_ARB_DA_TURNS */
512*724ba675SRob Herring					0x00130b0e /* MC_EMEM_ARB_DA_COVERS */
513*724ba675SRob Herring					0x73a91b0f /* MC_EMEM_ARB_MISC0 */
514*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
515*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
516*724ba675SRob Herring				>;
517*724ba675SRob Herring			};
518*724ba675SRob Herring
519*724ba675SRob Herring			timing-792000000 {
520*724ba675SRob Herring				clock-frequency = <792000000>;
521*724ba675SRob Herring
522*724ba675SRob Herring				nvidia,emem-configuration = <
523*724ba675SRob Herring					0x0e00000b /* MC_EMEM_ARB_CFG */
524*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
525*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_RCD */
526*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RP */
527*724ba675SRob Herring					0x00000013 /* MC_EMEM_ARB_TIMING_RC */
528*724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_TIMING_RAS */
529*724ba675SRob Herring					0x0000000f /* MC_EMEM_ARB_TIMING_FAW */
530*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RRD */
531*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
532*724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */
533*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
534*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
535*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_R2W */
536*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
537*724ba675SRob Herring					0x08060202 /* MC_EMEM_ARB_DA_TURNS */
538*724ba675SRob Herring					0x00160d13 /* MC_EMEM_ARB_DA_COVERS */
539*724ba675SRob Herring					0x734c2414 /* MC_EMEM_ARB_MISC0 */
540*724ba675SRob Herring					0x70000f02 /* MC_EMEM_ARB_MISC1 */
541*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
542*724ba675SRob Herring				>;
543*724ba675SRob Herring			};
544*724ba675SRob Herring		};
545*724ba675SRob Herring
546*724ba675SRob Herring		emc-timings-4 {
547*724ba675SRob Herring			nvidia,ram-code = <4>;
548*724ba675SRob Herring
549*724ba675SRob Herring			timing-12750000 {
550*724ba675SRob Herring				clock-frequency = <12750000>;
551*724ba675SRob Herring
552*724ba675SRob Herring				nvidia,emem-configuration = <
553*724ba675SRob Herring					0x40040001 /* MC_EMEM_ARB_CFG */
554*724ba675SRob Herring					0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
555*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
556*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
557*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
558*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
559*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
560*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
561*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
562*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
563*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
564*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
565*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
566*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
567*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
568*724ba675SRob Herring					0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
569*724ba675SRob Herring					0x77e30303 /* MC_EMEM_ARB_MISC0 */
570*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
571*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
572*724ba675SRob Herring				>;
573*724ba675SRob Herring			};
574*724ba675SRob Herring
575*724ba675SRob Herring			timing-20400000 {
576*724ba675SRob Herring				clock-frequency = <20400000>;
577*724ba675SRob Herring
578*724ba675SRob Herring				nvidia,emem-configuration = <
579*724ba675SRob Herring					0x40020001 /* MC_EMEM_ARB_CFG */
580*724ba675SRob Herring					0x80000012 /* MC_EMEM_ARB_OUTSTANDING_REQ */
581*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
582*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
583*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
584*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
585*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
586*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
587*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
588*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
589*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
590*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
591*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
592*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
593*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
594*724ba675SRob Herring					0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
595*724ba675SRob Herring					0x77430303 /* MC_EMEM_ARB_MISC0 */
596*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
597*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
598*724ba675SRob Herring				>;
599*724ba675SRob Herring			};
600*724ba675SRob Herring
601*724ba675SRob Herring			timing-40800000 {
602*724ba675SRob Herring				clock-frequency = <40800000>;
603*724ba675SRob Herring
604*724ba675SRob Herring				nvidia,emem-configuration = <
605*724ba675SRob Herring					0xa0000001 /* MC_EMEM_ARB_CFG */
606*724ba675SRob Herring					0x80000017 /* MC_EMEM_ARB_OUTSTANDING_REQ */
607*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
608*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
609*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
610*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
611*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
612*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
613*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
614*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
615*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
616*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
617*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
618*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
619*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
620*724ba675SRob Herring					0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
621*724ba675SRob Herring					0x75e30303 /* MC_EMEM_ARB_MISC0 */
622*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
623*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
624*724ba675SRob Herring				>;
625*724ba675SRob Herring			};
626*724ba675SRob Herring
627*724ba675SRob Herring			timing-68000000 {
628*724ba675SRob Herring				clock-frequency = <68000000>;
629*724ba675SRob Herring
630*724ba675SRob Herring				nvidia,emem-configuration = <
631*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_CFG */
632*724ba675SRob Herring					0x8000001e /* MC_EMEM_ARB_OUTSTANDING_REQ */
633*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
634*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
635*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
636*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
637*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
638*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
639*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
640*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
641*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
642*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
643*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
644*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
645*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
646*724ba675SRob Herring					0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
647*724ba675SRob Herring					0x75430403 /* MC_EMEM_ARB_MISC0 */
648*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
649*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
650*724ba675SRob Herring				>;
651*724ba675SRob Herring			};
652*724ba675SRob Herring
653*724ba675SRob Herring			timing-102000000 {
654*724ba675SRob Herring				clock-frequency = <102000000>;
655*724ba675SRob Herring
656*724ba675SRob Herring				nvidia,emem-configuration = <
657*724ba675SRob Herring					0x08000001 /* MC_EMEM_ARB_CFG */
658*724ba675SRob Herring					0x80000026 /* MC_EMEM_ARB_OUTSTANDING_REQ */
659*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
660*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
661*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RC */
662*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
663*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
664*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
665*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
666*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
667*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
668*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
669*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
670*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
671*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
672*724ba675SRob Herring					0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
673*724ba675SRob Herring					0x74e30504 /* MC_EMEM_ARB_MISC0 */
674*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
675*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
676*724ba675SRob Herring				>;
677*724ba675SRob Herring			};
678*724ba675SRob Herring
679*724ba675SRob Herring			timing-204000000 {
680*724ba675SRob Herring				clock-frequency = <204000000>;
681*724ba675SRob Herring
682*724ba675SRob Herring				nvidia,emem-configuration = <
683*724ba675SRob Herring					0x01000003 /* MC_EMEM_ARB_CFG */
684*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
685*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
686*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
687*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_RC */
688*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
689*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
690*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
691*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
692*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
693*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
694*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
695*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
696*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
697*724ba675SRob Herring					0x06040203 /* MC_EMEM_ARB_DA_TURNS */
698*724ba675SRob Herring					0x000a0504 /* MC_EMEM_ARB_DA_COVERS */
699*724ba675SRob Herring					0x74a40a05 /* MC_EMEM_ARB_MISC0 */
700*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
701*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
702*724ba675SRob Herring				>;
703*724ba675SRob Herring			};
704*724ba675SRob Herring
705*724ba675SRob Herring			timing-300000000 {
706*724ba675SRob Herring				clock-frequency = <300000000>;
707*724ba675SRob Herring
708*724ba675SRob Herring				nvidia,emem-configuration = <
709*724ba675SRob Herring					0x08000004 /* MC_EMEM_ARB_CFG */
710*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
711*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
712*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RP */
713*724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_RC */
714*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_RAS */
715*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_FAW */
716*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
717*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
718*724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */
719*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
720*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
721*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
722*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
723*724ba675SRob Herring					0x06040202 /* MC_EMEM_ARB_DA_TURNS */
724*724ba675SRob Herring					0x000b0607 /* MC_EMEM_ARB_DA_COVERS */
725*724ba675SRob Herring					0x77450e08 /* MC_EMEM_ARB_MISC0 */
726*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
727*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
728*724ba675SRob Herring				>;
729*724ba675SRob Herring			};
730*724ba675SRob Herring
731*724ba675SRob Herring			timing-396000000 {
732*724ba675SRob Herring				clock-frequency = <396000000>;
733*724ba675SRob Herring
734*724ba675SRob Herring				nvidia,emem-configuration = <
735*724ba675SRob Herring					0x0f000005 /* MC_EMEM_ARB_CFG */
736*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
737*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
738*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RP */
739*724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_TIMING_RC */
740*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RAS */
741*724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_FAW */
742*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
743*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
744*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
745*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
746*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
747*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
748*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
749*724ba675SRob Herring					0x06040202 /* MC_EMEM_ARB_DA_TURNS */
750*724ba675SRob Herring					0x000d0709 /* MC_EMEM_ARB_DA_COVERS */
751*724ba675SRob Herring					0x7586120a /* MC_EMEM_ARB_MISC0 */
752*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
753*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
754*724ba675SRob Herring				>;
755*724ba675SRob Herring			};
756*724ba675SRob Herring
757*724ba675SRob Herring			timing-528000000 {
758*724ba675SRob Herring				clock-frequency = <528000000>;
759*724ba675SRob Herring
760*724ba675SRob Herring				nvidia,emem-configuration = <
761*724ba675SRob Herring					0x0f000007 /* MC_EMEM_ARB_CFG */
762*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
763*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RCD */
764*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RP */
765*724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_TIMING_RC */
766*724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_RAS */
767*724ba675SRob Herring					0x0000000a /* MC_EMEM_ARB_TIMING_FAW */
768*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
769*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
770*724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_TIMING_WAP2PRE */
771*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
772*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
773*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_R2W */
774*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
775*724ba675SRob Herring					0x06050202 /* MC_EMEM_ARB_DA_TURNS */
776*724ba675SRob Herring					0x0010090c /* MC_EMEM_ARB_DA_COVERS */
777*724ba675SRob Herring					0x7488180d /* MC_EMEM_ARB_MISC0 */
778*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
779*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
780*724ba675SRob Herring				>;
781*724ba675SRob Herring			};
782*724ba675SRob Herring
783*724ba675SRob Herring			timing-600000000 {
784*724ba675SRob Herring				clock-frequency = <600000000>;
785*724ba675SRob Herring
786*724ba675SRob Herring				nvidia,emem-configuration = <
787*724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_CFG */
788*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
789*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RCD */
790*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_RP */
791*724ba675SRob Herring					0x0000000e /* MC_EMEM_ARB_TIMING_RC */
792*724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_TIMING_RAS */
793*724ba675SRob Herring					0x0000000b /* MC_EMEM_ARB_TIMING_FAW */
794*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
795*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
796*724ba675SRob Herring					0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */
797*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
798*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
799*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_R2W */
800*724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_W2R */
801*724ba675SRob Herring					0x07050202 /* MC_EMEM_ARB_DA_TURNS */
802*724ba675SRob Herring					0x00130b0e /* MC_EMEM_ARB_DA_COVERS */
803*724ba675SRob Herring					0x74691b0f /* MC_EMEM_ARB_MISC0 */
804*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
805*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
806*724ba675SRob Herring				>;
807*724ba675SRob Herring			};
808*724ba675SRob Herring
809*724ba675SRob Herring			timing-792000000 {
810*724ba675SRob Herring				clock-frequency = <792000000>;
811*724ba675SRob Herring
812*724ba675SRob Herring				nvidia,emem-configuration = <
813*724ba675SRob Herring					0x0e00000b /* MC_EMEM_ARB_CFG */
814*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
815*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_RCD */
816*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RP */
817*724ba675SRob Herring					0x00000013 /* MC_EMEM_ARB_TIMING_RC */
818*724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_TIMING_RAS */
819*724ba675SRob Herring					0x0000000f /* MC_EMEM_ARB_TIMING_FAW */
820*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RRD */
821*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
822*724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */
823*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
824*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
825*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_R2W */
826*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
827*724ba675SRob Herring					0x08060202 /* MC_EMEM_ARB_DA_TURNS */
828*724ba675SRob Herring					0x00170e13 /* MC_EMEM_ARB_DA_COVERS */
829*724ba675SRob Herring					0x746c2414 /* MC_EMEM_ARB_MISC0 */
830*724ba675SRob Herring					0x70000f02 /* MC_EMEM_ARB_MISC1 */
831*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
832*724ba675SRob Herring				>;
833*724ba675SRob Herring			};
834*724ba675SRob Herring		};
835*724ba675SRob Herring
836*724ba675SRob Herring		emc-timings-6 {
837*724ba675SRob Herring			nvidia,ram-code = <6>;
838*724ba675SRob Herring
839*724ba675SRob Herring			timing-12750000 {
840*724ba675SRob Herring				clock-frequency = <12750000>;
841*724ba675SRob Herring
842*724ba675SRob Herring				nvidia,emem-configuration = <
843*724ba675SRob Herring					0x40040001 /* MC_EMEM_ARB_CFG */
844*724ba675SRob Herring					0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
845*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
846*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
847*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
848*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
849*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
850*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
851*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
852*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
853*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
854*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
855*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
856*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
857*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
858*724ba675SRob Herring					0x000a0402 /* MC_EMEM_ARB_DA_COVERS */
859*724ba675SRob Herring					0x77e30303 /* MC_EMEM_ARB_MISC0 */
860*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
861*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
862*724ba675SRob Herring				>;
863*724ba675SRob Herring			};
864*724ba675SRob Herring
865*724ba675SRob Herring			timing-20400000 {
866*724ba675SRob Herring				clock-frequency = <20400000>;
867*724ba675SRob Herring
868*724ba675SRob Herring				nvidia,emem-configuration = <
869*724ba675SRob Herring					0x40020001 /* MC_EMEM_ARB_CFG */
870*724ba675SRob Herring					0x80000012 /* MC_EMEM_ARB_OUTSTANDING_REQ */
871*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
872*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
873*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
874*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
875*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
876*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
877*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
878*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
879*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
880*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
881*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
882*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
883*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
884*724ba675SRob Herring					0x000a0402 /* MC_EMEM_ARB_DA_COVERS */
885*724ba675SRob Herring					0x76230303 /* MC_EMEM_ARB_MISC0 */
886*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
887*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
888*724ba675SRob Herring				>;
889*724ba675SRob Herring			};
890*724ba675SRob Herring
891*724ba675SRob Herring			timing-40800000 {
892*724ba675SRob Herring				clock-frequency = <40800000>;
893*724ba675SRob Herring
894*724ba675SRob Herring				nvidia,emem-configuration = <
895*724ba675SRob Herring					0xa0000001 /* MC_EMEM_ARB_CFG */
896*724ba675SRob Herring					0x80000017 /* MC_EMEM_ARB_OUTSTANDING_REQ */
897*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
898*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
899*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
900*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
901*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
902*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
903*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
904*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
905*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
906*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
907*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
908*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
909*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
910*724ba675SRob Herring					0x000a0402 /* MC_EMEM_ARB_DA_COVERS */
911*724ba675SRob Herring					0x74a30303 /* MC_EMEM_ARB_MISC0 */
912*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
913*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
914*724ba675SRob Herring				>;
915*724ba675SRob Herring			};
916*724ba675SRob Herring
917*724ba675SRob Herring			timing-68000000 {
918*724ba675SRob Herring				clock-frequency = <68000000>;
919*724ba675SRob Herring
920*724ba675SRob Herring				nvidia,emem-configuration = <
921*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_CFG */
922*724ba675SRob Herring					0x8000001e /* MC_EMEM_ARB_OUTSTANDING_REQ */
923*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
924*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
925*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RC */
926*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
927*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
928*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
929*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
930*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
931*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
932*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
933*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
934*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
935*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
936*724ba675SRob Herring					0x000a0402 /* MC_EMEM_ARB_DA_COVERS */
937*724ba675SRob Herring					0x74230403 /* MC_EMEM_ARB_MISC0 */
938*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
939*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
940*724ba675SRob Herring				>;
941*724ba675SRob Herring			};
942*724ba675SRob Herring
943*724ba675SRob Herring			timing-102000000 {
944*724ba675SRob Herring				clock-frequency = <102000000>;
945*724ba675SRob Herring
946*724ba675SRob Herring				nvidia,emem-configuration = <
947*724ba675SRob Herring					0x08000001 /* MC_EMEM_ARB_CFG */
948*724ba675SRob Herring					0x80000026 /* MC_EMEM_ARB_OUTSTANDING_REQ */
949*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
950*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
951*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RC */
952*724ba675SRob Herring					0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
953*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
954*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
955*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
956*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
957*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
958*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
959*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
960*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
961*724ba675SRob Herring					0x06030203 /* MC_EMEM_ARB_DA_TURNS */
962*724ba675SRob Herring					0x000a0403 /* MC_EMEM_ARB_DA_COVERS */
963*724ba675SRob Herring					0x73c30504 /* MC_EMEM_ARB_MISC0 */
964*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
965*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
966*724ba675SRob Herring				>;
967*724ba675SRob Herring			};
968*724ba675SRob Herring
969*724ba675SRob Herring			timing-204000000 {
970*724ba675SRob Herring				clock-frequency = <204000000>;
971*724ba675SRob Herring
972*724ba675SRob Herring				nvidia,emem-configuration = <
973*724ba675SRob Herring					0x01000003 /* MC_EMEM_ARB_CFG */
974*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
975*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
976*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RP */
977*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RC */
978*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
979*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
980*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
981*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
982*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
983*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_R2R */
984*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
985*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
986*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
987*724ba675SRob Herring					0x06040203 /* MC_EMEM_ARB_DA_TURNS */
988*724ba675SRob Herring					0x000a0405 /* MC_EMEM_ARB_DA_COVERS */
989*724ba675SRob Herring					0x73840a06 /* MC_EMEM_ARB_MISC0 */
990*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
991*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
992*724ba675SRob Herring				>;
993*724ba675SRob Herring			};
994*724ba675SRob Herring
995*724ba675SRob Herring			timing-300000000 {
996*724ba675SRob Herring				clock-frequency = <300000000>;
997*724ba675SRob Herring
998*724ba675SRob Herring				nvidia,emem-configuration = <
999*724ba675SRob Herring					0x08000004 /* MC_EMEM_ARB_CFG */
1000*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
1001*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
1002*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RP */
1003*724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_RC */
1004*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_RAS */
1005*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_FAW */
1006*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
1007*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
1008*724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */
1009*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
1010*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
1011*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
1012*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
1013*724ba675SRob Herring					0x06040202 /* MC_EMEM_ARB_DA_TURNS */
1014*724ba675SRob Herring					0x000b0607 /* MC_EMEM_ARB_DA_COVERS */
1015*724ba675SRob Herring					0x77450e08 /* MC_EMEM_ARB_MISC0 */
1016*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
1017*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
1018*724ba675SRob Herring				>;
1019*724ba675SRob Herring			};
1020*724ba675SRob Herring
1021*724ba675SRob Herring			timing-396000000 {
1022*724ba675SRob Herring				clock-frequency = <396000000>;
1023*724ba675SRob Herring
1024*724ba675SRob Herring				nvidia,emem-configuration = <
1025*724ba675SRob Herring					0x0f000005 /* MC_EMEM_ARB_CFG */
1026*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
1027*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
1028*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RP */
1029*724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_TIMING_RC */
1030*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RAS */
1031*724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_FAW */
1032*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
1033*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
1034*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
1035*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
1036*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
1037*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
1038*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
1039*724ba675SRob Herring					0x06040202 /* MC_EMEM_ARB_DA_TURNS */
1040*724ba675SRob Herring					0x000d0709 /* MC_EMEM_ARB_DA_COVERS */
1041*724ba675SRob Herring					0x7586120a /* MC_EMEM_ARB_MISC0 */
1042*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
1043*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
1044*724ba675SRob Herring				>;
1045*724ba675SRob Herring			};
1046*724ba675SRob Herring
1047*724ba675SRob Herring			timing-528000000 {
1048*724ba675SRob Herring				clock-frequency = <528000000>;
1049*724ba675SRob Herring
1050*724ba675SRob Herring				nvidia,emem-configuration = <
1051*724ba675SRob Herring					0x0f000007 /* MC_EMEM_ARB_CFG */
1052*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
1053*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RCD */
1054*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RP */
1055*724ba675SRob Herring					0x0000000d /* MC_EMEM_ARB_TIMING_RC */
1056*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_RAS */
1057*724ba675SRob Herring					0x0000000a /* MC_EMEM_ARB_TIMING_FAW */
1058*724ba675SRob Herring					0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
1059*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
1060*724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_TIMING_WAP2PRE */
1061*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
1062*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
1063*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_R2W */
1064*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
1065*724ba675SRob Herring					0x06050202 /* MC_EMEM_ARB_DA_TURNS */
1066*724ba675SRob Herring					0x0010090d /* MC_EMEM_ARB_DA_COVERS */
1067*724ba675SRob Herring					0x7428180e /* MC_EMEM_ARB_MISC0 */
1068*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
1069*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
1070*724ba675SRob Herring				>;
1071*724ba675SRob Herring			};
1072*724ba675SRob Herring
1073*724ba675SRob Herring			timing-600000000 {
1074*724ba675SRob Herring				clock-frequency = <600000000>;
1075*724ba675SRob Herring
1076*724ba675SRob Herring				nvidia,emem-configuration = <
1077*724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_CFG */
1078*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
1079*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RCD */
1080*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_RP */
1081*724ba675SRob Herring					0x0000000e /* MC_EMEM_ARB_TIMING_RC */
1082*724ba675SRob Herring					0x00000009 /* MC_EMEM_ARB_TIMING_RAS */
1083*724ba675SRob Herring					0x0000000b /* MC_EMEM_ARB_TIMING_FAW */
1084*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RRD */
1085*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
1086*724ba675SRob Herring					0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */
1087*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
1088*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
1089*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_R2W */
1090*724ba675SRob Herring					0x00000007 /* MC_EMEM_ARB_TIMING_W2R */
1091*724ba675SRob Herring					0x07050202 /* MC_EMEM_ARB_DA_TURNS */
1092*724ba675SRob Herring					0x00130b0e /* MC_EMEM_ARB_DA_COVERS */
1093*724ba675SRob Herring					0x73a91b0f /* MC_EMEM_ARB_MISC0 */
1094*724ba675SRob Herring					0x70000f03 /* MC_EMEM_ARB_MISC1 */
1095*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
1096*724ba675SRob Herring				>;
1097*724ba675SRob Herring			};
1098*724ba675SRob Herring
1099*724ba675SRob Herring			timing-792000000 {
1100*724ba675SRob Herring				clock-frequency = <792000000>;
1101*724ba675SRob Herring
1102*724ba675SRob Herring				nvidia,emem-configuration = <
1103*724ba675SRob Herring					0x0e00000b /* MC_EMEM_ARB_CFG */
1104*724ba675SRob Herring					0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */
1105*724ba675SRob Herring					0x00000004 /* MC_EMEM_ARB_TIMING_RCD */
1106*724ba675SRob Herring					0x00000005 /* MC_EMEM_ARB_TIMING_RP */
1107*724ba675SRob Herring					0x00000013 /* MC_EMEM_ARB_TIMING_RC */
1108*724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_TIMING_RAS */
1109*724ba675SRob Herring					0x0000000f /* MC_EMEM_ARB_TIMING_FAW */
1110*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_RRD */
1111*724ba675SRob Herring					0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
1112*724ba675SRob Herring					0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */
1113*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
1114*724ba675SRob Herring					0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
1115*724ba675SRob Herring					0x00000006 /* MC_EMEM_ARB_TIMING_R2W */
1116*724ba675SRob Herring					0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
1117*724ba675SRob Herring					0x08060202 /* MC_EMEM_ARB_DA_TURNS */
1118*724ba675SRob Herring					0x00160d13 /* MC_EMEM_ARB_DA_COVERS */
1119*724ba675SRob Herring					0x734c2414 /* MC_EMEM_ARB_MISC0 */
1120*724ba675SRob Herring					0x70000f02 /* MC_EMEM_ARB_MISC1 */
1121*724ba675SRob Herring					0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
1122*724ba675SRob Herring				>;
1123*724ba675SRob Herring			};
1124*724ba675SRob Herring		};
1125*724ba675SRob Herring	};
1126*724ba675SRob Herring
1127*724ba675SRob Herring	external-memory-controller@7001b000 {
1128*724ba675SRob Herring		emc-timings-1 {
1129*724ba675SRob Herring			nvidia,ram-code = <1>;
1130*724ba675SRob Herring
1131*724ba675SRob Herring			timing-12750000 {
1132*724ba675SRob Herring				clock-frequency = <12750000>;
1133*724ba675SRob Herring
1134*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
1135*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
1136*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
1137*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
1138*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
1139*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
1140*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
1141*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
1142*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
1143*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
1144*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
1145*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
1146*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000c000c>;
1147*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
1148*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
1149*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
1150*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
1151*724ba675SRob Herring
1152*724ba675SRob Herring				nvidia,emc-configuration = <
1153*724ba675SRob Herring					0x00000000 /* EMC_RC */
1154*724ba675SRob Herring					0x00000003 /* EMC_RFC */
1155*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
1156*724ba675SRob Herring					0x00000000 /* EMC_RAS */
1157*724ba675SRob Herring					0x00000000 /* EMC_RP */
1158*724ba675SRob Herring					0x00000004 /* EMC_R2W */
1159*724ba675SRob Herring					0x0000000a /* EMC_W2R */
1160*724ba675SRob Herring					0x00000003 /* EMC_R2P */
1161*724ba675SRob Herring					0x0000000b /* EMC_W2P */
1162*724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
1163*724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
1164*724ba675SRob Herring					0x00000003 /* EMC_RRD */
1165*724ba675SRob Herring					0x00000003 /* EMC_REXT */
1166*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
1167*724ba675SRob Herring					0x00000006 /* EMC_WDV */
1168*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
1169*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
1170*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
1171*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
1172*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
1173*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
1174*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
1175*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
1176*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
1177*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
1178*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
1179*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
1180*724ba675SRob Herring					0x00000004 /* EMC_QRST */
1181*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
1182*724ba675SRob Herring					0x0000000d /* EMC_RDV */
1183*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
1184*724ba675SRob Herring					0x00000060 /* EMC_REFRESH */
1185*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
1186*724ba675SRob Herring					0x00000018 /* EMC_PRE_REFRESH_REQ_CNT */
1187*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
1188*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
1189*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
1190*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
1191*724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
1192*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
1193*724ba675SRob Herring					0x00000005 /* EMC_TXSR */
1194*724ba675SRob Herring					0x00000005 /* EMC_TXSRDLL */
1195*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
1196*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
1197*724ba675SRob Herring					0x00000004 /* EMC_TPD */
1198*724ba675SRob Herring					0x00000000 /* EMC_TFAW */
1199*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
1200*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
1201*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
1202*724ba675SRob Herring					0x00000064 /* EMC_TREFBW */
1203*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
1204*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
1205*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
1206*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
1207*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
1208*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1209*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
1210*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
1211*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
1212*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
1213*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
1214*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
1215*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
1216*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
1217*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
1218*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
1219*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
1220*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
1221*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
1222*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
1223*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
1224*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
1225*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1226*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1227*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1228*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1229*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1230*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1231*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1232*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1233*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
1234*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
1235*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
1236*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
1237*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
1238*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
1239*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
1240*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
1241*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
1242*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
1243*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
1244*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
1245*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
1246*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
1247*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1248*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1249*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1250*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1251*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1252*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1253*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1254*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1255*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
1256*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
1257*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
1258*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
1259*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
1260*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
1261*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
1262*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
1263*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1264*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1265*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1266*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1267*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ4 */
1268*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ5 */
1269*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ6 */
1270*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ7 */
1271*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
1272*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
1273*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
1274*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
1275*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
1276*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
1277*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
1278*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
1279*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
1280*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
1281*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
1282*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
1283*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
1284*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
1285*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
1286*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
1287*724ba675SRob Herring					0x00000007 /* EMC_TXDSRVTTGEN */
1288*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
1289*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
1290*724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT2 */
1291*724ba675SRob Herring					0x00000000 /* EMC_CTT */
1292*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
1293*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
1294*724ba675SRob Herring					0x800001c5 /* EMC_DYN_SELF_REF_CONTROL */
1295*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
1296*724ba675SRob Herring				>;
1297*724ba675SRob Herring			};
1298*724ba675SRob Herring
1299*724ba675SRob Herring			timing-20400000 {
1300*724ba675SRob Herring				clock-frequency = <20400000>;
1301*724ba675SRob Herring
1302*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
1303*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
1304*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
1305*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
1306*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
1307*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
1308*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
1309*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
1310*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
1311*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
1312*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
1313*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
1314*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000c000c>;
1315*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
1316*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
1317*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
1318*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
1319*724ba675SRob Herring
1320*724ba675SRob Herring				nvidia,emc-configuration = <
1321*724ba675SRob Herring					0x00000000 /* EMC_RC */
1322*724ba675SRob Herring					0x00000005 /* EMC_RFC */
1323*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
1324*724ba675SRob Herring					0x00000000 /* EMC_RAS */
1325*724ba675SRob Herring					0x00000000 /* EMC_RP */
1326*724ba675SRob Herring					0x00000004 /* EMC_R2W */
1327*724ba675SRob Herring					0x0000000a /* EMC_W2R */
1328*724ba675SRob Herring					0x00000003 /* EMC_R2P */
1329*724ba675SRob Herring					0x0000000b /* EMC_W2P */
1330*724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
1331*724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
1332*724ba675SRob Herring					0x00000003 /* EMC_RRD */
1333*724ba675SRob Herring					0x00000003 /* EMC_REXT */
1334*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
1335*724ba675SRob Herring					0x00000006 /* EMC_WDV */
1336*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
1337*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
1338*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
1339*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
1340*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
1341*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
1342*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
1343*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
1344*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
1345*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
1346*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
1347*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
1348*724ba675SRob Herring					0x00000004 /* EMC_QRST */
1349*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
1350*724ba675SRob Herring					0x0000000d /* EMC_RDV */
1351*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
1352*724ba675SRob Herring					0x0000009a /* EMC_REFRESH */
1353*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
1354*724ba675SRob Herring					0x00000026 /* EMC_PRE_REFRESH_REQ_CNT */
1355*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
1356*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
1357*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
1358*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
1359*724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
1360*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
1361*724ba675SRob Herring					0x00000006 /* EMC_TXSR */
1362*724ba675SRob Herring					0x00000006 /* EMC_TXSRDLL */
1363*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
1364*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
1365*724ba675SRob Herring					0x00000004 /* EMC_TPD */
1366*724ba675SRob Herring					0x00000000 /* EMC_TFAW */
1367*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
1368*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
1369*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
1370*724ba675SRob Herring					0x000000a0 /* EMC_TREFBW */
1371*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
1372*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
1373*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
1374*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
1375*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
1376*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1377*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
1378*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
1379*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
1380*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
1381*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
1382*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
1383*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
1384*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
1385*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
1386*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
1387*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
1388*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
1389*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
1390*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
1391*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
1392*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
1393*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1394*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1395*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1396*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1397*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1398*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1399*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1400*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1401*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
1402*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
1403*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
1404*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
1405*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
1406*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
1407*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
1408*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
1409*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
1410*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
1411*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
1412*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
1413*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
1414*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
1415*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1416*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1417*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1418*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1419*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1420*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1421*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1422*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1423*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
1424*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
1425*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
1426*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
1427*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
1428*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
1429*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
1430*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
1431*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1432*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1433*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1434*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1435*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ4 */
1436*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ5 */
1437*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ6 */
1438*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ7 */
1439*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
1440*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
1441*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
1442*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
1443*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
1444*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
1445*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
1446*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
1447*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
1448*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
1449*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
1450*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
1451*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
1452*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
1453*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
1454*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
1455*724ba675SRob Herring					0x0000000b /* EMC_TXDSRVTTGEN */
1456*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
1457*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
1458*724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT2 */
1459*724ba675SRob Herring					0x00000000 /* EMC_CTT */
1460*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
1461*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
1462*724ba675SRob Herring					0x8000023a /* EMC_DYN_SELF_REF_CONTROL */
1463*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
1464*724ba675SRob Herring				>;
1465*724ba675SRob Herring			};
1466*724ba675SRob Herring
1467*724ba675SRob Herring			timing-40800000 {
1468*724ba675SRob Herring				clock-frequency = <40800000>;
1469*724ba675SRob Herring
1470*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
1471*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
1472*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
1473*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
1474*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
1475*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
1476*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
1477*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
1478*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
1479*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
1480*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
1481*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
1482*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000c000c>;
1483*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
1484*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
1485*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
1486*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
1487*724ba675SRob Herring
1488*724ba675SRob Herring				nvidia,emc-configuration = <
1489*724ba675SRob Herring					0x00000001 /* EMC_RC */
1490*724ba675SRob Herring					0x0000000a /* EMC_RFC */
1491*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
1492*724ba675SRob Herring					0x00000001 /* EMC_RAS */
1493*724ba675SRob Herring					0x00000000 /* EMC_RP */
1494*724ba675SRob Herring					0x00000004 /* EMC_R2W */
1495*724ba675SRob Herring					0x0000000a /* EMC_W2R */
1496*724ba675SRob Herring					0x00000003 /* EMC_R2P */
1497*724ba675SRob Herring					0x0000000b /* EMC_W2P */
1498*724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
1499*724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
1500*724ba675SRob Herring					0x00000003 /* EMC_RRD */
1501*724ba675SRob Herring					0x00000003 /* EMC_REXT */
1502*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
1503*724ba675SRob Herring					0x00000006 /* EMC_WDV */
1504*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
1505*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
1506*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
1507*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
1508*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
1509*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
1510*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
1511*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
1512*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
1513*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
1514*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
1515*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
1516*724ba675SRob Herring					0x00000004 /* EMC_QRST */
1517*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
1518*724ba675SRob Herring					0x0000000d /* EMC_RDV */
1519*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
1520*724ba675SRob Herring					0x00000134 /* EMC_REFRESH */
1521*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
1522*724ba675SRob Herring					0x0000004d /* EMC_PRE_REFRESH_REQ_CNT */
1523*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
1524*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
1525*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
1526*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
1527*724ba675SRob Herring					0x00000008 /* EMC_AR2PDEN */
1528*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
1529*724ba675SRob Herring					0x0000000c /* EMC_TXSR */
1530*724ba675SRob Herring					0x0000000c /* EMC_TXSRDLL */
1531*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
1532*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
1533*724ba675SRob Herring					0x00000004 /* EMC_TPD */
1534*724ba675SRob Herring					0x00000000 /* EMC_TFAW */
1535*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
1536*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
1537*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
1538*724ba675SRob Herring					0x0000013f /* EMC_TREFBW */
1539*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
1540*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
1541*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
1542*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
1543*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
1544*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1545*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
1546*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
1547*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
1548*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
1549*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
1550*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
1551*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
1552*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
1553*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
1554*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
1555*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
1556*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
1557*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
1558*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
1559*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
1560*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
1561*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1562*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1563*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1564*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1565*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1566*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1567*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1568*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1569*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
1570*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
1571*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
1572*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
1573*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
1574*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
1575*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
1576*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
1577*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
1578*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
1579*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
1580*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
1581*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
1582*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
1583*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1584*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1585*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1586*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1587*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1588*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1589*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1590*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1591*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
1592*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
1593*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
1594*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
1595*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
1596*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
1597*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
1598*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
1599*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1600*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1601*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1602*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1603*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ4 */
1604*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ5 */
1605*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ6 */
1606*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ7 */
1607*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
1608*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
1609*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
1610*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
1611*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
1612*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
1613*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
1614*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
1615*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
1616*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
1617*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
1618*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
1619*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
1620*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
1621*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
1622*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
1623*724ba675SRob Herring					0x00000015 /* EMC_TXDSRVTTGEN */
1624*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
1625*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
1626*724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT2 */
1627*724ba675SRob Herring					0x00000000 /* EMC_CTT */
1628*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
1629*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
1630*724ba675SRob Herring					0x80000370 /* EMC_DYN_SELF_REF_CONTROL */
1631*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
1632*724ba675SRob Herring				>;
1633*724ba675SRob Herring			};
1634*724ba675SRob Herring
1635*724ba675SRob Herring			timing-68000000 {
1636*724ba675SRob Herring				clock-frequency = <68000000>;
1637*724ba675SRob Herring
1638*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
1639*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
1640*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
1641*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
1642*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
1643*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
1644*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
1645*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
1646*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
1647*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
1648*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
1649*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
1650*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000c000c>;
1651*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
1652*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
1653*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
1654*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
1655*724ba675SRob Herring
1656*724ba675SRob Herring				nvidia,emc-configuration = <
1657*724ba675SRob Herring					0x00000003 /* EMC_RC */
1658*724ba675SRob Herring					0x00000011 /* EMC_RFC */
1659*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
1660*724ba675SRob Herring					0x00000002 /* EMC_RAS */
1661*724ba675SRob Herring					0x00000000 /* EMC_RP */
1662*724ba675SRob Herring					0x00000004 /* EMC_R2W */
1663*724ba675SRob Herring					0x0000000a /* EMC_W2R */
1664*724ba675SRob Herring					0x00000003 /* EMC_R2P */
1665*724ba675SRob Herring					0x0000000b /* EMC_W2P */
1666*724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
1667*724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
1668*724ba675SRob Herring					0x00000003 /* EMC_RRD */
1669*724ba675SRob Herring					0x00000003 /* EMC_REXT */
1670*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
1671*724ba675SRob Herring					0x00000006 /* EMC_WDV */
1672*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
1673*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
1674*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
1675*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
1676*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
1677*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
1678*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
1679*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
1680*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
1681*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
1682*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
1683*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
1684*724ba675SRob Herring					0x00000004 /* EMC_QRST */
1685*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
1686*724ba675SRob Herring					0x0000000d /* EMC_RDV */
1687*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
1688*724ba675SRob Herring					0x00000202 /* EMC_REFRESH */
1689*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
1690*724ba675SRob Herring					0x00000080 /* EMC_PRE_REFRESH_REQ_CNT */
1691*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
1692*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
1693*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
1694*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
1695*724ba675SRob Herring					0x0000000f /* EMC_AR2PDEN */
1696*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
1697*724ba675SRob Herring					0x00000013 /* EMC_TXSR */
1698*724ba675SRob Herring					0x00000013 /* EMC_TXSRDLL */
1699*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
1700*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
1701*724ba675SRob Herring					0x00000004 /* EMC_TPD */
1702*724ba675SRob Herring					0x00000001 /* EMC_TFAW */
1703*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
1704*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
1705*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
1706*724ba675SRob Herring					0x00000213 /* EMC_TREFBW */
1707*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
1708*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
1709*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
1710*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
1711*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
1712*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1713*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
1714*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
1715*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
1716*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
1717*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
1718*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
1719*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
1720*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
1721*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
1722*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
1723*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
1724*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
1725*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
1726*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
1727*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
1728*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
1729*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1730*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1731*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1732*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1733*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1734*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1735*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1736*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1737*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
1738*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
1739*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
1740*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
1741*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
1742*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
1743*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
1744*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
1745*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
1746*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
1747*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
1748*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
1749*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
1750*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
1751*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1752*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1753*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1754*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1755*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1756*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1757*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1758*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1759*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
1760*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
1761*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
1762*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
1763*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
1764*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
1765*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
1766*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
1767*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1768*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1769*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1770*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1771*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ4 */
1772*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ5 */
1773*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ6 */
1774*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ7 */
1775*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
1776*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
1777*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
1778*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
1779*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
1780*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
1781*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
1782*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
1783*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
1784*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
1785*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
1786*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
1787*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
1788*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
1789*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
1790*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
1791*724ba675SRob Herring					0x00000022 /* EMC_TXDSRVTTGEN */
1792*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
1793*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
1794*724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT2 */
1795*724ba675SRob Herring					0x00000000 /* EMC_CTT */
1796*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
1797*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
1798*724ba675SRob Herring					0x8000050e /* EMC_DYN_SELF_REF_CONTROL */
1799*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
1800*724ba675SRob Herring				>;
1801*724ba675SRob Herring			};
1802*724ba675SRob Herring
1803*724ba675SRob Herring			timing-102000000 {
1804*724ba675SRob Herring				clock-frequency = <102000000>;
1805*724ba675SRob Herring
1806*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
1807*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
1808*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
1809*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
1810*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
1811*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
1812*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
1813*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
1814*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
1815*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
1816*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
1817*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
1818*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000c000c>;
1819*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
1820*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
1821*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
1822*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
1823*724ba675SRob Herring
1824*724ba675SRob Herring				nvidia,emc-configuration = <
1825*724ba675SRob Herring					0x00000004 /* EMC_RC */
1826*724ba675SRob Herring					0x0000001a /* EMC_RFC */
1827*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
1828*724ba675SRob Herring					0x00000003 /* EMC_RAS */
1829*724ba675SRob Herring					0x00000001 /* EMC_RP */
1830*724ba675SRob Herring					0x00000004 /* EMC_R2W */
1831*724ba675SRob Herring					0x0000000a /* EMC_W2R */
1832*724ba675SRob Herring					0x00000003 /* EMC_R2P */
1833*724ba675SRob Herring					0x0000000b /* EMC_W2P */
1834*724ba675SRob Herring					0x00000001 /* EMC_RD_RCD */
1835*724ba675SRob Herring					0x00000001 /* EMC_WR_RCD */
1836*724ba675SRob Herring					0x00000003 /* EMC_RRD */
1837*724ba675SRob Herring					0x00000003 /* EMC_REXT */
1838*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
1839*724ba675SRob Herring					0x00000006 /* EMC_WDV */
1840*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
1841*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
1842*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
1843*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
1844*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
1845*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
1846*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
1847*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
1848*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
1849*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
1850*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
1851*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
1852*724ba675SRob Herring					0x00000004 /* EMC_QRST */
1853*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
1854*724ba675SRob Herring					0x0000000d /* EMC_RDV */
1855*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
1856*724ba675SRob Herring					0x00000304 /* EMC_REFRESH */
1857*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
1858*724ba675SRob Herring					0x000000c1 /* EMC_PRE_REFRESH_REQ_CNT */
1859*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
1860*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
1861*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
1862*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
1863*724ba675SRob Herring					0x00000018 /* EMC_AR2PDEN */
1864*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
1865*724ba675SRob Herring					0x0000001c /* EMC_TXSR */
1866*724ba675SRob Herring					0x0000001c /* EMC_TXSRDLL */
1867*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
1868*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
1869*724ba675SRob Herring					0x00000004 /* EMC_TPD */
1870*724ba675SRob Herring					0x00000003 /* EMC_TFAW */
1871*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
1872*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
1873*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
1874*724ba675SRob Herring					0x0000031c /* EMC_TREFBW */
1875*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
1876*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
1877*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
1878*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
1879*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
1880*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1881*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
1882*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
1883*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
1884*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
1885*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
1886*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
1887*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
1888*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
1889*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
1890*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
1891*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
1892*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
1893*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
1894*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
1895*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
1896*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
1897*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1898*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1899*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1900*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1901*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1902*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1903*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1904*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1905*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
1906*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
1907*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
1908*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
1909*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
1910*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
1911*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
1912*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
1913*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
1914*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
1915*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
1916*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
1917*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
1918*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
1919*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1920*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1921*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1922*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1923*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1924*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1925*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1926*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1927*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
1928*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
1929*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
1930*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
1931*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
1932*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
1933*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
1934*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
1935*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1936*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1937*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1938*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1939*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ4 */
1940*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ5 */
1941*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ6 */
1942*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ7 */
1943*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
1944*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
1945*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
1946*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
1947*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
1948*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
1949*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
1950*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
1951*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
1952*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
1953*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
1954*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
1955*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
1956*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
1957*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
1958*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
1959*724ba675SRob Herring					0x00000033 /* EMC_TXDSRVTTGEN */
1960*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
1961*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
1962*724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT2 */
1963*724ba675SRob Herring					0x00000000 /* EMC_CTT */
1964*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
1965*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
1966*724ba675SRob Herring					0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
1967*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
1968*724ba675SRob Herring				>;
1969*724ba675SRob Herring			};
1970*724ba675SRob Herring
1971*724ba675SRob Herring			timing-204000000 {
1972*724ba675SRob Herring				clock-frequency = <204000000>;
1973*724ba675SRob Herring
1974*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
1975*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
1976*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
1977*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
1978*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
1979*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
1980*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x0000088d>;
1981*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
1982*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
1983*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
1984*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
1985*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
1986*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000c000c>;
1987*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040008>;
1988*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
1989*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
1990*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
1991*724ba675SRob Herring
1992*724ba675SRob Herring				nvidia,emc-configuration = <
1993*724ba675SRob Herring					0x00000009 /* EMC_RC */
1994*724ba675SRob Herring					0x00000035 /* EMC_RFC */
1995*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
1996*724ba675SRob Herring					0x00000007 /* EMC_RAS */
1997*724ba675SRob Herring					0x00000002 /* EMC_RP */
1998*724ba675SRob Herring					0x00000005 /* EMC_R2W */
1999*724ba675SRob Herring					0x0000000a /* EMC_W2R */
2000*724ba675SRob Herring					0x00000003 /* EMC_R2P */
2001*724ba675SRob Herring					0x0000000b /* EMC_W2P */
2002*724ba675SRob Herring					0x00000002 /* EMC_RD_RCD */
2003*724ba675SRob Herring					0x00000002 /* EMC_WR_RCD */
2004*724ba675SRob Herring					0x00000003 /* EMC_RRD */
2005*724ba675SRob Herring					0x00000003 /* EMC_REXT */
2006*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
2007*724ba675SRob Herring					0x00000005 /* EMC_WDV */
2008*724ba675SRob Herring					0x00000005 /* EMC_WDV_MASK */
2009*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
2010*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
2011*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
2012*724ba675SRob Herring					0x00000004 /* EMC_EINPUT */
2013*724ba675SRob Herring					0x00000006 /* EMC_EINPUT_DURATION */
2014*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
2015*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
2016*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
2017*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
2018*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
2019*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
2020*724ba675SRob Herring					0x00000003 /* EMC_QRST */
2021*724ba675SRob Herring					0x0000000d /* EMC_QSAFE */
2022*724ba675SRob Herring					0x0000000f /* EMC_RDV */
2023*724ba675SRob Herring					0x00000011 /* EMC_RDV_MASK */
2024*724ba675SRob Herring					0x00000607 /* EMC_REFRESH */
2025*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
2026*724ba675SRob Herring					0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
2027*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
2028*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
2029*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
2030*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
2031*724ba675SRob Herring					0x00000032 /* EMC_AR2PDEN */
2032*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
2033*724ba675SRob Herring					0x00000038 /* EMC_TXSR */
2034*724ba675SRob Herring					0x00000038 /* EMC_TXSRDLL */
2035*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
2036*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
2037*724ba675SRob Herring					0x00000004 /* EMC_TPD */
2038*724ba675SRob Herring					0x00000007 /* EMC_TFAW */
2039*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
2040*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
2041*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
2042*724ba675SRob Herring					0x00000638 /* EMC_TREFBW */
2043*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
2044*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
2045*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
2046*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
2047*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
2048*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2049*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
2050*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
2051*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
2052*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
2053*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
2054*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
2055*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
2056*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
2057*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
2058*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
2059*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
2060*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
2061*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
2062*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
2063*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
2064*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
2065*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2066*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2067*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2068*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2069*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2070*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2071*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2072*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2073*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
2074*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
2075*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
2076*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
2077*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
2078*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
2079*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
2080*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
2081*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
2082*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
2083*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
2084*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
2085*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
2086*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
2087*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2088*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2089*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2090*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2091*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2092*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2093*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2094*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2095*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
2096*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
2097*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
2098*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
2099*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
2100*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
2101*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
2102*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
2103*724ba675SRob Herring					0x00090000 /* EMC_DLL_XFORM_DQ0 */
2104*724ba675SRob Herring					0x00090000 /* EMC_DLL_XFORM_DQ1 */
2105*724ba675SRob Herring					0x00094000 /* EMC_DLL_XFORM_DQ2 */
2106*724ba675SRob Herring					0x00094000 /* EMC_DLL_XFORM_DQ3 */
2107*724ba675SRob Herring					0x00009400 /* EMC_DLL_XFORM_DQ4 */
2108*724ba675SRob Herring					0x00009000 /* EMC_DLL_XFORM_DQ5 */
2109*724ba675SRob Herring					0x00009000 /* EMC_DLL_XFORM_DQ6 */
2110*724ba675SRob Herring					0x00009000 /* EMC_DLL_XFORM_DQ7 */
2111*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
2112*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
2113*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
2114*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
2115*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
2116*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
2117*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
2118*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
2119*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
2120*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
2121*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
2122*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
2123*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
2124*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
2125*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
2126*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
2127*724ba675SRob Herring					0x00000066 /* EMC_TXDSRVTTGEN */
2128*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
2129*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
2130*724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT2 */
2131*724ba675SRob Herring					0x00000000 /* EMC_CTT */
2132*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
2133*724ba675SRob Herring					0x0000d2b3 /* EMC_CFG_PIPE */
2134*724ba675SRob Herring					0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
2135*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
2136*724ba675SRob Herring				>;
2137*724ba675SRob Herring			};
2138*724ba675SRob Herring
2139*724ba675SRob Herring			timing-300000000 {
2140*724ba675SRob Herring				clock-frequency = <300000000>;
2141*724ba675SRob Herring
2142*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
2143*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
2144*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
2145*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
2146*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
2147*724ba675SRob Herring				nvidia,emc-cfg = <0x73340000>;
2148*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008d5>;
2149*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
2150*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
2151*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200000>;
2152*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
2153*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000321>;
2154*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x0174000c>;
2155*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
2156*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x01231339>;
2157*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
2158*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
2159*724ba675SRob Herring
2160*724ba675SRob Herring				nvidia,emc-configuration = <
2161*724ba675SRob Herring					0x0000000d /* EMC_RC */
2162*724ba675SRob Herring					0x0000004c /* EMC_RFC */
2163*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
2164*724ba675SRob Herring					0x00000009 /* EMC_RAS */
2165*724ba675SRob Herring					0x00000003 /* EMC_RP */
2166*724ba675SRob Herring					0x00000004 /* EMC_R2W */
2167*724ba675SRob Herring					0x00000008 /* EMC_W2R */
2168*724ba675SRob Herring					0x00000002 /* EMC_R2P */
2169*724ba675SRob Herring					0x00000009 /* EMC_W2P */
2170*724ba675SRob Herring					0x00000003 /* EMC_RD_RCD */
2171*724ba675SRob Herring					0x00000003 /* EMC_WR_RCD */
2172*724ba675SRob Herring					0x00000002 /* EMC_RRD */
2173*724ba675SRob Herring					0x00000002 /* EMC_REXT */
2174*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
2175*724ba675SRob Herring					0x00000003 /* EMC_WDV */
2176*724ba675SRob Herring					0x00000003 /* EMC_WDV_MASK */
2177*724ba675SRob Herring					0x00000005 /* EMC_QUSE */
2178*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
2179*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
2180*724ba675SRob Herring					0x00000002 /* EMC_EINPUT */
2181*724ba675SRob Herring					0x00000007 /* EMC_EINPUT_DURATION */
2182*724ba675SRob Herring					0x00020000 /* EMC_PUTERM_EXTRA */
2183*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
2184*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
2185*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
2186*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
2187*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
2188*724ba675SRob Herring					0x00000001 /* EMC_QRST */
2189*724ba675SRob Herring					0x0000000e /* EMC_QSAFE */
2190*724ba675SRob Herring					0x00000010 /* EMC_RDV */
2191*724ba675SRob Herring					0x00000012 /* EMC_RDV_MASK */
2192*724ba675SRob Herring					0x000008e4 /* EMC_REFRESH */
2193*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
2194*724ba675SRob Herring					0x00000239 /* EMC_PRE_REFRESH_REQ_CNT */
2195*724ba675SRob Herring					0x00000001 /* EMC_PDEX2WR */
2196*724ba675SRob Herring					0x00000008 /* EMC_PDEX2RD */
2197*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
2198*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
2199*724ba675SRob Herring					0x0000004a /* EMC_AR2PDEN */
2200*724ba675SRob Herring					0x0000000e /* EMC_RW2PDEN */
2201*724ba675SRob Herring					0x00000051 /* EMC_TXSR */
2202*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
2203*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
2204*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
2205*724ba675SRob Herring					0x00000004 /* EMC_TPD */
2206*724ba675SRob Herring					0x00000009 /* EMC_TFAW */
2207*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
2208*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
2209*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
2210*724ba675SRob Herring					0x00000924 /* EMC_TREFBW */
2211*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
2212*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
2213*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
2214*724ba675SRob Herring					0x104ab098 /* EMC_FBIO_CFG5 */
2215*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
2216*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2217*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS0 */
2218*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS1 */
2219*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS2 */
2220*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS3 */
2221*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS4 */
2222*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS5 */
2223*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS6 */
2224*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS7 */
2225*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS8 */
2226*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS9 */
2227*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS10 */
2228*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS11 */
2229*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS12 */
2230*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS13 */
2231*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS14 */
2232*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS15 */
2233*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2234*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2235*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2236*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2237*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2238*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2239*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2240*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2241*724ba675SRob Herring					0x00098000 /* EMC_DLL_XFORM_ADDR0 */
2242*724ba675SRob Herring					0x00098000 /* EMC_DLL_XFORM_ADDR1 */
2243*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
2244*724ba675SRob Herring					0x00098000 /* EMC_DLL_XFORM_ADDR3 */
2245*724ba675SRob Herring					0x00098000 /* EMC_DLL_XFORM_ADDR4 */
2246*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
2247*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
2248*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
2249*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
2250*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
2251*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
2252*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
2253*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
2254*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
2255*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2256*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2257*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2258*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2259*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2260*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2261*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2262*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2263*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
2264*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
2265*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
2266*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
2267*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
2268*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
2269*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
2270*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
2271*724ba675SRob Herring					0x00060000 /* EMC_DLL_XFORM_DQ0 */
2272*724ba675SRob Herring					0x00060000 /* EMC_DLL_XFORM_DQ1 */
2273*724ba675SRob Herring					0x00060000 /* EMC_DLL_XFORM_DQ2 */
2274*724ba675SRob Herring					0x00060000 /* EMC_DLL_XFORM_DQ3 */
2275*724ba675SRob Herring					0x00006000 /* EMC_DLL_XFORM_DQ4 */
2276*724ba675SRob Herring					0x00006000 /* EMC_DLL_XFORM_DQ5 */
2277*724ba675SRob Herring					0x00006000 /* EMC_DLL_XFORM_DQ6 */
2278*724ba675SRob Herring					0x00006000 /* EMC_DLL_XFORM_DQ7 */
2279*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
2280*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
2281*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
2282*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
2283*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
2284*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
2285*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
2286*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
2287*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
2288*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
2289*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
2290*724ba675SRob Herring					0x51451420 /* EMC_XM2DQSPADCTRL3 */
2291*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
2292*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
2293*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
2294*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
2295*724ba675SRob Herring					0x00000096 /* EMC_TXDSRVTTGEN */
2296*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
2297*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
2298*724ba675SRob Herring					0x0174000c /* EMC_MRS_WAIT_CNT2 */
2299*724ba675SRob Herring					0x00000000 /* EMC_CTT */
2300*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
2301*724ba675SRob Herring					0x000052a3 /* EMC_CFG_PIPE */
2302*724ba675SRob Herring					0x800012d7 /* EMC_DYN_SELF_REF_CONTROL */
2303*724ba675SRob Herring					0x00000009 /* EMC_QPOP */
2304*724ba675SRob Herring				>;
2305*724ba675SRob Herring			};
2306*724ba675SRob Herring
2307*724ba675SRob Herring			timing-396000000 {
2308*724ba675SRob Herring				clock-frequency = <396000000>;
2309*724ba675SRob Herring
2310*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
2311*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
2312*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
2313*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
2314*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
2315*724ba675SRob Herring				nvidia,emc-cfg = <0x73340000>;
2316*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x00000895>;
2317*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
2318*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
2319*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200000>;
2320*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
2321*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000521>;
2322*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x015b000c>;
2323*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040008>;
2324*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x01231339>;
2325*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
2326*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
2327*724ba675SRob Herring
2328*724ba675SRob Herring				nvidia,emc-configuration = <
2329*724ba675SRob Herring					0x00000012 /* EMC_RC */
2330*724ba675SRob Herring					0x00000065 /* EMC_RFC */
2331*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
2332*724ba675SRob Herring					0x0000000c /* EMC_RAS */
2333*724ba675SRob Herring					0x00000004 /* EMC_RP */
2334*724ba675SRob Herring					0x00000005 /* EMC_R2W */
2335*724ba675SRob Herring					0x00000008 /* EMC_W2R */
2336*724ba675SRob Herring					0x00000002 /* EMC_R2P */
2337*724ba675SRob Herring					0x0000000a /* EMC_W2P */
2338*724ba675SRob Herring					0x00000004 /* EMC_RD_RCD */
2339*724ba675SRob Herring					0x00000004 /* EMC_WR_RCD */
2340*724ba675SRob Herring					0x00000002 /* EMC_RRD */
2341*724ba675SRob Herring					0x00000002 /* EMC_REXT */
2342*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
2343*724ba675SRob Herring					0x00000003 /* EMC_WDV */
2344*724ba675SRob Herring					0x00000003 /* EMC_WDV_MASK */
2345*724ba675SRob Herring					0x00000005 /* EMC_QUSE */
2346*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
2347*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
2348*724ba675SRob Herring					0x00000001 /* EMC_EINPUT */
2349*724ba675SRob Herring					0x00000008 /* EMC_EINPUT_DURATION */
2350*724ba675SRob Herring					0x00020000 /* EMC_PUTERM_EXTRA */
2351*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
2352*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
2353*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
2354*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
2355*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
2356*724ba675SRob Herring					0x00000000 /* EMC_QRST */
2357*724ba675SRob Herring					0x0000000f /* EMC_QSAFE */
2358*724ba675SRob Herring					0x00000010 /* EMC_RDV */
2359*724ba675SRob Herring					0x00000012 /* EMC_RDV_MASK */
2360*724ba675SRob Herring					0x00000bd1 /* EMC_REFRESH */
2361*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
2362*724ba675SRob Herring					0x000002f4 /* EMC_PRE_REFRESH_REQ_CNT */
2363*724ba675SRob Herring					0x00000001 /* EMC_PDEX2WR */
2364*724ba675SRob Herring					0x00000008 /* EMC_PDEX2RD */
2365*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
2366*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
2367*724ba675SRob Herring					0x00000063 /* EMC_AR2PDEN */
2368*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
2369*724ba675SRob Herring					0x0000006b /* EMC_TXSR */
2370*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
2371*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
2372*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
2373*724ba675SRob Herring					0x00000004 /* EMC_TPD */
2374*724ba675SRob Herring					0x0000000d /* EMC_TFAW */
2375*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
2376*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
2377*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
2378*724ba675SRob Herring					0x00000c11 /* EMC_TREFBW */
2379*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
2380*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
2381*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
2382*724ba675SRob Herring					0x104ab098 /* EMC_FBIO_CFG5 */
2383*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
2384*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2385*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS0 */
2386*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS1 */
2387*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS2 */
2388*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS3 */
2389*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS4 */
2390*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS5 */
2391*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS6 */
2392*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS7 */
2393*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS8 */
2394*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS9 */
2395*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS10 */
2396*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS11 */
2397*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS12 */
2398*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS13 */
2399*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS14 */
2400*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS15 */
2401*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2402*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2403*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2404*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2405*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2406*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2407*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2408*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2409*724ba675SRob Herring					0x00070000 /* EMC_DLL_XFORM_ADDR0 */
2410*724ba675SRob Herring					0x00070000 /* EMC_DLL_XFORM_ADDR1 */
2411*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
2412*724ba675SRob Herring					0x00070000 /* EMC_DLL_XFORM_ADDR3 */
2413*724ba675SRob Herring					0x00070000 /* EMC_DLL_XFORM_ADDR4 */
2414*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
2415*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
2416*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
2417*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
2418*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
2419*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
2420*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
2421*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
2422*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
2423*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2424*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2425*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2426*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2427*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2428*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2429*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2430*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2431*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
2432*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
2433*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
2434*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
2435*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
2436*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
2437*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
2438*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
2439*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ0 */
2440*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ1 */
2441*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ2 */
2442*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ3 */
2443*724ba675SRob Herring					0x00004800 /* EMC_DLL_XFORM_DQ4 */
2444*724ba675SRob Herring					0x00004800 /* EMC_DLL_XFORM_DQ5 */
2445*724ba675SRob Herring					0x00004800 /* EMC_DLL_XFORM_DQ6 */
2446*724ba675SRob Herring					0x00004800 /* EMC_DLL_XFORM_DQ7 */
2447*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
2448*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
2449*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
2450*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
2451*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
2452*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
2453*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
2454*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
2455*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
2456*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
2457*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
2458*724ba675SRob Herring					0x51451420 /* EMC_XM2DQSPADCTRL3 */
2459*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
2460*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
2461*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
2462*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
2463*724ba675SRob Herring					0x000000c6 /* EMC_TXDSRVTTGEN */
2464*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
2465*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
2466*724ba675SRob Herring					0x015b000c /* EMC_MRS_WAIT_CNT2 */
2467*724ba675SRob Herring					0x00000000 /* EMC_CTT */
2468*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
2469*724ba675SRob Herring					0x000052a3 /* EMC_CFG_PIPE */
2470*724ba675SRob Herring					0x8000188b /* EMC_DYN_SELF_REF_CONTROL */
2471*724ba675SRob Herring					0x00000009 /* EMC_QPOP */
2472*724ba675SRob Herring				>;
2473*724ba675SRob Herring			};
2474*724ba675SRob Herring
2475*724ba675SRob Herring			timing-528000000 {
2476*724ba675SRob Herring				clock-frequency = <528000000>;
2477*724ba675SRob Herring
2478*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
2479*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
2480*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
2481*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
2482*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
2483*724ba675SRob Herring				nvidia,emc-cfg = <0x73300000>;
2484*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x0000089d>;
2485*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
2486*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
2487*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
2488*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
2489*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000941>;
2490*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x013a000c>;
2491*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040008>;
2492*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0123133d>;
2493*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
2494*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
2495*724ba675SRob Herring
2496*724ba675SRob Herring				nvidia,emc-configuration = <
2497*724ba675SRob Herring					0x00000018 /* EMC_RC */
2498*724ba675SRob Herring					0x00000088 /* EMC_RFC */
2499*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
2500*724ba675SRob Herring					0x00000011 /* EMC_RAS */
2501*724ba675SRob Herring					0x00000006 /* EMC_RP */
2502*724ba675SRob Herring					0x00000006 /* EMC_R2W */
2503*724ba675SRob Herring					0x00000009 /* EMC_W2R */
2504*724ba675SRob Herring					0x00000002 /* EMC_R2P */
2505*724ba675SRob Herring					0x0000000d /* EMC_W2P */
2506*724ba675SRob Herring					0x00000006 /* EMC_RD_RCD */
2507*724ba675SRob Herring					0x00000006 /* EMC_WR_RCD */
2508*724ba675SRob Herring					0x00000002 /* EMC_RRD */
2509*724ba675SRob Herring					0x00000002 /* EMC_REXT */
2510*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
2511*724ba675SRob Herring					0x00000003 /* EMC_WDV */
2512*724ba675SRob Herring					0x00000003 /* EMC_WDV_MASK */
2513*724ba675SRob Herring					0x00000007 /* EMC_QUSE */
2514*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
2515*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
2516*724ba675SRob Herring					0x00000002 /* EMC_EINPUT */
2517*724ba675SRob Herring					0x00000009 /* EMC_EINPUT_DURATION */
2518*724ba675SRob Herring					0x00040000 /* EMC_PUTERM_EXTRA */
2519*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
2520*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
2521*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
2522*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
2523*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
2524*724ba675SRob Herring					0x00000001 /* EMC_QRST */
2525*724ba675SRob Herring					0x00000010 /* EMC_QSAFE */
2526*724ba675SRob Herring					0x00000013 /* EMC_RDV */
2527*724ba675SRob Herring					0x00000015 /* EMC_RDV_MASK */
2528*724ba675SRob Herring					0x00000fd6 /* EMC_REFRESH */
2529*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
2530*724ba675SRob Herring					0x000003f5 /* EMC_PRE_REFRESH_REQ_CNT */
2531*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
2532*724ba675SRob Herring					0x0000000b /* EMC_PDEX2RD */
2533*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
2534*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
2535*724ba675SRob Herring					0x00000084 /* EMC_AR2PDEN */
2536*724ba675SRob Herring					0x00000012 /* EMC_RW2PDEN */
2537*724ba675SRob Herring					0x0000008f /* EMC_TXSR */
2538*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
2539*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
2540*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
2541*724ba675SRob Herring					0x00000004 /* EMC_TPD */
2542*724ba675SRob Herring					0x00000013 /* EMC_TFAW */
2543*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
2544*724ba675SRob Herring					0x00000006 /* EMC_TCLKSTABLE */
2545*724ba675SRob Herring					0x00000006 /* EMC_TCLKSTOP */
2546*724ba675SRob Herring					0x00001017 /* EMC_TREFBW */
2547*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
2548*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
2549*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
2550*724ba675SRob Herring					0x104ab098 /* EMC_FBIO_CFG5 */
2551*724ba675SRob Herring					0xe01200b1 /* EMC_CFG_DIG_DLL */
2552*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2553*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS0 */
2554*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS1 */
2555*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS2 */
2556*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS3 */
2557*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS4 */
2558*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS5 */
2559*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS6 */
2560*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS7 */
2561*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS8 */
2562*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS9 */
2563*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS10 */
2564*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS11 */
2565*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS12 */
2566*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS13 */
2567*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS14 */
2568*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS15 */
2569*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2570*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2571*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2572*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2573*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2574*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2575*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2576*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2577*724ba675SRob Herring					0x00050000 /* EMC_DLL_XFORM_ADDR0 */
2578*724ba675SRob Herring					0x00050000 /* EMC_DLL_XFORM_ADDR1 */
2579*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
2580*724ba675SRob Herring					0x00050000 /* EMC_DLL_XFORM_ADDR3 */
2581*724ba675SRob Herring					0x00050000 /* EMC_DLL_XFORM_ADDR4 */
2582*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
2583*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
2584*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
2585*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
2586*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
2587*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
2588*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
2589*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
2590*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
2591*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS0 */
2592*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS1 */
2593*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2594*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS3 */
2595*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS4 */
2596*724ba675SRob Herring					0x00000001 /* EMC_DLI_TRIM_TXDQS5 */
2597*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS6 */
2598*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS7 */
2599*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS8 */
2600*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS9 */
2601*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
2602*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS11 */
2603*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS12 */
2604*724ba675SRob Herring					0x00000001 /* EMC_DLI_TRIM_TXDQS13 */
2605*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS14 */
2606*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS15 */
2607*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ0 */
2608*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ1 */
2609*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ2 */
2610*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ3 */
2611*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ4 */
2612*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ5 */
2613*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ6 */
2614*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ7 */
2615*724ba675SRob Herring					0x100002a0 /* EMC_XM2CMDPADCTRL */
2616*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
2617*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
2618*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
2619*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
2620*724ba675SRob Herring					0x77ffc085 /* EMC_XM2CLKPADCTRL */
2621*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
2622*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
2623*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
2624*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
2625*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
2626*724ba675SRob Herring					0x51451420 /* EMC_XM2DQSPADCTRL3 */
2627*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
2628*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
2629*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
2630*724ba675SRob Herring					0x0606003f /* EMC_DSR_VTTGEN_DRV */
2631*724ba675SRob Herring					0x00000000 /* EMC_TXDSRVTTGEN */
2632*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
2633*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
2634*724ba675SRob Herring					0x013a000c /* EMC_MRS_WAIT_CNT2 */
2635*724ba675SRob Herring					0x00000000 /* EMC_CTT */
2636*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
2637*724ba675SRob Herring					0x000042a0 /* EMC_CFG_PIPE */
2638*724ba675SRob Herring					0x80002062 /* EMC_DYN_SELF_REF_CONTROL */
2639*724ba675SRob Herring					0x0000000b /* EMC_QPOP */
2640*724ba675SRob Herring				>;
2641*724ba675SRob Herring			};
2642*724ba675SRob Herring
2643*724ba675SRob Herring			timing-600000000 {
2644*724ba675SRob Herring				clock-frequency = <600000000>;
2645*724ba675SRob Herring
2646*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
2647*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
2648*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
2649*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
2650*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
2651*724ba675SRob Herring				nvidia,emc-cfg = <0x73300000>;
2652*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x0000089d>;
2653*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
2654*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
2655*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200010>;
2656*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
2657*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000b61>;
2658*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x0128000c>;
2659*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040008>;
2660*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0121113d>;
2661*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
2662*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
2663*724ba675SRob Herring
2664*724ba675SRob Herring				nvidia,emc-configuration = <
2665*724ba675SRob Herring					0x0000001c /* EMC_RC */
2666*724ba675SRob Herring					0x0000009a /* EMC_RFC */
2667*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
2668*724ba675SRob Herring					0x00000013 /* EMC_RAS */
2669*724ba675SRob Herring					0x00000007 /* EMC_RP */
2670*724ba675SRob Herring					0x00000007 /* EMC_R2W */
2671*724ba675SRob Herring					0x0000000b /* EMC_W2R */
2672*724ba675SRob Herring					0x00000003 /* EMC_R2P */
2673*724ba675SRob Herring					0x00000010 /* EMC_W2P */
2674*724ba675SRob Herring					0x00000007 /* EMC_RD_RCD */
2675*724ba675SRob Herring					0x00000007 /* EMC_WR_RCD */
2676*724ba675SRob Herring					0x00000002 /* EMC_RRD */
2677*724ba675SRob Herring					0x00000002 /* EMC_REXT */
2678*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
2679*724ba675SRob Herring					0x00000005 /* EMC_WDV */
2680*724ba675SRob Herring					0x00000005 /* EMC_WDV_MASK */
2681*724ba675SRob Herring					0x0000000a /* EMC_QUSE */
2682*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
2683*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
2684*724ba675SRob Herring					0x00000003 /* EMC_EINPUT */
2685*724ba675SRob Herring					0x0000000b /* EMC_EINPUT_DURATION */
2686*724ba675SRob Herring					0x00070000 /* EMC_PUTERM_EXTRA */
2687*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
2688*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
2689*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
2690*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
2691*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
2692*724ba675SRob Herring					0x00000002 /* EMC_QRST */
2693*724ba675SRob Herring					0x00000012 /* EMC_QSAFE */
2694*724ba675SRob Herring					0x00000016 /* EMC_RDV */
2695*724ba675SRob Herring					0x00000018 /* EMC_RDV_MASK */
2696*724ba675SRob Herring					0x00001208 /* EMC_REFRESH */
2697*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
2698*724ba675SRob Herring					0x00000482 /* EMC_PRE_REFRESH_REQ_CNT */
2699*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
2700*724ba675SRob Herring					0x0000000d /* EMC_PDEX2RD */
2701*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
2702*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
2703*724ba675SRob Herring					0x00000096 /* EMC_AR2PDEN */
2704*724ba675SRob Herring					0x00000015 /* EMC_RW2PDEN */
2705*724ba675SRob Herring					0x000000a2 /* EMC_TXSR */
2706*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
2707*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
2708*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
2709*724ba675SRob Herring					0x00000004 /* EMC_TPD */
2710*724ba675SRob Herring					0x00000015 /* EMC_TFAW */
2711*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
2712*724ba675SRob Herring					0x00000006 /* EMC_TCLKSTABLE */
2713*724ba675SRob Herring					0x00000006 /* EMC_TCLKSTOP */
2714*724ba675SRob Herring					0x00001249 /* EMC_TREFBW */
2715*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
2716*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
2717*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
2718*724ba675SRob Herring					0x104ab098 /* EMC_FBIO_CFG5 */
2719*724ba675SRob Herring					0xe00e00b1 /* EMC_CFG_DIG_DLL */
2720*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2721*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS0 */
2722*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS1 */
2723*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS2 */
2724*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS3 */
2725*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS4 */
2726*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS5 */
2727*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS6 */
2728*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS7 */
2729*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS8 */
2730*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS9 */
2731*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS10 */
2732*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS11 */
2733*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS12 */
2734*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS13 */
2735*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS14 */
2736*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS15 */
2737*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2738*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2739*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2740*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2741*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2742*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2743*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2744*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2745*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_ADDR0 */
2746*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_ADDR1 */
2747*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
2748*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_ADDR3 */
2749*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_ADDR4 */
2750*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
2751*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
2752*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
2753*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
2754*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
2755*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
2756*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
2757*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
2758*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
2759*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS0 */
2760*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS1 */
2761*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS2 */
2762*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS3 */
2763*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS4 */
2764*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS5 */
2765*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS6 */
2766*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS7 */
2767*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS8 */
2768*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS9 */
2769*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS10 */
2770*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS11 */
2771*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS12 */
2772*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS13 */
2773*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS14 */
2774*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS15 */
2775*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ0 */
2776*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ1 */
2777*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ2 */
2778*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ3 */
2779*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ4 */
2780*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ5 */
2781*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ6 */
2782*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ7 */
2783*724ba675SRob Herring					0x100002a0 /* EMC_XM2CMDPADCTRL */
2784*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
2785*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
2786*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
2787*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
2788*724ba675SRob Herring					0x77ffc085 /* EMC_XM2CLKPADCTRL */
2789*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
2790*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
2791*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
2792*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
2793*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
2794*724ba675SRob Herring					0x51451420 /* EMC_XM2DQSPADCTRL3 */
2795*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
2796*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
2797*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
2798*724ba675SRob Herring					0x0606003f /* EMC_DSR_VTTGEN_DRV */
2799*724ba675SRob Herring					0x00000000 /* EMC_TXDSRVTTGEN */
2800*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
2801*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
2802*724ba675SRob Herring					0x0128000c /* EMC_MRS_WAIT_CNT2 */
2803*724ba675SRob Herring					0x00000000 /* EMC_CTT */
2804*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
2805*724ba675SRob Herring					0x000040a0 /* EMC_CFG_PIPE */
2806*724ba675SRob Herring					0x800024aa /* EMC_DYN_SELF_REF_CONTROL */
2807*724ba675SRob Herring					0x0000000e /* EMC_QPOP */
2808*724ba675SRob Herring				>;
2809*724ba675SRob Herring			};
2810*724ba675SRob Herring
2811*724ba675SRob Herring			timing-792000000 {
2812*724ba675SRob Herring				clock-frequency = <792000000>;
2813*724ba675SRob Herring
2814*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
2815*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
2816*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
2817*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
2818*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
2819*724ba675SRob Herring				nvidia,emc-cfg = <0x73300000>;
2820*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x0080089d>;
2821*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
2822*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
2823*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200418>;
2824*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
2825*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000d71>;
2826*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x00f8000c>;
2827*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040000>;
2828*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0120113d>;
2829*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
2830*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
2831*724ba675SRob Herring
2832*724ba675SRob Herring				nvidia,emc-configuration = <
2833*724ba675SRob Herring					0x00000025 /* EMC_RC */
2834*724ba675SRob Herring					0x000000cc /* EMC_RFC */
2835*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
2836*724ba675SRob Herring					0x0000001a /* EMC_RAS */
2837*724ba675SRob Herring					0x00000009 /* EMC_RP */
2838*724ba675SRob Herring					0x00000008 /* EMC_R2W */
2839*724ba675SRob Herring					0x0000000d /* EMC_W2R */
2840*724ba675SRob Herring					0x00000004 /* EMC_R2P */
2841*724ba675SRob Herring					0x00000013 /* EMC_W2P */
2842*724ba675SRob Herring					0x00000009 /* EMC_RD_RCD */
2843*724ba675SRob Herring					0x00000009 /* EMC_WR_RCD */
2844*724ba675SRob Herring					0x00000003 /* EMC_RRD */
2845*724ba675SRob Herring					0x00000002 /* EMC_REXT */
2846*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
2847*724ba675SRob Herring					0x00000006 /* EMC_WDV */
2848*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
2849*724ba675SRob Herring					0x0000000b /* EMC_QUSE */
2850*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
2851*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
2852*724ba675SRob Herring					0x00000002 /* EMC_EINPUT */
2853*724ba675SRob Herring					0x0000000d /* EMC_EINPUT_DURATION */
2854*724ba675SRob Herring					0x00080000 /* EMC_PUTERM_EXTRA */
2855*724ba675SRob Herring					0x00000004 /* EMC_PUTERM_WIDTH */
2856*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
2857*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
2858*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
2859*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
2860*724ba675SRob Herring					0x00000001 /* EMC_QRST */
2861*724ba675SRob Herring					0x00000014 /* EMC_QSAFE */
2862*724ba675SRob Herring					0x00000018 /* EMC_RDV */
2863*724ba675SRob Herring					0x0000001a /* EMC_RDV_MASK */
2864*724ba675SRob Herring					0x000017e2 /* EMC_REFRESH */
2865*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
2866*724ba675SRob Herring					0x000005f8 /* EMC_PRE_REFRESH_REQ_CNT */
2867*724ba675SRob Herring					0x00000003 /* EMC_PDEX2WR */
2868*724ba675SRob Herring					0x00000011 /* EMC_PDEX2RD */
2869*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
2870*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
2871*724ba675SRob Herring					0x000000c6 /* EMC_AR2PDEN */
2872*724ba675SRob Herring					0x00000018 /* EMC_RW2PDEN */
2873*724ba675SRob Herring					0x000000d6 /* EMC_TXSR */
2874*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
2875*724ba675SRob Herring					0x00000005 /* EMC_TCKE */
2876*724ba675SRob Herring					0x00000006 /* EMC_TCKESR */
2877*724ba675SRob Herring					0x00000005 /* EMC_TPD */
2878*724ba675SRob Herring					0x0000001d /* EMC_TFAW */
2879*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
2880*724ba675SRob Herring					0x00000008 /* EMC_TCLKSTABLE */
2881*724ba675SRob Herring					0x00000008 /* EMC_TCLKSTOP */
2882*724ba675SRob Herring					0x00001822 /* EMC_TREFBW */
2883*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
2884*724ba675SRob Herring					0x80000005 /* EMC_ODT_WRITE */
2885*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
2886*724ba675SRob Herring					0x104ab198 /* EMC_FBIO_CFG5 */
2887*724ba675SRob Herring					0xe00700b1 /* EMC_CFG_DIG_DLL */
2888*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2889*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS0 */
2890*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS1 */
2891*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS2 */
2892*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS3 */
2893*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS4 */
2894*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS5 */
2895*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS6 */
2896*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS7 */
2897*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS8 */
2898*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS9 */
2899*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS10 */
2900*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS11 */
2901*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS12 */
2902*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS13 */
2903*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS14 */
2904*724ba675SRob Herring					0x00000005 /* EMC_DLL_XFORM_DQS15 */
2905*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2906*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2907*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2908*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2909*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2910*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2911*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2912*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2913*724ba675SRob Herring					0x00034000 /* EMC_DLL_XFORM_ADDR0 */
2914*724ba675SRob Herring					0x00034000 /* EMC_DLL_XFORM_ADDR1 */
2915*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
2916*724ba675SRob Herring					0x00034000 /* EMC_DLL_XFORM_ADDR3 */
2917*724ba675SRob Herring					0x00034000 /* EMC_DLL_XFORM_ADDR4 */
2918*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
2919*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
2920*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
2921*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
2922*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
2923*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
2924*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
2925*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
2926*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
2927*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS0 */
2928*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS1 */
2929*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS2 */
2930*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS3 */
2931*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS4 */
2932*724ba675SRob Herring					0x00000007 /* EMC_DLI_TRIM_TXDQS5 */
2933*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS6 */
2934*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS7 */
2935*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS8 */
2936*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS9 */
2937*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS10 */
2938*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS11 */
2939*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS12 */
2940*724ba675SRob Herring					0x00000007 /* EMC_DLI_TRIM_TXDQS13 */
2941*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS14 */
2942*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS15 */
2943*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ0 */
2944*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ1 */
2945*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ2 */
2946*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ3 */
2947*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ4 */
2948*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ5 */
2949*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ6 */
2950*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQ7 */
2951*724ba675SRob Herring					0x100002a0 /* EMC_XM2CMDPADCTRL */
2952*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
2953*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
2954*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
2955*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
2956*724ba675SRob Herring					0x77ffc085 /* EMC_XM2CLKPADCTRL */
2957*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
2958*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
2959*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
2960*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
2961*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
2962*724ba675SRob Herring					0x61861820 /* EMC_XM2DQSPADCTRL3 */
2963*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
2964*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
2965*724ba675SRob Herring					0x61861800 /* EMC_XM2DQSPADCTRL6 */
2966*724ba675SRob Herring					0x0606003f /* EMC_DSR_VTTGEN_DRV */
2967*724ba675SRob Herring					0x00000000 /* EMC_TXDSRVTTGEN */
2968*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
2969*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
2970*724ba675SRob Herring					0x00f8000c /* EMC_MRS_WAIT_CNT2 */
2971*724ba675SRob Herring					0x00000007 /* EMC_CTT */
2972*724ba675SRob Herring					0x00000004 /* EMC_CTT_DURATION */
2973*724ba675SRob Herring					0x00004080 /* EMC_CFG_PIPE */
2974*724ba675SRob Herring					0x80003012 /* EMC_DYN_SELF_REF_CONTROL */
2975*724ba675SRob Herring					0x0000000f /* EMC_QPOP */
2976*724ba675SRob Herring				>;
2977*724ba675SRob Herring			};
2978*724ba675SRob Herring		};
2979*724ba675SRob Herring
2980*724ba675SRob Herring		emc-timings-4 {
2981*724ba675SRob Herring			nvidia,ram-code = <4>;
2982*724ba675SRob Herring
2983*724ba675SRob Herring			timing-12750000 {
2984*724ba675SRob Herring				clock-frequency = <12750000>;
2985*724ba675SRob Herring
2986*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
2987*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
2988*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
2989*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
2990*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
2991*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
2992*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
2993*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
2994*724ba675SRob Herring				nvidia,emc-mode-1 = <0x00100003>;
2995*724ba675SRob Herring				nvidia,emc-mode-2 = <0x00200008>;
2996*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
2997*724ba675SRob Herring				nvidia,emc-mode-reset = <0x00001221>;
2998*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000e000e>;
2999*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
3000*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
3001*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
3002*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
3003*724ba675SRob Herring
3004*724ba675SRob Herring				nvidia,emc-configuration = <
3005*724ba675SRob Herring					0x00000000 /* EMC_RC */
3006*724ba675SRob Herring					0x00000004 /* EMC_RFC */
3007*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
3008*724ba675SRob Herring					0x00000000 /* EMC_RAS */
3009*724ba675SRob Herring					0x00000000 /* EMC_RP */
3010*724ba675SRob Herring					0x00000004 /* EMC_R2W */
3011*724ba675SRob Herring					0x0000000a /* EMC_W2R */
3012*724ba675SRob Herring					0x00000005 /* EMC_R2P */
3013*724ba675SRob Herring					0x0000000b /* EMC_W2P */
3014*724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
3015*724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
3016*724ba675SRob Herring					0x00000003 /* EMC_RRD */
3017*724ba675SRob Herring					0x00000003 /* EMC_REXT */
3018*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3019*724ba675SRob Herring					0x00000006 /* EMC_WDV */
3020*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
3021*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
3022*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
3023*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
3024*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
3025*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
3026*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
3027*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
3028*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
3029*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
3030*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
3031*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
3032*724ba675SRob Herring					0x00000004 /* EMC_QRST */
3033*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
3034*724ba675SRob Herring					0x0000000d /* EMC_RDV */
3035*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
3036*724ba675SRob Herring					0x00000060 /* EMC_REFRESH */
3037*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3038*724ba675SRob Herring					0x00000018 /* EMC_PRE_REFRESH_REQ_CNT */
3039*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
3040*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
3041*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3042*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3043*724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
3044*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3045*724ba675SRob Herring					0x00000005 /* EMC_TXSR */
3046*724ba675SRob Herring					0x00000005 /* EMC_TXSRDLL */
3047*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3048*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
3049*724ba675SRob Herring					0x00000004 /* EMC_TPD */
3050*724ba675SRob Herring					0x00000000 /* EMC_TFAW */
3051*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3052*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
3053*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3054*724ba675SRob Herring					0x00000064 /* EMC_TREFBW */
3055*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
3056*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3057*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3058*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
3059*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
3060*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3061*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
3062*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
3063*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
3064*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
3065*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
3066*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
3067*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
3068*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
3069*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
3070*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
3071*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
3072*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
3073*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
3074*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
3075*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
3076*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
3077*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3078*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3079*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3080*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3081*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3082*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3083*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3084*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3085*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
3086*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
3087*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
3088*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
3089*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
3090*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
3091*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
3092*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
3093*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
3094*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
3095*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
3096*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
3097*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
3098*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
3099*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3100*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3101*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3102*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3103*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3104*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3105*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3106*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3107*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
3108*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
3109*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
3110*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
3111*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
3112*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
3113*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
3114*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
3115*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ0 */
3116*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ1 */
3117*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ2 */
3118*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ3 */
3119*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ4 */
3120*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ5 */
3121*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ6 */
3122*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ7 */
3123*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
3124*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
3125*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
3126*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3127*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
3128*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
3129*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
3130*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
3131*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
3132*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
3133*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
3134*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
3135*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
3136*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
3137*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
3138*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
3139*724ba675SRob Herring					0x00000007 /* EMC_TXDSRVTTGEN */
3140*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
3141*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
3142*724ba675SRob Herring					0x000e000e /* EMC_MRS_WAIT_CNT2 */
3143*724ba675SRob Herring					0x00000000 /* EMC_CTT */
3144*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
3145*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
3146*724ba675SRob Herring					0x800001c5 /* EMC_DYN_SELF_REF_CONTROL */
3147*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
3148*724ba675SRob Herring				>;
3149*724ba675SRob Herring			};
3150*724ba675SRob Herring
3151*724ba675SRob Herring			timing-20400000 {
3152*724ba675SRob Herring				clock-frequency = <20400000>;
3153*724ba675SRob Herring
3154*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
3155*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
3156*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
3157*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3158*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
3159*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
3160*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
3161*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
3162*724ba675SRob Herring				nvidia,emc-mode-1 = <0x00100003>;
3163*724ba675SRob Herring				nvidia,emc-mode-2 = <0x00200008>;
3164*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
3165*724ba675SRob Herring				nvidia,emc-mode-reset = <0x00001221>;
3166*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000e000e>;
3167*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
3168*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
3169*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
3170*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
3171*724ba675SRob Herring
3172*724ba675SRob Herring				nvidia,emc-configuration = <
3173*724ba675SRob Herring					0x00000000 /* EMC_RC */
3174*724ba675SRob Herring					0x00000007 /* EMC_RFC */
3175*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
3176*724ba675SRob Herring					0x00000000 /* EMC_RAS */
3177*724ba675SRob Herring					0x00000000 /* EMC_RP */
3178*724ba675SRob Herring					0x00000004 /* EMC_R2W */
3179*724ba675SRob Herring					0x0000000a /* EMC_W2R */
3180*724ba675SRob Herring					0x00000005 /* EMC_R2P */
3181*724ba675SRob Herring					0x0000000b /* EMC_W2P */
3182*724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
3183*724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
3184*724ba675SRob Herring					0x00000003 /* EMC_RRD */
3185*724ba675SRob Herring					0x00000003 /* EMC_REXT */
3186*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3187*724ba675SRob Herring					0x00000006 /* EMC_WDV */
3188*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
3189*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
3190*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
3191*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
3192*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
3193*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
3194*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
3195*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
3196*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
3197*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
3198*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
3199*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
3200*724ba675SRob Herring					0x00000004 /* EMC_QRST */
3201*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
3202*724ba675SRob Herring					0x0000000d /* EMC_RDV */
3203*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
3204*724ba675SRob Herring					0x0000009a /* EMC_REFRESH */
3205*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3206*724ba675SRob Herring					0x00000026 /* EMC_PRE_REFRESH_REQ_CNT */
3207*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
3208*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
3209*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3210*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3211*724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
3212*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3213*724ba675SRob Herring					0x00000008 /* EMC_TXSR */
3214*724ba675SRob Herring					0x00000008 /* EMC_TXSRDLL */
3215*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3216*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
3217*724ba675SRob Herring					0x00000004 /* EMC_TPD */
3218*724ba675SRob Herring					0x00000000 /* EMC_TFAW */
3219*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3220*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
3221*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3222*724ba675SRob Herring					0x000000a0 /* EMC_TREFBW */
3223*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
3224*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3225*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3226*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
3227*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
3228*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3229*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
3230*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
3231*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
3232*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
3233*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
3234*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
3235*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
3236*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
3237*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
3238*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
3239*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
3240*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
3241*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
3242*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
3243*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
3244*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
3245*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3246*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3247*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3248*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3249*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3250*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3251*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3252*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3253*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
3254*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
3255*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
3256*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
3257*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
3258*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
3259*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
3260*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
3261*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
3262*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
3263*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
3264*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
3265*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
3266*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
3267*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3268*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3269*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3270*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3271*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3272*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3273*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3274*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3275*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
3276*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
3277*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
3278*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
3279*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
3280*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
3281*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
3282*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
3283*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ0 */
3284*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ1 */
3285*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ2 */
3286*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ3 */
3287*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ4 */
3288*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ5 */
3289*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ6 */
3290*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ7 */
3291*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
3292*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
3293*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
3294*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3295*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
3296*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
3297*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
3298*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
3299*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
3300*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
3301*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
3302*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
3303*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
3304*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
3305*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
3306*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
3307*724ba675SRob Herring					0x0000000b /* EMC_TXDSRVTTGEN */
3308*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
3309*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
3310*724ba675SRob Herring					0x000e000e /* EMC_MRS_WAIT_CNT2 */
3311*724ba675SRob Herring					0x00000000 /* EMC_CTT */
3312*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
3313*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
3314*724ba675SRob Herring					0x8000023a /* EMC_DYN_SELF_REF_CONTROL */
3315*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
3316*724ba675SRob Herring				>;
3317*724ba675SRob Herring			};
3318*724ba675SRob Herring
3319*724ba675SRob Herring			timing-40800000 {
3320*724ba675SRob Herring				clock-frequency = <40800000>;
3321*724ba675SRob Herring
3322*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
3323*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
3324*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
3325*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3326*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
3327*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
3328*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
3329*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
3330*724ba675SRob Herring				nvidia,emc-mode-1 = <0x00100003>;
3331*724ba675SRob Herring				nvidia,emc-mode-2 = <0x00200008>;
3332*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
3333*724ba675SRob Herring				nvidia,emc-mode-reset = <0x00001221>;
3334*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000e000e>;
3335*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
3336*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
3337*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
3338*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
3339*724ba675SRob Herring
3340*724ba675SRob Herring				nvidia,emc-configuration = <
3341*724ba675SRob Herring					0x00000001 /* EMC_RC */
3342*724ba675SRob Herring					0x0000000e /* EMC_RFC */
3343*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
3344*724ba675SRob Herring					0x00000001 /* EMC_RAS */
3345*724ba675SRob Herring					0x00000000 /* EMC_RP */
3346*724ba675SRob Herring					0x00000004 /* EMC_R2W */
3347*724ba675SRob Herring					0x0000000a /* EMC_W2R */
3348*724ba675SRob Herring					0x00000005 /* EMC_R2P */
3349*724ba675SRob Herring					0x0000000b /* EMC_W2P */
3350*724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
3351*724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
3352*724ba675SRob Herring					0x00000003 /* EMC_RRD */
3353*724ba675SRob Herring					0x00000003 /* EMC_REXT */
3354*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3355*724ba675SRob Herring					0x00000006 /* EMC_WDV */
3356*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
3357*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
3358*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
3359*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
3360*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
3361*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
3362*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
3363*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
3364*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
3365*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
3366*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
3367*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
3368*724ba675SRob Herring					0x00000004 /* EMC_QRST */
3369*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
3370*724ba675SRob Herring					0x0000000d /* EMC_RDV */
3371*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
3372*724ba675SRob Herring					0x00000134 /* EMC_REFRESH */
3373*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3374*724ba675SRob Herring					0x0000004d /* EMC_PRE_REFRESH_REQ_CNT */
3375*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
3376*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
3377*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3378*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3379*724ba675SRob Herring					0x0000000c /* EMC_AR2PDEN */
3380*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3381*724ba675SRob Herring					0x0000000f /* EMC_TXSR */
3382*724ba675SRob Herring					0x0000000f /* EMC_TXSRDLL */
3383*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3384*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
3385*724ba675SRob Herring					0x00000004 /* EMC_TPD */
3386*724ba675SRob Herring					0x00000000 /* EMC_TFAW */
3387*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3388*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
3389*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3390*724ba675SRob Herring					0x0000013f /* EMC_TREFBW */
3391*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
3392*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3393*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3394*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
3395*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
3396*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3397*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
3398*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
3399*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
3400*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
3401*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
3402*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
3403*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
3404*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
3405*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
3406*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
3407*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
3408*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
3409*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
3410*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
3411*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
3412*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
3413*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3414*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3415*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3416*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3417*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3418*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3419*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3420*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3421*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
3422*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
3423*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
3424*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
3425*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
3426*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
3427*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
3428*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
3429*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
3430*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
3431*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
3432*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
3433*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
3434*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
3435*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3436*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3437*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3438*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3439*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3440*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3441*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3442*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3443*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
3444*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
3445*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
3446*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
3447*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
3448*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
3449*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
3450*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
3451*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ0 */
3452*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ1 */
3453*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ2 */
3454*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ3 */
3455*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ4 */
3456*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ5 */
3457*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ6 */
3458*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ7 */
3459*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
3460*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
3461*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
3462*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3463*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
3464*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
3465*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
3466*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
3467*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
3468*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
3469*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
3470*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
3471*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
3472*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
3473*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
3474*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
3475*724ba675SRob Herring					0x00000015 /* EMC_TXDSRVTTGEN */
3476*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
3477*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
3478*724ba675SRob Herring					0x000e000e /* EMC_MRS_WAIT_CNT2 */
3479*724ba675SRob Herring					0x00000000 /* EMC_CTT */
3480*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
3481*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
3482*724ba675SRob Herring					0x80000370 /* EMC_DYN_SELF_REF_CONTROL */
3483*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
3484*724ba675SRob Herring				>;
3485*724ba675SRob Herring			};
3486*724ba675SRob Herring
3487*724ba675SRob Herring			timing-68000000 {
3488*724ba675SRob Herring				clock-frequency = <68000000>;
3489*724ba675SRob Herring
3490*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
3491*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
3492*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
3493*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3494*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
3495*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
3496*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
3497*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
3498*724ba675SRob Herring				nvidia,emc-mode-1 = <0x00100003>;
3499*724ba675SRob Herring				nvidia,emc-mode-2 = <0x00200008>;
3500*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
3501*724ba675SRob Herring				nvidia,emc-mode-reset = <0x00001221>;
3502*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000e000e>;
3503*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
3504*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
3505*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
3506*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
3507*724ba675SRob Herring
3508*724ba675SRob Herring				nvidia,emc-configuration = <
3509*724ba675SRob Herring					0x00000003 /* EMC_RC */
3510*724ba675SRob Herring					0x00000017 /* EMC_RFC */
3511*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
3512*724ba675SRob Herring					0x00000002 /* EMC_RAS */
3513*724ba675SRob Herring					0x00000000 /* EMC_RP */
3514*724ba675SRob Herring					0x00000004 /* EMC_R2W */
3515*724ba675SRob Herring					0x0000000a /* EMC_W2R */
3516*724ba675SRob Herring					0x00000005 /* EMC_R2P */
3517*724ba675SRob Herring					0x0000000b /* EMC_W2P */
3518*724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
3519*724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
3520*724ba675SRob Herring					0x00000003 /* EMC_RRD */
3521*724ba675SRob Herring					0x00000003 /* EMC_REXT */
3522*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3523*724ba675SRob Herring					0x00000006 /* EMC_WDV */
3524*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
3525*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
3526*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
3527*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
3528*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
3529*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
3530*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
3531*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
3532*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
3533*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
3534*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
3535*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
3536*724ba675SRob Herring					0x00000004 /* EMC_QRST */
3537*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
3538*724ba675SRob Herring					0x0000000d /* EMC_RDV */
3539*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
3540*724ba675SRob Herring					0x00000202 /* EMC_REFRESH */
3541*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3542*724ba675SRob Herring					0x00000080 /* EMC_PRE_REFRESH_REQ_CNT */
3543*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
3544*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
3545*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3546*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3547*724ba675SRob Herring					0x00000015 /* EMC_AR2PDEN */
3548*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3549*724ba675SRob Herring					0x00000019 /* EMC_TXSR */
3550*724ba675SRob Herring					0x00000019 /* EMC_TXSRDLL */
3551*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3552*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
3553*724ba675SRob Herring					0x00000004 /* EMC_TPD */
3554*724ba675SRob Herring					0x00000001 /* EMC_TFAW */
3555*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3556*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
3557*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3558*724ba675SRob Herring					0x00000213 /* EMC_TREFBW */
3559*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
3560*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3561*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3562*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
3563*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
3564*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3565*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
3566*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
3567*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
3568*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
3569*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
3570*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
3571*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
3572*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
3573*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
3574*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
3575*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
3576*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
3577*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
3578*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
3579*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
3580*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
3581*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3582*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3583*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3584*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3585*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3586*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3587*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3588*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3589*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
3590*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
3591*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
3592*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
3593*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
3594*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
3595*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
3596*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
3597*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
3598*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
3599*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
3600*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
3601*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
3602*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
3603*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3604*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3605*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3606*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3607*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3608*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3609*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3610*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3611*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
3612*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
3613*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
3614*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
3615*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
3616*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
3617*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
3618*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
3619*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ0 */
3620*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ1 */
3621*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ2 */
3622*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ3 */
3623*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ4 */
3624*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ5 */
3625*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ6 */
3626*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ7 */
3627*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
3628*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
3629*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
3630*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3631*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
3632*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
3633*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
3634*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
3635*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
3636*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
3637*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
3638*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
3639*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
3640*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
3641*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
3642*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
3643*724ba675SRob Herring					0x00000022 /* EMC_TXDSRVTTGEN */
3644*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
3645*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
3646*724ba675SRob Herring					0x000e000e /* EMC_MRS_WAIT_CNT2 */
3647*724ba675SRob Herring					0x00000000 /* EMC_CTT */
3648*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
3649*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
3650*724ba675SRob Herring					0x8000050e /* EMC_DYN_SELF_REF_CONTROL */
3651*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
3652*724ba675SRob Herring				>;
3653*724ba675SRob Herring			};
3654*724ba675SRob Herring
3655*724ba675SRob Herring			timing-102000000 {
3656*724ba675SRob Herring				clock-frequency = <102000000>;
3657*724ba675SRob Herring
3658*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
3659*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
3660*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
3661*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3662*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
3663*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
3664*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
3665*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
3666*724ba675SRob Herring				nvidia,emc-mode-1 = <0x00100003>;
3667*724ba675SRob Herring				nvidia,emc-mode-2 = <0x00200008>;
3668*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
3669*724ba675SRob Herring				nvidia,emc-mode-reset = <0x00001221>;
3670*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000e000e>;
3671*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
3672*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
3673*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
3674*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
3675*724ba675SRob Herring
3676*724ba675SRob Herring				nvidia,emc-configuration = <
3677*724ba675SRob Herring					0x00000004 /* EMC_RC */
3678*724ba675SRob Herring					0x00000023 /* EMC_RFC */
3679*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
3680*724ba675SRob Herring					0x00000003 /* EMC_RAS */
3681*724ba675SRob Herring					0x00000001 /* EMC_RP */
3682*724ba675SRob Herring					0x00000004 /* EMC_R2W */
3683*724ba675SRob Herring					0x0000000a /* EMC_W2R */
3684*724ba675SRob Herring					0x00000005 /* EMC_R2P */
3685*724ba675SRob Herring					0x0000000b /* EMC_W2P */
3686*724ba675SRob Herring					0x00000001 /* EMC_RD_RCD */
3687*724ba675SRob Herring					0x00000001 /* EMC_WR_RCD */
3688*724ba675SRob Herring					0x00000003 /* EMC_RRD */
3689*724ba675SRob Herring					0x00000003 /* EMC_REXT */
3690*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3691*724ba675SRob Herring					0x00000006 /* EMC_WDV */
3692*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
3693*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
3694*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
3695*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
3696*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
3697*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
3698*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
3699*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
3700*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
3701*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
3702*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
3703*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
3704*724ba675SRob Herring					0x00000004 /* EMC_QRST */
3705*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
3706*724ba675SRob Herring					0x0000000d /* EMC_RDV */
3707*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
3708*724ba675SRob Herring					0x00000304 /* EMC_REFRESH */
3709*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3710*724ba675SRob Herring					0x000000c1 /* EMC_PRE_REFRESH_REQ_CNT */
3711*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
3712*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
3713*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3714*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3715*724ba675SRob Herring					0x00000021 /* EMC_AR2PDEN */
3716*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3717*724ba675SRob Herring					0x00000025 /* EMC_TXSR */
3718*724ba675SRob Herring					0x00000025 /* EMC_TXSRDLL */
3719*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3720*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
3721*724ba675SRob Herring					0x00000004 /* EMC_TPD */
3722*724ba675SRob Herring					0x00000003 /* EMC_TFAW */
3723*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3724*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
3725*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3726*724ba675SRob Herring					0x0000031c /* EMC_TREFBW */
3727*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
3728*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3729*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3730*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
3731*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
3732*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3733*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
3734*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
3735*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
3736*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
3737*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
3738*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
3739*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
3740*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
3741*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
3742*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
3743*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
3744*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
3745*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
3746*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
3747*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
3748*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
3749*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3750*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3751*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3752*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3753*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3754*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3755*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3756*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3757*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
3758*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
3759*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
3760*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
3761*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
3762*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
3763*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
3764*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
3765*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
3766*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
3767*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
3768*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
3769*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
3770*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
3771*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3772*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3773*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3774*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3775*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3776*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3777*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3778*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3779*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
3780*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
3781*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
3782*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
3783*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
3784*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
3785*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
3786*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
3787*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ0 */
3788*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ1 */
3789*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ2 */
3790*724ba675SRob Herring					0x00080000 /* EMC_DLL_XFORM_DQ3 */
3791*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ4 */
3792*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ5 */
3793*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ6 */
3794*724ba675SRob Herring					0x00008000 /* EMC_DLL_XFORM_DQ7 */
3795*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
3796*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
3797*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
3798*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3799*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
3800*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
3801*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
3802*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
3803*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
3804*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
3805*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
3806*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
3807*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
3808*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
3809*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
3810*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
3811*724ba675SRob Herring					0x00000033 /* EMC_TXDSRVTTGEN */
3812*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
3813*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
3814*724ba675SRob Herring					0x000e000e /* EMC_MRS_WAIT_CNT2 */
3815*724ba675SRob Herring					0x00000000 /* EMC_CTT */
3816*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
3817*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
3818*724ba675SRob Herring					0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
3819*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
3820*724ba675SRob Herring				>;
3821*724ba675SRob Herring			};
3822*724ba675SRob Herring
3823*724ba675SRob Herring			timing-204000000 {
3824*724ba675SRob Herring				clock-frequency = <204000000>;
3825*724ba675SRob Herring
3826*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
3827*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
3828*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
3829*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3830*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
3831*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
3832*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x0000088d>;
3833*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
3834*724ba675SRob Herring				nvidia,emc-mode-1 = <0x00100003>;
3835*724ba675SRob Herring				nvidia,emc-mode-2 = <0x00200008>;
3836*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
3837*724ba675SRob Herring				nvidia,emc-mode-reset = <0x00001221>;
3838*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000e000e>;
3839*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040008>;
3840*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
3841*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
3842*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
3843*724ba675SRob Herring
3844*724ba675SRob Herring				nvidia,emc-configuration = <
3845*724ba675SRob Herring					0x00000009 /* EMC_RC */
3846*724ba675SRob Herring					0x00000047 /* EMC_RFC */
3847*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
3848*724ba675SRob Herring					0x00000006 /* EMC_RAS */
3849*724ba675SRob Herring					0x00000002 /* EMC_RP */
3850*724ba675SRob Herring					0x00000005 /* EMC_R2W */
3851*724ba675SRob Herring					0x0000000a /* EMC_W2R */
3852*724ba675SRob Herring					0x00000005 /* EMC_R2P */
3853*724ba675SRob Herring					0x0000000b /* EMC_W2P */
3854*724ba675SRob Herring					0x00000002 /* EMC_RD_RCD */
3855*724ba675SRob Herring					0x00000002 /* EMC_WR_RCD */
3856*724ba675SRob Herring					0x00000003 /* EMC_RRD */
3857*724ba675SRob Herring					0x00000003 /* EMC_REXT */
3858*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
3859*724ba675SRob Herring					0x00000005 /* EMC_WDV */
3860*724ba675SRob Herring					0x00000005 /* EMC_WDV_MASK */
3861*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
3862*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
3863*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
3864*724ba675SRob Herring					0x00000004 /* EMC_EINPUT */
3865*724ba675SRob Herring					0x00000006 /* EMC_EINPUT_DURATION */
3866*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
3867*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
3868*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
3869*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
3870*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
3871*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
3872*724ba675SRob Herring					0x00000003 /* EMC_QRST */
3873*724ba675SRob Herring					0x0000000d /* EMC_QSAFE */
3874*724ba675SRob Herring					0x0000000f /* EMC_RDV */
3875*724ba675SRob Herring					0x00000011 /* EMC_RDV_MASK */
3876*724ba675SRob Herring					0x00000607 /* EMC_REFRESH */
3877*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
3878*724ba675SRob Herring					0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
3879*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
3880*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
3881*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
3882*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
3883*724ba675SRob Herring					0x00000044 /* EMC_AR2PDEN */
3884*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
3885*724ba675SRob Herring					0x0000004a /* EMC_TXSR */
3886*724ba675SRob Herring					0x0000004a /* EMC_TXSRDLL */
3887*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
3888*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
3889*724ba675SRob Herring					0x00000004 /* EMC_TPD */
3890*724ba675SRob Herring					0x00000007 /* EMC_TFAW */
3891*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
3892*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
3893*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
3894*724ba675SRob Herring					0x00000638 /* EMC_TREFBW */
3895*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
3896*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
3897*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
3898*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
3899*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
3900*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
3901*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
3902*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
3903*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
3904*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
3905*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
3906*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
3907*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
3908*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
3909*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
3910*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
3911*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
3912*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
3913*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
3914*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
3915*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
3916*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
3917*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
3918*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
3919*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
3920*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
3921*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
3922*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
3923*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
3924*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
3925*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
3926*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
3927*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
3928*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
3929*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
3930*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
3931*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
3932*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
3933*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
3934*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
3935*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
3936*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
3937*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
3938*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
3939*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
3940*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
3941*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
3942*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
3943*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
3944*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
3945*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
3946*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
3947*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
3948*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
3949*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
3950*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
3951*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
3952*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
3953*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
3954*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
3955*724ba675SRob Herring					0x00090000 /* EMC_DLL_XFORM_DQ0 */
3956*724ba675SRob Herring					0x00090000 /* EMC_DLL_XFORM_DQ1 */
3957*724ba675SRob Herring					0x00094000 /* EMC_DLL_XFORM_DQ2 */
3958*724ba675SRob Herring					0x00094000 /* EMC_DLL_XFORM_DQ3 */
3959*724ba675SRob Herring					0x00009400 /* EMC_DLL_XFORM_DQ4 */
3960*724ba675SRob Herring					0x00009000 /* EMC_DLL_XFORM_DQ5 */
3961*724ba675SRob Herring					0x00009000 /* EMC_DLL_XFORM_DQ6 */
3962*724ba675SRob Herring					0x00009000 /* EMC_DLL_XFORM_DQ7 */
3963*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
3964*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
3965*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
3966*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
3967*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
3968*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
3969*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
3970*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
3971*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
3972*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
3973*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
3974*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
3975*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
3976*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
3977*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
3978*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
3979*724ba675SRob Herring					0x00000066 /* EMC_TXDSRVTTGEN */
3980*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
3981*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
3982*724ba675SRob Herring					0x000e000e /* EMC_MRS_WAIT_CNT2 */
3983*724ba675SRob Herring					0x00000000 /* EMC_CTT */
3984*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
3985*724ba675SRob Herring					0x0000d2b3 /* EMC_CFG_PIPE */
3986*724ba675SRob Herring					0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
3987*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
3988*724ba675SRob Herring				>;
3989*724ba675SRob Herring			};
3990*724ba675SRob Herring
3991*724ba675SRob Herring			timing-300000000 {
3992*724ba675SRob Herring				clock-frequency = <300000000>;
3993*724ba675SRob Herring
3994*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
3995*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
3996*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
3997*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
3998*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
3999*724ba675SRob Herring				nvidia,emc-cfg = <0x73340000>;
4000*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008d5>;
4001*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
4002*724ba675SRob Herring				nvidia,emc-mode-1 = <0x00100002>;
4003*724ba675SRob Herring				nvidia,emc-mode-2 = <0x00200000>;
4004*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
4005*724ba675SRob Herring				nvidia,emc-mode-reset = <0x00000321>;
4006*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x0117000e>;
4007*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
4008*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x01231339>;
4009*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
4010*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
4011*724ba675SRob Herring
4012*724ba675SRob Herring				nvidia,emc-configuration = <
4013*724ba675SRob Herring					0x0000000d /* EMC_RC */
4014*724ba675SRob Herring					0x00000067 /* EMC_RFC */
4015*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
4016*724ba675SRob Herring					0x00000009 /* EMC_RAS */
4017*724ba675SRob Herring					0x00000003 /* EMC_RP */
4018*724ba675SRob Herring					0x00000004 /* EMC_R2W */
4019*724ba675SRob Herring					0x00000008 /* EMC_W2R */
4020*724ba675SRob Herring					0x00000002 /* EMC_R2P */
4021*724ba675SRob Herring					0x00000009 /* EMC_W2P */
4022*724ba675SRob Herring					0x00000003 /* EMC_RD_RCD */
4023*724ba675SRob Herring					0x00000003 /* EMC_WR_RCD */
4024*724ba675SRob Herring					0x00000002 /* EMC_RRD */
4025*724ba675SRob Herring					0x00000002 /* EMC_REXT */
4026*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
4027*724ba675SRob Herring					0x00000003 /* EMC_WDV */
4028*724ba675SRob Herring					0x00000003 /* EMC_WDV_MASK */
4029*724ba675SRob Herring					0x00000005 /* EMC_QUSE */
4030*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
4031*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
4032*724ba675SRob Herring					0x00000002 /* EMC_EINPUT */
4033*724ba675SRob Herring					0x00000007 /* EMC_EINPUT_DURATION */
4034*724ba675SRob Herring					0x00020000 /* EMC_PUTERM_EXTRA */
4035*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
4036*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
4037*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
4038*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
4039*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
4040*724ba675SRob Herring					0x00000001 /* EMC_QRST */
4041*724ba675SRob Herring					0x0000000e /* EMC_QSAFE */
4042*724ba675SRob Herring					0x00000010 /* EMC_RDV */
4043*724ba675SRob Herring					0x00000012 /* EMC_RDV_MASK */
4044*724ba675SRob Herring					0x000008e4 /* EMC_REFRESH */
4045*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
4046*724ba675SRob Herring					0x00000239 /* EMC_PRE_REFRESH_REQ_CNT */
4047*724ba675SRob Herring					0x00000001 /* EMC_PDEX2WR */
4048*724ba675SRob Herring					0x00000008 /* EMC_PDEX2RD */
4049*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
4050*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
4051*724ba675SRob Herring					0x00000065 /* EMC_AR2PDEN */
4052*724ba675SRob Herring					0x0000000e /* EMC_RW2PDEN */
4053*724ba675SRob Herring					0x0000006c /* EMC_TXSR */
4054*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
4055*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
4056*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
4057*724ba675SRob Herring					0x00000004 /* EMC_TPD */
4058*724ba675SRob Herring					0x00000009 /* EMC_TFAW */
4059*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
4060*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
4061*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
4062*724ba675SRob Herring					0x00000924 /* EMC_TREFBW */
4063*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
4064*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
4065*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
4066*724ba675SRob Herring					0x104ab098 /* EMC_FBIO_CFG5 */
4067*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
4068*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
4069*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS0 */
4070*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS1 */
4071*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS2 */
4072*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS3 */
4073*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS4 */
4074*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS5 */
4075*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS6 */
4076*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS7 */
4077*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS8 */
4078*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS9 */
4079*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS10 */
4080*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS11 */
4081*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS12 */
4082*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS13 */
4083*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS14 */
4084*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS15 */
4085*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
4086*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
4087*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
4088*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
4089*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
4090*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
4091*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
4092*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
4093*724ba675SRob Herring					0x00098000 /* EMC_DLL_XFORM_ADDR0 */
4094*724ba675SRob Herring					0x00098000 /* EMC_DLL_XFORM_ADDR1 */
4095*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
4096*724ba675SRob Herring					0x00098000 /* EMC_DLL_XFORM_ADDR3 */
4097*724ba675SRob Herring					0x00098000 /* EMC_DLL_XFORM_ADDR4 */
4098*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
4099*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
4100*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
4101*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
4102*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
4103*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
4104*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
4105*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
4106*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
4107*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
4108*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
4109*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
4110*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
4111*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
4112*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
4113*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
4114*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
4115*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
4116*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
4117*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
4118*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
4119*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
4120*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
4121*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
4122*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
4123*724ba675SRob Herring					0x00060000 /* EMC_DLL_XFORM_DQ0 */
4124*724ba675SRob Herring					0x00060000 /* EMC_DLL_XFORM_DQ1 */
4125*724ba675SRob Herring					0x00060000 /* EMC_DLL_XFORM_DQ2 */
4126*724ba675SRob Herring					0x00060000 /* EMC_DLL_XFORM_DQ3 */
4127*724ba675SRob Herring					0x00006000 /* EMC_DLL_XFORM_DQ4 */
4128*724ba675SRob Herring					0x00006000 /* EMC_DLL_XFORM_DQ5 */
4129*724ba675SRob Herring					0x00006000 /* EMC_DLL_XFORM_DQ6 */
4130*724ba675SRob Herring					0x00006000 /* EMC_DLL_XFORM_DQ7 */
4131*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
4132*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
4133*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
4134*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
4135*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
4136*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
4137*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
4138*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
4139*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
4140*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
4141*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
4142*724ba675SRob Herring					0x51451420 /* EMC_XM2DQSPADCTRL3 */
4143*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
4144*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
4145*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
4146*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
4147*724ba675SRob Herring					0x00000096 /* EMC_TXDSRVTTGEN */
4148*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
4149*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
4150*724ba675SRob Herring					0x0117000e /* EMC_MRS_WAIT_CNT2 */
4151*724ba675SRob Herring					0x00000000 /* EMC_CTT */
4152*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
4153*724ba675SRob Herring					0x000052a3 /* EMC_CFG_PIPE */
4154*724ba675SRob Herring					0x800012d7 /* EMC_DYN_SELF_REF_CONTROL */
4155*724ba675SRob Herring					0x00000009 /* EMC_QPOP */
4156*724ba675SRob Herring				>;
4157*724ba675SRob Herring			};
4158*724ba675SRob Herring
4159*724ba675SRob Herring			timing-396000000 {
4160*724ba675SRob Herring				clock-frequency = <396000000>;
4161*724ba675SRob Herring
4162*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
4163*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
4164*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
4165*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
4166*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
4167*724ba675SRob Herring				nvidia,emc-cfg = <0x73340000>;
4168*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x00000895>;
4169*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
4170*724ba675SRob Herring				nvidia,emc-mode-1 = <0x00100002>;
4171*724ba675SRob Herring				nvidia,emc-mode-2 = <0x00200000>;
4172*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
4173*724ba675SRob Herring				nvidia,emc-mode-reset = <0x00000521>;
4174*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x00f5000e>;
4175*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040008>;
4176*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x01231339>;
4177*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
4178*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
4179*724ba675SRob Herring
4180*724ba675SRob Herring				nvidia,emc-configuration = <
4181*724ba675SRob Herring					0x00000011 /* EMC_RC */
4182*724ba675SRob Herring					0x00000089 /* EMC_RFC */
4183*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
4184*724ba675SRob Herring					0x0000000c /* EMC_RAS */
4185*724ba675SRob Herring					0x00000004 /* EMC_RP */
4186*724ba675SRob Herring					0x00000005 /* EMC_R2W */
4187*724ba675SRob Herring					0x00000008 /* EMC_W2R */
4188*724ba675SRob Herring					0x00000002 /* EMC_R2P */
4189*724ba675SRob Herring					0x0000000a /* EMC_W2P */
4190*724ba675SRob Herring					0x00000004 /* EMC_RD_RCD */
4191*724ba675SRob Herring					0x00000004 /* EMC_WR_RCD */
4192*724ba675SRob Herring					0x00000002 /* EMC_RRD */
4193*724ba675SRob Herring					0x00000002 /* EMC_REXT */
4194*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
4195*724ba675SRob Herring					0x00000003 /* EMC_WDV */
4196*724ba675SRob Herring					0x00000003 /* EMC_WDV_MASK */
4197*724ba675SRob Herring					0x00000005 /* EMC_QUSE */
4198*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
4199*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
4200*724ba675SRob Herring					0x00000001 /* EMC_EINPUT */
4201*724ba675SRob Herring					0x00000008 /* EMC_EINPUT_DURATION */
4202*724ba675SRob Herring					0x00020000 /* EMC_PUTERM_EXTRA */
4203*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
4204*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
4205*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
4206*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
4207*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
4208*724ba675SRob Herring					0x00000000 /* EMC_QRST */
4209*724ba675SRob Herring					0x0000000f /* EMC_QSAFE */
4210*724ba675SRob Herring					0x00000010 /* EMC_RDV */
4211*724ba675SRob Herring					0x00000012 /* EMC_RDV_MASK */
4212*724ba675SRob Herring					0x00000bd1 /* EMC_REFRESH */
4213*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
4214*724ba675SRob Herring					0x000002f4 /* EMC_PRE_REFRESH_REQ_CNT */
4215*724ba675SRob Herring					0x00000001 /* EMC_PDEX2WR */
4216*724ba675SRob Herring					0x00000008 /* EMC_PDEX2RD */
4217*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
4218*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
4219*724ba675SRob Herring					0x00000087 /* EMC_AR2PDEN */
4220*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
4221*724ba675SRob Herring					0x0000008f /* EMC_TXSR */
4222*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
4223*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
4224*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
4225*724ba675SRob Herring					0x00000004 /* EMC_TPD */
4226*724ba675SRob Herring					0x0000000d /* EMC_TFAW */
4227*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
4228*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
4229*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
4230*724ba675SRob Herring					0x00000c11 /* EMC_TREFBW */
4231*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
4232*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
4233*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
4234*724ba675SRob Herring					0x104ab098 /* EMC_FBIO_CFG5 */
4235*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
4236*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
4237*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS0 */
4238*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS1 */
4239*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS2 */
4240*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS3 */
4241*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS4 */
4242*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS5 */
4243*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS6 */
4244*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS7 */
4245*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS8 */
4246*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS9 */
4247*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS10 */
4248*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS11 */
4249*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS12 */
4250*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS13 */
4251*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS14 */
4252*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS15 */
4253*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
4254*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
4255*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
4256*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
4257*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
4258*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
4259*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
4260*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
4261*724ba675SRob Herring					0x00070000 /* EMC_DLL_XFORM_ADDR0 */
4262*724ba675SRob Herring					0x00070000 /* EMC_DLL_XFORM_ADDR1 */
4263*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
4264*724ba675SRob Herring					0x00070000 /* EMC_DLL_XFORM_ADDR3 */
4265*724ba675SRob Herring					0x00070000 /* EMC_DLL_XFORM_ADDR4 */
4266*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
4267*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
4268*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
4269*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
4270*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
4271*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
4272*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
4273*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
4274*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
4275*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
4276*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
4277*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
4278*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
4279*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
4280*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
4281*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
4282*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
4283*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
4284*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
4285*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
4286*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
4287*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
4288*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
4289*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
4290*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
4291*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ0 */
4292*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ1 */
4293*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ2 */
4294*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ3 */
4295*724ba675SRob Herring					0x00004800 /* EMC_DLL_XFORM_DQ4 */
4296*724ba675SRob Herring					0x00004800 /* EMC_DLL_XFORM_DQ5 */
4297*724ba675SRob Herring					0x00004800 /* EMC_DLL_XFORM_DQ6 */
4298*724ba675SRob Herring					0x00004800 /* EMC_DLL_XFORM_DQ7 */
4299*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
4300*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
4301*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
4302*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
4303*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
4304*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
4305*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
4306*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
4307*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
4308*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
4309*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
4310*724ba675SRob Herring					0x51451420 /* EMC_XM2DQSPADCTRL3 */
4311*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
4312*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
4313*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
4314*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
4315*724ba675SRob Herring					0x000000c6 /* EMC_TXDSRVTTGEN */
4316*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
4317*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
4318*724ba675SRob Herring					0x00f5000e /* EMC_MRS_WAIT_CNT2 */
4319*724ba675SRob Herring					0x00000000 /* EMC_CTT */
4320*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
4321*724ba675SRob Herring					0x000052a3 /* EMC_CFG_PIPE */
4322*724ba675SRob Herring					0x8000188b /* EMC_DYN_SELF_REF_CONTROL */
4323*724ba675SRob Herring					0x00000009 /* EMC_QPOP */
4324*724ba675SRob Herring				>;
4325*724ba675SRob Herring			};
4326*724ba675SRob Herring
4327*724ba675SRob Herring			timing-528000000 {
4328*724ba675SRob Herring				clock-frequency = <528000000>;
4329*724ba675SRob Herring
4330*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
4331*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
4332*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
4333*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
4334*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
4335*724ba675SRob Herring				nvidia,emc-cfg = <0x73300000>;
4336*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x0000089d>;
4337*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
4338*724ba675SRob Herring				nvidia,emc-mode-1 = <0x00100002>;
4339*724ba675SRob Herring				nvidia,emc-mode-2 = <0x00200008>;
4340*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
4341*724ba675SRob Herring				nvidia,emc-mode-reset = <0x00000941>;
4342*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x00c8000e>;
4343*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040008>;
4344*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0123133d>;
4345*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
4346*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
4347*724ba675SRob Herring
4348*724ba675SRob Herring				nvidia,emc-configuration = <
4349*724ba675SRob Herring					0x00000018 /* EMC_RC */
4350*724ba675SRob Herring					0x000000b7 /* EMC_RFC */
4351*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
4352*724ba675SRob Herring					0x00000010 /* EMC_RAS */
4353*724ba675SRob Herring					0x00000006 /* EMC_RP */
4354*724ba675SRob Herring					0x00000006 /* EMC_R2W */
4355*724ba675SRob Herring					0x00000009 /* EMC_W2R */
4356*724ba675SRob Herring					0x00000002 /* EMC_R2P */
4357*724ba675SRob Herring					0x0000000d /* EMC_W2P */
4358*724ba675SRob Herring					0x00000006 /* EMC_RD_RCD */
4359*724ba675SRob Herring					0x00000006 /* EMC_WR_RCD */
4360*724ba675SRob Herring					0x00000002 /* EMC_RRD */
4361*724ba675SRob Herring					0x00000002 /* EMC_REXT */
4362*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
4363*724ba675SRob Herring					0x00000003 /* EMC_WDV */
4364*724ba675SRob Herring					0x00000003 /* EMC_WDV_MASK */
4365*724ba675SRob Herring					0x00000007 /* EMC_QUSE */
4366*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
4367*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
4368*724ba675SRob Herring					0x00000002 /* EMC_EINPUT */
4369*724ba675SRob Herring					0x00000009 /* EMC_EINPUT_DURATION */
4370*724ba675SRob Herring					0x00040000 /* EMC_PUTERM_EXTRA */
4371*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
4372*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
4373*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
4374*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
4375*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
4376*724ba675SRob Herring					0x00000001 /* EMC_QRST */
4377*724ba675SRob Herring					0x00000010 /* EMC_QSAFE */
4378*724ba675SRob Herring					0x00000013 /* EMC_RDV */
4379*724ba675SRob Herring					0x00000015 /* EMC_RDV_MASK */
4380*724ba675SRob Herring					0x00000fd6 /* EMC_REFRESH */
4381*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
4382*724ba675SRob Herring					0x000003f5 /* EMC_PRE_REFRESH_REQ_CNT */
4383*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
4384*724ba675SRob Herring					0x0000000b /* EMC_PDEX2RD */
4385*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
4386*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
4387*724ba675SRob Herring					0x000000b4 /* EMC_AR2PDEN */
4388*724ba675SRob Herring					0x00000012 /* EMC_RW2PDEN */
4389*724ba675SRob Herring					0x000000bf /* EMC_TXSR */
4390*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
4391*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
4392*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
4393*724ba675SRob Herring					0x00000004 /* EMC_TPD */
4394*724ba675SRob Herring					0x00000013 /* EMC_TFAW */
4395*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
4396*724ba675SRob Herring					0x00000006 /* EMC_TCLKSTABLE */
4397*724ba675SRob Herring					0x00000006 /* EMC_TCLKSTOP */
4398*724ba675SRob Herring					0x00001017 /* EMC_TREFBW */
4399*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
4400*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
4401*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
4402*724ba675SRob Herring					0x104ab098 /* EMC_FBIO_CFG5 */
4403*724ba675SRob Herring					0xe01200b1 /* EMC_CFG_DIG_DLL */
4404*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
4405*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS0 */
4406*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS1 */
4407*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS2 */
4408*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS3 */
4409*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS4 */
4410*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS5 */
4411*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS6 */
4412*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS7 */
4413*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS8 */
4414*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS9 */
4415*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS10 */
4416*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS11 */
4417*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS12 */
4418*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS13 */
4419*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS14 */
4420*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS15 */
4421*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
4422*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
4423*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
4424*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
4425*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
4426*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
4427*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
4428*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
4429*724ba675SRob Herring					0x00050000 /* EMC_DLL_XFORM_ADDR0 */
4430*724ba675SRob Herring					0x00050000 /* EMC_DLL_XFORM_ADDR1 */
4431*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
4432*724ba675SRob Herring					0x00050000 /* EMC_DLL_XFORM_ADDR3 */
4433*724ba675SRob Herring					0x00050000 /* EMC_DLL_XFORM_ADDR4 */
4434*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
4435*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
4436*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
4437*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
4438*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
4439*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
4440*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
4441*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
4442*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
4443*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS0 */
4444*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS1 */
4445*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
4446*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS3 */
4447*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS4 */
4448*724ba675SRob Herring					0x00000001 /* EMC_DLI_TRIM_TXDQS5 */
4449*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS6 */
4450*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS7 */
4451*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS8 */
4452*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS9 */
4453*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
4454*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS11 */
4455*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS12 */
4456*724ba675SRob Herring					0x00000001 /* EMC_DLI_TRIM_TXDQS13 */
4457*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS14 */
4458*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS15 */
4459*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ0 */
4460*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ1 */
4461*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ2 */
4462*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ3 */
4463*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ4 */
4464*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ5 */
4465*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ6 */
4466*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ7 */
4467*724ba675SRob Herring					0x100002a0 /* EMC_XM2CMDPADCTRL */
4468*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
4469*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
4470*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
4471*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
4472*724ba675SRob Herring					0x77ffc085 /* EMC_XM2CLKPADCTRL */
4473*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
4474*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
4475*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
4476*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
4477*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
4478*724ba675SRob Herring					0x51451420 /* EMC_XM2DQSPADCTRL3 */
4479*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
4480*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
4481*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
4482*724ba675SRob Herring					0x0606003f /* EMC_DSR_VTTGEN_DRV */
4483*724ba675SRob Herring					0x00000000 /* EMC_TXDSRVTTGEN */
4484*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
4485*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
4486*724ba675SRob Herring					0x00c8000e /* EMC_MRS_WAIT_CNT2 */
4487*724ba675SRob Herring					0x00000000 /* EMC_CTT */
4488*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
4489*724ba675SRob Herring					0x000042a0 /* EMC_CFG_PIPE */
4490*724ba675SRob Herring					0x80002062 /* EMC_DYN_SELF_REF_CONTROL */
4491*724ba675SRob Herring					0x0000000b /* EMC_QPOP */
4492*724ba675SRob Herring				>;
4493*724ba675SRob Herring			};
4494*724ba675SRob Herring
4495*724ba675SRob Herring			timing-600000000 {
4496*724ba675SRob Herring				clock-frequency = <600000000>;
4497*724ba675SRob Herring
4498*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
4499*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
4500*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
4501*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
4502*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
4503*724ba675SRob Herring				nvidia,emc-cfg = <0x73300000>;
4504*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x0000089d>;
4505*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
4506*724ba675SRob Herring				nvidia,emc-mode-1 = <0x00100002>;
4507*724ba675SRob Herring				nvidia,emc-mode-2 = <0x00200010>;
4508*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
4509*724ba675SRob Herring				nvidia,emc-mode-reset = <0x00000b61>;
4510*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x00b0000e>;
4511*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040008>;
4512*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0121113d>;
4513*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
4514*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
4515*724ba675SRob Herring
4516*724ba675SRob Herring				nvidia,emc-configuration = <
4517*724ba675SRob Herring					0x0000001b /* EMC_RC */
4518*724ba675SRob Herring					0x000000d0 /* EMC_RFC */
4519*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
4520*724ba675SRob Herring					0x00000013 /* EMC_RAS */
4521*724ba675SRob Herring					0x00000007 /* EMC_RP */
4522*724ba675SRob Herring					0x00000007 /* EMC_R2W */
4523*724ba675SRob Herring					0x0000000b /* EMC_W2R */
4524*724ba675SRob Herring					0x00000003 /* EMC_R2P */
4525*724ba675SRob Herring					0x00000010 /* EMC_W2P */
4526*724ba675SRob Herring					0x00000007 /* EMC_RD_RCD */
4527*724ba675SRob Herring					0x00000007 /* EMC_WR_RCD */
4528*724ba675SRob Herring					0x00000002 /* EMC_RRD */
4529*724ba675SRob Herring					0x00000002 /* EMC_REXT */
4530*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
4531*724ba675SRob Herring					0x00000005 /* EMC_WDV */
4532*724ba675SRob Herring					0x00000005 /* EMC_WDV_MASK */
4533*724ba675SRob Herring					0x0000000a /* EMC_QUSE */
4534*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
4535*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
4536*724ba675SRob Herring					0x00000003 /* EMC_EINPUT */
4537*724ba675SRob Herring					0x0000000b /* EMC_EINPUT_DURATION */
4538*724ba675SRob Herring					0x00070000 /* EMC_PUTERM_EXTRA */
4539*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
4540*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
4541*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
4542*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
4543*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
4544*724ba675SRob Herring					0x00000002 /* EMC_QRST */
4545*724ba675SRob Herring					0x00000012 /* EMC_QSAFE */
4546*724ba675SRob Herring					0x00000016 /* EMC_RDV */
4547*724ba675SRob Herring					0x00000018 /* EMC_RDV_MASK */
4548*724ba675SRob Herring					0x00001208 /* EMC_REFRESH */
4549*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
4550*724ba675SRob Herring					0x00000482 /* EMC_PRE_REFRESH_REQ_CNT */
4551*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
4552*724ba675SRob Herring					0x0000000d /* EMC_PDEX2RD */
4553*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
4554*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
4555*724ba675SRob Herring					0x000000cc /* EMC_AR2PDEN */
4556*724ba675SRob Herring					0x00000015 /* EMC_RW2PDEN */
4557*724ba675SRob Herring					0x000000d8 /* EMC_TXSR */
4558*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
4559*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
4560*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
4561*724ba675SRob Herring					0x00000004 /* EMC_TPD */
4562*724ba675SRob Herring					0x00000015 /* EMC_TFAW */
4563*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
4564*724ba675SRob Herring					0x00000006 /* EMC_TCLKSTABLE */
4565*724ba675SRob Herring					0x00000006 /* EMC_TCLKSTOP */
4566*724ba675SRob Herring					0x00001249 /* EMC_TREFBW */
4567*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
4568*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
4569*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
4570*724ba675SRob Herring					0x104ab098 /* EMC_FBIO_CFG5 */
4571*724ba675SRob Herring					0xe00e00b1 /* EMC_CFG_DIG_DLL */
4572*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
4573*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS0 */
4574*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS1 */
4575*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS2 */
4576*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS3 */
4577*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS4 */
4578*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS5 */
4579*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS6 */
4580*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS7 */
4581*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS8 */
4582*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS9 */
4583*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS10 */
4584*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS11 */
4585*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS12 */
4586*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS13 */
4587*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS14 */
4588*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS15 */
4589*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
4590*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
4591*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
4592*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
4593*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
4594*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
4595*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
4596*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
4597*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_ADDR0 */
4598*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_ADDR1 */
4599*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
4600*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_ADDR3 */
4601*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_ADDR4 */
4602*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
4603*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
4604*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
4605*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
4606*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
4607*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
4608*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
4609*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
4610*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
4611*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS0 */
4612*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS1 */
4613*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS2 */
4614*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS3 */
4615*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS4 */
4616*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS5 */
4617*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS6 */
4618*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS7 */
4619*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS8 */
4620*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS9 */
4621*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS10 */
4622*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS11 */
4623*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS12 */
4624*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS13 */
4625*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS14 */
4626*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS15 */
4627*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ0 */
4628*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ1 */
4629*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ2 */
4630*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ3 */
4631*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ4 */
4632*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ5 */
4633*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ6 */
4634*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ7 */
4635*724ba675SRob Herring					0x100002a0 /* EMC_XM2CMDPADCTRL */
4636*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
4637*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
4638*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
4639*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
4640*724ba675SRob Herring					0x77ffc085 /* EMC_XM2CLKPADCTRL */
4641*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
4642*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
4643*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
4644*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
4645*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
4646*724ba675SRob Herring					0x51451420 /* EMC_XM2DQSPADCTRL3 */
4647*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
4648*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
4649*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
4650*724ba675SRob Herring					0x0606003f /* EMC_DSR_VTTGEN_DRV */
4651*724ba675SRob Herring					0x00000000 /* EMC_TXDSRVTTGEN */
4652*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
4653*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
4654*724ba675SRob Herring					0x00b0000e /* EMC_MRS_WAIT_CNT2 */
4655*724ba675SRob Herring					0x00000000 /* EMC_CTT */
4656*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
4657*724ba675SRob Herring					0x000040a0 /* EMC_CFG_PIPE */
4658*724ba675SRob Herring					0x800024aa /* EMC_DYN_SELF_REF_CONTROL */
4659*724ba675SRob Herring					0x0000000e /* EMC_QPOP */
4660*724ba675SRob Herring				>;
4661*724ba675SRob Herring			};
4662*724ba675SRob Herring
4663*724ba675SRob Herring			timing-792000000 {
4664*724ba675SRob Herring				clock-frequency = <792000000>;
4665*724ba675SRob Herring
4666*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
4667*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
4668*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
4669*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
4670*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
4671*724ba675SRob Herring				nvidia,emc-cfg = <0x73300000>;
4672*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x0080089d>;
4673*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
4674*724ba675SRob Herring				nvidia,emc-mode-1 = <0x00100002>;
4675*724ba675SRob Herring				nvidia,emc-mode-2 = <0x00200418>;
4676*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
4677*724ba675SRob Herring				nvidia,emc-mode-reset = <0x00000d71>;
4678*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x006f000e>;
4679*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040000>;
4680*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0120113d>;
4681*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
4682*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
4683*724ba675SRob Herring
4684*724ba675SRob Herring				nvidia,emc-configuration = <
4685*724ba675SRob Herring					0x00000024 /* EMC_RC */
4686*724ba675SRob Herring					0x00000114 /* EMC_RFC */
4687*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
4688*724ba675SRob Herring					0x00000019 /* EMC_RAS */
4689*724ba675SRob Herring					0x0000000a /* EMC_RP */
4690*724ba675SRob Herring					0x00000008 /* EMC_R2W */
4691*724ba675SRob Herring					0x0000000d /* EMC_W2R */
4692*724ba675SRob Herring					0x00000004 /* EMC_R2P */
4693*724ba675SRob Herring					0x00000013 /* EMC_W2P */
4694*724ba675SRob Herring					0x0000000a /* EMC_RD_RCD */
4695*724ba675SRob Herring					0x0000000a /* EMC_WR_RCD */
4696*724ba675SRob Herring					0x00000003 /* EMC_RRD */
4697*724ba675SRob Herring					0x00000002 /* EMC_REXT */
4698*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
4699*724ba675SRob Herring					0x00000006 /* EMC_WDV */
4700*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
4701*724ba675SRob Herring					0x0000000b /* EMC_QUSE */
4702*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
4703*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
4704*724ba675SRob Herring					0x00000002 /* EMC_EINPUT */
4705*724ba675SRob Herring					0x0000000d /* EMC_EINPUT_DURATION */
4706*724ba675SRob Herring					0x00080000 /* EMC_PUTERM_EXTRA */
4707*724ba675SRob Herring					0x00000004 /* EMC_PUTERM_WIDTH */
4708*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
4709*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
4710*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
4711*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
4712*724ba675SRob Herring					0x00000001 /* EMC_QRST */
4713*724ba675SRob Herring					0x00000014 /* EMC_QSAFE */
4714*724ba675SRob Herring					0x00000018 /* EMC_RDV */
4715*724ba675SRob Herring					0x0000001a /* EMC_RDV_MASK */
4716*724ba675SRob Herring					0x000017e2 /* EMC_REFRESH */
4717*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
4718*724ba675SRob Herring					0x000005f8 /* EMC_PRE_REFRESH_REQ_CNT */
4719*724ba675SRob Herring					0x00000003 /* EMC_PDEX2WR */
4720*724ba675SRob Herring					0x00000011 /* EMC_PDEX2RD */
4721*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
4722*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
4723*724ba675SRob Herring					0x0000010d /* EMC_AR2PDEN */
4724*724ba675SRob Herring					0x00000018 /* EMC_RW2PDEN */
4725*724ba675SRob Herring					0x0000011e /* EMC_TXSR */
4726*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
4727*724ba675SRob Herring					0x00000005 /* EMC_TCKE */
4728*724ba675SRob Herring					0x00000006 /* EMC_TCKESR */
4729*724ba675SRob Herring					0x00000005 /* EMC_TPD */
4730*724ba675SRob Herring					0x0000001d /* EMC_TFAW */
4731*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
4732*724ba675SRob Herring					0x00000008 /* EMC_TCLKSTABLE */
4733*724ba675SRob Herring					0x00000008 /* EMC_TCLKSTOP */
4734*724ba675SRob Herring					0x00001822 /* EMC_TREFBW */
4735*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
4736*724ba675SRob Herring					0x80000005 /* EMC_ODT_WRITE */
4737*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
4738*724ba675SRob Herring					0x104ab198 /* EMC_FBIO_CFG5 */
4739*724ba675SRob Herring					0xe00700b1 /* EMC_CFG_DIG_DLL */
4740*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
4741*724ba675SRob Herring					0x007fc007 /* EMC_DLL_XFORM_DQS0 */
4742*724ba675SRob Herring					0x007fc008 /* EMC_DLL_XFORM_DQS1 */
4743*724ba675SRob Herring					0x007f400c /* EMC_DLL_XFORM_DQS2 */
4744*724ba675SRob Herring					0x007fc007 /* EMC_DLL_XFORM_DQS3 */
4745*724ba675SRob Herring					0x007f4006 /* EMC_DLL_XFORM_DQS4 */
4746*724ba675SRob Herring					0x007f8004 /* EMC_DLL_XFORM_DQS5 */
4747*724ba675SRob Herring					0x007f8005 /* EMC_DLL_XFORM_DQS6 */
4748*724ba675SRob Herring					0x007f8004 /* EMC_DLL_XFORM_DQS7 */
4749*724ba675SRob Herring					0x007fc007 /* EMC_DLL_XFORM_DQS8 */
4750*724ba675SRob Herring					0x007fc008 /* EMC_DLL_XFORM_DQS9 */
4751*724ba675SRob Herring					0x007f400c /* EMC_DLL_XFORM_DQS10 */
4752*724ba675SRob Herring					0x007fc007 /* EMC_DLL_XFORM_DQS11 */
4753*724ba675SRob Herring					0x007f4006 /* EMC_DLL_XFORM_DQS12 */
4754*724ba675SRob Herring					0x007f8004 /* EMC_DLL_XFORM_DQS13 */
4755*724ba675SRob Herring					0x007f8005 /* EMC_DLL_XFORM_DQS14 */
4756*724ba675SRob Herring					0x007f8004 /* EMC_DLL_XFORM_DQS15 */
4757*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
4758*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
4759*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
4760*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
4761*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
4762*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
4763*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
4764*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
4765*724ba675SRob Herring					0x00034000 /* EMC_DLL_XFORM_ADDR0 */
4766*724ba675SRob Herring					0x00034000 /* EMC_DLL_XFORM_ADDR1 */
4767*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
4768*724ba675SRob Herring					0x00034000 /* EMC_DLL_XFORM_ADDR3 */
4769*724ba675SRob Herring					0x00034000 /* EMC_DLL_XFORM_ADDR4 */
4770*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
4771*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
4772*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
4773*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
4774*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
4775*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
4776*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
4777*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
4778*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
4779*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS0 */
4780*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS1 */
4781*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS2 */
4782*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS3 */
4783*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS4 */
4784*724ba675SRob Herring					0x00000007 /* EMC_DLI_TRIM_TXDQS5 */
4785*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS6 */
4786*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS7 */
4787*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS8 */
4788*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS9 */
4789*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS10 */
4790*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS11 */
4791*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS12 */
4792*724ba675SRob Herring					0x00000007 /* EMC_DLI_TRIM_TXDQS13 */
4793*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS14 */
4794*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS15 */
4795*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ0 */
4796*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ1 */
4797*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ2 */
4798*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ3 */
4799*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ4 */
4800*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ5 */
4801*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ6 */
4802*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ7 */
4803*724ba675SRob Herring					0x100002a0 /* EMC_XM2CMDPADCTRL */
4804*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
4805*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
4806*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
4807*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
4808*724ba675SRob Herring					0x77ffc085 /* EMC_XM2CLKPADCTRL */
4809*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
4810*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
4811*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
4812*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
4813*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
4814*724ba675SRob Herring					0x61861820 /* EMC_XM2DQSPADCTRL3 */
4815*724ba675SRob Herring					0x00492492 /* EMC_XM2DQSPADCTRL4 */
4816*724ba675SRob Herring					0x00492492 /* EMC_XM2DQSPADCTRL5 */
4817*724ba675SRob Herring					0x61861800 /* EMC_XM2DQSPADCTRL6 */
4818*724ba675SRob Herring					0x0606003f /* EMC_DSR_VTTGEN_DRV */
4819*724ba675SRob Herring					0x00000000 /* EMC_TXDSRVTTGEN */
4820*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
4821*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
4822*724ba675SRob Herring					0x006f000e /* EMC_MRS_WAIT_CNT2 */
4823*724ba675SRob Herring					0x00000007 /* EMC_CTT */
4824*724ba675SRob Herring					0x00000004 /* EMC_CTT_DURATION */
4825*724ba675SRob Herring					0x00004080 /* EMC_CFG_PIPE */
4826*724ba675SRob Herring					0x80003012 /* EMC_DYN_SELF_REF_CONTROL */
4827*724ba675SRob Herring					0x0000000f /* EMC_QPOP */
4828*724ba675SRob Herring				>;
4829*724ba675SRob Herring			};
4830*724ba675SRob Herring		};
4831*724ba675SRob Herring
4832*724ba675SRob Herring		emc-timings-6 {
4833*724ba675SRob Herring			nvidia,ram-code = <6>;
4834*724ba675SRob Herring
4835*724ba675SRob Herring			timing-12750000 {
4836*724ba675SRob Herring				clock-frequency = <12750000>;
4837*724ba675SRob Herring
4838*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
4839*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
4840*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
4841*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
4842*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
4843*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
4844*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
4845*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
4846*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
4847*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
4848*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
4849*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
4850*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000c000c>;
4851*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
4852*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
4853*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
4854*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
4855*724ba675SRob Herring
4856*724ba675SRob Herring				nvidia,emc-configuration = <
4857*724ba675SRob Herring					0x00000000 /* EMC_RC */
4858*724ba675SRob Herring					0x00000003 /* EMC_RFC */
4859*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
4860*724ba675SRob Herring					0x00000000 /* EMC_RAS */
4861*724ba675SRob Herring					0x00000000 /* EMC_RP */
4862*724ba675SRob Herring					0x00000004 /* EMC_R2W */
4863*724ba675SRob Herring					0x0000000a /* EMC_W2R */
4864*724ba675SRob Herring					0x00000003 /* EMC_R2P */
4865*724ba675SRob Herring					0x0000000b /* EMC_W2P */
4866*724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
4867*724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
4868*724ba675SRob Herring					0x00000003 /* EMC_RRD */
4869*724ba675SRob Herring					0x00000003 /* EMC_REXT */
4870*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
4871*724ba675SRob Herring					0x00000006 /* EMC_WDV */
4872*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
4873*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
4874*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
4875*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
4876*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
4877*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
4878*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
4879*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
4880*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
4881*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
4882*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
4883*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
4884*724ba675SRob Herring					0x00000004 /* EMC_QRST */
4885*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
4886*724ba675SRob Herring					0x0000000d /* EMC_RDV */
4887*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
4888*724ba675SRob Herring					0x00000060 /* EMC_REFRESH */
4889*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
4890*724ba675SRob Herring					0x00000018 /* EMC_PRE_REFRESH_REQ_CNT */
4891*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
4892*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
4893*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
4894*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
4895*724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
4896*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
4897*724ba675SRob Herring					0x00000005 /* EMC_TXSR */
4898*724ba675SRob Herring					0x00000005 /* EMC_TXSRDLL */
4899*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
4900*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
4901*724ba675SRob Herring					0x00000004 /* EMC_TPD */
4902*724ba675SRob Herring					0x00000000 /* EMC_TFAW */
4903*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
4904*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
4905*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
4906*724ba675SRob Herring					0x00000064 /* EMC_TREFBW */
4907*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
4908*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
4909*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
4910*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
4911*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
4912*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
4913*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
4914*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
4915*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
4916*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
4917*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
4918*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
4919*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
4920*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
4921*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
4922*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
4923*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
4924*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
4925*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
4926*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
4927*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
4928*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
4929*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
4930*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
4931*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
4932*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
4933*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
4934*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
4935*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
4936*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
4937*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
4938*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
4939*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
4940*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
4941*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
4942*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
4943*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
4944*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
4945*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
4946*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
4947*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
4948*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
4949*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
4950*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
4951*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
4952*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
4953*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
4954*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
4955*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
4956*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
4957*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
4958*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
4959*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
4960*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
4961*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
4962*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
4963*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
4964*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
4965*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
4966*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
4967*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
4968*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
4969*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
4970*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
4971*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ4 */
4972*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ5 */
4973*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ6 */
4974*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ7 */
4975*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
4976*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
4977*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
4978*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
4979*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
4980*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
4981*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
4982*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
4983*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
4984*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
4985*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
4986*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
4987*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
4988*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
4989*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
4990*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
4991*724ba675SRob Herring					0x00000007 /* EMC_TXDSRVTTGEN */
4992*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
4993*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
4994*724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT2 */
4995*724ba675SRob Herring					0x00000000 /* EMC_CTT */
4996*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
4997*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
4998*724ba675SRob Herring					0x800001c5 /* EMC_DYN_SELF_REF_CONTROL */
4999*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
5000*724ba675SRob Herring				>;
5001*724ba675SRob Herring			};
5002*724ba675SRob Herring
5003*724ba675SRob Herring			timing-20400000 {
5004*724ba675SRob Herring				clock-frequency = <20400000>;
5005*724ba675SRob Herring
5006*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
5007*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
5008*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
5009*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
5010*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
5011*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
5012*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
5013*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
5014*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
5015*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
5016*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
5017*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
5018*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000c000c>;
5019*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
5020*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
5021*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
5022*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
5023*724ba675SRob Herring
5024*724ba675SRob Herring				nvidia,emc-configuration = <
5025*724ba675SRob Herring					0x00000000 /* EMC_RC */
5026*724ba675SRob Herring					0x00000005 /* EMC_RFC */
5027*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
5028*724ba675SRob Herring					0x00000000 /* EMC_RAS */
5029*724ba675SRob Herring					0x00000000 /* EMC_RP */
5030*724ba675SRob Herring					0x00000004 /* EMC_R2W */
5031*724ba675SRob Herring					0x0000000a /* EMC_W2R */
5032*724ba675SRob Herring					0x00000003 /* EMC_R2P */
5033*724ba675SRob Herring					0x0000000b /* EMC_W2P */
5034*724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
5035*724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
5036*724ba675SRob Herring					0x00000003 /* EMC_RRD */
5037*724ba675SRob Herring					0x00000003 /* EMC_REXT */
5038*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
5039*724ba675SRob Herring					0x00000006 /* EMC_WDV */
5040*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
5041*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
5042*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
5043*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
5044*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
5045*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
5046*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
5047*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
5048*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
5049*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
5050*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
5051*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
5052*724ba675SRob Herring					0x00000004 /* EMC_QRST */
5053*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
5054*724ba675SRob Herring					0x0000000d /* EMC_RDV */
5055*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
5056*724ba675SRob Herring					0x0000009a /* EMC_REFRESH */
5057*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
5058*724ba675SRob Herring					0x00000026 /* EMC_PRE_REFRESH_REQ_CNT */
5059*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
5060*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
5061*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
5062*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
5063*724ba675SRob Herring					0x00000007 /* EMC_AR2PDEN */
5064*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
5065*724ba675SRob Herring					0x00000006 /* EMC_TXSR */
5066*724ba675SRob Herring					0x00000006 /* EMC_TXSRDLL */
5067*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
5068*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
5069*724ba675SRob Herring					0x00000004 /* EMC_TPD */
5070*724ba675SRob Herring					0x00000000 /* EMC_TFAW */
5071*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
5072*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
5073*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
5074*724ba675SRob Herring					0x000000a0 /* EMC_TREFBW */
5075*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
5076*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
5077*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
5078*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
5079*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
5080*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
5081*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
5082*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
5083*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
5084*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
5085*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
5086*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
5087*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
5088*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
5089*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
5090*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
5091*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
5092*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
5093*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
5094*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
5095*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
5096*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
5097*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
5098*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
5099*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
5100*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
5101*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
5102*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
5103*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
5104*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
5105*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
5106*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
5107*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
5108*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
5109*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
5110*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
5111*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
5112*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
5113*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
5114*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
5115*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
5116*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
5117*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
5118*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
5119*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
5120*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
5121*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
5122*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
5123*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
5124*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
5125*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
5126*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
5127*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
5128*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
5129*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
5130*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
5131*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
5132*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
5133*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
5134*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
5135*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
5136*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
5137*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
5138*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
5139*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ4 */
5140*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ5 */
5141*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ6 */
5142*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ7 */
5143*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
5144*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
5145*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
5146*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
5147*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
5148*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
5149*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
5150*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
5151*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
5152*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
5153*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
5154*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
5155*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
5156*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
5157*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
5158*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
5159*724ba675SRob Herring					0x0000000b /* EMC_TXDSRVTTGEN */
5160*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
5161*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
5162*724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT2 */
5163*724ba675SRob Herring					0x00000000 /* EMC_CTT */
5164*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
5165*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
5166*724ba675SRob Herring					0x8000023a /* EMC_DYN_SELF_REF_CONTROL */
5167*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
5168*724ba675SRob Herring				>;
5169*724ba675SRob Herring			};
5170*724ba675SRob Herring
5171*724ba675SRob Herring			timing-40800000 {
5172*724ba675SRob Herring				clock-frequency = <40800000>;
5173*724ba675SRob Herring
5174*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
5175*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
5176*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
5177*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
5178*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
5179*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
5180*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
5181*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
5182*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
5183*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
5184*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
5185*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
5186*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000c000c>;
5187*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
5188*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
5189*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
5190*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
5191*724ba675SRob Herring
5192*724ba675SRob Herring				nvidia,emc-configuration = <
5193*724ba675SRob Herring					0x00000001 /* EMC_RC */
5194*724ba675SRob Herring					0x0000000a /* EMC_RFC */
5195*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
5196*724ba675SRob Herring					0x00000001 /* EMC_RAS */
5197*724ba675SRob Herring					0x00000000 /* EMC_RP */
5198*724ba675SRob Herring					0x00000004 /* EMC_R2W */
5199*724ba675SRob Herring					0x0000000a /* EMC_W2R */
5200*724ba675SRob Herring					0x00000003 /* EMC_R2P */
5201*724ba675SRob Herring					0x0000000b /* EMC_W2P */
5202*724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
5203*724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
5204*724ba675SRob Herring					0x00000003 /* EMC_RRD */
5205*724ba675SRob Herring					0x00000003 /* EMC_REXT */
5206*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
5207*724ba675SRob Herring					0x00000006 /* EMC_WDV */
5208*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
5209*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
5210*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
5211*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
5212*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
5213*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
5214*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
5215*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
5216*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
5217*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
5218*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
5219*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
5220*724ba675SRob Herring					0x00000004 /* EMC_QRST */
5221*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
5222*724ba675SRob Herring					0x0000000d /* EMC_RDV */
5223*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
5224*724ba675SRob Herring					0x00000134 /* EMC_REFRESH */
5225*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
5226*724ba675SRob Herring					0x0000004d /* EMC_PRE_REFRESH_REQ_CNT */
5227*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
5228*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
5229*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
5230*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
5231*724ba675SRob Herring					0x00000008 /* EMC_AR2PDEN */
5232*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
5233*724ba675SRob Herring					0x0000000c /* EMC_TXSR */
5234*724ba675SRob Herring					0x0000000c /* EMC_TXSRDLL */
5235*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
5236*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
5237*724ba675SRob Herring					0x00000004 /* EMC_TPD */
5238*724ba675SRob Herring					0x00000000 /* EMC_TFAW */
5239*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
5240*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
5241*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
5242*724ba675SRob Herring					0x0000013f /* EMC_TREFBW */
5243*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
5244*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
5245*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
5246*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
5247*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
5248*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
5249*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
5250*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
5251*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
5252*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
5253*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
5254*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
5255*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
5256*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
5257*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
5258*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
5259*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
5260*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
5261*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
5262*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
5263*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
5264*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
5265*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
5266*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
5267*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
5268*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
5269*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
5270*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
5271*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
5272*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
5273*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
5274*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
5275*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
5276*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
5277*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
5278*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
5279*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
5280*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
5281*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
5282*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
5283*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
5284*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
5285*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
5286*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
5287*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
5288*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
5289*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
5290*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
5291*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
5292*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
5293*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
5294*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
5295*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
5296*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
5297*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
5298*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
5299*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
5300*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
5301*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
5302*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
5303*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
5304*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
5305*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
5306*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
5307*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ4 */
5308*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ5 */
5309*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ6 */
5310*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ7 */
5311*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
5312*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
5313*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
5314*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
5315*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
5316*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
5317*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
5318*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
5319*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
5320*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
5321*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
5322*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
5323*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
5324*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
5325*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
5326*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
5327*724ba675SRob Herring					0x00000015 /* EMC_TXDSRVTTGEN */
5328*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
5329*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
5330*724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT2 */
5331*724ba675SRob Herring					0x00000000 /* EMC_CTT */
5332*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
5333*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
5334*724ba675SRob Herring					0x80000370 /* EMC_DYN_SELF_REF_CONTROL */
5335*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
5336*724ba675SRob Herring				>;
5337*724ba675SRob Herring			};
5338*724ba675SRob Herring
5339*724ba675SRob Herring			timing-68000000 {
5340*724ba675SRob Herring				clock-frequency = <68000000>;
5341*724ba675SRob Herring
5342*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
5343*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
5344*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
5345*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
5346*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
5347*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
5348*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
5349*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
5350*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
5351*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
5352*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
5353*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
5354*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000c000c>;
5355*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
5356*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
5357*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
5358*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
5359*724ba675SRob Herring
5360*724ba675SRob Herring				nvidia,emc-configuration = <
5361*724ba675SRob Herring					0x00000003 /* EMC_RC */
5362*724ba675SRob Herring					0x00000011 /* EMC_RFC */
5363*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
5364*724ba675SRob Herring					0x00000002 /* EMC_RAS */
5365*724ba675SRob Herring					0x00000000 /* EMC_RP */
5366*724ba675SRob Herring					0x00000004 /* EMC_R2W */
5367*724ba675SRob Herring					0x0000000a /* EMC_W2R */
5368*724ba675SRob Herring					0x00000003 /* EMC_R2P */
5369*724ba675SRob Herring					0x0000000b /* EMC_W2P */
5370*724ba675SRob Herring					0x00000000 /* EMC_RD_RCD */
5371*724ba675SRob Herring					0x00000000 /* EMC_WR_RCD */
5372*724ba675SRob Herring					0x00000003 /* EMC_RRD */
5373*724ba675SRob Herring					0x00000003 /* EMC_REXT */
5374*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
5375*724ba675SRob Herring					0x00000006 /* EMC_WDV */
5376*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
5377*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
5378*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
5379*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
5380*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
5381*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
5382*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
5383*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
5384*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
5385*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
5386*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
5387*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
5388*724ba675SRob Herring					0x00000004 /* EMC_QRST */
5389*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
5390*724ba675SRob Herring					0x0000000d /* EMC_RDV */
5391*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
5392*724ba675SRob Herring					0x00000202 /* EMC_REFRESH */
5393*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
5394*724ba675SRob Herring					0x00000080 /* EMC_PRE_REFRESH_REQ_CNT */
5395*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
5396*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
5397*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
5398*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
5399*724ba675SRob Herring					0x0000000f /* EMC_AR2PDEN */
5400*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
5401*724ba675SRob Herring					0x00000013 /* EMC_TXSR */
5402*724ba675SRob Herring					0x00000013 /* EMC_TXSRDLL */
5403*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
5404*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
5405*724ba675SRob Herring					0x00000004 /* EMC_TPD */
5406*724ba675SRob Herring					0x00000001 /* EMC_TFAW */
5407*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
5408*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
5409*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
5410*724ba675SRob Herring					0x00000213 /* EMC_TREFBW */
5411*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
5412*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
5413*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
5414*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
5415*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
5416*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
5417*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
5418*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
5419*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
5420*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
5421*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
5422*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
5423*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
5424*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
5425*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
5426*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
5427*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
5428*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
5429*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
5430*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
5431*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
5432*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
5433*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
5434*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
5435*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
5436*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
5437*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
5438*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
5439*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
5440*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
5441*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
5442*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
5443*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
5444*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
5445*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
5446*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
5447*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
5448*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
5449*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
5450*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
5451*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
5452*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
5453*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
5454*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
5455*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
5456*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
5457*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
5458*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
5459*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
5460*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
5461*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
5462*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
5463*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
5464*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
5465*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
5466*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
5467*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
5468*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
5469*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
5470*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
5471*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
5472*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
5473*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
5474*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
5475*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ4 */
5476*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ5 */
5477*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ6 */
5478*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ7 */
5479*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
5480*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
5481*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
5482*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
5483*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
5484*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
5485*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
5486*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
5487*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
5488*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
5489*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
5490*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
5491*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
5492*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
5493*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
5494*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
5495*724ba675SRob Herring					0x00000022 /* EMC_TXDSRVTTGEN */
5496*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
5497*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
5498*724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT2 */
5499*724ba675SRob Herring					0x00000000 /* EMC_CTT */
5500*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
5501*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
5502*724ba675SRob Herring					0x8000050e /* EMC_DYN_SELF_REF_CONTROL */
5503*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
5504*724ba675SRob Herring				>;
5505*724ba675SRob Herring			};
5506*724ba675SRob Herring
5507*724ba675SRob Herring			timing-102000000 {
5508*724ba675SRob Herring				clock-frequency = <102000000>;
5509*724ba675SRob Herring
5510*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
5511*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
5512*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
5513*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
5514*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
5515*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
5516*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008c5>;
5517*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
5518*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
5519*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
5520*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
5521*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
5522*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000c000c>;
5523*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
5524*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
5525*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
5526*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00000000>;
5527*724ba675SRob Herring
5528*724ba675SRob Herring				nvidia,emc-configuration = <
5529*724ba675SRob Herring					0x00000004 /* EMC_RC */
5530*724ba675SRob Herring					0x0000001a /* EMC_RFC */
5531*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
5532*724ba675SRob Herring					0x00000003 /* EMC_RAS */
5533*724ba675SRob Herring					0x00000001 /* EMC_RP */
5534*724ba675SRob Herring					0x00000004 /* EMC_R2W */
5535*724ba675SRob Herring					0x0000000a /* EMC_W2R */
5536*724ba675SRob Herring					0x00000003 /* EMC_R2P */
5537*724ba675SRob Herring					0x0000000b /* EMC_W2P */
5538*724ba675SRob Herring					0x00000001 /* EMC_RD_RCD */
5539*724ba675SRob Herring					0x00000001 /* EMC_WR_RCD */
5540*724ba675SRob Herring					0x00000003 /* EMC_RRD */
5541*724ba675SRob Herring					0x00000003 /* EMC_REXT */
5542*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
5543*724ba675SRob Herring					0x00000006 /* EMC_WDV */
5544*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
5545*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
5546*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
5547*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
5548*724ba675SRob Herring					0x00000005 /* EMC_EINPUT */
5549*724ba675SRob Herring					0x00000005 /* EMC_EINPUT_DURATION */
5550*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
5551*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
5552*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
5553*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
5554*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
5555*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
5556*724ba675SRob Herring					0x00000004 /* EMC_QRST */
5557*724ba675SRob Herring					0x0000000c /* EMC_QSAFE */
5558*724ba675SRob Herring					0x0000000d /* EMC_RDV */
5559*724ba675SRob Herring					0x0000000f /* EMC_RDV_MASK */
5560*724ba675SRob Herring					0x00000304 /* EMC_REFRESH */
5561*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
5562*724ba675SRob Herring					0x000000c1 /* EMC_PRE_REFRESH_REQ_CNT */
5563*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
5564*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
5565*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
5566*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
5567*724ba675SRob Herring					0x00000018 /* EMC_AR2PDEN */
5568*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
5569*724ba675SRob Herring					0x0000001c /* EMC_TXSR */
5570*724ba675SRob Herring					0x0000001c /* EMC_TXSRDLL */
5571*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
5572*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
5573*724ba675SRob Herring					0x00000004 /* EMC_TPD */
5574*724ba675SRob Herring					0x00000003 /* EMC_TFAW */
5575*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
5576*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
5577*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
5578*724ba675SRob Herring					0x0000031c /* EMC_TREFBW */
5579*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
5580*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
5581*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
5582*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
5583*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
5584*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
5585*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
5586*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
5587*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
5588*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
5589*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
5590*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
5591*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
5592*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
5593*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
5594*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
5595*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
5596*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
5597*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
5598*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
5599*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
5600*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
5601*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
5602*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
5603*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
5604*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
5605*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
5606*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
5607*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
5608*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
5609*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
5610*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
5611*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
5612*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
5613*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
5614*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
5615*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
5616*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
5617*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
5618*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
5619*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
5620*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
5621*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
5622*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
5623*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
5624*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
5625*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
5626*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
5627*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
5628*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
5629*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
5630*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
5631*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
5632*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
5633*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
5634*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
5635*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
5636*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
5637*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
5638*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
5639*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ0 */
5640*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ1 */
5641*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ2 */
5642*724ba675SRob Herring					0x000fc000 /* EMC_DLL_XFORM_DQ3 */
5643*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ4 */
5644*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ5 */
5645*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ6 */
5646*724ba675SRob Herring					0x0000fc00 /* EMC_DLL_XFORM_DQ7 */
5647*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
5648*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
5649*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
5650*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
5651*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
5652*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
5653*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
5654*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
5655*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
5656*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
5657*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
5658*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
5659*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
5660*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
5661*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
5662*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
5663*724ba675SRob Herring					0x00000033 /* EMC_TXDSRVTTGEN */
5664*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
5665*724ba675SRob Herring					0x00000042 /* EMC_ZCAL_WAIT_CNT */
5666*724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT2 */
5667*724ba675SRob Herring					0x00000000 /* EMC_CTT */
5668*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
5669*724ba675SRob Herring					0x0000f2f3 /* EMC_CFG_PIPE */
5670*724ba675SRob Herring					0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
5671*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
5672*724ba675SRob Herring				>;
5673*724ba675SRob Herring			};
5674*724ba675SRob Herring
5675*724ba675SRob Herring			timing-204000000 {
5676*724ba675SRob Herring				clock-frequency = <204000000>;
5677*724ba675SRob Herring
5678*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
5679*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
5680*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
5681*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
5682*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000008>;
5683*724ba675SRob Herring				nvidia,emc-cfg = <0x73240000>;
5684*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x0000088d>;
5685*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
5686*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100003>;
5687*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
5688*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
5689*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80001221>;
5690*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x000c000c>;
5691*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040008>;
5692*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
5693*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
5694*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
5695*724ba675SRob Herring
5696*724ba675SRob Herring				nvidia,emc-configuration = <
5697*724ba675SRob Herring					0x00000009 /* EMC_RC */
5698*724ba675SRob Herring					0x00000035 /* EMC_RFC */
5699*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
5700*724ba675SRob Herring					0x00000007 /* EMC_RAS */
5701*724ba675SRob Herring					0x00000002 /* EMC_RP */
5702*724ba675SRob Herring					0x00000005 /* EMC_R2W */
5703*724ba675SRob Herring					0x0000000a /* EMC_W2R */
5704*724ba675SRob Herring					0x00000003 /* EMC_R2P */
5705*724ba675SRob Herring					0x0000000b /* EMC_W2P */
5706*724ba675SRob Herring					0x00000002 /* EMC_RD_RCD */
5707*724ba675SRob Herring					0x00000002 /* EMC_WR_RCD */
5708*724ba675SRob Herring					0x00000003 /* EMC_RRD */
5709*724ba675SRob Herring					0x00000003 /* EMC_REXT */
5710*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
5711*724ba675SRob Herring					0x00000005 /* EMC_WDV */
5712*724ba675SRob Herring					0x00000005 /* EMC_WDV_MASK */
5713*724ba675SRob Herring					0x00000006 /* EMC_QUSE */
5714*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
5715*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
5716*724ba675SRob Herring					0x00000004 /* EMC_EINPUT */
5717*724ba675SRob Herring					0x00000006 /* EMC_EINPUT_DURATION */
5718*724ba675SRob Herring					0x00010000 /* EMC_PUTERM_EXTRA */
5719*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
5720*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
5721*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
5722*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
5723*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
5724*724ba675SRob Herring					0x00000003 /* EMC_QRST */
5725*724ba675SRob Herring					0x0000000d /* EMC_QSAFE */
5726*724ba675SRob Herring					0x0000000f /* EMC_RDV */
5727*724ba675SRob Herring					0x00000011 /* EMC_RDV_MASK */
5728*724ba675SRob Herring					0x00000607 /* EMC_REFRESH */
5729*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
5730*724ba675SRob Herring					0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
5731*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
5732*724ba675SRob Herring					0x00000002 /* EMC_PDEX2RD */
5733*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
5734*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
5735*724ba675SRob Herring					0x00000032 /* EMC_AR2PDEN */
5736*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
5737*724ba675SRob Herring					0x00000038 /* EMC_TXSR */
5738*724ba675SRob Herring					0x00000038 /* EMC_TXSRDLL */
5739*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
5740*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
5741*724ba675SRob Herring					0x00000004 /* EMC_TPD */
5742*724ba675SRob Herring					0x00000007 /* EMC_TFAW */
5743*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
5744*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
5745*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
5746*724ba675SRob Herring					0x00000638 /* EMC_TREFBW */
5747*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
5748*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
5749*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
5750*724ba675SRob Herring					0x106aa298 /* EMC_FBIO_CFG5 */
5751*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
5752*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
5753*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS0 */
5754*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS1 */
5755*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS2 */
5756*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS3 */
5757*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS4 */
5758*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS5 */
5759*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS6 */
5760*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS7 */
5761*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS8 */
5762*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS9 */
5763*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS10 */
5764*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS11 */
5765*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS12 */
5766*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS13 */
5767*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS14 */
5768*724ba675SRob Herring					0x00064000 /* EMC_DLL_XFORM_DQS15 */
5769*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
5770*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
5771*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
5772*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
5773*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
5774*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
5775*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
5776*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
5777*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR0 */
5778*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR1 */
5779*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR2 */
5780*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR3 */
5781*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR4 */
5782*724ba675SRob Herring					0x00004000 /* EMC_DLL_XFORM_ADDR5 */
5783*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
5784*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
5785*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
5786*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
5787*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
5788*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
5789*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
5790*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
5791*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
5792*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
5793*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
5794*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
5795*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
5796*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
5797*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
5798*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
5799*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
5800*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
5801*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
5802*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
5803*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
5804*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
5805*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
5806*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
5807*724ba675SRob Herring					0x00090000 /* EMC_DLL_XFORM_DQ0 */
5808*724ba675SRob Herring					0x00090000 /* EMC_DLL_XFORM_DQ1 */
5809*724ba675SRob Herring					0x00094000 /* EMC_DLL_XFORM_DQ2 */
5810*724ba675SRob Herring					0x00094000 /* EMC_DLL_XFORM_DQ3 */
5811*724ba675SRob Herring					0x00009400 /* EMC_DLL_XFORM_DQ4 */
5812*724ba675SRob Herring					0x00009000 /* EMC_DLL_XFORM_DQ5 */
5813*724ba675SRob Herring					0x00009000 /* EMC_DLL_XFORM_DQ6 */
5814*724ba675SRob Herring					0x00009000 /* EMC_DLL_XFORM_DQ7 */
5815*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
5816*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
5817*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
5818*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
5819*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
5820*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
5821*724ba675SRob Herring					0x00000303 /* EMC_XM2CLKPADCTRL2 */
5822*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
5823*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
5824*724ba675SRob Herring					0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
5825*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
5826*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL3 */
5827*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
5828*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
5829*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
5830*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
5831*724ba675SRob Herring					0x00000066 /* EMC_TXDSRVTTGEN */
5832*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
5833*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
5834*724ba675SRob Herring					0x000c000c /* EMC_MRS_WAIT_CNT2 */
5835*724ba675SRob Herring					0x00000000 /* EMC_CTT */
5836*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
5837*724ba675SRob Herring					0x0000d2b3 /* EMC_CFG_PIPE */
5838*724ba675SRob Herring					0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
5839*724ba675SRob Herring					0x0000000a /* EMC_QPOP */
5840*724ba675SRob Herring				>;
5841*724ba675SRob Herring			};
5842*724ba675SRob Herring
5843*724ba675SRob Herring			timing-300000000 {
5844*724ba675SRob Herring				clock-frequency = <300000000>;
5845*724ba675SRob Herring
5846*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
5847*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
5848*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
5849*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
5850*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
5851*724ba675SRob Herring				nvidia,emc-cfg = <0x73340000>;
5852*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x000008d5>;
5853*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
5854*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
5855*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200000>;
5856*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
5857*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000321>;
5858*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x0174000c>;
5859*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040128>;
5860*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x01231339>;
5861*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
5862*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
5863*724ba675SRob Herring
5864*724ba675SRob Herring				nvidia,emc-configuration = <
5865*724ba675SRob Herring					0x0000000d /* EMC_RC */
5866*724ba675SRob Herring					0x0000004c /* EMC_RFC */
5867*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
5868*724ba675SRob Herring					0x00000009 /* EMC_RAS */
5869*724ba675SRob Herring					0x00000003 /* EMC_RP */
5870*724ba675SRob Herring					0x00000004 /* EMC_R2W */
5871*724ba675SRob Herring					0x00000008 /* EMC_W2R */
5872*724ba675SRob Herring					0x00000002 /* EMC_R2P */
5873*724ba675SRob Herring					0x00000009 /* EMC_W2P */
5874*724ba675SRob Herring					0x00000003 /* EMC_RD_RCD */
5875*724ba675SRob Herring					0x00000003 /* EMC_WR_RCD */
5876*724ba675SRob Herring					0x00000002 /* EMC_RRD */
5877*724ba675SRob Herring					0x00000002 /* EMC_REXT */
5878*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
5879*724ba675SRob Herring					0x00000003 /* EMC_WDV */
5880*724ba675SRob Herring					0x00000003 /* EMC_WDV_MASK */
5881*724ba675SRob Herring					0x00000005 /* EMC_QUSE */
5882*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
5883*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
5884*724ba675SRob Herring					0x00000002 /* EMC_EINPUT */
5885*724ba675SRob Herring					0x00000007 /* EMC_EINPUT_DURATION */
5886*724ba675SRob Herring					0x00020000 /* EMC_PUTERM_EXTRA */
5887*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
5888*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
5889*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
5890*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
5891*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
5892*724ba675SRob Herring					0x00000001 /* EMC_QRST */
5893*724ba675SRob Herring					0x0000000e /* EMC_QSAFE */
5894*724ba675SRob Herring					0x00000010 /* EMC_RDV */
5895*724ba675SRob Herring					0x00000012 /* EMC_RDV_MASK */
5896*724ba675SRob Herring					0x000008e4 /* EMC_REFRESH */
5897*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
5898*724ba675SRob Herring					0x00000239 /* EMC_PRE_REFRESH_REQ_CNT */
5899*724ba675SRob Herring					0x00000001 /* EMC_PDEX2WR */
5900*724ba675SRob Herring					0x00000008 /* EMC_PDEX2RD */
5901*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
5902*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
5903*724ba675SRob Herring					0x0000004a /* EMC_AR2PDEN */
5904*724ba675SRob Herring					0x0000000e /* EMC_RW2PDEN */
5905*724ba675SRob Herring					0x00000051 /* EMC_TXSR */
5906*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
5907*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
5908*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
5909*724ba675SRob Herring					0x00000004 /* EMC_TPD */
5910*724ba675SRob Herring					0x00000009 /* EMC_TFAW */
5911*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
5912*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
5913*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
5914*724ba675SRob Herring					0x00000924 /* EMC_TREFBW */
5915*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
5916*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
5917*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
5918*724ba675SRob Herring					0x104ab098 /* EMC_FBIO_CFG5 */
5919*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
5920*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
5921*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS0 */
5922*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS1 */
5923*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS2 */
5924*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS3 */
5925*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS4 */
5926*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS5 */
5927*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS6 */
5928*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS7 */
5929*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS8 */
5930*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS9 */
5931*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS10 */
5932*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS11 */
5933*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS12 */
5934*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS13 */
5935*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS14 */
5936*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS15 */
5937*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
5938*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
5939*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
5940*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
5941*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
5942*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
5943*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
5944*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
5945*724ba675SRob Herring					0x00098000 /* EMC_DLL_XFORM_ADDR0 */
5946*724ba675SRob Herring					0x00098000 /* EMC_DLL_XFORM_ADDR1 */
5947*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
5948*724ba675SRob Herring					0x00098000 /* EMC_DLL_XFORM_ADDR3 */
5949*724ba675SRob Herring					0x00098000 /* EMC_DLL_XFORM_ADDR4 */
5950*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
5951*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
5952*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
5953*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
5954*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
5955*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
5956*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
5957*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
5958*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
5959*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
5960*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
5961*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
5962*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
5963*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
5964*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
5965*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
5966*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
5967*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
5968*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
5969*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
5970*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
5971*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
5972*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
5973*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
5974*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
5975*724ba675SRob Herring					0x00060000 /* EMC_DLL_XFORM_DQ0 */
5976*724ba675SRob Herring					0x00060000 /* EMC_DLL_XFORM_DQ1 */
5977*724ba675SRob Herring					0x00060000 /* EMC_DLL_XFORM_DQ2 */
5978*724ba675SRob Herring					0x00060000 /* EMC_DLL_XFORM_DQ3 */
5979*724ba675SRob Herring					0x00006000 /* EMC_DLL_XFORM_DQ4 */
5980*724ba675SRob Herring					0x00006000 /* EMC_DLL_XFORM_DQ5 */
5981*724ba675SRob Herring					0x00006000 /* EMC_DLL_XFORM_DQ6 */
5982*724ba675SRob Herring					0x00006000 /* EMC_DLL_XFORM_DQ7 */
5983*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
5984*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
5985*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
5986*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
5987*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
5988*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
5989*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
5990*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
5991*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
5992*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
5993*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
5994*724ba675SRob Herring					0x51451420 /* EMC_XM2DQSPADCTRL3 */
5995*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
5996*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
5997*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
5998*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
5999*724ba675SRob Herring					0x00000096 /* EMC_TXDSRVTTGEN */
6000*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
6001*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
6002*724ba675SRob Herring					0x0174000c /* EMC_MRS_WAIT_CNT2 */
6003*724ba675SRob Herring					0x00000000 /* EMC_CTT */
6004*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
6005*724ba675SRob Herring					0x000052a3 /* EMC_CFG_PIPE */
6006*724ba675SRob Herring					0x800012d7 /* EMC_DYN_SELF_REF_CONTROL */
6007*724ba675SRob Herring					0x00000009 /* EMC_QPOP */
6008*724ba675SRob Herring				>;
6009*724ba675SRob Herring			};
6010*724ba675SRob Herring
6011*724ba675SRob Herring			timing-396000000 {
6012*724ba675SRob Herring				clock-frequency = <396000000>;
6013*724ba675SRob Herring
6014*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
6015*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
6016*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
6017*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
6018*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
6019*724ba675SRob Herring				nvidia,emc-cfg = <0x73340000>;
6020*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x00000895>;
6021*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
6022*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
6023*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200000>;
6024*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
6025*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000521>;
6026*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x015b000c>;
6027*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040008>;
6028*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x01231339>;
6029*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
6030*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
6031*724ba675SRob Herring
6032*724ba675SRob Herring				nvidia,emc-configuration = <
6033*724ba675SRob Herring					0x00000012 /* EMC_RC */
6034*724ba675SRob Herring					0x00000065 /* EMC_RFC */
6035*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
6036*724ba675SRob Herring					0x0000000c /* EMC_RAS */
6037*724ba675SRob Herring					0x00000004 /* EMC_RP */
6038*724ba675SRob Herring					0x00000005 /* EMC_R2W */
6039*724ba675SRob Herring					0x00000008 /* EMC_W2R */
6040*724ba675SRob Herring					0x00000002 /* EMC_R2P */
6041*724ba675SRob Herring					0x0000000a /* EMC_W2P */
6042*724ba675SRob Herring					0x00000004 /* EMC_RD_RCD */
6043*724ba675SRob Herring					0x00000004 /* EMC_WR_RCD */
6044*724ba675SRob Herring					0x00000002 /* EMC_RRD */
6045*724ba675SRob Herring					0x00000002 /* EMC_REXT */
6046*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
6047*724ba675SRob Herring					0x00000003 /* EMC_WDV */
6048*724ba675SRob Herring					0x00000003 /* EMC_WDV_MASK */
6049*724ba675SRob Herring					0x00000005 /* EMC_QUSE */
6050*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
6051*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
6052*724ba675SRob Herring					0x00000001 /* EMC_EINPUT */
6053*724ba675SRob Herring					0x00000008 /* EMC_EINPUT_DURATION */
6054*724ba675SRob Herring					0x00020000 /* EMC_PUTERM_EXTRA */
6055*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
6056*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
6057*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
6058*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
6059*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
6060*724ba675SRob Herring					0x00000000 /* EMC_QRST */
6061*724ba675SRob Herring					0x0000000f /* EMC_QSAFE */
6062*724ba675SRob Herring					0x00000010 /* EMC_RDV */
6063*724ba675SRob Herring					0x00000012 /* EMC_RDV_MASK */
6064*724ba675SRob Herring					0x00000bd1 /* EMC_REFRESH */
6065*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
6066*724ba675SRob Herring					0x000002f4 /* EMC_PRE_REFRESH_REQ_CNT */
6067*724ba675SRob Herring					0x00000001 /* EMC_PDEX2WR */
6068*724ba675SRob Herring					0x00000008 /* EMC_PDEX2RD */
6069*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
6070*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
6071*724ba675SRob Herring					0x00000063 /* EMC_AR2PDEN */
6072*724ba675SRob Herring					0x0000000f /* EMC_RW2PDEN */
6073*724ba675SRob Herring					0x0000006b /* EMC_TXSR */
6074*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
6075*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
6076*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
6077*724ba675SRob Herring					0x00000004 /* EMC_TPD */
6078*724ba675SRob Herring					0x0000000d /* EMC_TFAW */
6079*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
6080*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTABLE */
6081*724ba675SRob Herring					0x00000005 /* EMC_TCLKSTOP */
6082*724ba675SRob Herring					0x00000c11 /* EMC_TREFBW */
6083*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
6084*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
6085*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
6086*724ba675SRob Herring					0x104ab098 /* EMC_FBIO_CFG5 */
6087*724ba675SRob Herring					0x002c00a0 /* EMC_CFG_DIG_DLL */
6088*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
6089*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS0 */
6090*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS1 */
6091*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS2 */
6092*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS3 */
6093*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS4 */
6094*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS5 */
6095*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS6 */
6096*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS7 */
6097*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS8 */
6098*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS9 */
6099*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS10 */
6100*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS11 */
6101*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS12 */
6102*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS13 */
6103*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS14 */
6104*724ba675SRob Herring					0x00030000 /* EMC_DLL_XFORM_DQS15 */
6105*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
6106*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
6107*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
6108*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
6109*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
6110*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
6111*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
6112*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
6113*724ba675SRob Herring					0x00070000 /* EMC_DLL_XFORM_ADDR0 */
6114*724ba675SRob Herring					0x00070000 /* EMC_DLL_XFORM_ADDR1 */
6115*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
6116*724ba675SRob Herring					0x00070000 /* EMC_DLL_XFORM_ADDR3 */
6117*724ba675SRob Herring					0x00070000 /* EMC_DLL_XFORM_ADDR4 */
6118*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
6119*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
6120*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
6121*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
6122*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
6123*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
6124*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
6125*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
6126*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
6127*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
6128*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
6129*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
6130*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
6131*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
6132*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
6133*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
6134*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
6135*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
6136*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
6137*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
6138*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
6139*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
6140*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
6141*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
6142*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
6143*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ0 */
6144*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ1 */
6145*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ2 */
6146*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_DQ3 */
6147*724ba675SRob Herring					0x00004800 /* EMC_DLL_XFORM_DQ4 */
6148*724ba675SRob Herring					0x00004800 /* EMC_DLL_XFORM_DQ5 */
6149*724ba675SRob Herring					0x00004800 /* EMC_DLL_XFORM_DQ6 */
6150*724ba675SRob Herring					0x00004800 /* EMC_DLL_XFORM_DQ7 */
6151*724ba675SRob Herring					0x10000280 /* EMC_XM2CMDPADCTRL */
6152*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
6153*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
6154*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
6155*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
6156*724ba675SRob Herring					0x77ffc081 /* EMC_XM2CLKPADCTRL */
6157*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
6158*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
6159*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
6160*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
6161*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
6162*724ba675SRob Herring					0x51451420 /* EMC_XM2DQSPADCTRL3 */
6163*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
6164*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
6165*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
6166*724ba675SRob Herring					0x0000003f /* EMC_DSR_VTTGEN_DRV */
6167*724ba675SRob Herring					0x000000c6 /* EMC_TXDSRVTTGEN */
6168*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
6169*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
6170*724ba675SRob Herring					0x015b000c /* EMC_MRS_WAIT_CNT2 */
6171*724ba675SRob Herring					0x00000000 /* EMC_CTT */
6172*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
6173*724ba675SRob Herring					0x000052a3 /* EMC_CFG_PIPE */
6174*724ba675SRob Herring					0x8000188b /* EMC_DYN_SELF_REF_CONTROL */
6175*724ba675SRob Herring					0x00000009 /* EMC_QPOP */
6176*724ba675SRob Herring				>;
6177*724ba675SRob Herring			};
6178*724ba675SRob Herring
6179*724ba675SRob Herring			timing-528000000 {
6180*724ba675SRob Herring				clock-frequency = <528000000>;
6181*724ba675SRob Herring
6182*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
6183*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
6184*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
6185*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
6186*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
6187*724ba675SRob Herring				nvidia,emc-cfg = <0x73300000>;
6188*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x0000089d>;
6189*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
6190*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
6191*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200008>;
6192*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
6193*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000941>;
6194*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x013a000c>;
6195*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040008>;
6196*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0123133d>;
6197*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
6198*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
6199*724ba675SRob Herring
6200*724ba675SRob Herring				nvidia,emc-configuration = <
6201*724ba675SRob Herring					0x00000018 /* EMC_RC */
6202*724ba675SRob Herring					0x00000088 /* EMC_RFC */
6203*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
6204*724ba675SRob Herring					0x00000011 /* EMC_RAS */
6205*724ba675SRob Herring					0x00000006 /* EMC_RP */
6206*724ba675SRob Herring					0x00000006 /* EMC_R2W */
6207*724ba675SRob Herring					0x00000009 /* EMC_W2R */
6208*724ba675SRob Herring					0x00000002 /* EMC_R2P */
6209*724ba675SRob Herring					0x0000000d /* EMC_W2P */
6210*724ba675SRob Herring					0x00000006 /* EMC_RD_RCD */
6211*724ba675SRob Herring					0x00000006 /* EMC_WR_RCD */
6212*724ba675SRob Herring					0x00000002 /* EMC_RRD */
6213*724ba675SRob Herring					0x00000002 /* EMC_REXT */
6214*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
6215*724ba675SRob Herring					0x00000003 /* EMC_WDV */
6216*724ba675SRob Herring					0x00000003 /* EMC_WDV_MASK */
6217*724ba675SRob Herring					0x00000007 /* EMC_QUSE */
6218*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
6219*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
6220*724ba675SRob Herring					0x00000002 /* EMC_EINPUT */
6221*724ba675SRob Herring					0x00000009 /* EMC_EINPUT_DURATION */
6222*724ba675SRob Herring					0x00040000 /* EMC_PUTERM_EXTRA */
6223*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
6224*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
6225*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
6226*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
6227*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
6228*724ba675SRob Herring					0x00000001 /* EMC_QRST */
6229*724ba675SRob Herring					0x00000010 /* EMC_QSAFE */
6230*724ba675SRob Herring					0x00000013 /* EMC_RDV */
6231*724ba675SRob Herring					0x00000015 /* EMC_RDV_MASK */
6232*724ba675SRob Herring					0x00000fd6 /* EMC_REFRESH */
6233*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
6234*724ba675SRob Herring					0x000003f5 /* EMC_PRE_REFRESH_REQ_CNT */
6235*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
6236*724ba675SRob Herring					0x0000000b /* EMC_PDEX2RD */
6237*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
6238*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
6239*724ba675SRob Herring					0x00000084 /* EMC_AR2PDEN */
6240*724ba675SRob Herring					0x00000012 /* EMC_RW2PDEN */
6241*724ba675SRob Herring					0x0000008f /* EMC_TXSR */
6242*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
6243*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
6244*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
6245*724ba675SRob Herring					0x00000004 /* EMC_TPD */
6246*724ba675SRob Herring					0x00000013 /* EMC_TFAW */
6247*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
6248*724ba675SRob Herring					0x00000006 /* EMC_TCLKSTABLE */
6249*724ba675SRob Herring					0x00000006 /* EMC_TCLKSTOP */
6250*724ba675SRob Herring					0x00001017 /* EMC_TREFBW */
6251*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
6252*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
6253*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
6254*724ba675SRob Herring					0x104ab098 /* EMC_FBIO_CFG5 */
6255*724ba675SRob Herring					0xe01200b1 /* EMC_CFG_DIG_DLL */
6256*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
6257*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS0 */
6258*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS1 */
6259*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS2 */
6260*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS3 */
6261*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS4 */
6262*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS5 */
6263*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS6 */
6264*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS7 */
6265*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS8 */
6266*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS9 */
6267*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS10 */
6268*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS11 */
6269*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS12 */
6270*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS13 */
6271*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS14 */
6272*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS15 */
6273*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
6274*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
6275*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
6276*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
6277*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
6278*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
6279*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
6280*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
6281*724ba675SRob Herring					0x00050000 /* EMC_DLL_XFORM_ADDR0 */
6282*724ba675SRob Herring					0x00050000 /* EMC_DLL_XFORM_ADDR1 */
6283*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
6284*724ba675SRob Herring					0x00050000 /* EMC_DLL_XFORM_ADDR3 */
6285*724ba675SRob Herring					0x00050000 /* EMC_DLL_XFORM_ADDR4 */
6286*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
6287*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
6288*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
6289*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
6290*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
6291*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
6292*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
6293*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
6294*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
6295*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS0 */
6296*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS1 */
6297*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
6298*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS3 */
6299*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS4 */
6300*724ba675SRob Herring					0x00000001 /* EMC_DLI_TRIM_TXDQS5 */
6301*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS6 */
6302*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS7 */
6303*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS8 */
6304*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS9 */
6305*724ba675SRob Herring					0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
6306*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS11 */
6307*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS12 */
6308*724ba675SRob Herring					0x00000001 /* EMC_DLI_TRIM_TXDQS13 */
6309*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS14 */
6310*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS15 */
6311*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ0 */
6312*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ1 */
6313*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ2 */
6314*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ3 */
6315*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ4 */
6316*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ5 */
6317*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ6 */
6318*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ7 */
6319*724ba675SRob Herring					0x100002a0 /* EMC_XM2CMDPADCTRL */
6320*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
6321*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
6322*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
6323*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
6324*724ba675SRob Herring					0x77ffc085 /* EMC_XM2CLKPADCTRL */
6325*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
6326*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
6327*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
6328*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
6329*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
6330*724ba675SRob Herring					0x51451420 /* EMC_XM2DQSPADCTRL3 */
6331*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
6332*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
6333*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
6334*724ba675SRob Herring					0x0606003f /* EMC_DSR_VTTGEN_DRV */
6335*724ba675SRob Herring					0x00000000 /* EMC_TXDSRVTTGEN */
6336*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
6337*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
6338*724ba675SRob Herring					0x013a000c /* EMC_MRS_WAIT_CNT2 */
6339*724ba675SRob Herring					0x00000000 /* EMC_CTT */
6340*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
6341*724ba675SRob Herring					0x000042a0 /* EMC_CFG_PIPE */
6342*724ba675SRob Herring					0x80002062 /* EMC_DYN_SELF_REF_CONTROL */
6343*724ba675SRob Herring					0x0000000b /* EMC_QPOP */
6344*724ba675SRob Herring				>;
6345*724ba675SRob Herring			};
6346*724ba675SRob Herring
6347*724ba675SRob Herring			timing-600000000 {
6348*724ba675SRob Herring				clock-frequency = <600000000>;
6349*724ba675SRob Herring
6350*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
6351*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
6352*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
6353*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
6354*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
6355*724ba675SRob Herring				nvidia,emc-cfg = <0x73300000>;
6356*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x0000089d>;
6357*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
6358*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
6359*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200010>;
6360*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
6361*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000b61>;
6362*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x0128000c>;
6363*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040008>;
6364*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0121113d>;
6365*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
6366*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
6367*724ba675SRob Herring
6368*724ba675SRob Herring				nvidia,emc-configuration = <
6369*724ba675SRob Herring					0x0000001c /* EMC_RC */
6370*724ba675SRob Herring					0x0000009a /* EMC_RFC */
6371*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
6372*724ba675SRob Herring					0x00000013 /* EMC_RAS */
6373*724ba675SRob Herring					0x00000007 /* EMC_RP */
6374*724ba675SRob Herring					0x00000007 /* EMC_R2W */
6375*724ba675SRob Herring					0x0000000b /* EMC_W2R */
6376*724ba675SRob Herring					0x00000003 /* EMC_R2P */
6377*724ba675SRob Herring					0x00000010 /* EMC_W2P */
6378*724ba675SRob Herring					0x00000007 /* EMC_RD_RCD */
6379*724ba675SRob Herring					0x00000007 /* EMC_WR_RCD */
6380*724ba675SRob Herring					0x00000003 /* EMC_RRD */
6381*724ba675SRob Herring					0x00000002 /* EMC_REXT */
6382*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
6383*724ba675SRob Herring					0x00000005 /* EMC_WDV */
6384*724ba675SRob Herring					0x00000005 /* EMC_WDV_MASK */
6385*724ba675SRob Herring					0x0000000a /* EMC_QUSE */
6386*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
6387*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
6388*724ba675SRob Herring					0x00000003 /* EMC_EINPUT */
6389*724ba675SRob Herring					0x0000000b /* EMC_EINPUT_DURATION */
6390*724ba675SRob Herring					0x00070000 /* EMC_PUTERM_EXTRA */
6391*724ba675SRob Herring					0x00000003 /* EMC_PUTERM_WIDTH */
6392*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
6393*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
6394*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
6395*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
6396*724ba675SRob Herring					0x00000002 /* EMC_QRST */
6397*724ba675SRob Herring					0x00000012 /* EMC_QSAFE */
6398*724ba675SRob Herring					0x00000016 /* EMC_RDV */
6399*724ba675SRob Herring					0x00000018 /* EMC_RDV_MASK */
6400*724ba675SRob Herring					0x00001208 /* EMC_REFRESH */
6401*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
6402*724ba675SRob Herring					0x00000482 /* EMC_PRE_REFRESH_REQ_CNT */
6403*724ba675SRob Herring					0x00000002 /* EMC_PDEX2WR */
6404*724ba675SRob Herring					0x0000000d /* EMC_PDEX2RD */
6405*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
6406*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
6407*724ba675SRob Herring					0x00000096 /* EMC_AR2PDEN */
6408*724ba675SRob Herring					0x00000015 /* EMC_RW2PDEN */
6409*724ba675SRob Herring					0x000000a2 /* EMC_TXSR */
6410*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
6411*724ba675SRob Herring					0x00000004 /* EMC_TCKE */
6412*724ba675SRob Herring					0x00000005 /* EMC_TCKESR */
6413*724ba675SRob Herring					0x00000004 /* EMC_TPD */
6414*724ba675SRob Herring					0x00000015 /* EMC_TFAW */
6415*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
6416*724ba675SRob Herring					0x00000006 /* EMC_TCLKSTABLE */
6417*724ba675SRob Herring					0x00000006 /* EMC_TCLKSTOP */
6418*724ba675SRob Herring					0x00001249 /* EMC_TREFBW */
6419*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
6420*724ba675SRob Herring					0x00000000 /* EMC_ODT_WRITE */
6421*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
6422*724ba675SRob Herring					0x104ab098 /* EMC_FBIO_CFG5 */
6423*724ba675SRob Herring					0xe00e00b1 /* EMC_CFG_DIG_DLL */
6424*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
6425*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS0 */
6426*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS1 */
6427*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS2 */
6428*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS3 */
6429*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS4 */
6430*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS5 */
6431*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS6 */
6432*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS7 */
6433*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS8 */
6434*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS9 */
6435*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS10 */
6436*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS11 */
6437*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS12 */
6438*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS13 */
6439*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS14 */
6440*724ba675SRob Herring					0x0000000a /* EMC_DLL_XFORM_DQS15 */
6441*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
6442*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
6443*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
6444*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
6445*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
6446*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
6447*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
6448*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
6449*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_ADDR0 */
6450*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_ADDR1 */
6451*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
6452*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_ADDR3 */
6453*724ba675SRob Herring					0x00048000 /* EMC_DLL_XFORM_ADDR4 */
6454*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
6455*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
6456*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
6457*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
6458*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
6459*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
6460*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
6461*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
6462*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
6463*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS0 */
6464*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS1 */
6465*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS2 */
6466*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS3 */
6467*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS4 */
6468*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS5 */
6469*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS6 */
6470*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS7 */
6471*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS8 */
6472*724ba675SRob Herring					0x00000004 /* EMC_DLI_TRIM_TXDQS9 */
6473*724ba675SRob Herring					0x00000002 /* EMC_DLI_TRIM_TXDQS10 */
6474*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS11 */
6475*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS12 */
6476*724ba675SRob Herring					0x00000003 /* EMC_DLI_TRIM_TXDQS13 */
6477*724ba675SRob Herring					0x00000006 /* EMC_DLI_TRIM_TXDQS14 */
6478*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS15 */
6479*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ0 */
6480*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ1 */
6481*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ2 */
6482*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ3 */
6483*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ4 */
6484*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ5 */
6485*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ6 */
6486*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ7 */
6487*724ba675SRob Herring					0x100002a0 /* EMC_XM2CMDPADCTRL */
6488*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
6489*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
6490*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
6491*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
6492*724ba675SRob Herring					0x77ffc085 /* EMC_XM2CLKPADCTRL */
6493*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
6494*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
6495*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
6496*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
6497*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
6498*724ba675SRob Herring					0x51451420 /* EMC_XM2DQSPADCTRL3 */
6499*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL4 */
6500*724ba675SRob Herring					0x00514514 /* EMC_XM2DQSPADCTRL5 */
6501*724ba675SRob Herring					0x51451400 /* EMC_XM2DQSPADCTRL6 */
6502*724ba675SRob Herring					0x0606003f /* EMC_DSR_VTTGEN_DRV */
6503*724ba675SRob Herring					0x00000000 /* EMC_TXDSRVTTGEN */
6504*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
6505*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
6506*724ba675SRob Herring					0x0128000c /* EMC_MRS_WAIT_CNT2 */
6507*724ba675SRob Herring					0x00000000 /* EMC_CTT */
6508*724ba675SRob Herring					0x00000003 /* EMC_CTT_DURATION */
6509*724ba675SRob Herring					0x000040a0 /* EMC_CFG_PIPE */
6510*724ba675SRob Herring					0x800024aa /* EMC_DYN_SELF_REF_CONTROL */
6511*724ba675SRob Herring					0x0000000e /* EMC_QPOP */
6512*724ba675SRob Herring				>;
6513*724ba675SRob Herring			};
6514*724ba675SRob Herring
6515*724ba675SRob Herring			timing-792000000 {
6516*724ba675SRob Herring				clock-frequency = <792000000>;
6517*724ba675SRob Herring
6518*724ba675SRob Herring				nvidia,emc-auto-cal-config = <0xa1430000>;
6519*724ba675SRob Herring				nvidia,emc-auto-cal-config2 = <0x00000000>;
6520*724ba675SRob Herring				nvidia,emc-auto-cal-config3 = <0x00000000>;
6521*724ba675SRob Herring				nvidia,emc-auto-cal-interval = <0x001fffff>;
6522*724ba675SRob Herring				nvidia,emc-bgbias-ctl0 = <0x00000000>;
6523*724ba675SRob Herring				nvidia,emc-cfg = <0x73300000>;
6524*724ba675SRob Herring				nvidia,emc-cfg-2 = <0x0080089d>;
6525*724ba675SRob Herring				nvidia,emc-ctt-term-ctrl = <0x00000802>;
6526*724ba675SRob Herring				nvidia,emc-mode-1 = <0x80100002>;
6527*724ba675SRob Herring				nvidia,emc-mode-2 = <0x80200418>;
6528*724ba675SRob Herring				nvidia,emc-mode-4 = <0x00000000>;
6529*724ba675SRob Herring				nvidia,emc-mode-reset = <0x80000d71>;
6530*724ba675SRob Herring				nvidia,emc-mrs-wait-cnt = <0x00f8000c>;
6531*724ba675SRob Herring				nvidia,emc-sel-dpd-ctrl = <0x00040000>;
6532*724ba675SRob Herring				nvidia,emc-xm2dqspadctrl2 = <0x0120113d>;
6533*724ba675SRob Herring				nvidia,emc-zcal-cnt-long = <0x00000042>;
6534*724ba675SRob Herring				nvidia,emc-zcal-interval = <0x00020000>;
6535*724ba675SRob Herring
6536*724ba675SRob Herring				nvidia,emc-configuration = <
6537*724ba675SRob Herring					0x00000025 /* EMC_RC */
6538*724ba675SRob Herring					0x000000cc /* EMC_RFC */
6539*724ba675SRob Herring					0x00000000 /* EMC_RFC_SLR */
6540*724ba675SRob Herring					0x0000001a /* EMC_RAS */
6541*724ba675SRob Herring					0x00000009 /* EMC_RP */
6542*724ba675SRob Herring					0x00000008 /* EMC_R2W */
6543*724ba675SRob Herring					0x0000000d /* EMC_W2R */
6544*724ba675SRob Herring					0x00000004 /* EMC_R2P */
6545*724ba675SRob Herring					0x00000013 /* EMC_W2P */
6546*724ba675SRob Herring					0x00000009 /* EMC_RD_RCD */
6547*724ba675SRob Herring					0x00000009 /* EMC_WR_RCD */
6548*724ba675SRob Herring					0x00000004 /* EMC_RRD */
6549*724ba675SRob Herring					0x00000002 /* EMC_REXT */
6550*724ba675SRob Herring					0x00000000 /* EMC_WEXT */
6551*724ba675SRob Herring					0x00000006 /* EMC_WDV */
6552*724ba675SRob Herring					0x00000006 /* EMC_WDV_MASK */
6553*724ba675SRob Herring					0x0000000b /* EMC_QUSE */
6554*724ba675SRob Herring					0x00000002 /* EMC_QUSE_WIDTH */
6555*724ba675SRob Herring					0x00000000 /* EMC_IBDLY */
6556*724ba675SRob Herring					0x00000002 /* EMC_EINPUT */
6557*724ba675SRob Herring					0x0000000d /* EMC_EINPUT_DURATION */
6558*724ba675SRob Herring					0x00080000 /* EMC_PUTERM_EXTRA */
6559*724ba675SRob Herring					0x00000004 /* EMC_PUTERM_WIDTH */
6560*724ba675SRob Herring					0x00000000 /* EMC_PUTERM_ADJ */
6561*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_1 */
6562*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_2 */
6563*724ba675SRob Herring					0x00000000 /* EMC_CDB_CNTL_3 */
6564*724ba675SRob Herring					0x00000001 /* EMC_QRST */
6565*724ba675SRob Herring					0x00000014 /* EMC_QSAFE */
6566*724ba675SRob Herring					0x00000018 /* EMC_RDV */
6567*724ba675SRob Herring					0x0000001a /* EMC_RDV_MASK */
6568*724ba675SRob Herring					0x000017e2 /* EMC_REFRESH */
6569*724ba675SRob Herring					0x00000000 /* EMC_BURST_REFRESH_NUM */
6570*724ba675SRob Herring					0x000005f8 /* EMC_PRE_REFRESH_REQ_CNT */
6571*724ba675SRob Herring					0x00000003 /* EMC_PDEX2WR */
6572*724ba675SRob Herring					0x00000011 /* EMC_PDEX2RD */
6573*724ba675SRob Herring					0x00000001 /* EMC_PCHG2PDEN */
6574*724ba675SRob Herring					0x00000000 /* EMC_ACT2PDEN */
6575*724ba675SRob Herring					0x000000c6 /* EMC_AR2PDEN */
6576*724ba675SRob Herring					0x00000018 /* EMC_RW2PDEN */
6577*724ba675SRob Herring					0x000000d6 /* EMC_TXSR */
6578*724ba675SRob Herring					0x00000200 /* EMC_TXSRDLL */
6579*724ba675SRob Herring					0x00000005 /* EMC_TCKE */
6580*724ba675SRob Herring					0x00000006 /* EMC_TCKESR */
6581*724ba675SRob Herring					0x00000005 /* EMC_TPD */
6582*724ba675SRob Herring					0x0000001d /* EMC_TFAW */
6583*724ba675SRob Herring					0x00000000 /* EMC_TRPAB */
6584*724ba675SRob Herring					0x00000008 /* EMC_TCLKSTABLE */
6585*724ba675SRob Herring					0x00000008 /* EMC_TCLKSTOP */
6586*724ba675SRob Herring					0x00001822 /* EMC_TREFBW */
6587*724ba675SRob Herring					0x00000000 /* EMC_FBIO_CFG6 */
6588*724ba675SRob Herring					0x80000005 /* EMC_ODT_WRITE */
6589*724ba675SRob Herring					0x00000000 /* EMC_ODT_READ */
6590*724ba675SRob Herring					0x104ab198 /* EMC_FBIO_CFG5 */
6591*724ba675SRob Herring					0xe00700b1 /* EMC_CFG_DIG_DLL */
6592*724ba675SRob Herring					0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
6593*724ba675SRob Herring					0x00000009 /* EMC_DLL_XFORM_DQS0 */
6594*724ba675SRob Herring					0x00000009 /* EMC_DLL_XFORM_DQS1 */
6595*724ba675SRob Herring					0x00000009 /* EMC_DLL_XFORM_DQS2 */
6596*724ba675SRob Herring					0x00000007 /* EMC_DLL_XFORM_DQS3 */
6597*724ba675SRob Herring					0x00000006 /* EMC_DLL_XFORM_DQS4 */
6598*724ba675SRob Herring					0x00000006 /* EMC_DLL_XFORM_DQS5 */
6599*724ba675SRob Herring					0x007fc009 /* EMC_DLL_XFORM_DQS6 */
6600*724ba675SRob Herring					0x00000006 /* EMC_DLL_XFORM_DQS7 */
6601*724ba675SRob Herring					0x00000009 /* EMC_DLL_XFORM_DQS8 */
6602*724ba675SRob Herring					0x00000009 /* EMC_DLL_XFORM_DQS9 */
6603*724ba675SRob Herring					0x00000009 /* EMC_DLL_XFORM_DQS10 */
6604*724ba675SRob Herring					0x00000007 /* EMC_DLL_XFORM_DQS11 */
6605*724ba675SRob Herring					0x00000006 /* EMC_DLL_XFORM_DQS12 */
6606*724ba675SRob Herring					0x00000007 /* EMC_DLL_XFORM_DQS13 */
6607*724ba675SRob Herring					0x00000009 /* EMC_DLL_XFORM_DQS14 */
6608*724ba675SRob Herring					0x00000007 /* EMC_DLL_XFORM_DQS15 */
6609*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE0 */
6610*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE1 */
6611*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE2 */
6612*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE3 */
6613*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE4 */
6614*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE5 */
6615*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE6 */
6616*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE7 */
6617*724ba675SRob Herring					0x00034002 /* EMC_DLL_XFORM_ADDR0 */
6618*724ba675SRob Herring					0x00034002 /* EMC_DLL_XFORM_ADDR1 */
6619*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR2 */
6620*724ba675SRob Herring					0x00034002 /* EMC_DLL_XFORM_ADDR3 */
6621*724ba675SRob Herring					0x00034002 /* EMC_DLL_XFORM_ADDR4 */
6622*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_ADDR5 */
6623*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE8 */
6624*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE9 */
6625*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE10 */
6626*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE11 */
6627*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE12 */
6628*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE13 */
6629*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE14 */
6630*724ba675SRob Herring					0x00000000 /* EMC_DLL_XFORM_QUSE15 */
6631*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS0 */
6632*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS1 */
6633*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS2 */
6634*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS3 */
6635*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS4 */
6636*724ba675SRob Herring					0x00000007 /* EMC_DLI_TRIM_TXDQS5 */
6637*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS6 */
6638*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS7 */
6639*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS8 */
6640*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS9 */
6641*724ba675SRob Herring					0x00000005 /* EMC_DLI_TRIM_TXDQS10 */
6642*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS11 */
6643*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS12 */
6644*724ba675SRob Herring					0x00000007 /* EMC_DLI_TRIM_TXDQS13 */
6645*724ba675SRob Herring					0x00000009 /* EMC_DLI_TRIM_TXDQS14 */
6646*724ba675SRob Herring					0x00000008 /* EMC_DLI_TRIM_TXDQS15 */
6647*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ0 */
6648*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ1 */
6649*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ2 */
6650*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ3 */
6651*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ4 */
6652*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ5 */
6653*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ6 */
6654*724ba675SRob Herring					0x0000000e /* EMC_DLL_XFORM_DQ7 */
6655*724ba675SRob Herring					0x100002a0 /* EMC_XM2CMDPADCTRL */
6656*724ba675SRob Herring					0x00000000 /* EMC_XM2CMDPADCTRL4 */
6657*724ba675SRob Herring					0x00111111 /* EMC_XM2CMDPADCTRL5 */
6658*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL2 */
6659*724ba675SRob Herring					0x00000000 /* EMC_XM2DQPADCTRL3 */
6660*724ba675SRob Herring					0x77ffc085 /* EMC_XM2CLKPADCTRL */
6661*724ba675SRob Herring					0x00000101 /* EMC_XM2CLKPADCTRL2 */
6662*724ba675SRob Herring					0x81f1f108 /* EMC_XM2COMPPADCTRL */
6663*724ba675SRob Herring					0x07070004 /* EMC_XM2VTTGENPADCTRL */
6664*724ba675SRob Herring					0x00000000 /* EMC_XM2VTTGENPADCTRL2 */
6665*724ba675SRob Herring					0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
6666*724ba675SRob Herring					0x61861820 /* EMC_XM2DQSPADCTRL3 */
6667*724ba675SRob Herring					0x004d34d3 /* EMC_XM2DQSPADCTRL4 */
6668*724ba675SRob Herring					0x004d34d3 /* EMC_XM2DQSPADCTRL5 */
6669*724ba675SRob Herring					0x61861800 /* EMC_XM2DQSPADCTRL6 */
6670*724ba675SRob Herring					0x0606003f /* EMC_DSR_VTTGEN_DRV */
6671*724ba675SRob Herring					0x00000000 /* EMC_TXDSRVTTGEN */
6672*724ba675SRob Herring					0x00000000 /* EMC_FBIO_SPARE */
6673*724ba675SRob Herring					0x00000100 /* EMC_ZCAL_WAIT_CNT */
6674*724ba675SRob Herring					0x00f8000c /* EMC_MRS_WAIT_CNT2 */
6675*724ba675SRob Herring					0x00000007 /* EMC_CTT */
6676*724ba675SRob Herring					0x00000004 /* EMC_CTT_DURATION */
6677*724ba675SRob Herring					0x00004080 /* EMC_CFG_PIPE */
6678*724ba675SRob Herring					0x80003012 /* EMC_DYN_SELF_REF_CONTROL */
6679*724ba675SRob Herring					0x0000000f /* EMC_QPOP */
6680*724ba675SRob Herring				>;
6681*724ba675SRob Herring			};
6682*724ba675SRob Herring		};
6683*724ba675SRob Herring	};
6684*724ba675SRob Herring
6685*724ba675SRob Herring	opp-table-actmon {
6686*724ba675SRob Herring		/delete-node/ opp-924000000;
6687*724ba675SRob Herring		/delete-node/ opp-1200000000;
6688*724ba675SRob Herring	};
6689*724ba675SRob Herring
6690*724ba675SRob Herring	opp-table-emc {
6691*724ba675SRob Herring		/delete-node/ opp-924000000-1100;
6692*724ba675SRob Herring		/delete-node/ opp-1200000000-1100;
6693*724ba675SRob Herring	};
6694*724ba675SRob Herring};
6695