1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2724ba675SRob Herring/dts-v1/;
3724ba675SRob Herring
4724ba675SRob Herring#include <dt-bindings/input/input.h>
5724ba675SRob Herring#include "tegra124.dtsi"
6724ba675SRob Herring
7724ba675SRob Herring#include "tegra124-jetson-tk1-emc.dtsi"
8724ba675SRob Herring
9724ba675SRob Herring/ {
10724ba675SRob Herring	model = "NVIDIA Tegra124 Jetson TK1";
11724ba675SRob Herring	compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
12724ba675SRob Herring
13724ba675SRob Herring	aliases {
14724ba675SRob Herring		rtc0 = "/i2c@7000d000/pmic@40";
15724ba675SRob Herring		rtc1 = "/rtc@7000e000";
16724ba675SRob Herring
17724ba675SRob Herring		/* This order keeps the mapping DB9 connector <-> ttyS0 */
18724ba675SRob Herring		serial0 = &uartd;
19724ba675SRob Herring		serial1 = &uarta;
20724ba675SRob Herring		serial2 = &uartb;
21724ba675SRob Herring	};
22724ba675SRob Herring
23724ba675SRob Herring	chosen {
24724ba675SRob Herring		stdout-path = "serial0:115200n8";
25724ba675SRob Herring	};
26724ba675SRob Herring
27724ba675SRob Herring	memory@80000000 {
28724ba675SRob Herring		reg = <0x0 0x80000000 0x0 0x80000000>;
29724ba675SRob Herring	};
30724ba675SRob Herring
31724ba675SRob Herring	pcie@1003000 {
32724ba675SRob Herring		status = "okay";
33724ba675SRob Herring
34724ba675SRob Herring		avddio-pex-supply = <&vdd_1v05_run>;
35724ba675SRob Herring		dvddio-pex-supply = <&vdd_1v05_run>;
36724ba675SRob Herring		avdd-pex-pll-supply = <&vdd_1v05_run>;
37724ba675SRob Herring		hvdd-pex-supply = <&vdd_3v3_lp0>;
38724ba675SRob Herring		hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
39724ba675SRob Herring		vddio-pex-ctl-supply = <&vdd_3v3_lp0>;
40724ba675SRob Herring		avdd-pll-erefe-supply = <&avdd_1v05_run>;
41724ba675SRob Herring
42724ba675SRob Herring		/* Mini PCIe */
43724ba675SRob Herring		pci@1,0 {
44724ba675SRob Herring			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
45724ba675SRob Herring			phy-names = "pcie-0";
46724ba675SRob Herring			status = "okay";
47724ba675SRob Herring		};
48724ba675SRob Herring
49724ba675SRob Herring		/* Gigabit Ethernet */
50724ba675SRob Herring		pci@2,0 {
51724ba675SRob Herring			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>;
52724ba675SRob Herring			phy-names = "pcie-0";
53724ba675SRob Herring			status = "okay";
54724ba675SRob Herring		};
55724ba675SRob Herring	};
56724ba675SRob Herring
57724ba675SRob Herring	host1x@50000000 {
58724ba675SRob Herring		hdmi@54280000 {
59724ba675SRob Herring			status = "okay";
60724ba675SRob Herring
61724ba675SRob Herring			hdmi-supply = <&vdd_5v0_hdmi>;
62724ba675SRob Herring			pll-supply = <&vdd_hdmi_pll>;
63724ba675SRob Herring			vdd-supply = <&vdd_3v3_hdmi>;
64724ba675SRob Herring
65724ba675SRob Herring			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
66724ba675SRob Herring			nvidia,hpd-gpio =
67724ba675SRob Herring				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
68724ba675SRob Herring		};
69724ba675SRob Herring	};
70724ba675SRob Herring
71724ba675SRob Herring	gpu@57000000 {
72724ba675SRob Herring		/*
73724ba675SRob Herring		 * Node left disabled on purpose - the bootloader will enable
74724ba675SRob Herring		 * it after having set the VPR up
75724ba675SRob Herring		 */
76724ba675SRob Herring		vdd-supply = <&vdd_gpu>;
77724ba675SRob Herring	};
78724ba675SRob Herring
79724ba675SRob Herring	pinmux: pinmux@70000868 {
80724ba675SRob Herring		pinctrl-names = "boot";
81724ba675SRob Herring		pinctrl-0 = <&state_boot>;
82724ba675SRob Herring
83724ba675SRob Herring		state_boot: pinmux {
84724ba675SRob Herring			clk_32k_out_pa0 {
85724ba675SRob Herring				nvidia,pins = "clk_32k_out_pa0";
86724ba675SRob Herring				nvidia,function = "soc";
87724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
88724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
89724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
90724ba675SRob Herring			};
91724ba675SRob Herring			uart3_cts_n_pa1 {
92724ba675SRob Herring				nvidia,pins = "uart3_cts_n_pa1";
93724ba675SRob Herring				nvidia,function = "gmi";
94724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
95724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
96724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
97724ba675SRob Herring			};
98724ba675SRob Herring			dap2_fs_pa2 {
99724ba675SRob Herring				nvidia,pins = "dap2_fs_pa2";
100724ba675SRob Herring				nvidia,function = "i2s1";
101724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
102724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
103724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
104724ba675SRob Herring			};
105724ba675SRob Herring			dap2_sclk_pa3 {
106724ba675SRob Herring				nvidia,pins = "dap2_sclk_pa3";
107724ba675SRob Herring				nvidia,function = "i2s1";
108724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
109724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
110724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
111724ba675SRob Herring			};
112724ba675SRob Herring			dap2_din_pa4 {
113724ba675SRob Herring				nvidia,pins = "dap2_din_pa4";
114724ba675SRob Herring				nvidia,function = "i2s1";
115724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
116724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
117724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
118724ba675SRob Herring			};
119724ba675SRob Herring			dap2_dout_pa5 {
120724ba675SRob Herring				nvidia,pins = "dap2_dout_pa5";
121724ba675SRob Herring				nvidia,function = "i2s1";
122724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
123724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
124724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
125724ba675SRob Herring			};
126724ba675SRob Herring			sdmmc3_clk_pa6 {
127724ba675SRob Herring				nvidia,pins = "sdmmc3_clk_pa6";
128724ba675SRob Herring				nvidia,function = "sdmmc3";
129724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
130724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
131724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
132724ba675SRob Herring			};
133724ba675SRob Herring			sdmmc3_cmd_pa7 {
134724ba675SRob Herring				nvidia,pins = "sdmmc3_cmd_pa7";
135724ba675SRob Herring				nvidia,function = "sdmmc3";
136724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
137724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
138724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
139724ba675SRob Herring			};
140724ba675SRob Herring			pb0 {
141724ba675SRob Herring				nvidia,pins = "pb0";
142724ba675SRob Herring				nvidia,function = "uartd";
143724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
144724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
145724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
146724ba675SRob Herring			};
147724ba675SRob Herring			pb1 {
148724ba675SRob Herring				nvidia,pins = "pb1";
149724ba675SRob Herring				nvidia,function = "uartd";
150724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
151724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
152724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
153724ba675SRob Herring			};
154724ba675SRob Herring			sdmmc3_dat3_pb4 {
155724ba675SRob Herring				nvidia,pins = "sdmmc3_dat3_pb4";
156724ba675SRob Herring				nvidia,function = "sdmmc3";
157724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
158724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
159724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
160724ba675SRob Herring			};
161724ba675SRob Herring			sdmmc3_dat2_pb5 {
162724ba675SRob Herring				nvidia,pins = "sdmmc3_dat2_pb5";
163724ba675SRob Herring				nvidia,function = "sdmmc3";
164724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
165724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
166724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
167724ba675SRob Herring			};
168724ba675SRob Herring			sdmmc3_dat1_pb6 {
169724ba675SRob Herring				nvidia,pins = "sdmmc3_dat1_pb6";
170724ba675SRob Herring				nvidia,function = "sdmmc3";
171724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
172724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
173724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
174724ba675SRob Herring			};
175724ba675SRob Herring			sdmmc3_dat0_pb7 {
176724ba675SRob Herring				nvidia,pins = "sdmmc3_dat0_pb7";
177724ba675SRob Herring				nvidia,function = "sdmmc3";
178724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
179724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
180724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
181724ba675SRob Herring			};
182724ba675SRob Herring			uart3_rts_n_pc0 {
183724ba675SRob Herring				nvidia,pins = "uart3_rts_n_pc0";
184724ba675SRob Herring				nvidia,function = "gmi";
185724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
186724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
187724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
188724ba675SRob Herring			};
189724ba675SRob Herring			uart2_txd_pc2 {
190724ba675SRob Herring				nvidia,pins = "uart2_txd_pc2";
191724ba675SRob Herring				nvidia,function = "irda";
192724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
193724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
194724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
195724ba675SRob Herring			};
196724ba675SRob Herring			uart2_rxd_pc3 {
197724ba675SRob Herring				nvidia,pins = "uart2_rxd_pc3";
198724ba675SRob Herring				nvidia,function = "irda";
199724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
200724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
201724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
202724ba675SRob Herring			};
203724ba675SRob Herring			gen1_i2c_scl_pc4 {
204724ba675SRob Herring				nvidia,pins = "gen1_i2c_scl_pc4";
205724ba675SRob Herring				nvidia,function = "i2c1";
206724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
207724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
208724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
209724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
210724ba675SRob Herring			};
211724ba675SRob Herring			gen1_i2c_sda_pc5 {
212724ba675SRob Herring				nvidia,pins = "gen1_i2c_sda_pc5";
213724ba675SRob Herring				nvidia,function = "i2c1";
214724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
215724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
216724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
217724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
218724ba675SRob Herring			};
219724ba675SRob Herring			pc7 {
220724ba675SRob Herring				nvidia,pins = "pc7";
221724ba675SRob Herring				nvidia,function = "rsvd1";
222724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
223724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
224724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
225724ba675SRob Herring			};
226724ba675SRob Herring			pg0 {
227724ba675SRob Herring				nvidia,pins = "pg0";
228724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
229724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
230724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
231724ba675SRob Herring			};
232724ba675SRob Herring			pg1 {
233724ba675SRob Herring				nvidia,pins = "pg1";
234724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
235724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
236724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
237724ba675SRob Herring			};
238724ba675SRob Herring			pg2 {
239724ba675SRob Herring				nvidia,pins = "pg2";
240724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
241724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
242724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
243724ba675SRob Herring			};
244724ba675SRob Herring			pg3 {
245724ba675SRob Herring				nvidia,pins = "pg3";
246724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
247724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
248724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
249724ba675SRob Herring			};
250724ba675SRob Herring			pg4 {
251724ba675SRob Herring				nvidia,pins = "pg4";
252724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
253724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
254724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
255724ba675SRob Herring			};
256724ba675SRob Herring			pg5 {
257724ba675SRob Herring				nvidia,pins = "pg5";
258724ba675SRob Herring				nvidia,function = "spi4";
259724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
260724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
261724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
262724ba675SRob Herring			};
263724ba675SRob Herring			pg6 {
264724ba675SRob Herring				nvidia,pins = "pg6";
265724ba675SRob Herring				nvidia,function = "spi4";
266724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
267724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
268724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
269724ba675SRob Herring			};
270724ba675SRob Herring			pg7 {
271724ba675SRob Herring				nvidia,pins = "pg7";
272724ba675SRob Herring				nvidia,function = "spi4";
273724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
274724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
275724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
276724ba675SRob Herring			};
277724ba675SRob Herring			ph0 {
278724ba675SRob Herring				nvidia,pins = "ph0";
279724ba675SRob Herring				nvidia,function = "gmi";
280724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
281724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
282724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
283724ba675SRob Herring			};
284724ba675SRob Herring			ph1 {
285724ba675SRob Herring				nvidia,pins = "ph1";
286724ba675SRob Herring				nvidia,function = "pwm1";
287724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
288724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
289724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
290724ba675SRob Herring			};
291724ba675SRob Herring			ph2 {
292724ba675SRob Herring				nvidia,pins = "ph2";
293724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
294724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
295724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
296724ba675SRob Herring			};
297724ba675SRob Herring			ph3 {
298724ba675SRob Herring				nvidia,pins = "ph3";
299724ba675SRob Herring				nvidia,function = "gmi";
300724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
301724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
302724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
303724ba675SRob Herring			};
304724ba675SRob Herring			ph4 {
305724ba675SRob Herring				nvidia,pins = "ph4";
306724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
307724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
308724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
309724ba675SRob Herring			};
310724ba675SRob Herring			ph5 {
311724ba675SRob Herring				nvidia,pins = "ph5";
312724ba675SRob Herring				nvidia,function = "rsvd2";
313724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
314724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
315724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
316724ba675SRob Herring			};
317724ba675SRob Herring			ph6 {
318724ba675SRob Herring				nvidia,pins = "ph6";
319724ba675SRob Herring				nvidia,function = "gmi";
320724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
321724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
322724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
323724ba675SRob Herring			};
324724ba675SRob Herring			ph7 {
325724ba675SRob Herring				nvidia,pins = "ph7";
326724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
327724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
328724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
329724ba675SRob Herring			};
330724ba675SRob Herring			pi0 {
331724ba675SRob Herring				nvidia,pins = "pi0";
332724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
333724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
334724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
335724ba675SRob Herring			};
336724ba675SRob Herring			pi1 {
337724ba675SRob Herring				nvidia,pins = "pi1";
338724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
339724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
340724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
341724ba675SRob Herring			};
342724ba675SRob Herring			pi2 {
343724ba675SRob Herring				nvidia,pins = "pi2";
344724ba675SRob Herring				nvidia,function = "rsvd4";
345724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
346724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
347724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
348724ba675SRob Herring			};
349724ba675SRob Herring			pi3 {
350724ba675SRob Herring				nvidia,pins = "pi3";
351724ba675SRob Herring				nvidia,function = "spi4";
352724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
353724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
354724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
355724ba675SRob Herring			};
356724ba675SRob Herring			pi4 {
357724ba675SRob Herring				nvidia,pins = "pi4";
358724ba675SRob Herring				nvidia,function = "gmi";
359724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
360724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
361724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
362724ba675SRob Herring			};
363724ba675SRob Herring			pi5 {
364724ba675SRob Herring				nvidia,pins = "pi5";
365724ba675SRob Herring				nvidia,function = "rsvd2";
366724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
367724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
368724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
369724ba675SRob Herring			};
370724ba675SRob Herring			pi6 {
371724ba675SRob Herring				nvidia,pins = "pi6";
372724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
373724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
374724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
375724ba675SRob Herring			};
376724ba675SRob Herring			pi7 {
377724ba675SRob Herring				nvidia,pins = "pi7";
378724ba675SRob Herring				nvidia,function = "rsvd1";
379724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
380724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
381724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
382724ba675SRob Herring			};
383724ba675SRob Herring			pj0 {
384724ba675SRob Herring				nvidia,pins = "pj0";
385724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
386724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
387724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
388724ba675SRob Herring			};
389724ba675SRob Herring			pj2 {
390724ba675SRob Herring				nvidia,pins = "pj2";
391724ba675SRob Herring				nvidia,function = "rsvd1";
392724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
393724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
394724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
395724ba675SRob Herring			};
396724ba675SRob Herring			uart2_cts_n_pj5 {
397724ba675SRob Herring				nvidia,pins = "uart2_cts_n_pj5";
398724ba675SRob Herring				nvidia,function = "uartb";
399724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
400724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
401724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
402724ba675SRob Herring			};
403724ba675SRob Herring			uart2_rts_n_pj6 {
404724ba675SRob Herring				nvidia,pins = "uart2_rts_n_pj6";
405724ba675SRob Herring				nvidia,function = "uartb";
406724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
407724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
408724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
409724ba675SRob Herring			};
410724ba675SRob Herring			pj7 {
411724ba675SRob Herring				nvidia,pins = "pj7";
412724ba675SRob Herring				nvidia,function = "uartd";
413724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
414724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
415724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
416724ba675SRob Herring			};
417724ba675SRob Herring			pk0 {
418724ba675SRob Herring				nvidia,pins = "pk0";
419724ba675SRob Herring				nvidia,function = "rsvd1";
420724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
421724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
422724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
423724ba675SRob Herring			};
424724ba675SRob Herring			pk1 {
425724ba675SRob Herring				nvidia,pins = "pk1";
426724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
427724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
428724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
429724ba675SRob Herring			};
430724ba675SRob Herring			pk2 {
431724ba675SRob Herring				nvidia,pins = "pk2";
432724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
433724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
434724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
435724ba675SRob Herring			};
436724ba675SRob Herring			pk3 {
437724ba675SRob Herring				nvidia,pins = "pk3";
438724ba675SRob Herring				nvidia,function = "gmi";
439724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
440724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
441724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
442724ba675SRob Herring			};
443724ba675SRob Herring			pk4 {
444724ba675SRob Herring				nvidia,pins = "pk4";
445724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
446724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
447724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
448724ba675SRob Herring			};
449724ba675SRob Herring			spdif_out_pk5 {
450724ba675SRob Herring				nvidia,pins = "spdif_out_pk5";
451724ba675SRob Herring				nvidia,function = "rsvd2";
452724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
453724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
454724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
455724ba675SRob Herring			};
456724ba675SRob Herring			spdif_in_pk6 {
457724ba675SRob Herring				nvidia,pins = "spdif_in_pk6";
458724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
459724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
460724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
461724ba675SRob Herring			};
462724ba675SRob Herring			pk7 {
463724ba675SRob Herring				nvidia,pins = "pk7";
464724ba675SRob Herring				nvidia,function = "uartd";
465724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
466724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
467724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
468724ba675SRob Herring			};
469724ba675SRob Herring			dap1_fs_pn0 {
470724ba675SRob Herring				nvidia,pins = "dap1_fs_pn0";
471724ba675SRob Herring				nvidia,function = "rsvd4";
472724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
473724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
474724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
475724ba675SRob Herring			};
476724ba675SRob Herring			dap1_din_pn1 {
477724ba675SRob Herring				nvidia,pins = "dap1_din_pn1";
478724ba675SRob Herring				nvidia,function = "rsvd4";
479724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
480724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
481724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
482724ba675SRob Herring			};
483724ba675SRob Herring			dap1_dout_pn2 {
484724ba675SRob Herring				nvidia,pins = "dap1_dout_pn2";
485724ba675SRob Herring				nvidia,function = "sata";
486724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
487724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
488724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
489724ba675SRob Herring			};
490724ba675SRob Herring			dap1_sclk_pn3 {
491724ba675SRob Herring				nvidia,pins = "dap1_sclk_pn3";
492724ba675SRob Herring				nvidia,function = "rsvd4";
493724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
494724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
495724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
496724ba675SRob Herring			};
497724ba675SRob Herring			usb_vbus_en0_pn4 {
498724ba675SRob Herring				nvidia,pins = "usb_vbus_en0_pn4";
499724ba675SRob Herring				nvidia,function = "usb";
500724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
501724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
502724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
503724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
504724ba675SRob Herring			};
505724ba675SRob Herring			usb_vbus_en1_pn5 {
506724ba675SRob Herring				nvidia,pins = "usb_vbus_en1_pn5";
507724ba675SRob Herring				nvidia,function = "usb";
508724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
509724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
510724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
511724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
512724ba675SRob Herring			};
513724ba675SRob Herring			hdmi_int_pn7 {
514724ba675SRob Herring				nvidia,pins = "hdmi_int_pn7";
515724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
516724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
517724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
518724ba675SRob Herring				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
519724ba675SRob Herring			};
520724ba675SRob Herring			ulpi_data7_po0 {
521724ba675SRob Herring				nvidia,pins = "ulpi_data7_po0";
522724ba675SRob Herring				nvidia,function = "ulpi";
523724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
524724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
525724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
526724ba675SRob Herring			};
527724ba675SRob Herring			ulpi_data0_po1 {
528724ba675SRob Herring				nvidia,pins = "ulpi_data0_po1";
529724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
530724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
531724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
532724ba675SRob Herring			};
533724ba675SRob Herring			ulpi_data1_po2 {
534724ba675SRob Herring				nvidia,pins = "ulpi_data1_po2";
535724ba675SRob Herring				nvidia,function = "ulpi";
536724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
537724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
538724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
539724ba675SRob Herring			};
540724ba675SRob Herring			ulpi_data2_po3 {
541724ba675SRob Herring				nvidia,pins = "ulpi_data2_po3";
542724ba675SRob Herring				nvidia,function = "ulpi";
543724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
544724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
545724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
546724ba675SRob Herring			};
547724ba675SRob Herring			ulpi_data3_po4 {
548724ba675SRob Herring				nvidia,pins = "ulpi_data3_po4";
549724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
550724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
551724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
552724ba675SRob Herring			};
553724ba675SRob Herring			ulpi_data4_po5 {
554724ba675SRob Herring				nvidia,pins = "ulpi_data4_po5";
555724ba675SRob Herring				nvidia,function = "ulpi";
556724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
557724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
558724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
559724ba675SRob Herring			};
560724ba675SRob Herring			ulpi_data5_po6 {
561724ba675SRob Herring				nvidia,pins = "ulpi_data5_po6";
562724ba675SRob Herring				nvidia,function = "ulpi";
563724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
564724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
565724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
566724ba675SRob Herring			};
567724ba675SRob Herring			ulpi_data6_po7 {
568724ba675SRob Herring				nvidia,pins = "ulpi_data6_po7";
569724ba675SRob Herring				nvidia,function = "ulpi";
570724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
571724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
572724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
573724ba675SRob Herring			};
574724ba675SRob Herring			dap3_fs_pp0 {
575724ba675SRob Herring				nvidia,pins = "dap3_fs_pp0";
576724ba675SRob Herring				nvidia,function = "i2s2";
577724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
578724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
579724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
580724ba675SRob Herring			};
581724ba675SRob Herring			dap3_din_pp1 {
582724ba675SRob Herring				nvidia,pins = "dap3_din_pp1";
583724ba675SRob Herring				nvidia,function = "i2s2";
584724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
585724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
586724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
587724ba675SRob Herring			};
588724ba675SRob Herring			dap3_dout_pp2 {
589724ba675SRob Herring				nvidia,pins = "dap3_dout_pp2";
590724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
591724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
592724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
593724ba675SRob Herring			};
594724ba675SRob Herring			dap3_sclk_pp3 {
595724ba675SRob Herring				nvidia,pins = "dap3_sclk_pp3";
596724ba675SRob Herring				nvidia,function = "rsvd3";
597724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
598724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
599724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
600724ba675SRob Herring			};
601724ba675SRob Herring			dap4_fs_pp4 {
602724ba675SRob Herring				nvidia,pins = "dap4_fs_pp4";
603724ba675SRob Herring				nvidia,function = "rsvd4";
604724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
605724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
606724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
607724ba675SRob Herring			};
608724ba675SRob Herring			dap4_din_pp5 {
609724ba675SRob Herring				nvidia,pins = "dap4_din_pp5";
610724ba675SRob Herring				nvidia,function = "rsvd3";
611724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
612724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
613724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
614724ba675SRob Herring			};
615724ba675SRob Herring			dap4_dout_pp6 {
616724ba675SRob Herring				nvidia,pins = "dap4_dout_pp6";
617724ba675SRob Herring				nvidia,function = "rsvd4";
618724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
619724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
620724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
621724ba675SRob Herring			};
622724ba675SRob Herring			dap4_sclk_pp7 {
623724ba675SRob Herring				nvidia,pins = "dap4_sclk_pp7";
624724ba675SRob Herring				nvidia,function = "rsvd3";
625724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
626724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
627724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
628724ba675SRob Herring			};
629724ba675SRob Herring			kb_col0_pq0 {
630724ba675SRob Herring				nvidia,pins = "kb_col0_pq0";
631724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
632724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
633724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
634724ba675SRob Herring			};
635724ba675SRob Herring			kb_col1_pq1 {
636724ba675SRob Herring				nvidia,pins = "kb_col1_pq1";
637724ba675SRob Herring				nvidia,function = "rsvd2";
638724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
639724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
640724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
641724ba675SRob Herring			};
642724ba675SRob Herring			kb_col2_pq2 {
643724ba675SRob Herring				nvidia,pins = "kb_col2_pq2";
644724ba675SRob Herring				nvidia,function = "rsvd2";
645724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
646724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
647724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
648724ba675SRob Herring			};
649724ba675SRob Herring			kb_col3_pq3 {
650724ba675SRob Herring				nvidia,pins = "kb_col3_pq3";
651724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
652724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
653724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
654724ba675SRob Herring			};
655724ba675SRob Herring			kb_col4_pq4 {
656724ba675SRob Herring				nvidia,pins = "kb_col4_pq4";
657724ba675SRob Herring				nvidia,function = "sdmmc3";
658724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
659724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
660724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
661724ba675SRob Herring			};
662724ba675SRob Herring			kb_col5_pq5 {
663724ba675SRob Herring				nvidia,pins = "kb_col5_pq5";
664724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
665724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
666724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
667724ba675SRob Herring			};
668724ba675SRob Herring			kb_col6_pq6 {
669724ba675SRob Herring				nvidia,pins = "kb_col6_pq6";
670724ba675SRob Herring				nvidia,function = "rsvd2";
671724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
672724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
673724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
674724ba675SRob Herring			};
675724ba675SRob Herring			kb_col7_pq7 {
676724ba675SRob Herring				nvidia,pins = "kb_col7_pq7";
677724ba675SRob Herring				nvidia,function = "rsvd2";
678724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
679724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
680724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
681724ba675SRob Herring			};
682724ba675SRob Herring			kb_row0_pr0 {
683724ba675SRob Herring				nvidia,pins = "kb_row0_pr0";
684724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
685724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
686724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
687724ba675SRob Herring			};
688724ba675SRob Herring			kb_row1_pr1 {
689724ba675SRob Herring				nvidia,pins = "kb_row1_pr1";
690724ba675SRob Herring				nvidia,function = "rsvd2";
691724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
692724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
693724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
694724ba675SRob Herring			};
695724ba675SRob Herring			kb_row2_pr2 {
696724ba675SRob Herring				nvidia,pins = "kb_row2_pr2";
697724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
698724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
699724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
700724ba675SRob Herring			};
701724ba675SRob Herring			kb_row3_pr3 {
702724ba675SRob Herring				nvidia,pins = "kb_row3_pr3";
703724ba675SRob Herring				nvidia,function = "kbc";
704724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
705724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
706724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
707724ba675SRob Herring			};
708724ba675SRob Herring			kb_row4_pr4 {
709724ba675SRob Herring				nvidia,pins = "kb_row4_pr4";
710724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
711724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
712724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
713724ba675SRob Herring			};
714724ba675SRob Herring			kb_row5_pr5 {
715724ba675SRob Herring				nvidia,pins = "kb_row5_pr5";
716724ba675SRob Herring				nvidia,function = "rsvd3";
717724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
718724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
719724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
720724ba675SRob Herring			};
721724ba675SRob Herring			kb_row6_pr6 {
722724ba675SRob Herring				nvidia,pins = "kb_row6_pr6";
723724ba675SRob Herring				nvidia,function = "displaya_alt";
724724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
725724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
726724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
727724ba675SRob Herring			};
728724ba675SRob Herring			kb_row7_pr7 {
729724ba675SRob Herring				nvidia,pins = "kb_row7_pr7";
730724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
731724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
732724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
733724ba675SRob Herring			};
734724ba675SRob Herring			kb_row8_ps0 {
735724ba675SRob Herring				nvidia,pins = "kb_row8_ps0";
736724ba675SRob Herring				nvidia,function = "rsvd2";
737724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
738724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
739724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
740724ba675SRob Herring			};
741724ba675SRob Herring			kb_row9_ps1 {
742724ba675SRob Herring				nvidia,pins = "kb_row9_ps1";
743724ba675SRob Herring				nvidia,function = "uarta";
744724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
745724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
746724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
747724ba675SRob Herring			};
748724ba675SRob Herring			kb_row10_ps2 {
749724ba675SRob Herring				nvidia,pins = "kb_row10_ps2";
750724ba675SRob Herring				nvidia,function = "uarta";
751724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
752724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
753724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
754724ba675SRob Herring			};
755724ba675SRob Herring			kb_row11_ps3 {
756724ba675SRob Herring				nvidia,pins = "kb_row11_ps3";
757724ba675SRob Herring				nvidia,function = "rsvd2";
758724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
759724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
760724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
761724ba675SRob Herring			};
762724ba675SRob Herring			kb_row12_ps4 {
763724ba675SRob Herring				nvidia,pins = "kb_row12_ps4";
764724ba675SRob Herring				nvidia,function = "rsvd2";
765724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
766724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
767724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
768724ba675SRob Herring			};
769724ba675SRob Herring			kb_row13_ps5 {
770724ba675SRob Herring				nvidia,pins = "kb_row13_ps5";
771724ba675SRob Herring				nvidia,function = "rsvd2";
772724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
773724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
774724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
775724ba675SRob Herring			};
776724ba675SRob Herring			kb_row14_ps6 {
777724ba675SRob Herring				nvidia,pins = "kb_row14_ps6";
778724ba675SRob Herring				nvidia,function = "rsvd2";
779724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
780724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
781724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
782724ba675SRob Herring			};
783724ba675SRob Herring			kb_row15_ps7 {
784724ba675SRob Herring				nvidia,pins = "kb_row15_ps7";
785724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
786724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
787724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
788724ba675SRob Herring			};
789724ba675SRob Herring			kb_row16_pt0 {
790724ba675SRob Herring				nvidia,pins = "kb_row16_pt0";
791724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
792724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
793724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
794724ba675SRob Herring			};
795724ba675SRob Herring			kb_row17_pt1 {
796724ba675SRob Herring				nvidia,pins = "kb_row17_pt1";
797724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
798724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
799724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
800724ba675SRob Herring			};
801724ba675SRob Herring			gen2_i2c_scl_pt5 {
802724ba675SRob Herring				nvidia,pins = "gen2_i2c_scl_pt5";
803724ba675SRob Herring				nvidia,function = "i2c2";
804724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
805724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
806724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
807724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
808724ba675SRob Herring			};
809724ba675SRob Herring			gen2_i2c_sda_pt6 {
810724ba675SRob Herring				nvidia,pins = "gen2_i2c_sda_pt6";
811724ba675SRob Herring				nvidia,function = "i2c2";
812724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
813724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
814724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
815724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
816724ba675SRob Herring			};
817724ba675SRob Herring			sdmmc4_cmd_pt7 {
818724ba675SRob Herring				nvidia,pins = "sdmmc4_cmd_pt7";
819724ba675SRob Herring				nvidia,function = "sdmmc4";
820724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
821724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
822724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
823724ba675SRob Herring			};
824724ba675SRob Herring			pu0 {
825724ba675SRob Herring				nvidia,pins = "pu0";
826724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
827724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
828724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
829724ba675SRob Herring			};
830724ba675SRob Herring			pu1 {
831724ba675SRob Herring				nvidia,pins = "pu1";
832724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
833724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
834724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
835724ba675SRob Herring			};
836724ba675SRob Herring			pu2 {
837724ba675SRob Herring				nvidia,pins = "pu2";
838724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
839724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
840724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
841724ba675SRob Herring			};
842724ba675SRob Herring			pu3 {
843724ba675SRob Herring				nvidia,pins = "pu3";
844724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
845724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
846724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
847724ba675SRob Herring			};
848724ba675SRob Herring			pu4 {
849724ba675SRob Herring				nvidia,pins = "pu4";
850724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
851724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
852724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
853724ba675SRob Herring			};
854724ba675SRob Herring			pu5 {
855724ba675SRob Herring				nvidia,pins = "pu5";
856724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
857724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
858724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
859724ba675SRob Herring			};
860724ba675SRob Herring			pu6 {
861724ba675SRob Herring				nvidia,pins = "pu6";
862724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
863724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
864724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
865724ba675SRob Herring			};
866724ba675SRob Herring			pv0 {
867724ba675SRob Herring				nvidia,pins = "pv0";
868724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
869724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
870724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
871724ba675SRob Herring			};
872724ba675SRob Herring			pv1 {
873724ba675SRob Herring				nvidia,pins = "pv1";
874724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
875724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
876724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
877724ba675SRob Herring			};
878724ba675SRob Herring			sdmmc3_cd_n_pv2 {
879724ba675SRob Herring				nvidia,pins = "sdmmc3_cd_n_pv2";
880724ba675SRob Herring				nvidia,function = "sdmmc3";
881724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
882724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
883724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
884724ba675SRob Herring			};
885724ba675SRob Herring			sdmmc1_wp_n_pv3 {
886724ba675SRob Herring				nvidia,pins = "sdmmc1_wp_n_pv3";
887724ba675SRob Herring				nvidia,function = "sdmmc1";
888724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
889724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
890724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
891724ba675SRob Herring			};
892724ba675SRob Herring			ddc_scl_pv4 {
893724ba675SRob Herring				nvidia,pins = "ddc_scl_pv4";
894724ba675SRob Herring				nvidia,function = "i2c4";
895724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
896724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
897724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
898724ba675SRob Herring				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
899724ba675SRob Herring			};
900724ba675SRob Herring			ddc_sda_pv5 {
901724ba675SRob Herring				nvidia,pins = "ddc_sda_pv5";
902724ba675SRob Herring				nvidia,function = "i2c4";
903724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
904724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
905724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
906724ba675SRob Herring				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
907724ba675SRob Herring			};
908724ba675SRob Herring			gpio_w2_aud_pw2 {
909724ba675SRob Herring				nvidia,pins = "gpio_w2_aud_pw2";
910724ba675SRob Herring				nvidia,function = "rsvd2";
911724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
912724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
913724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
914724ba675SRob Herring			};
915724ba675SRob Herring			gpio_w3_aud_pw3 {
916724ba675SRob Herring				nvidia,pins = "gpio_w3_aud_pw3";
917724ba675SRob Herring				nvidia,function = "spi6";
918724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
919724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
920724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
921724ba675SRob Herring			};
922724ba675SRob Herring			dap_mclk1_pw4 {
923724ba675SRob Herring				nvidia,pins = "dap_mclk1_pw4";
924724ba675SRob Herring				nvidia,function = "extperiph1";
925724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
926724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
927724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
928724ba675SRob Herring			};
929724ba675SRob Herring			clk2_out_pw5 {
930724ba675SRob Herring				nvidia,pins = "clk2_out_pw5";
931724ba675SRob Herring				nvidia,function = "extperiph2";
932724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
933724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
934724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
935724ba675SRob Herring			};
936724ba675SRob Herring			uart3_txd_pw6 {
937724ba675SRob Herring				nvidia,pins = "uart3_txd_pw6";
938724ba675SRob Herring				nvidia,function = "rsvd2";
939724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
940724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
941724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
942724ba675SRob Herring			};
943724ba675SRob Herring			uart3_rxd_pw7 {
944724ba675SRob Herring				nvidia,pins = "uart3_rxd_pw7";
945724ba675SRob Herring				nvidia,function = "rsvd2";
946724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
947724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
948724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
949724ba675SRob Herring			};
950724ba675SRob Herring			dvfs_pwm_px0 {
951724ba675SRob Herring				nvidia,pins = "dvfs_pwm_px0";
952724ba675SRob Herring				nvidia,function = "cldvfs";
953724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
954724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
955724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
956724ba675SRob Herring			};
957724ba675SRob Herring			gpio_x1_aud_px1 {
958724ba675SRob Herring				nvidia,pins = "gpio_x1_aud_px1";
959724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
960724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
961724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
962724ba675SRob Herring			};
963724ba675SRob Herring			dvfs_clk_px2 {
964724ba675SRob Herring				nvidia,pins = "dvfs_clk_px2";
965724ba675SRob Herring				nvidia,function = "cldvfs";
966724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
967724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
968724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
969724ba675SRob Herring			};
970724ba675SRob Herring			gpio_x3_aud_px3 {
971724ba675SRob Herring				nvidia,pins = "gpio_x3_aud_px3";
972724ba675SRob Herring				nvidia,function = "rsvd4";
973724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
974724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
975724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
976724ba675SRob Herring			};
977724ba675SRob Herring			gpio_x4_aud_px4 {
978724ba675SRob Herring				nvidia,pins = "gpio_x4_aud_px4";
979724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
980724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
981724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
982724ba675SRob Herring			};
983724ba675SRob Herring			gpio_x5_aud_px5 {
984724ba675SRob Herring				nvidia,pins = "gpio_x5_aud_px5";
985724ba675SRob Herring				nvidia,function = "rsvd4";
986724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
987724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
988724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
989724ba675SRob Herring			};
990724ba675SRob Herring			gpio_x6_aud_px6 {
991724ba675SRob Herring				nvidia,pins = "gpio_x6_aud_px6";
992724ba675SRob Herring				nvidia,function = "gmi";
993724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
994724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
995724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
996724ba675SRob Herring			};
997724ba675SRob Herring			gpio_x7_aud_px7 {
998724ba675SRob Herring				nvidia,pins = "gpio_x7_aud_px7";
999724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1000724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1001724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1002724ba675SRob Herring			};
1003724ba675SRob Herring			ulpi_clk_py0 {
1004724ba675SRob Herring				nvidia,pins = "ulpi_clk_py0";
1005724ba675SRob Herring				nvidia,function = "spi1";
1006724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1007724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1008724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1009724ba675SRob Herring			};
1010724ba675SRob Herring			ulpi_dir_py1 {
1011724ba675SRob Herring				nvidia,pins = "ulpi_dir_py1";
1012724ba675SRob Herring				nvidia,function = "spi1";
1013724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1014724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1015724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1016724ba675SRob Herring			};
1017724ba675SRob Herring			ulpi_nxt_py2 {
1018724ba675SRob Herring				nvidia,pins = "ulpi_nxt_py2";
1019724ba675SRob Herring				nvidia,function = "spi1";
1020724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1021724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1022724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1023724ba675SRob Herring			};
1024724ba675SRob Herring			ulpi_stp_py3 {
1025724ba675SRob Herring				nvidia,pins = "ulpi_stp_py3";
1026724ba675SRob Herring				nvidia,function = "spi1";
1027724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1028724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1029724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1030724ba675SRob Herring			};
1031724ba675SRob Herring			sdmmc1_dat3_py4 {
1032724ba675SRob Herring				nvidia,pins = "sdmmc1_dat3_py4";
1033724ba675SRob Herring				nvidia,function = "sdmmc1";
1034724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1035724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1036724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1037724ba675SRob Herring			};
1038724ba675SRob Herring			sdmmc1_dat2_py5 {
1039724ba675SRob Herring				nvidia,pins = "sdmmc1_dat2_py5";
1040724ba675SRob Herring				nvidia,function = "sdmmc1";
1041724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1042724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1043724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1044724ba675SRob Herring			};
1045724ba675SRob Herring			sdmmc1_dat1_py6 {
1046724ba675SRob Herring				nvidia,pins = "sdmmc1_dat1_py6";
1047724ba675SRob Herring				nvidia,function = "sdmmc1";
1048724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1049724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1050724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1051724ba675SRob Herring			};
1052724ba675SRob Herring			sdmmc1_dat0_py7 {
1053724ba675SRob Herring				nvidia,pins = "sdmmc1_dat0_py7";
1054724ba675SRob Herring				nvidia,function = "rsvd2";
1055724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1056724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1057724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1058724ba675SRob Herring			};
1059724ba675SRob Herring			sdmmc1_clk_pz0 {
1060724ba675SRob Herring				nvidia,pins = "sdmmc1_clk_pz0";
1061724ba675SRob Herring				nvidia,function = "rsvd3";
1062724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1063724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1064724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1065724ba675SRob Herring			};
1066724ba675SRob Herring			sdmmc1_cmd_pz1 {
1067724ba675SRob Herring				nvidia,pins = "sdmmc1_cmd_pz1";
1068724ba675SRob Herring				nvidia,function = "sdmmc1";
1069724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1070724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1071724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1072724ba675SRob Herring			};
1073724ba675SRob Herring			pwr_i2c_scl_pz6 {
1074724ba675SRob Herring				nvidia,pins = "pwr_i2c_scl_pz6";
1075724ba675SRob Herring				nvidia,function = "i2cpwr";
1076724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1077724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1078724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1079724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1080724ba675SRob Herring			};
1081724ba675SRob Herring			pwr_i2c_sda_pz7 {
1082724ba675SRob Herring				nvidia,pins = "pwr_i2c_sda_pz7";
1083724ba675SRob Herring				nvidia,function = "i2cpwr";
1084724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1085724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1086724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1087724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1088724ba675SRob Herring			};
1089724ba675SRob Herring			sdmmc4_dat0_paa0 {
1090724ba675SRob Herring				nvidia,pins = "sdmmc4_dat0_paa0";
1091724ba675SRob Herring				nvidia,function = "sdmmc4";
1092724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1093724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1094724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1095724ba675SRob Herring			};
1096724ba675SRob Herring			sdmmc4_dat1_paa1 {
1097724ba675SRob Herring				nvidia,pins = "sdmmc4_dat1_paa1";
1098724ba675SRob Herring				nvidia,function = "sdmmc4";
1099724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1100724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1101724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1102724ba675SRob Herring			};
1103724ba675SRob Herring			sdmmc4_dat2_paa2 {
1104724ba675SRob Herring				nvidia,pins = "sdmmc4_dat2_paa2";
1105724ba675SRob Herring				nvidia,function = "sdmmc4";
1106724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1107724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1108724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1109724ba675SRob Herring			};
1110724ba675SRob Herring			sdmmc4_dat3_paa3 {
1111724ba675SRob Herring				nvidia,pins = "sdmmc4_dat3_paa3";
1112724ba675SRob Herring				nvidia,function = "sdmmc4";
1113724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1114724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1115724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1116724ba675SRob Herring			};
1117724ba675SRob Herring			sdmmc4_dat4_paa4 {
1118724ba675SRob Herring				nvidia,pins = "sdmmc4_dat4_paa4";
1119724ba675SRob Herring				nvidia,function = "sdmmc4";
1120724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1121724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1122724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1123724ba675SRob Herring			};
1124724ba675SRob Herring			sdmmc4_dat5_paa5 {
1125724ba675SRob Herring				nvidia,pins = "sdmmc4_dat5_paa5";
1126724ba675SRob Herring				nvidia,function = "sdmmc4";
1127724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1128724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1129724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1130724ba675SRob Herring			};
1131724ba675SRob Herring			sdmmc4_dat6_paa6 {
1132724ba675SRob Herring				nvidia,pins = "sdmmc4_dat6_paa6";
1133724ba675SRob Herring				nvidia,function = "sdmmc4";
1134724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1135724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1136724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1137724ba675SRob Herring			};
1138724ba675SRob Herring			sdmmc4_dat7_paa7 {
1139724ba675SRob Herring				nvidia,pins = "sdmmc4_dat7_paa7";
1140724ba675SRob Herring				nvidia,function = "sdmmc4";
1141724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1142724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1143724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1144724ba675SRob Herring			};
1145724ba675SRob Herring			pbb0 {
1146724ba675SRob Herring				nvidia,pins = "pbb0";
1147724ba675SRob Herring				nvidia,function = "vimclk2_alt";
1148724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1149724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1150724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1151724ba675SRob Herring			};
1152724ba675SRob Herring			cam_i2c_scl_pbb1 {
1153724ba675SRob Herring				nvidia,pins = "cam_i2c_scl_pbb1";
1154724ba675SRob Herring				nvidia,function = "i2c3";
1155724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1156724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1157724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1158724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1159724ba675SRob Herring			};
1160724ba675SRob Herring			cam_i2c_sda_pbb2 {
1161724ba675SRob Herring				nvidia,pins = "cam_i2c_sda_pbb2";
1162724ba675SRob Herring				nvidia,function = "i2c3";
1163724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1164724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1165724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1166724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1167724ba675SRob Herring			};
1168724ba675SRob Herring			pbb3 {
1169724ba675SRob Herring				nvidia,pins = "pbb3";
1170724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1171724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1172724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1173724ba675SRob Herring			};
1174724ba675SRob Herring			pbb4 {
1175724ba675SRob Herring				nvidia,pins = "pbb4";
1176724ba675SRob Herring				nvidia,function = "vgp4";
1177724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1178724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1179724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1180724ba675SRob Herring			};
1181724ba675SRob Herring			pbb5 {
1182724ba675SRob Herring				nvidia,pins = "pbb5";
1183724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1184724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1185724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1186724ba675SRob Herring			};
1187724ba675SRob Herring			pbb6 {
1188724ba675SRob Herring				nvidia,pins = "pbb6";
1189724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1190724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1191724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1192724ba675SRob Herring			};
1193724ba675SRob Herring			pbb7 {
1194724ba675SRob Herring				nvidia,pins = "pbb7";
1195724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1196724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1197724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1198724ba675SRob Herring			};
1199724ba675SRob Herring			cam_mclk_pcc0 {
1200724ba675SRob Herring				nvidia,pins = "cam_mclk_pcc0";
1201724ba675SRob Herring				nvidia,function = "vi_alt3";
1202724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1203724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1204724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1205724ba675SRob Herring			};
1206724ba675SRob Herring			pcc1 {
1207724ba675SRob Herring				nvidia,pins = "pcc1";
1208724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1209724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1210724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1211724ba675SRob Herring			};
1212724ba675SRob Herring			pcc2 {
1213724ba675SRob Herring				nvidia,pins = "pcc2";
1214724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1215724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1216724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1217724ba675SRob Herring			};
1218724ba675SRob Herring			sdmmc4_clk_pcc4 {
1219724ba675SRob Herring				nvidia,pins = "sdmmc4_clk_pcc4";
1220724ba675SRob Herring				nvidia,function = "sdmmc4";
1221724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1222724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1223724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1224724ba675SRob Herring			};
1225724ba675SRob Herring			clk2_req_pcc5 {
1226724ba675SRob Herring				nvidia,pins = "clk2_req_pcc5";
1227724ba675SRob Herring				nvidia,function = "rsvd2";
1228724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1229724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1230724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1231724ba675SRob Herring			};
1232724ba675SRob Herring			pex_l0_rst_n_pdd1 {
1233724ba675SRob Herring				nvidia,pins = "pex_l0_rst_n_pdd1";
1234724ba675SRob Herring				nvidia,function = "pe0";
1235724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1236724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1237724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1238724ba675SRob Herring			};
1239724ba675SRob Herring			pex_l0_clkreq_n_pdd2 {
1240724ba675SRob Herring				nvidia,pins = "pex_l0_clkreq_n_pdd2";
1241724ba675SRob Herring				nvidia,function = "pe0";
1242724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1243724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1244724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1245724ba675SRob Herring			};
1246724ba675SRob Herring			pex_wake_n_pdd3 {
1247724ba675SRob Herring				nvidia,pins = "pex_wake_n_pdd3";
1248724ba675SRob Herring				nvidia,function = "pe";
1249724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1250724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1251724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1252724ba675SRob Herring			};
1253724ba675SRob Herring			pex_l1_rst_n_pdd5 {
1254724ba675SRob Herring				nvidia,pins = "pex_l1_rst_n_pdd5";
1255724ba675SRob Herring				nvidia,function = "pe1";
1256724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1257724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1258724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1259724ba675SRob Herring			};
1260724ba675SRob Herring			pex_l1_clkreq_n_pdd6 {
1261724ba675SRob Herring				nvidia,pins = "pex_l1_clkreq_n_pdd6";
1262724ba675SRob Herring				nvidia,function = "pe1";
1263724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1264724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1265724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1266724ba675SRob Herring			};
1267724ba675SRob Herring			clk3_out_pee0 {
1268724ba675SRob Herring				nvidia,pins = "clk3_out_pee0";
1269724ba675SRob Herring				nvidia,function = "extperiph3";
1270724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1271724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1272724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1273724ba675SRob Herring			};
1274724ba675SRob Herring			clk3_req_pee1 {
1275724ba675SRob Herring				nvidia,pins = "clk3_req_pee1";
1276724ba675SRob Herring				nvidia,function = "rsvd2";
1277724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1278724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1279724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1280724ba675SRob Herring			};
1281724ba675SRob Herring			dap_mclk1_req_pee2 {
1282724ba675SRob Herring				nvidia,pins = "dap_mclk1_req_pee2";
1283724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1284724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1285724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1286724ba675SRob Herring			};
1287724ba675SRob Herring			hdmi_cec_pee3 {
1288724ba675SRob Herring				nvidia,pins = "hdmi_cec_pee3";
1289724ba675SRob Herring				nvidia,function = "cec";
1290724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1291724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1292724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1293724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1294724ba675SRob Herring			};
1295724ba675SRob Herring			sdmmc3_clk_lb_out_pee4 {
1296724ba675SRob Herring				nvidia,pins = "sdmmc3_clk_lb_out_pee4";
1297724ba675SRob Herring				nvidia,function = "sdmmc3";
1298724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1299724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1300724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1301724ba675SRob Herring			};
1302724ba675SRob Herring			sdmmc3_clk_lb_in_pee5 {
1303724ba675SRob Herring				nvidia,pins = "sdmmc3_clk_lb_in_pee5";
1304724ba675SRob Herring				nvidia,function = "sdmmc3";
1305724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1306724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1307724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1308724ba675SRob Herring			};
1309724ba675SRob Herring			dp_hpd_pff0 {
1310724ba675SRob Herring				nvidia,pins = "dp_hpd_pff0";
1311724ba675SRob Herring				nvidia,function = "dp";
1312724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1313724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1314724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1315724ba675SRob Herring			};
1316724ba675SRob Herring			usb_vbus_en2_pff1 {
1317724ba675SRob Herring				nvidia,pins = "usb_vbus_en2_pff1";
1318724ba675SRob Herring				nvidia,function = "rsvd2";
1319724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1320724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1321724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1322724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1323724ba675SRob Herring			};
1324724ba675SRob Herring			pff2 {
1325724ba675SRob Herring				nvidia,pins = "pff2";
1326724ba675SRob Herring				nvidia,function = "rsvd2";
1327724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1328724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1329724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1330724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1331724ba675SRob Herring			};
1332724ba675SRob Herring			core_pwr_req {
1333724ba675SRob Herring				nvidia,pins = "core_pwr_req";
1334724ba675SRob Herring				nvidia,function = "pwron";
1335724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1336724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1337724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1338724ba675SRob Herring			};
1339724ba675SRob Herring			cpu_pwr_req {
1340724ba675SRob Herring				nvidia,pins = "cpu_pwr_req";
1341724ba675SRob Herring				nvidia,function = "cpu";
1342724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1343724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1344724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1345724ba675SRob Herring			};
1346724ba675SRob Herring			pwr_int_n {
1347724ba675SRob Herring				nvidia,pins = "pwr_int_n";
1348724ba675SRob Herring				nvidia,function = "pmi";
1349724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1350724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1351724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1352724ba675SRob Herring			};
1353724ba675SRob Herring			reset_out_n {
1354724ba675SRob Herring				nvidia,pins = "reset_out_n";
1355724ba675SRob Herring				nvidia,function = "reset_out_n";
1356724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1357724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1358724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1359724ba675SRob Herring			};
1360724ba675SRob Herring			clk_32k_in {
1361724ba675SRob Herring				nvidia,pins = "clk_32k_in";
1362724ba675SRob Herring				nvidia,function = "clk";
1363724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1364724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1365724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1366724ba675SRob Herring			};
1367724ba675SRob Herring			jtag_rtck {
1368724ba675SRob Herring				nvidia,pins = "jtag_rtck";
1369724ba675SRob Herring				nvidia,function = "rtck";
1370724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1371724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1372724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1373724ba675SRob Herring			};
1374724ba675SRob Herring			dsi_b {
1375724ba675SRob Herring				nvidia,pins = "mipi_pad_ctrl_dsi_b";
1376724ba675SRob Herring				nvidia,function = "dsi_b";
1377724ba675SRob Herring			};
1378724ba675SRob Herring		};
1379724ba675SRob Herring	};
1380724ba675SRob Herring
1381724ba675SRob Herring	/*
1382724ba675SRob Herring	 * First high speed UART, exposed on the expansion connector J3A2
1383724ba675SRob Herring	 *   Pin 41: BR_UART1_TXD
1384724ba675SRob Herring	 *   Pin 44: BR_UART1_RXD
1385724ba675SRob Herring	 */
1386724ba675SRob Herring	serial@70006000 {
1387724ba675SRob Herring		compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1388*500b861dSThierry Reding		reset-names = "serial";
1389724ba675SRob Herring		/delete-property/ reg-shift;
1390724ba675SRob Herring		status = "okay";
1391724ba675SRob Herring	};
1392724ba675SRob Herring
1393724ba675SRob Herring	/*
1394724ba675SRob Herring	 * Second high speed UART, exposed on the expansion connector J3A2
1395724ba675SRob Herring	 *   Pin 65: UART2_RXD
1396724ba675SRob Herring	 *   Pin 68: UART2_TXD
1397724ba675SRob Herring	 *   Pin 71: UART2_CTS_L
1398724ba675SRob Herring	 *   Pin 74: UART2_RTS_L
1399724ba675SRob Herring	 */
1400724ba675SRob Herring	serial@70006040 {
1401724ba675SRob Herring		compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1402*500b861dSThierry Reding		reset-names = "serial";
1403724ba675SRob Herring		/delete-property/ reg-shift;
1404724ba675SRob Herring		status = "okay";
1405724ba675SRob Herring	};
1406724ba675SRob Herring
1407724ba675SRob Herring	/* DB9 serial port */
1408724ba675SRob Herring	serial@70006300 {
14099766116aSThierry Reding		/delete-property/ dmas;
14109766116aSThierry Reding		/delete-property/ dma-names;
1411724ba675SRob Herring		status = "okay";
1412724ba675SRob Herring	};
1413724ba675SRob Herring
1414724ba675SRob Herring	/* Expansion GEN1_I2C_*, mini-PCIe I2C, on-board components */
1415724ba675SRob Herring	i2c@7000c000 {
1416724ba675SRob Herring		status = "okay";
1417724ba675SRob Herring		clock-frequency = <100000>;
1418724ba675SRob Herring
1419724ba675SRob Herring		rt5639: audio-codec@1c {
1420724ba675SRob Herring			compatible = "realtek,rt5639";
1421724ba675SRob Herring			reg = <0x1c>;
1422724ba675SRob Herring			interrupt-parent = <&gpio>;
1423724ba675SRob Herring			interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
1424724ba675SRob Herring			realtek,ldo1-en-gpios =
1425724ba675SRob Herring				<&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
1426724ba675SRob Herring		};
1427724ba675SRob Herring
1428724ba675SRob Herring		temperature-sensor@4c {
1429724ba675SRob Herring			compatible = "ti,tmp451";
1430724ba675SRob Herring			reg = <0x4c>;
1431724ba675SRob Herring			interrupt-parent = <&gpio>;
1432724ba675SRob Herring			interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_EDGE_FALLING>;
1433724ba675SRob Herring		};
1434724ba675SRob Herring
1435724ba675SRob Herring		eeprom@56 {
1436724ba675SRob Herring			compatible = "atmel,24c02";
1437724ba675SRob Herring			reg = <0x56>;
1438724ba675SRob Herring			pagesize = <8>;
1439724ba675SRob Herring		};
1440724ba675SRob Herring	};
1441724ba675SRob Herring
1442724ba675SRob Herring	/* Expansion GEN2_I2C_* */
1443724ba675SRob Herring	i2c@7000c400 {
1444724ba675SRob Herring		status = "okay";
1445724ba675SRob Herring		clock-frequency = <100000>;
1446724ba675SRob Herring	};
1447724ba675SRob Herring
1448724ba675SRob Herring	/* Expansion CAM_I2C_* */
1449724ba675SRob Herring	i2c@7000c500 {
1450724ba675SRob Herring		status = "okay";
1451724ba675SRob Herring		clock-frequency = <100000>;
1452724ba675SRob Herring	};
1453724ba675SRob Herring
1454724ba675SRob Herring	/* HDMI DDC */
1455724ba675SRob Herring	hdmi_ddc: i2c@7000c700 {
1456724ba675SRob Herring		status = "okay";
1457724ba675SRob Herring		clock-frequency = <100000>;
1458724ba675SRob Herring	};
1459724ba675SRob Herring
1460724ba675SRob Herring	/* Expansion PWR_I2C_*, on-board components */
1461724ba675SRob Herring	i2c@7000d000 {
1462724ba675SRob Herring		status = "okay";
1463724ba675SRob Herring		clock-frequency = <400000>;
1464724ba675SRob Herring
1465724ba675SRob Herring		pmic: pmic@40 {
1466724ba675SRob Herring			compatible = "ams,as3722";
1467724ba675SRob Herring			reg = <0x40>;
1468724ba675SRob Herring			interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
1469724ba675SRob Herring
1470724ba675SRob Herring			ams,system-power-controller;
1471724ba675SRob Herring
1472724ba675SRob Herring			#interrupt-cells = <2>;
1473724ba675SRob Herring			interrupt-controller;
1474724ba675SRob Herring
1475724ba675SRob Herring			gpio-controller;
1476724ba675SRob Herring			#gpio-cells = <2>;
1477724ba675SRob Herring
1478724ba675SRob Herring			pinctrl-names = "default";
1479724ba675SRob Herring			pinctrl-0 = <&as3722_default>;
1480724ba675SRob Herring
1481724ba675SRob Herring			as3722_default: pinmux {
1482724ba675SRob Herring				gpio0 {
1483724ba675SRob Herring					pins = "gpio0";
1484724ba675SRob Herring					function = "gpio";
1485724ba675SRob Herring					bias-pull-down;
1486724ba675SRob Herring				};
1487724ba675SRob Herring
1488724ba675SRob Herring				gpio1_2_4_7 {
1489724ba675SRob Herring					pins = "gpio1", "gpio2", "gpio4", "gpio7";
1490724ba675SRob Herring					function = "gpio";
1491724ba675SRob Herring					bias-pull-up;
1492724ba675SRob Herring				};
1493724ba675SRob Herring
1494724ba675SRob Herring				gpio3_5_6 {
1495724ba675SRob Herring					pins = "gpio3", "gpio5", "gpio6";
1496724ba675SRob Herring					bias-high-impedance;
1497724ba675SRob Herring				};
1498724ba675SRob Herring			};
1499724ba675SRob Herring
1500724ba675SRob Herring			regulators {
1501724ba675SRob Herring				vsup-sd2-supply = <&vdd_5v0_sys>;
1502724ba675SRob Herring				vsup-sd3-supply = <&vdd_5v0_sys>;
1503724ba675SRob Herring				vsup-sd4-supply = <&vdd_5v0_sys>;
1504724ba675SRob Herring				vsup-sd5-supply = <&vdd_5v0_sys>;
1505724ba675SRob Herring				vin-ldo0-supply = <&vdd_1v35_lp0>;
1506724ba675SRob Herring				vin-ldo1-6-supply = <&vdd_3v3_run>;
1507724ba675SRob Herring				vin-ldo2-5-7-supply = <&vddio_1v8>;
1508724ba675SRob Herring				vin-ldo3-4-supply = <&vdd_3v3_sys>;
1509724ba675SRob Herring				vin-ldo9-10-supply = <&vdd_5v0_sys>;
1510724ba675SRob Herring				vin-ldo11-supply = <&vdd_3v3_run>;
1511724ba675SRob Herring
1512724ba675SRob Herring				vdd_cpu: sd0 {
1513724ba675SRob Herring					regulator-name = "+VDD_CPU_AP";
1514724ba675SRob Herring					regulator-min-microvolt = <700000>;
1515724ba675SRob Herring					regulator-max-microvolt = <1400000>;
1516724ba675SRob Herring					regulator-min-microamp = <3500000>;
1517724ba675SRob Herring					regulator-max-microamp = <3500000>;
1518724ba675SRob Herring					regulator-always-on;
1519724ba675SRob Herring					regulator-boot-on;
1520724ba675SRob Herring					ams,ext-control = <2>;
1521724ba675SRob Herring				};
1522724ba675SRob Herring
1523724ba675SRob Herring				sd1 {
1524724ba675SRob Herring					regulator-name = "+VDD_CORE";
1525724ba675SRob Herring					regulator-min-microvolt = <700000>;
1526724ba675SRob Herring					regulator-max-microvolt = <1350000>;
1527724ba675SRob Herring					regulator-min-microamp = <2500000>;
1528724ba675SRob Herring					regulator-max-microamp = <2500000>;
1529724ba675SRob Herring					regulator-always-on;
1530724ba675SRob Herring					regulator-boot-on;
1531724ba675SRob Herring					ams,ext-control = <1>;
1532724ba675SRob Herring				};
1533724ba675SRob Herring
1534724ba675SRob Herring				vdd_1v35_lp0: sd2 {
1535724ba675SRob Herring					regulator-name = "+1.35V_LP0(sd2)";
1536724ba675SRob Herring					regulator-min-microvolt = <1350000>;
1537724ba675SRob Herring					regulator-max-microvolt = <1350000>;
1538724ba675SRob Herring					regulator-always-on;
1539724ba675SRob Herring					regulator-boot-on;
1540724ba675SRob Herring				};
1541724ba675SRob Herring
1542724ba675SRob Herring				sd3 {
1543724ba675SRob Herring					regulator-name = "+1.35V_LP0(sd3)";
1544724ba675SRob Herring					regulator-min-microvolt = <1350000>;
1545724ba675SRob Herring					regulator-max-microvolt = <1350000>;
1546724ba675SRob Herring					regulator-always-on;
1547724ba675SRob Herring					regulator-boot-on;
1548724ba675SRob Herring				};
1549724ba675SRob Herring
1550724ba675SRob Herring				vdd_1v05_run: sd4 {
1551724ba675SRob Herring					regulator-name = "+1.05V_RUN";
1552724ba675SRob Herring					regulator-min-microvolt = <1050000>;
1553724ba675SRob Herring					regulator-max-microvolt = <1050000>;
1554724ba675SRob Herring				};
1555724ba675SRob Herring
1556724ba675SRob Herring				vddio_1v8: sd5 {
1557724ba675SRob Herring					regulator-name = "+1.8V_VDDIO";
1558724ba675SRob Herring					regulator-min-microvolt = <1800000>;
1559724ba675SRob Herring					regulator-max-microvolt = <1800000>;
1560724ba675SRob Herring					regulator-boot-on;
1561724ba675SRob Herring					regulator-always-on;
1562724ba675SRob Herring				};
1563724ba675SRob Herring
1564724ba675SRob Herring				vdd_gpu: sd6 {
1565724ba675SRob Herring					regulator-name = "+VDD_GPU_AP";
1566724ba675SRob Herring					regulator-min-microvolt = <650000>;
1567724ba675SRob Herring					regulator-max-microvolt = <1200000>;
1568724ba675SRob Herring					regulator-min-microamp = <3500000>;
1569724ba675SRob Herring					regulator-max-microamp = <3500000>;
1570724ba675SRob Herring					regulator-boot-on;
1571724ba675SRob Herring					regulator-always-on;
1572724ba675SRob Herring				};
1573724ba675SRob Herring
1574724ba675SRob Herring				avdd_1v05_run: ldo0 {
1575724ba675SRob Herring					regulator-name = "+1.05V_RUN_AVDD";
1576724ba675SRob Herring					regulator-min-microvolt = <1050000>;
1577724ba675SRob Herring					regulator-max-microvolt = <1050000>;
1578724ba675SRob Herring					regulator-boot-on;
1579724ba675SRob Herring					regulator-always-on;
1580724ba675SRob Herring					ams,ext-control = <1>;
1581724ba675SRob Herring				};
1582724ba675SRob Herring
1583724ba675SRob Herring				ldo1 {
1584724ba675SRob Herring					regulator-name = "+1.8V_RUN_CAM";
1585724ba675SRob Herring					regulator-min-microvolt = <1800000>;
1586724ba675SRob Herring					regulator-max-microvolt = <1800000>;
1587724ba675SRob Herring				};
1588724ba675SRob Herring
1589724ba675SRob Herring				ldo2 {
1590724ba675SRob Herring					regulator-name = "+1.2V_GEN_AVDD";
1591724ba675SRob Herring					regulator-min-microvolt = <1200000>;
1592724ba675SRob Herring					regulator-max-microvolt = <1200000>;
1593724ba675SRob Herring					regulator-boot-on;
1594724ba675SRob Herring					regulator-always-on;
1595724ba675SRob Herring				};
1596724ba675SRob Herring
1597724ba675SRob Herring				ldo3 {
1598724ba675SRob Herring					regulator-name = "+1.05V_LP0_VDD_RTC";
1599724ba675SRob Herring					regulator-min-microvolt = <1000000>;
1600724ba675SRob Herring					regulator-max-microvolt = <1000000>;
1601724ba675SRob Herring					regulator-boot-on;
1602724ba675SRob Herring					regulator-always-on;
1603724ba675SRob Herring					ams,enable-tracking;
1604724ba675SRob Herring				};
1605724ba675SRob Herring
1606724ba675SRob Herring				ldo4 {
1607724ba675SRob Herring					regulator-name = "+2.8V_RUN_CAM";
1608724ba675SRob Herring					regulator-min-microvolt = <2800000>;
1609724ba675SRob Herring					regulator-max-microvolt = <2800000>;
1610724ba675SRob Herring				};
1611724ba675SRob Herring
1612724ba675SRob Herring				ldo5 {
1613724ba675SRob Herring					regulator-name = "+1.2V_RUN_CAM_FRONT";
1614724ba675SRob Herring					regulator-min-microvolt = <1200000>;
1615724ba675SRob Herring					regulator-max-microvolt = <1200000>;
1616724ba675SRob Herring				};
1617724ba675SRob Herring
1618724ba675SRob Herring				vddio_sdmmc3: ldo6 {
1619724ba675SRob Herring					regulator-name = "+VDDIO_SDMMC3";
1620724ba675SRob Herring					regulator-min-microvolt = <1800000>;
1621724ba675SRob Herring					regulator-max-microvolt = <3300000>;
1622724ba675SRob Herring				};
1623724ba675SRob Herring
1624724ba675SRob Herring				ldo7 {
1625724ba675SRob Herring					regulator-name = "+1.05V_RUN_CAM_REAR";
1626724ba675SRob Herring					regulator-min-microvolt = <1050000>;
1627724ba675SRob Herring					regulator-max-microvolt = <1050000>;
1628724ba675SRob Herring				};
1629724ba675SRob Herring
1630724ba675SRob Herring				ldo9 {
1631724ba675SRob Herring					regulator-name = "+3.3V_RUN_TOUCH";
1632724ba675SRob Herring					regulator-min-microvolt = <2800000>;
1633724ba675SRob Herring					regulator-max-microvolt = <2800000>;
1634724ba675SRob Herring				};
1635724ba675SRob Herring
1636724ba675SRob Herring				ldo10 {
1637724ba675SRob Herring					regulator-name = "+2.8V_RUN_CAM_AF";
1638724ba675SRob Herring					regulator-min-microvolt = <2800000>;
1639724ba675SRob Herring					regulator-max-microvolt = <2800000>;
1640724ba675SRob Herring				};
1641724ba675SRob Herring
1642724ba675SRob Herring				ldo11 {
1643724ba675SRob Herring					regulator-name = "+1.8V_RUN_VPP_FUSE";
1644724ba675SRob Herring					regulator-min-microvolt = <1800000>;
1645724ba675SRob Herring					regulator-max-microvolt = <1800000>;
1646724ba675SRob Herring				};
1647724ba675SRob Herring			};
1648724ba675SRob Herring		};
1649724ba675SRob Herring	};
1650724ba675SRob Herring
1651724ba675SRob Herring	/* Expansion TS_SPI_* */
1652724ba675SRob Herring	spi@7000d400 {
1653724ba675SRob Herring		status = "okay";
1654724ba675SRob Herring	};
1655724ba675SRob Herring
1656724ba675SRob Herring	/* Internal SPI */
1657724ba675SRob Herring	spi@7000da00 {
1658724ba675SRob Herring		status = "okay";
1659724ba675SRob Herring		spi-max-frequency = <25000000>;
1660724ba675SRob Herring
1661724ba675SRob Herring		flash@0 {
1662724ba675SRob Herring			compatible = "winbond,w25q32dw", "jedec,spi-nor";
1663724ba675SRob Herring			reg = <0>;
1664724ba675SRob Herring			spi-max-frequency = <20000000>;
1665724ba675SRob Herring		};
1666724ba675SRob Herring	};
1667724ba675SRob Herring
1668724ba675SRob Herring	pmc@7000e400 {
1669724ba675SRob Herring		nvidia,invert-interrupt;
1670724ba675SRob Herring		nvidia,suspend-mode = <1>;
1671724ba675SRob Herring		nvidia,cpu-pwr-good-time = <500>;
1672724ba675SRob Herring		nvidia,cpu-pwr-off-time = <300>;
1673724ba675SRob Herring		nvidia,core-pwr-good-time = <641 3845>;
1674724ba675SRob Herring		nvidia,core-pwr-off-time = <61036>;
1675724ba675SRob Herring		nvidia,core-power-req-active-high;
1676724ba675SRob Herring		nvidia,sys-clock-req-active-high;
1677724ba675SRob Herring
1678724ba675SRob Herring		i2c-thermtrip {
1679724ba675SRob Herring			nvidia,i2c-controller-id = <4>;
1680724ba675SRob Herring			nvidia,bus-addr = <0x40>;
1681724ba675SRob Herring			nvidia,reg-addr = <0x36>;
1682724ba675SRob Herring			nvidia,reg-data = <0x2>;
1683724ba675SRob Herring		};
1684724ba675SRob Herring	};
1685724ba675SRob Herring
1686724ba675SRob Herring	cec@70015000 {
1687724ba675SRob Herring		status = "okay";
1688724ba675SRob Herring	};
1689724ba675SRob Herring
1690724ba675SRob Herring	/* Serial ATA */
1691724ba675SRob Herring	sata@70020000 {
1692724ba675SRob Herring		status = "okay";
1693724ba675SRob Herring
1694724ba675SRob Herring		phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
1695724ba675SRob Herring		phy-names = "sata-0";
1696724ba675SRob Herring
1697724ba675SRob Herring		hvdd-supply = <&vdd_3v3_lp0>;
1698724ba675SRob Herring		vddio-supply = <&vdd_1v05_run>;
1699724ba675SRob Herring		avdd-supply = <&vdd_1v05_run>;
1700724ba675SRob Herring
1701724ba675SRob Herring		target-5v-supply = <&vdd_5v0_sata>;
1702724ba675SRob Herring		target-12v-supply = <&vdd_12v0_sata>;
1703724ba675SRob Herring	};
1704724ba675SRob Herring
1705724ba675SRob Herring	hda@70030000 {
1706724ba675SRob Herring		status = "okay";
1707724ba675SRob Herring	};
1708724ba675SRob Herring
1709724ba675SRob Herring	usb@70090000 {
1710724ba675SRob Herring		phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* Micro A/B */
1711724ba675SRob Herring		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Mini PCIe */
1712724ba675SRob Herring		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* USB3 */
1713724ba675SRob Herring		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>; /* USB3 */
1714724ba675SRob Herring		phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0";
1715724ba675SRob Herring
1716724ba675SRob Herring		avddio-pex-supply = <&vdd_1v05_run>;
1717724ba675SRob Herring		dvddio-pex-supply = <&vdd_1v05_run>;
1718724ba675SRob Herring		avdd-usb-supply = <&vdd_3v3_lp0>;
1719724ba675SRob Herring		avdd-pll-utmip-supply = <&vddio_1v8>;
1720724ba675SRob Herring		avdd-pll-erefe-supply = <&avdd_1v05_run>;
1721724ba675SRob Herring		avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
1722724ba675SRob Herring		hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
1723724ba675SRob Herring		hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
1724724ba675SRob Herring
1725724ba675SRob Herring		status = "okay";
1726724ba675SRob Herring	};
1727724ba675SRob Herring
1728724ba675SRob Herring	padctl@7009f000 {
1729724ba675SRob Herring		status = "okay";
1730724ba675SRob Herring
1731724ba675SRob Herring		avdd-pll-utmip-supply = <&vddio_1v8>;
1732724ba675SRob Herring		avdd-pll-erefe-supply = <&avdd_1v05_run>;
1733724ba675SRob Herring		avdd-pex-pll-supply = <&vdd_1v05_run>;
1734724ba675SRob Herring		hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
1735724ba675SRob Herring
1736724ba675SRob Herring		pads {
1737724ba675SRob Herring			usb2 {
1738724ba675SRob Herring				status = "okay";
1739724ba675SRob Herring
1740724ba675SRob Herring				lanes {
1741724ba675SRob Herring					usb2-0 {
1742724ba675SRob Herring						nvidia,function = "snps";
1743724ba675SRob Herring						status = "okay";
1744724ba675SRob Herring					};
1745724ba675SRob Herring
1746724ba675SRob Herring					usb2-1 {
1747724ba675SRob Herring						nvidia,function = "xusb";
1748724ba675SRob Herring						status = "okay";
1749724ba675SRob Herring					};
1750724ba675SRob Herring
1751724ba675SRob Herring					usb2-2 {
1752724ba675SRob Herring						nvidia,function = "xusb";
1753724ba675SRob Herring						status = "okay";
1754724ba675SRob Herring					};
1755724ba675SRob Herring				};
1756724ba675SRob Herring			};
1757724ba675SRob Herring
1758724ba675SRob Herring			pcie {
1759724ba675SRob Herring				status = "okay";
1760724ba675SRob Herring
1761724ba675SRob Herring				lanes {
1762724ba675SRob Herring					pcie-0 {
1763724ba675SRob Herring						nvidia,function = "usb3-ss";
1764724ba675SRob Herring						status = "okay";
1765724ba675SRob Herring					};
1766724ba675SRob Herring
1767724ba675SRob Herring					pcie-2 {
1768724ba675SRob Herring						nvidia,function = "pcie";
1769724ba675SRob Herring						status = "okay";
1770724ba675SRob Herring					};
1771724ba675SRob Herring
1772724ba675SRob Herring					pcie-4 {
1773724ba675SRob Herring						nvidia,function = "pcie";
1774724ba675SRob Herring						status = "okay";
1775724ba675SRob Herring					};
1776724ba675SRob Herring				};
1777724ba675SRob Herring			};
1778724ba675SRob Herring
1779724ba675SRob Herring			sata {
1780724ba675SRob Herring				status = "okay";
1781724ba675SRob Herring
1782724ba675SRob Herring				lanes {
1783724ba675SRob Herring					sata-0 {
1784724ba675SRob Herring						nvidia,function = "sata";
1785724ba675SRob Herring						status = "okay";
1786724ba675SRob Herring					};
1787724ba675SRob Herring				};
1788724ba675SRob Herring			};
1789724ba675SRob Herring		};
1790724ba675SRob Herring
1791724ba675SRob Herring		ports {
1792724ba675SRob Herring			/* Micro A/B */
1793724ba675SRob Herring			usb2-0 {
1794724ba675SRob Herring				status = "okay";
1795724ba675SRob Herring				mode = "host";
1796724ba675SRob Herring			};
1797724ba675SRob Herring
1798724ba675SRob Herring			/* Mini PCIe */
1799724ba675SRob Herring			usb2-1 {
1800724ba675SRob Herring				status = "okay";
1801724ba675SRob Herring				mode = "host";
1802724ba675SRob Herring			};
1803724ba675SRob Herring
1804724ba675SRob Herring			/* USB3 */
1805724ba675SRob Herring			usb2-2 {
1806724ba675SRob Herring				status = "okay";
1807724ba675SRob Herring				mode = "host";
1808724ba675SRob Herring
1809724ba675SRob Herring				vbus-supply = <&vdd_usb3_vbus>;
1810724ba675SRob Herring			};
1811724ba675SRob Herring
1812724ba675SRob Herring			usb3-0 {
1813724ba675SRob Herring				nvidia,usb2-companion = <2>;
1814724ba675SRob Herring				status = "okay";
1815724ba675SRob Herring			};
1816724ba675SRob Herring		};
1817724ba675SRob Herring	};
1818724ba675SRob Herring
1819724ba675SRob Herring	/* SD card */
1820724ba675SRob Herring	mmc@700b0400 {
1821724ba675SRob Herring		status = "okay";
1822724ba675SRob Herring		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1823724ba675SRob Herring		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1824724ba675SRob Herring		wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1825724ba675SRob Herring		bus-width = <4>;
1826724ba675SRob Herring		vqmmc-supply = <&vddio_sdmmc3>;
1827724ba675SRob Herring	};
1828724ba675SRob Herring
1829724ba675SRob Herring	/* eMMC */
1830724ba675SRob Herring	mmc@700b0600 {
1831724ba675SRob Herring		status = "okay";
1832724ba675SRob Herring		bus-width = <8>;
1833724ba675SRob Herring		non-removable;
1834724ba675SRob Herring	};
1835724ba675SRob Herring
1836724ba675SRob Herring	/* CPU DFLL clock */
1837724ba675SRob Herring	clock@70110000 {
1838724ba675SRob Herring		status = "okay";
1839724ba675SRob Herring		vdd-cpu-supply = <&vdd_cpu>;
1840724ba675SRob Herring		nvidia,i2c-fs-rate = <400000>;
1841724ba675SRob Herring	};
1842724ba675SRob Herring
1843724ba675SRob Herring	ahub@70300000 {
1844724ba675SRob Herring		i2s@70301100 {
1845724ba675SRob Herring			status = "okay";
1846724ba675SRob Herring		};
1847724ba675SRob Herring	};
1848724ba675SRob Herring
1849724ba675SRob Herring	usb@7d000000 {
1850724ba675SRob Herring		compatible = "nvidia,tegra124-udc";
1851724ba675SRob Herring		status = "okay";
1852724ba675SRob Herring		dr_mode = "peripheral";
1853724ba675SRob Herring	};
1854724ba675SRob Herring
1855724ba675SRob Herring	usb-phy@7d000000 {
1856724ba675SRob Herring		status = "okay";
1857724ba675SRob Herring	};
1858724ba675SRob Herring
1859724ba675SRob Herring	/* mini-PCIe USB */
1860724ba675SRob Herring	usb@7d004000 {
1861724ba675SRob Herring		status = "okay";
1862724ba675SRob Herring	};
1863724ba675SRob Herring
1864724ba675SRob Herring	usb-phy@7d004000 {
1865724ba675SRob Herring		status = "okay";
1866724ba675SRob Herring	};
1867724ba675SRob Herring
1868724ba675SRob Herring	/* USB A connector */
1869724ba675SRob Herring	usb@7d008000 {
1870724ba675SRob Herring		status = "okay";
1871724ba675SRob Herring	};
1872724ba675SRob Herring
1873724ba675SRob Herring	usb-phy@7d008000 {
1874724ba675SRob Herring		status = "okay";
1875724ba675SRob Herring		vbus-supply = <&vdd_usb3_vbus>;
1876724ba675SRob Herring	};
1877724ba675SRob Herring
1878724ba675SRob Herring	clk32k_in: clock-32k {
1879724ba675SRob Herring		compatible = "fixed-clock";
1880724ba675SRob Herring		clock-frequency = <32768>;
1881724ba675SRob Herring		#clock-cells = <0>;
1882724ba675SRob Herring	};
1883724ba675SRob Herring
1884724ba675SRob Herring	cpus {
1885724ba675SRob Herring		cpu@0 {
1886724ba675SRob Herring			vdd-cpu-supply = <&vdd_cpu>;
1887724ba675SRob Herring		};
1888724ba675SRob Herring	};
1889724ba675SRob Herring
1890724ba675SRob Herring	gpio-keys {
1891724ba675SRob Herring		compatible = "gpio-keys";
1892724ba675SRob Herring
1893724ba675SRob Herring		key-power {
1894724ba675SRob Herring			label = "Power";
1895724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1896724ba675SRob Herring			linux,code = <KEY_POWER>;
1897724ba675SRob Herring			debounce-interval = <10>;
1898724ba675SRob Herring			wakeup-source;
1899724ba675SRob Herring		};
1900724ba675SRob Herring	};
1901724ba675SRob Herring
1902724ba675SRob Herring	vdd_mux: regulator-mux {
1903724ba675SRob Herring		compatible = "regulator-fixed";
1904724ba675SRob Herring		regulator-name = "+VDD_MUX";
1905724ba675SRob Herring		regulator-min-microvolt = <12000000>;
1906724ba675SRob Herring		regulator-max-microvolt = <12000000>;
1907724ba675SRob Herring		regulator-always-on;
1908724ba675SRob Herring		regulator-boot-on;
1909724ba675SRob Herring	};
1910724ba675SRob Herring
1911724ba675SRob Herring	vdd_5v0_sys: regulator-5v0sys {
1912724ba675SRob Herring		compatible = "regulator-fixed";
1913724ba675SRob Herring		regulator-name = "+5V_SYS";
1914724ba675SRob Herring		regulator-min-microvolt = <5000000>;
1915724ba675SRob Herring		regulator-max-microvolt = <5000000>;
1916724ba675SRob Herring		regulator-always-on;
1917724ba675SRob Herring		regulator-boot-on;
1918724ba675SRob Herring		vin-supply = <&vdd_mux>;
1919724ba675SRob Herring	};
1920724ba675SRob Herring
1921724ba675SRob Herring	vdd_3v3_sys: regulator-3v3sys {
1922724ba675SRob Herring		compatible = "regulator-fixed";
1923724ba675SRob Herring		regulator-name = "+3.3V_SYS";
1924724ba675SRob Herring		regulator-min-microvolt = <3300000>;
1925724ba675SRob Herring		regulator-max-microvolt = <3300000>;
1926724ba675SRob Herring		regulator-always-on;
1927724ba675SRob Herring		regulator-boot-on;
1928724ba675SRob Herring		vin-supply = <&vdd_mux>;
1929724ba675SRob Herring	};
1930724ba675SRob Herring
1931724ba675SRob Herring	vdd_3v3_run: regulator-3v3run {
1932724ba675SRob Herring		compatible = "regulator-fixed";
1933724ba675SRob Herring		regulator-name = "+3.3V_RUN";
1934724ba675SRob Herring		regulator-min-microvolt = <3300000>;
1935724ba675SRob Herring		regulator-max-microvolt = <3300000>;
1936724ba675SRob Herring		regulator-always-on;
1937724ba675SRob Herring		regulator-boot-on;
1938724ba675SRob Herring		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1939724ba675SRob Herring		enable-active-high;
1940724ba675SRob Herring		vin-supply = <&vdd_3v3_sys>;
1941724ba675SRob Herring	};
1942724ba675SRob Herring
1943724ba675SRob Herring	vdd_3v3_hdmi: regulator-3v3hdmi {
1944724ba675SRob Herring		compatible = "regulator-fixed";
1945724ba675SRob Herring		regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1946724ba675SRob Herring		regulator-min-microvolt = <3300000>;
1947724ba675SRob Herring		regulator-max-microvolt = <3300000>;
1948724ba675SRob Herring		vin-supply = <&vdd_3v3_run>;
1949724ba675SRob Herring	};
1950724ba675SRob Herring
1951724ba675SRob Herring	vdd_usb1_vbus: regulator-usb1 {
1952724ba675SRob Herring		compatible = "regulator-fixed";
1953724ba675SRob Herring		regulator-name = "+USB0_VBUS_SW";
1954724ba675SRob Herring		regulator-min-microvolt = <5000000>;
1955724ba675SRob Herring		regulator-max-microvolt = <5000000>;
1956724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1957724ba675SRob Herring		enable-active-high;
1958724ba675SRob Herring		gpio-open-drain;
1959724ba675SRob Herring		vin-supply = <&vdd_5v0_sys>;
1960724ba675SRob Herring	};
1961724ba675SRob Herring
1962724ba675SRob Herring	vdd_usb3_vbus: regulator-usb3 {
1963724ba675SRob Herring		compatible = "regulator-fixed";
1964724ba675SRob Herring		regulator-name = "+5V_USB_HS";
1965724ba675SRob Herring		regulator-min-microvolt = <5000000>;
1966724ba675SRob Herring		regulator-max-microvolt = <5000000>;
1967724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1968724ba675SRob Herring		enable-active-high;
1969724ba675SRob Herring		gpio-open-drain;
1970724ba675SRob Herring		vin-supply = <&vdd_5v0_sys>;
1971724ba675SRob Herring	};
1972724ba675SRob Herring
1973724ba675SRob Herring	vdd_3v3_lp0: regulator-lp0 {
1974724ba675SRob Herring		compatible = "regulator-fixed";
1975724ba675SRob Herring		regulator-name = "+3.3V_LP0";
1976724ba675SRob Herring		regulator-min-microvolt = <3300000>;
1977724ba675SRob Herring		regulator-max-microvolt = <3300000>;
1978724ba675SRob Herring		regulator-always-on;
1979724ba675SRob Herring		regulator-boot-on;
1980724ba675SRob Herring		gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1981724ba675SRob Herring		enable-active-high;
1982724ba675SRob Herring		vin-supply = <&vdd_3v3_sys>;
1983724ba675SRob Herring	};
1984724ba675SRob Herring
1985724ba675SRob Herring	vdd_hdmi_pll: regulator-hdmipll {
1986724ba675SRob Herring		compatible = "regulator-fixed";
1987724ba675SRob Herring		regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1988724ba675SRob Herring		regulator-min-microvolt = <1050000>;
1989724ba675SRob Herring		regulator-max-microvolt = <1050000>;
1990724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1991724ba675SRob Herring		vin-supply = <&vdd_1v05_run>;
1992724ba675SRob Herring	};
1993724ba675SRob Herring
1994724ba675SRob Herring	vdd_5v0_hdmi: regulator-hdmicon {
1995724ba675SRob Herring		compatible = "regulator-fixed";
1996724ba675SRob Herring		regulator-name = "+5V_HDMI_CON";
1997724ba675SRob Herring		regulator-min-microvolt = <5000000>;
1998724ba675SRob Herring		regulator-max-microvolt = <5000000>;
1999724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
2000724ba675SRob Herring		enable-active-high;
2001724ba675SRob Herring		vin-supply = <&vdd_5v0_sys>;
2002724ba675SRob Herring	};
2003724ba675SRob Herring
2004724ba675SRob Herring	/* Molex power connector */
2005724ba675SRob Herring	vdd_5v0_sata: regulator-5v0sata {
2006724ba675SRob Herring		compatible = "regulator-fixed";
2007724ba675SRob Herring		regulator-name = "+5V_SATA";
2008724ba675SRob Herring		regulator-min-microvolt = <5000000>;
2009724ba675SRob Herring		regulator-max-microvolt = <5000000>;
2010724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
2011724ba675SRob Herring		enable-active-high;
2012724ba675SRob Herring		vin-supply = <&vdd_5v0_sys>;
2013724ba675SRob Herring	};
2014724ba675SRob Herring
2015724ba675SRob Herring	vdd_12v0_sata: regulator-12v0sata {
2016724ba675SRob Herring		compatible = "regulator-fixed";
2017724ba675SRob Herring		regulator-name = "+12V_SATA";
2018724ba675SRob Herring		regulator-min-microvolt = <12000000>;
2019724ba675SRob Herring		regulator-max-microvolt = <12000000>;
2020724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
2021724ba675SRob Herring		enable-active-high;
2022724ba675SRob Herring		vin-supply = <&vdd_mux>;
2023724ba675SRob Herring	};
2024724ba675SRob Herring
2025724ba675SRob Herring	sound {
2026724ba675SRob Herring		compatible = "nvidia,tegra-audio-rt5640-jetson-tk1",
2027724ba675SRob Herring			     "nvidia,tegra-audio-rt5640";
2028724ba675SRob Herring		nvidia,model = "NVIDIA Tegra Jetson TK1";
2029724ba675SRob Herring
2030724ba675SRob Herring		nvidia,audio-routing =
2031724ba675SRob Herring			"Headphones", "HPOR",
2032724ba675SRob Herring			"Headphones", "HPOL",
2033724ba675SRob Herring			"Mic Jack", "MICBIAS1",
2034724ba675SRob Herring			"IN2P", "Mic Jack";
2035724ba675SRob Herring
2036724ba675SRob Herring		nvidia,i2s-controller = <&tegra_i2s1>;
2037724ba675SRob Herring		nvidia,audio-codec = <&rt5639>;
2038724ba675SRob Herring
2039724ba675SRob Herring		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_LOW>;
2040724ba675SRob Herring
2041724ba675SRob Herring		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
2042724ba675SRob Herring			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2043724ba675SRob Herring			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2044724ba675SRob Herring		clock-names = "pll_a", "pll_a_out0", "mclk";
2045724ba675SRob Herring
2046724ba675SRob Herring		assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
2047724ba675SRob Herring				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2048724ba675SRob Herring
2049724ba675SRob Herring		assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2050724ba675SRob Herring					 <&tegra_car TEGRA124_CLK_EXTERN1>;
2051724ba675SRob Herring	};
2052724ba675SRob Herring
2053724ba675SRob Herring	thermal-zones {
2054724ba675SRob Herring		cpu-thermal {
2055724ba675SRob Herring			trips {
2056724ba675SRob Herring				cpu-shutdown-trip {
2057724ba675SRob Herring					temperature = <101000>;
2058724ba675SRob Herring					hysteresis = <0>;
2059724ba675SRob Herring					type = "critical";
2060724ba675SRob Herring				};
2061724ba675SRob Herring			};
2062724ba675SRob Herring		};
2063724ba675SRob Herring
2064724ba675SRob Herring		mem-thermal {
2065724ba675SRob Herring			trips {
2066724ba675SRob Herring				mem-shutdown-trip {
2067724ba675SRob Herring					temperature = <101000>;
2068724ba675SRob Herring					hysteresis = <0>;
2069724ba675SRob Herring					type = "critical";
2070724ba675SRob Herring				};
2071724ba675SRob Herring			};
2072724ba675SRob Herring		};
2073724ba675SRob Herring
2074724ba675SRob Herring		gpu-thermal {
2075724ba675SRob Herring			trips {
2076724ba675SRob Herring				gpu-shutdown-trip {
2077724ba675SRob Herring					temperature = <101000>;
2078724ba675SRob Herring					hysteresis = <0>;
2079724ba675SRob Herring					type = "critical";
2080724ba675SRob Herring				};
2081724ba675SRob Herring			};
2082724ba675SRob Herring		};
2083724ba675SRob Herring	};
2084724ba675SRob Herring};
2085