1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2724ba675SRob Herring/dts-v1/;
3724ba675SRob Herring
4724ba675SRob Herring#include <dt-bindings/input/input.h>
5724ba675SRob Herring#include "tegra114.dtsi"
6724ba675SRob Herring
7724ba675SRob Herring/ {
8724ba675SRob Herring	model = "NVIDIA SHIELD";
9724ba675SRob Herring	compatible = "nvidia,roth", "nvidia,tegra114";
10724ba675SRob Herring
11724ba675SRob Herring	chosen {
12724ba675SRob Herring		/* SHIELD's bootloader's arguments need to be overridden */
13724ba675SRob Herring		bootargs = "console=ttyS0,115200n8 console=tty1 gpt fbcon=rotate:1";
14724ba675SRob Herring		/* SHIELD's bootloader will place initrd at this address */
15724ba675SRob Herring		linux,initrd-start = <0x82000000>;
16724ba675SRob Herring		linux,initrd-end = <0x82800000>;
17724ba675SRob Herring	};
18724ba675SRob Herring
19724ba675SRob Herring	aliases {
20724ba675SRob Herring		serial0 = &uartd;
21724ba675SRob Herring	};
22724ba675SRob Herring
23724ba675SRob Herring	firmware {
24724ba675SRob Herring		trusted-foundations {
25724ba675SRob Herring			compatible = "tlm,trusted-foundations";
26724ba675SRob Herring			tlm,version-major = <2>;
27724ba675SRob Herring			tlm,version-minor = <8>;
28724ba675SRob Herring		};
29724ba675SRob Herring	};
30724ba675SRob Herring
31724ba675SRob Herring	memory@80000000 {
32724ba675SRob Herring		/* memory >= 0x79600000 is reserved for firmware usage */
33724ba675SRob Herring		reg = <0x80000000 0x79600000>;
34724ba675SRob Herring	};
35724ba675SRob Herring
36724ba675SRob Herring	host1x@50000000 {
37724ba675SRob Herring		dsi@54300000 {
38724ba675SRob Herring			status = "okay";
39724ba675SRob Herring
40724ba675SRob Herring			avdd-dsi-csi-supply = <&vdd_1v2_ap>;
41724ba675SRob Herring
42724ba675SRob Herring			panel@0 {
43724ba675SRob Herring				compatible = "lg,lh500wx1-sd03";
44724ba675SRob Herring				reg = <0>;
45724ba675SRob Herring
46724ba675SRob Herring				power-supply = <&vdd_lcd>;
47724ba675SRob Herring				backlight = <&backlight>;
48724ba675SRob Herring			};
49724ba675SRob Herring		};
50724ba675SRob Herring	};
51724ba675SRob Herring
52724ba675SRob Herring	pinmux@70000868 {
53724ba675SRob Herring		pinctrl-names = "default";
54724ba675SRob Herring		pinctrl-0 = <&state_default>;
55724ba675SRob Herring
56724ba675SRob Herring		state_default: pinmux {
57724ba675SRob Herring			clk1_out_pw4 {
58724ba675SRob Herring				nvidia,pins = "clk1_out_pw4";
59724ba675SRob Herring				nvidia,function = "extperiph1";
60724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
61724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
62724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
63724ba675SRob Herring			};
64724ba675SRob Herring			dap1_din_pn1 {
65724ba675SRob Herring				nvidia,pins = "dap1_din_pn1";
66724ba675SRob Herring				nvidia,function = "i2s0";
67724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
68724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
69724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
70724ba675SRob Herring			};
71724ba675SRob Herring			dap1_dout_pn2 {
72724ba675SRob Herring				nvidia,pins = "dap1_dout_pn2",
73724ba675SRob Herring						"dap1_fs_pn0",
74724ba675SRob Herring						"dap1_sclk_pn3";
75724ba675SRob Herring				nvidia,function = "i2s0";
76724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
77724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
78724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
79724ba675SRob Herring			};
80724ba675SRob Herring			dap2_din_pa4 {
81724ba675SRob Herring				nvidia,pins = "dap2_din_pa4";
82724ba675SRob Herring				nvidia,function = "i2s1";
83724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
84724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
85724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
86724ba675SRob Herring			};
87724ba675SRob Herring			dap2_dout_pa5 {
88724ba675SRob Herring				nvidia,pins = "dap2_dout_pa5",
89724ba675SRob Herring						"dap2_fs_pa2",
90724ba675SRob Herring						"dap2_sclk_pa3";
91724ba675SRob Herring				nvidia,function = "i2s1";
92724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
93724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
94724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
95724ba675SRob Herring			};
96724ba675SRob Herring			dap4_din_pp5 {
97724ba675SRob Herring				nvidia,pins = "dap4_din_pp5",
98724ba675SRob Herring						"dap4_dout_pp6",
99724ba675SRob Herring						"dap4_fs_pp4",
100724ba675SRob Herring						"dap4_sclk_pp7";
101724ba675SRob Herring				nvidia,function = "i2s3";
102724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
103724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
104724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
105724ba675SRob Herring			};
106724ba675SRob Herring			dvfs_pwm_px0 {
107724ba675SRob Herring				nvidia,pins = "dvfs_pwm_px0",
108724ba675SRob Herring						"dvfs_clk_px2";
109724ba675SRob Herring				nvidia,function = "cldvfs";
110724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
111724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
112724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
113724ba675SRob Herring			};
114724ba675SRob Herring			ulpi_clk_py0 {
115724ba675SRob Herring				nvidia,pins = "ulpi_clk_py0",
116724ba675SRob Herring						"ulpi_data0_po1",
117724ba675SRob Herring						"ulpi_data1_po2",
118724ba675SRob Herring						"ulpi_data2_po3",
119724ba675SRob Herring						"ulpi_data3_po4",
120724ba675SRob Herring						"ulpi_data4_po5",
121724ba675SRob Herring						"ulpi_data5_po6",
122724ba675SRob Herring						"ulpi_data6_po7",
123724ba675SRob Herring						"ulpi_data7_po0";
124724ba675SRob Herring				nvidia,function = "ulpi";
125724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
126724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
127724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
128724ba675SRob Herring			};
129724ba675SRob Herring			ulpi_dir_py1 {
130724ba675SRob Herring				nvidia,pins = "ulpi_dir_py1",
131724ba675SRob Herring						"ulpi_nxt_py2";
132724ba675SRob Herring				nvidia,function = "ulpi";
133724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
134724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
135724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
136724ba675SRob Herring			};
137724ba675SRob Herring			ulpi_stp_py3 {
138724ba675SRob Herring				nvidia,pins = "ulpi_stp_py3";
139724ba675SRob Herring				nvidia,function = "ulpi";
140724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
141724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
142724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
143724ba675SRob Herring			};
144724ba675SRob Herring			cam_i2c_scl_pbb1 {
145724ba675SRob Herring				nvidia,pins = "cam_i2c_scl_pbb1",
146724ba675SRob Herring						"cam_i2c_sda_pbb2";
147724ba675SRob Herring				nvidia,function = "i2c3";
148724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
149724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
150724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
151724ba675SRob Herring				nvidia,lock = <TEGRA_PIN_DISABLE>;
152724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
153724ba675SRob Herring			};
154724ba675SRob Herring			cam_mclk_pcc0 {
155724ba675SRob Herring				nvidia,pins = "cam_mclk_pcc0",
156724ba675SRob Herring						"pbb0";
157724ba675SRob Herring				nvidia,function = "vi_alt3";
158724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
159724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
160724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
161724ba675SRob Herring				nvidia,lock = <TEGRA_PIN_DISABLE>;
162724ba675SRob Herring			};
163724ba675SRob Herring			pbb4 {
164724ba675SRob Herring				nvidia,pins = "pbb4";
165724ba675SRob Herring				nvidia,function = "vgp4";
166724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
167724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
168724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
169724ba675SRob Herring				nvidia,lock = <TEGRA_PIN_DISABLE>;
170724ba675SRob Herring			};
171724ba675SRob Herring			gen2_i2c_scl_pt5 {
172724ba675SRob Herring				nvidia,pins = "gen2_i2c_scl_pt5",
173724ba675SRob Herring						"gen2_i2c_sda_pt6";
174724ba675SRob Herring				nvidia,function = "i2c2";
175724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
176724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
177724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
178724ba675SRob Herring				nvidia,lock = <TEGRA_PIN_DISABLE>;
179724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
180724ba675SRob Herring			};
181724ba675SRob Herring			gmi_a16_pj7 {
182724ba675SRob Herring				nvidia,pins = "gmi_a16_pj7",
183724ba675SRob Herring						"gmi_a19_pk7";
184724ba675SRob Herring				nvidia,function = "uartd";
185724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
186724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
187724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
188724ba675SRob Herring			};
189724ba675SRob Herring			gmi_a17_pb0 {
190724ba675SRob Herring				nvidia,pins = "gmi_a17_pb0",
191724ba675SRob Herring						"gmi_a18_pb1";
192724ba675SRob Herring				nvidia,function = "uartd";
193724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
194724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
195724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
196724ba675SRob Herring			};
197724ba675SRob Herring			gmi_ad5_pg5 {
198724ba675SRob Herring				nvidia,pins = "gmi_ad5_pg5",
199724ba675SRob Herring						"gmi_wr_n_pi0";
200724ba675SRob Herring				nvidia,function = "spi4";
201724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
202724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
203724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
204724ba675SRob Herring			};
205724ba675SRob Herring			gmi_ad6_pg6 {
206724ba675SRob Herring				nvidia,pins = "gmi_ad6_pg6",
207724ba675SRob Herring						"gmi_ad7_pg7";
208724ba675SRob Herring				nvidia,function = "spi4";
209724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
210724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
211724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
212724ba675SRob Herring			};
213724ba675SRob Herring			gmi_ad12_ph4 {
214724ba675SRob Herring				nvidia,pins = "gmi_ad12_ph4";
215724ba675SRob Herring				nvidia,function = "rsvd4";
216724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
217724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
218724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
219724ba675SRob Herring			};
220724ba675SRob Herring			gmi_cs6_n_pi13 {
221724ba675SRob Herring				nvidia,pins = "gmi_cs6_n_pi3";
222724ba675SRob Herring				nvidia,function = "nand";
223724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
224724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
225724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
226724ba675SRob Herring			};
227724ba675SRob Herring			gmi_ad9_ph1 {
228724ba675SRob Herring				nvidia,pins = "gmi_ad9_ph1";
229724ba675SRob Herring				nvidia,function = "pwm1";
230724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
231724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
232724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
233724ba675SRob Herring			};
234724ba675SRob Herring			gmi_cs1_n_pj2 {
235724ba675SRob Herring				nvidia,pins = "gmi_cs1_n_pj2",
236724ba675SRob Herring						"gmi_oe_n_pi1";
237724ba675SRob Herring				nvidia,function = "soc";
238724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
239724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
240724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
241724ba675SRob Herring			};
242724ba675SRob Herring			gmi_rst_n_pi4 {
243724ba675SRob Herring				nvidia,pins = "gmi_rst_n_pi4";
244724ba675SRob Herring				nvidia,function = "gmi";
245724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
246724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
247724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
248724ba675SRob Herring			};
249724ba675SRob Herring			gmi_iordy_pi5 {
250724ba675SRob Herring				nvidia,pins = "gmi_iordy_pi5";
251724ba675SRob Herring				nvidia,function = "gmi";
252724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
253724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
254724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
255724ba675SRob Herring			};
256724ba675SRob Herring			clk2_out_pw5 {
257724ba675SRob Herring				nvidia,pins = "clk2_out_pw5";
258724ba675SRob Herring				nvidia,function = "extperiph2";
259724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
260724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
261724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
262724ba675SRob Herring			};
263724ba675SRob Herring			sdmmc1_clk_pz0 {
264724ba675SRob Herring				nvidia,pins = "sdmmc1_clk_pz0";
265724ba675SRob Herring				nvidia,function = "sdmmc1";
266724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
267724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
268724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
269724ba675SRob Herring			};
270724ba675SRob Herring			sdmmc1_cmd_pz1 {
271724ba675SRob Herring				nvidia,pins = "sdmmc1_cmd_pz1",
272724ba675SRob Herring						"sdmmc1_dat0_py7",
273724ba675SRob Herring						"sdmmc1_dat1_py6",
274724ba675SRob Herring						"sdmmc1_dat2_py5",
275724ba675SRob Herring						"sdmmc1_dat3_py4";
276724ba675SRob Herring				nvidia,function = "sdmmc1";
277724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
278724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
279724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
280724ba675SRob Herring			};
281724ba675SRob Herring			sdmmc3_clk_pa6 {
282724ba675SRob Herring				nvidia,pins = "sdmmc3_clk_pa6";
283724ba675SRob Herring				nvidia,function = "sdmmc3";
284724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
285724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
286724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
287724ba675SRob Herring			};
288724ba675SRob Herring			sdmmc3_cmd_pa7 {
289724ba675SRob Herring				nvidia,pins = "sdmmc3_cmd_pa7",
290724ba675SRob Herring						"sdmmc3_dat0_pb7",
291724ba675SRob Herring						"sdmmc3_dat1_pb6",
292724ba675SRob Herring						"sdmmc3_dat2_pb5",
293724ba675SRob Herring						"sdmmc3_dat3_pb4",
294724ba675SRob Herring						"sdmmc3_cd_n_pv2",
295724ba675SRob Herring						"sdmmc3_clk_lb_out_pee4",
296724ba675SRob Herring						"sdmmc3_clk_lb_in_pee5";
297724ba675SRob Herring				nvidia,function = "sdmmc3";
298724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
299724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
300724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
301724ba675SRob Herring			};
302724ba675SRob Herring			kb_col4_pq4 {
303724ba675SRob Herring				nvidia,pins = "kb_col4_pq4";
304724ba675SRob Herring				nvidia,function = "sdmmc3";
305724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
306724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
307724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
308724ba675SRob Herring			};
309724ba675SRob Herring			sdmmc4_clk_pcc4 {
310724ba675SRob Herring				nvidia,pins = "sdmmc4_clk_pcc4";
311724ba675SRob Herring				nvidia,function = "sdmmc4";
312724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
313724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
314724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
315724ba675SRob Herring			};
316724ba675SRob Herring			sdmmc4_cmd_pt7 {
317724ba675SRob Herring				nvidia,pins = "sdmmc4_cmd_pt7",
318724ba675SRob Herring						"sdmmc4_dat0_paa0",
319724ba675SRob Herring						"sdmmc4_dat1_paa1",
320724ba675SRob Herring						"sdmmc4_dat2_paa2",
321724ba675SRob Herring						"sdmmc4_dat3_paa3",
322724ba675SRob Herring						"sdmmc4_dat4_paa4",
323724ba675SRob Herring						"sdmmc4_dat5_paa5",
324724ba675SRob Herring						"sdmmc4_dat6_paa6",
325724ba675SRob Herring						"sdmmc4_dat7_paa7";
326724ba675SRob Herring				nvidia,function = "sdmmc4";
327724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
328724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
329724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
330724ba675SRob Herring			};
331724ba675SRob Herring			clk_32k_out_pa0 {
332724ba675SRob Herring				nvidia,pins = "clk_32k_out_pa0";
333724ba675SRob Herring				nvidia,function = "blink";
334724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
335724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
336724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
337724ba675SRob Herring			};
338724ba675SRob Herring			kb_col0_pq0 {
339724ba675SRob Herring				nvidia,pins = "kb_col0_pq0",
340724ba675SRob Herring						"kb_col1_pq1",
341724ba675SRob Herring						"kb_col2_pq2",
342724ba675SRob Herring						"kb_row0_pr0",
343724ba675SRob Herring						"kb_row1_pr1",
344724ba675SRob Herring						"kb_row2_pr2",
345724ba675SRob Herring						"kb_row8_ps0";
346724ba675SRob Herring				nvidia,function = "kbc";
347724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
348724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
349724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
350724ba675SRob Herring			};
351724ba675SRob Herring			kb_row7_pr7 {
352724ba675SRob Herring				nvidia,pins = "kb_row7_pr7";
353724ba675SRob Herring				nvidia,function = "rsvd2";
354724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
355724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
356724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
357724ba675SRob Herring			};
358724ba675SRob Herring			kb_row10_ps2 {
359724ba675SRob Herring				nvidia,pins = "kb_row10_ps2";
360724ba675SRob Herring				nvidia,function = "uarta";
361724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
362724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
363724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
364724ba675SRob Herring			};
365724ba675SRob Herring			kb_row9_ps1 {
366724ba675SRob Herring				nvidia,pins = "kb_row9_ps1";
367724ba675SRob Herring				nvidia,function = "uarta";
368724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
369724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
370724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
371724ba675SRob Herring			};
372724ba675SRob Herring			pwr_i2c_scl_pz6 {
373724ba675SRob Herring				nvidia,pins = "pwr_i2c_scl_pz6",
374724ba675SRob Herring						"pwr_i2c_sda_pz7";
375724ba675SRob Herring				nvidia,function = "i2cpwr";
376724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
377724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
378724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
379724ba675SRob Herring				nvidia,lock = <TEGRA_PIN_DISABLE>;
380724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
381724ba675SRob Herring			};
382724ba675SRob Herring			sys_clk_req_pz5 {
383724ba675SRob Herring				nvidia,pins = "sys_clk_req_pz5";
384724ba675SRob Herring				nvidia,function = "sysclk";
385724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
386724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
387724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
388724ba675SRob Herring			};
389724ba675SRob Herring			core_pwr_req {
390724ba675SRob Herring				nvidia,pins = "core_pwr_req";
391724ba675SRob Herring				nvidia,function = "pwron";
392724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
393724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
394724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
395724ba675SRob Herring			};
396724ba675SRob Herring			cpu_pwr_req {
397724ba675SRob Herring				nvidia,pins = "cpu_pwr_req";
398724ba675SRob Herring				nvidia,function = "cpu";
399724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
400724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
401724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
402724ba675SRob Herring			};
403724ba675SRob Herring			pwr_int_n {
404724ba675SRob Herring				nvidia,pins = "pwr_int_n";
405724ba675SRob Herring				nvidia,function = "pmi";
406724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
407724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
408724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
409724ba675SRob Herring			};
410724ba675SRob Herring			reset_out_n {
411724ba675SRob Herring				nvidia,pins = "reset_out_n";
412724ba675SRob Herring				nvidia,function = "reset_out_n";
413724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
414724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
415724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
416724ba675SRob Herring			};
417724ba675SRob Herring			clk3_out_pee0 {
418724ba675SRob Herring				nvidia,pins = "clk3_out_pee0";
419724ba675SRob Herring				nvidia,function = "extperiph3";
420724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
421724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
422724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
423724ba675SRob Herring			};
424724ba675SRob Herring			gen1_i2c_scl_pc4 {
425724ba675SRob Herring				nvidia,pins = "gen1_i2c_scl_pc4",
426724ba675SRob Herring						"gen1_i2c_sda_pc5";
427724ba675SRob Herring				nvidia,function = "i2c1";
428724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
429724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
430724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
431724ba675SRob Herring				nvidia,lock = <TEGRA_PIN_DISABLE>;
432724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
433724ba675SRob Herring			};
434724ba675SRob Herring			uart2_cts_n_pj5 {
435724ba675SRob Herring				nvidia,pins = "uart2_cts_n_pj5";
436724ba675SRob Herring				nvidia,function = "uartb";
437724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
438724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
439724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
440724ba675SRob Herring			};
441724ba675SRob Herring			uart2_rts_n_pj6 {
442724ba675SRob Herring				nvidia,pins = "uart2_rts_n_pj6";
443724ba675SRob Herring				nvidia,function = "uartb";
444724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
445724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
446724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
447724ba675SRob Herring			};
448724ba675SRob Herring			uart2_rxd_pc3 {
449724ba675SRob Herring				nvidia,pins = "uart2_rxd_pc3";
450724ba675SRob Herring				nvidia,function = "irda";
451724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
452724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
453724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
454724ba675SRob Herring			};
455724ba675SRob Herring			uart2_txd_pc2 {
456724ba675SRob Herring				nvidia,pins = "uart2_txd_pc2";
457724ba675SRob Herring				nvidia,function = "irda";
458724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
459724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
460724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
461724ba675SRob Herring			};
462724ba675SRob Herring			uart3_cts_n_pa1 {
463724ba675SRob Herring				nvidia,pins = "uart3_cts_n_pa1",
464724ba675SRob Herring						"uart3_rxd_pw7";
465724ba675SRob Herring				nvidia,function = "uartc";
466724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
467724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
468724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
469724ba675SRob Herring			};
470724ba675SRob Herring			uart3_rts_n_pc0 {
471724ba675SRob Herring				nvidia,pins = "uart3_rts_n_pc0",
472724ba675SRob Herring						"uart3_txd_pw6";
473724ba675SRob Herring				nvidia,function = "uartc";
474724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
475724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
476724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
477724ba675SRob Herring			};
478724ba675SRob Herring			owr {
479724ba675SRob Herring				nvidia,pins = "owr";
480724ba675SRob Herring				nvidia,function = "owr";
481724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
482724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
483724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
484724ba675SRob Herring			};
485724ba675SRob Herring			hdmi_cec_pee3 {
486724ba675SRob Herring				nvidia,pins = "hdmi_cec_pee3";
487724ba675SRob Herring				nvidia,function = "cec";
488724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
489724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
490724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
491724ba675SRob Herring				nvidia,lock = <TEGRA_PIN_DISABLE>;
492724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
493724ba675SRob Herring			};
494724ba675SRob Herring			ddc_scl_pv4 {
495724ba675SRob Herring				nvidia,pins = "ddc_scl_pv4",
496724ba675SRob Herring						"ddc_sda_pv5";
497724ba675SRob Herring				nvidia,function = "i2c4";
498724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
499724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
500724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
501724ba675SRob Herring				nvidia,lock = <TEGRA_PIN_DISABLE>;
502724ba675SRob Herring				nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
503724ba675SRob Herring			};
504724ba675SRob Herring			spdif_in_pk6 {
505724ba675SRob Herring				nvidia,pins = "spdif_in_pk6";
506724ba675SRob Herring				nvidia,function = "usb";
507724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
508724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
509724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
510724ba675SRob Herring				nvidia,lock = <TEGRA_PIN_DISABLE>;
511724ba675SRob Herring			};
512724ba675SRob Herring			usb_vbus_en0_pn4 {
513724ba675SRob Herring				nvidia,pins = "usb_vbus_en0_pn4";
514724ba675SRob Herring				nvidia,function = "usb";
515724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
516724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
517724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
518724ba675SRob Herring				nvidia,lock = <TEGRA_PIN_DISABLE>;
519724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
520724ba675SRob Herring			};
521724ba675SRob Herring			gpio_x6_aud_px6 {
522724ba675SRob Herring				nvidia,pins = "gpio_x6_aud_px6";
523724ba675SRob Herring				nvidia,function = "spi6";
524724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
525724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
526724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
527724ba675SRob Herring			};
528724ba675SRob Herring			gpio_x1_aud_px1 {
529724ba675SRob Herring				nvidia,pins = "gpio_x1_aud_px1";
530724ba675SRob Herring				nvidia,function = "rsvd2";
531724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
532724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
533724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
534724ba675SRob Herring			};
535724ba675SRob Herring			gpio_x7_aud_px7 {
536724ba675SRob Herring				nvidia,pins = "gpio_x7_aud_px7";
537724ba675SRob Herring				nvidia,function = "rsvd1";
538724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
539724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
540724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
541724ba675SRob Herring			};
542724ba675SRob Herring			gmi_adv_n_pk0 {
543724ba675SRob Herring				nvidia,pins = "gmi_adv_n_pk0";
544724ba675SRob Herring				nvidia,function = "gmi";
545724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
546724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
547724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
548724ba675SRob Herring			};
549724ba675SRob Herring			gmi_cs0_n_pj0 {
550724ba675SRob Herring				nvidia,pins = "gmi_cs0_n_pj0";
551724ba675SRob Herring				nvidia,function = "gmi";
552724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
553724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
554724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
555724ba675SRob Herring			};
556724ba675SRob Herring			pu3 {
557724ba675SRob Herring				nvidia,pins = "pu3";
558724ba675SRob Herring				nvidia,function = "pwm0";
559724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
560724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
561724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
562724ba675SRob Herring			};
563724ba675SRob Herring			gpio_x4_aud_px4 {
564724ba675SRob Herring				nvidia,pins = "gpio_x4_aud_px4",
565724ba675SRob Herring						"gpio_x5_aud_px5";
566724ba675SRob Herring				nvidia,function = "rsvd1";
567724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
568724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
569724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
570724ba675SRob Herring			};
571724ba675SRob Herring			gpio_x3_aud_px3 {
572724ba675SRob Herring				nvidia,pins = "gpio_x3_aud_px3";
573724ba675SRob Herring				nvidia,function = "rsvd4";
574724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
575724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
576724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
577724ba675SRob Herring			};
578724ba675SRob Herring			gpio_w2_aud_pw2 {
579724ba675SRob Herring				nvidia,pins = "gpio_w2_aud_pw2";
580724ba675SRob Herring				nvidia,function = "rsvd2";
581724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
582724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
583724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
584724ba675SRob Herring			};
585724ba675SRob Herring			gpio_w3_aud_pw3 {
586724ba675SRob Herring				nvidia,pins = "gpio_w3_aud_pw3";
587724ba675SRob Herring				nvidia,function = "spi6";
588724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
589724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
590724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
591724ba675SRob Herring			};
592724ba675SRob Herring			dap3_fs_pp0 {
593724ba675SRob Herring				nvidia,pins = "dap3_fs_pp0",
594724ba675SRob Herring						"dap3_din_pp1",
595724ba675SRob Herring						"dap3_dout_pp2",
596724ba675SRob Herring						"dap3_sclk_pp3";
597724ba675SRob Herring				nvidia,function = "i2s2";
598724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
599724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
600724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
601724ba675SRob Herring			};
602724ba675SRob Herring			pv0 {
603724ba675SRob Herring				nvidia,pins = "pv0";
604724ba675SRob Herring				nvidia,function = "rsvd4";
605724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
606724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
607724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
608724ba675SRob Herring			};
609724ba675SRob Herring			pv1 {
610724ba675SRob Herring				nvidia,pins = "pv1";
611724ba675SRob Herring				nvidia,function = "rsvd1";
612724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
613724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
614724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
615724ba675SRob Herring			};
616724ba675SRob Herring			pbb3 {
617724ba675SRob Herring				nvidia,pins = "pbb3",
618724ba675SRob Herring						"pbb5",
619724ba675SRob Herring						"pbb6",
620724ba675SRob Herring						"pbb7";
621724ba675SRob Herring				nvidia,function = "rsvd4";
622724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
623724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
624724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
625724ba675SRob Herring			};
626724ba675SRob Herring			pcc1 {
627724ba675SRob Herring				nvidia,pins = "pcc1",
628724ba675SRob Herring						"pcc2";
629724ba675SRob Herring				nvidia,function = "rsvd4";
630724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
631724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
632724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
633724ba675SRob Herring			};
634724ba675SRob Herring			gmi_ad0_pg0 {
635724ba675SRob Herring				nvidia,pins = "gmi_ad0_pg0",
636724ba675SRob Herring						"gmi_ad1_pg1";
637724ba675SRob Herring				nvidia,function = "gmi";
638724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
639724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
640724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
641724ba675SRob Herring			};
642724ba675SRob Herring			gmi_ad10_ph2 {
643724ba675SRob Herring				nvidia,pins = "gmi_ad10_ph2",
644724ba675SRob Herring						"gmi_ad12_ph4",
645724ba675SRob Herring						"gmi_ad15_ph7",
646724ba675SRob Herring						"gmi_cs3_n_pk4";
647724ba675SRob Herring				nvidia,function = "gmi";
648724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
649724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
650724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
651724ba675SRob Herring			};
652724ba675SRob Herring			gmi_ad11_ph3 {
653724ba675SRob Herring				nvidia,pins = "gmi_ad11_ph3",
654724ba675SRob Herring						"gmi_ad13_ph5",
655724ba675SRob Herring						"gmi_ad8_ph0",
656724ba675SRob Herring						"gmi_clk_pk1",
657724ba675SRob Herring						"gmi_cs2_n_pk3";
658724ba675SRob Herring				nvidia,function = "gmi";
659724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
660724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
661724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
662724ba675SRob Herring			};
663724ba675SRob Herring			gmi_ad14_ph6 {
664724ba675SRob Herring				nvidia,pins = "gmi_ad14_ph6",
665724ba675SRob Herring						"gmi_cs0_n_pj0",
666724ba675SRob Herring						"gmi_cs4_n_pk2",
667724ba675SRob Herring						"gmi_cs7_n_pi6",
668724ba675SRob Herring						"gmi_dqs_p_pj3",
669724ba675SRob Herring						"gmi_wp_n_pc7";
670724ba675SRob Herring				nvidia,function = "gmi";
671724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
672724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
673724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
674724ba675SRob Herring			};
675724ba675SRob Herring			gmi_ad2_pg2 {
676724ba675SRob Herring				nvidia,pins = "gmi_ad2_pg2",
677724ba675SRob Herring						"gmi_ad3_pg3";
678724ba675SRob Herring				nvidia,function = "gmi";
679724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
680724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
681724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
682724ba675SRob Herring			};
683724ba675SRob Herring			sdmmc1_wp_n_pv3 {
684724ba675SRob Herring				nvidia,pins = "sdmmc1_wp_n_pv3";
685724ba675SRob Herring				nvidia,function = "spi4";
686724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
687724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
688724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
689724ba675SRob Herring			};
690724ba675SRob Herring			clk2_req_pcc5 {
691724ba675SRob Herring				nvidia,pins = "clk2_req_pcc5";
692724ba675SRob Herring				nvidia,function = "rsvd4";
693724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
694724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
695724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
696724ba675SRob Herring			};
697724ba675SRob Herring			kb_col3_pq3 {
698724ba675SRob Herring				nvidia,pins = "kb_col3_pq3";
699724ba675SRob Herring				nvidia,function = "pwm2";
700724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
701724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
702724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
703724ba675SRob Herring			};
704724ba675SRob Herring			kb_col5_pq5 {
705724ba675SRob Herring				nvidia,pins = "kb_col5_pq5";
706724ba675SRob Herring				nvidia,function = "kbc";
707724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
708724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
709724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
710724ba675SRob Herring			};
711724ba675SRob Herring			kb_col6_pq6 {
712724ba675SRob Herring				nvidia,pins = "kb_col6_pq6",
713724ba675SRob Herring						"kb_col7_pq7";
714724ba675SRob Herring				nvidia,function = "kbc";
715724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
716724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
717724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
718724ba675SRob Herring			};
719724ba675SRob Herring			kb_row3_pr3 {
720724ba675SRob Herring				nvidia,pins = "kb_row3_pr3",
721724ba675SRob Herring						"kb_row4_pr4",
722724ba675SRob Herring						"kb_row6_pr6";
723724ba675SRob Herring				nvidia,function = "kbc";
724724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
725724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
726724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
727724ba675SRob Herring			};
728724ba675SRob Herring			clk3_req_pee1 {
729724ba675SRob Herring				nvidia,pins = "clk3_req_pee1";
730724ba675SRob Herring				nvidia,function = "rsvd4";
731724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
732724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
733724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
734724ba675SRob Herring			};
735724ba675SRob Herring			pu2 {
736724ba675SRob Herring				nvidia,pins = "pu2";
737724ba675SRob Herring				nvidia,function = "rsvd1";
738724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
739724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
740724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
741724ba675SRob Herring			};
742724ba675SRob Herring			hdmi_int_pn7 {
743724ba675SRob Herring				nvidia,pins = "hdmi_int_pn7";
744724ba675SRob Herring				nvidia,function = "rsvd1";
745724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
746724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
747724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
748724ba675SRob Herring			};
749724ba675SRob Herring
750724ba675SRob Herring			drive_sdio1 {
751724ba675SRob Herring				nvidia,pins = "drive_sdio1";
752724ba675SRob Herring				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
753724ba675SRob Herring				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
754724ba675SRob Herring				nvidia,pull-down-strength = <36>;
755724ba675SRob Herring				nvidia,pull-up-strength = <20>;
756724ba675SRob Herring				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
757724ba675SRob Herring				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
758724ba675SRob Herring			};
759724ba675SRob Herring			drive_sdio3 {
760724ba675SRob Herring				nvidia,pins = "drive_sdio3";
761724ba675SRob Herring				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
762724ba675SRob Herring				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
763724ba675SRob Herring				nvidia,pull-down-strength = <36>;
764724ba675SRob Herring				nvidia,pull-up-strength = <20>;
765724ba675SRob Herring				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
766724ba675SRob Herring				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
767724ba675SRob Herring			};
768724ba675SRob Herring			drive_gma {
769724ba675SRob Herring				nvidia,pins = "drive_gma";
770724ba675SRob Herring				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
771724ba675SRob Herring				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
772724ba675SRob Herring				nvidia,pull-down-strength = <2>;
773724ba675SRob Herring				nvidia,pull-up-strength = <2>;
774724ba675SRob Herring				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
775724ba675SRob Herring				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
776724ba675SRob Herring			};
777724ba675SRob Herring		};
778724ba675SRob Herring	};
779724ba675SRob Herring
780724ba675SRob Herring	/* Usable on reworked devices only */
781724ba675SRob Herring	serial@70006300 {
782*9766116aSThierry Reding		/delete-property/ dmas;
783*9766116aSThierry Reding		/delete-property/ dma-names;
784724ba675SRob Herring		status = "okay";
785724ba675SRob Herring	};
786724ba675SRob Herring
787724ba675SRob Herring	pwm@7000a000 {
788724ba675SRob Herring		status = "okay";
789724ba675SRob Herring	};
790724ba675SRob Herring
791724ba675SRob Herring	i2c@7000d000 {
792724ba675SRob Herring		status = "okay";
793724ba675SRob Herring		clock-frequency = <400000>;
794724ba675SRob Herring
795724ba675SRob Herring		regulator@43 {
796724ba675SRob Herring			compatible = "ti,tps51632";
797724ba675SRob Herring			reg = <0x43>;
798724ba675SRob Herring			regulator-name = "vdd-cpu";
799724ba675SRob Herring			regulator-min-microvolt = <500000>;
800724ba675SRob Herring			regulator-max-microvolt = <1520000>;
801724ba675SRob Herring			regulator-always-on;
802724ba675SRob Herring			regulator-boot-on;
803724ba675SRob Herring		};
804724ba675SRob Herring
805724ba675SRob Herring		palmas: pmic@58 {
806724ba675SRob Herring			compatible = "ti,tps65913", "ti,palmas";
807724ba675SRob Herring			reg = <0x58>;
808724ba675SRob Herring			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
809724ba675SRob Herring
810724ba675SRob Herring			#interrupt-cells = <2>;
811724ba675SRob Herring			interrupt-controller;
812724ba675SRob Herring
813724ba675SRob Herring			ti,system-power-controller;
814724ba675SRob Herring
815724ba675SRob Herring			palmas_gpio: gpio {
816724ba675SRob Herring				compatible = "ti,palmas-gpio";
817724ba675SRob Herring				gpio-controller;
818724ba675SRob Herring				#gpio-cells = <2>;
819724ba675SRob Herring			};
820724ba675SRob Herring
821724ba675SRob Herring			pmic {
822724ba675SRob Herring				compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
823724ba675SRob Herring
824724ba675SRob Herring				regulators {
825724ba675SRob Herring					smps12 {
826724ba675SRob Herring						regulator-name = "vdd-ddr";
827724ba675SRob Herring						regulator-min-microvolt = <1200000>;
828724ba675SRob Herring						regulator-max-microvolt = <1500000>;
829724ba675SRob Herring						regulator-always-on;
830724ba675SRob Herring						regulator-boot-on;
831724ba675SRob Herring					};
832724ba675SRob Herring
833724ba675SRob Herring					vdd_1v8: smps3 {
834724ba675SRob Herring						regulator-name = "vdd-1v8";
835724ba675SRob Herring						regulator-min-microvolt = <1800000>;
836724ba675SRob Herring						regulator-max-microvolt = <1800000>;
837724ba675SRob Herring						regulator-boot-on;
838724ba675SRob Herring					};
839724ba675SRob Herring
840724ba675SRob Herring					smps457 {
841724ba675SRob Herring						regulator-name = "vdd-soc";
842724ba675SRob Herring						regulator-min-microvolt = <900000>;
843724ba675SRob Herring						regulator-max-microvolt = <1400000>;
844724ba675SRob Herring						regulator-always-on;
845724ba675SRob Herring						regulator-boot-on;
846724ba675SRob Herring					};
847724ba675SRob Herring
848724ba675SRob Herring					smps8 {
849724ba675SRob Herring						regulator-name = "avdd-pll-1v05";
850724ba675SRob Herring						regulator-min-microvolt = <1050000>;
851724ba675SRob Herring						regulator-max-microvolt = <1050000>;
852724ba675SRob Herring						regulator-always-on;
853724ba675SRob Herring						regulator-boot-on;
854724ba675SRob Herring					};
855724ba675SRob Herring
856724ba675SRob Herring					smps9 {
857724ba675SRob Herring						regulator-name = "vdd-2v85-emmc";
858724ba675SRob Herring						regulator-min-microvolt = <2800000>;
859724ba675SRob Herring						regulator-max-microvolt = <2800000>;
860724ba675SRob Herring						regulator-always-on;
861724ba675SRob Herring					};
862724ba675SRob Herring
863724ba675SRob Herring					smps10_out1 {
864724ba675SRob Herring						regulator-name = "vdd-fan";
865724ba675SRob Herring						regulator-min-microvolt = <5000000>;
866724ba675SRob Herring						regulator-max-microvolt = <5000000>;
867724ba675SRob Herring						regulator-always-on;
868724ba675SRob Herring						regulator-boot-on;
869724ba675SRob Herring					};
870724ba675SRob Herring
871724ba675SRob Herring					smps10_out2 {
872724ba675SRob Herring						regulator-name = "vdd-5v0-sys";
873724ba675SRob Herring						regulator-min-microvolt = <5000000>;
874724ba675SRob Herring						regulator-max-microvolt = <5000000>;
875724ba675SRob Herring						regulator-always-on;
876724ba675SRob Herring						regulator-boot-on;
877724ba675SRob Herring					};
878724ba675SRob Herring
879724ba675SRob Herring					ldo2 {
880724ba675SRob Herring						regulator-name = "vdd-2v8-display";
881724ba675SRob Herring						regulator-min-microvolt = <2800000>;
882724ba675SRob Herring						regulator-max-microvolt = <2800000>;
883724ba675SRob Herring						regulator-always-on;
884724ba675SRob Herring						regulator-boot-on;
885724ba675SRob Herring					};
886724ba675SRob Herring
887724ba675SRob Herring					vdd_1v2_ap: ldo3 {
888724ba675SRob Herring						regulator-name = "avdd-1v2";
889724ba675SRob Herring						regulator-min-microvolt = <1200000>;
890724ba675SRob Herring						regulator-max-microvolt = <1200000>;
891724ba675SRob Herring						regulator-always-on;
892724ba675SRob Herring						regulator-boot-on;
893724ba675SRob Herring					};
894724ba675SRob Herring
895724ba675SRob Herring					ldo4 {
896724ba675SRob Herring						regulator-name = "vpp-fuse";
897724ba675SRob Herring						regulator-min-microvolt = <1800000>;
898724ba675SRob Herring						regulator-max-microvolt = <1800000>;
899724ba675SRob Herring					};
900724ba675SRob Herring
901724ba675SRob Herring					ldo5 {
902724ba675SRob Herring						regulator-name = "avdd-hdmi-pll";
903724ba675SRob Herring						regulator-min-microvolt = <1200000>;
904724ba675SRob Herring						regulator-max-microvolt = <1200000>;
905724ba675SRob Herring					};
906724ba675SRob Herring
907724ba675SRob Herring					ldo6 {
908724ba675SRob Herring						regulator-name = "vdd-sensor-2v8";
909724ba675SRob Herring						regulator-min-microvolt = <2850000>;
910724ba675SRob Herring						regulator-max-microvolt = <2850000>;
911724ba675SRob Herring					};
912724ba675SRob Herring
913724ba675SRob Herring					ldo8 {
914724ba675SRob Herring						regulator-name = "vdd-rtc";
915724ba675SRob Herring						regulator-min-microvolt = <1100000>;
916724ba675SRob Herring						regulator-max-microvolt = <1100000>;
917724ba675SRob Herring						regulator-always-on;
918724ba675SRob Herring						regulator-boot-on;
919724ba675SRob Herring						ti,enable-ldo8-tracking;
920724ba675SRob Herring					};
921724ba675SRob Herring
922724ba675SRob Herring					vddio_sdmmc3: ldo9 {
923724ba675SRob Herring						regulator-name = "vddio-sdmmc3";
924724ba675SRob Herring						regulator-min-microvolt = <1800000>;
925724ba675SRob Herring						regulator-max-microvolt = <3300000>;
926724ba675SRob Herring					};
927724ba675SRob Herring
928724ba675SRob Herring					ldousb {
929724ba675SRob Herring						regulator-name = "avdd-usb-hdmi";
930724ba675SRob Herring						regulator-min-microvolt = <3300000>;
931724ba675SRob Herring						regulator-max-microvolt = <3300000>;
932724ba675SRob Herring						regulator-always-on;
933724ba675SRob Herring						regulator-boot-on;
934724ba675SRob Herring					};
935724ba675SRob Herring
936724ba675SRob Herring					vdd_3v3_sys: regen1 {
937724ba675SRob Herring						regulator-name = "rail-3v3";
938724ba675SRob Herring						regulator-max-microvolt = <3300000>;
939724ba675SRob Herring						regulator-always-on;
940724ba675SRob Herring						regulator-boot-on;
941724ba675SRob Herring					};
942724ba675SRob Herring
943724ba675SRob Herring					regen2 {
944724ba675SRob Herring						regulator-name = "rail-5v0";
945724ba675SRob Herring						regulator-max-microvolt = <5000000>;
946724ba675SRob Herring						regulator-always-on;
947724ba675SRob Herring						regulator-boot-on;
948724ba675SRob Herring					};
949724ba675SRob Herring
950724ba675SRob Herring				};
951724ba675SRob Herring			};
952724ba675SRob Herring
953724ba675SRob Herring			rtc {
954724ba675SRob Herring				compatible = "ti,palmas-rtc";
955724ba675SRob Herring				interrupt-parent = <&palmas>;
956724ba675SRob Herring				interrupts = <8 0>;
957724ba675SRob Herring			};
958724ba675SRob Herring
959724ba675SRob Herring		};
960724ba675SRob Herring	};
961724ba675SRob Herring
962724ba675SRob Herring	pmc@7000e400 {
963724ba675SRob Herring		nvidia,invert-interrupt;
964724ba675SRob Herring	};
965724ba675SRob Herring
966724ba675SRob Herring	/* SD card */
967724ba675SRob Herring	mmc@78000400 {
968724ba675SRob Herring		status = "okay";
969724ba675SRob Herring		bus-width = <4>;
970724ba675SRob Herring		vqmmc-supply = <&vddio_sdmmc3>;
971724ba675SRob Herring		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
972724ba675SRob Herring		power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
973724ba675SRob Herring	};
974724ba675SRob Herring
975724ba675SRob Herring	/* eMMC */
976724ba675SRob Herring	mmc@78000600 {
977724ba675SRob Herring		status = "okay";
978724ba675SRob Herring		bus-width = <8>;
979724ba675SRob Herring		non-removable;
980724ba675SRob Herring	};
981724ba675SRob Herring
982724ba675SRob Herring	/* External USB port (must be powered) */
983724ba675SRob Herring	usb@7d000000 {
984724ba675SRob Herring		status = "okay";
985724ba675SRob Herring	};
986724ba675SRob Herring
987724ba675SRob Herring	usb-phy@7d000000 {
988724ba675SRob Herring		status = "okay";
989724ba675SRob Herring		nvidia,xcvr-setup = <7>;
990724ba675SRob Herring		nvidia,xcvr-lsfslew = <2>;
991724ba675SRob Herring		nvidia,xcvr-lsrslew = <2>;
992724ba675SRob Herring		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
993724ba675SRob Herring		/* Should be changed to "otg" once we have vbus_supply */
994724ba675SRob Herring		/* As of now, USB devices need to be powered externally */
995724ba675SRob Herring		dr_mode = "host";
996724ba675SRob Herring	};
997724ba675SRob Herring
998724ba675SRob Herring	/* SHIELD controller */
999724ba675SRob Herring	usb@7d008000 {
1000724ba675SRob Herring		status = "okay";
1001724ba675SRob Herring	};
1002724ba675SRob Herring
1003724ba675SRob Herring	usb-phy@7d008000 {
1004724ba675SRob Herring		status = "okay";
1005724ba675SRob Herring		nvidia,xcvr-setup = <7>;
1006724ba675SRob Herring		nvidia,xcvr-lsfslew = <2>;
1007724ba675SRob Herring		nvidia,xcvr-lsrslew = <2>;
1008724ba675SRob Herring	};
1009724ba675SRob Herring
1010724ba675SRob Herring	backlight: backlight {
1011724ba675SRob Herring		compatible = "pwm-backlight";
1012724ba675SRob Herring		pwms = <&pwm 1 40000>;
1013724ba675SRob Herring
1014724ba675SRob Herring		brightness-levels = <0 4 8 16 32 64 128 255>;
1015724ba675SRob Herring		default-brightness-level = <6>;
1016724ba675SRob Herring
1017724ba675SRob Herring		power-supply = <&lcd_bl_en>;
1018724ba675SRob Herring		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1019724ba675SRob Herring	};
1020724ba675SRob Herring
1021724ba675SRob Herring	clk32k_in: clock-32k {
1022724ba675SRob Herring		compatible = "fixed-clock";
1023724ba675SRob Herring		clock-frequency = <32768>;
1024724ba675SRob Herring		#clock-cells = <0>;
1025724ba675SRob Herring	};
1026724ba675SRob Herring
1027724ba675SRob Herring	gpio-keys {
1028724ba675SRob Herring		compatible = "gpio-keys";
1029724ba675SRob Herring
1030724ba675SRob Herring		key-back {
1031724ba675SRob Herring			label = "Back";
1032724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
1033724ba675SRob Herring			linux,code = <KEY_BACK>;
1034724ba675SRob Herring		};
1035724ba675SRob Herring
1036724ba675SRob Herring		key-home {
1037724ba675SRob Herring			label = "Home";
1038724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
1039724ba675SRob Herring			linux,code = <KEY_HOME>;
1040724ba675SRob Herring		};
1041724ba675SRob Herring
1042724ba675SRob Herring		key-power {
1043724ba675SRob Herring			label = "Power";
1044724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1045724ba675SRob Herring			linux,code = <KEY_POWER>;
1046724ba675SRob Herring			wakeup-source;
1047724ba675SRob Herring		};
1048724ba675SRob Herring	};
1049724ba675SRob Herring
1050724ba675SRob Herring	lcd_bl_en: regulator-lcden {
1051724ba675SRob Herring		compatible = "regulator-fixed";
1052724ba675SRob Herring		regulator-name = "lcd_bl_en";
1053724ba675SRob Herring		regulator-min-microvolt = <5000000>;
1054724ba675SRob Herring		regulator-max-microvolt = <5000000>;
1055724ba675SRob Herring		regulator-boot-on;
1056724ba675SRob Herring	};
1057724ba675SRob Herring
1058724ba675SRob Herring	vdd_lcd: regulator-lcd {
1059724ba675SRob Herring		compatible = "regulator-fixed";
1060724ba675SRob Herring		regulator-name = "vdd_lcd_1v8";
1061724ba675SRob Herring		regulator-min-microvolt = <1800000>;
1062724ba675SRob Herring		regulator-max-microvolt = <1800000>;
1063724ba675SRob Herring		vin-supply = <&vdd_1v8>;
1064724ba675SRob Herring		enable-active-high;
1065724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
1066724ba675SRob Herring		regulator-boot-on;
1067724ba675SRob Herring	};
1068724ba675SRob Herring
1069724ba675SRob Herring	regulator-1v8ts {
1070724ba675SRob Herring		compatible = "regulator-fixed";
1071724ba675SRob Herring		regulator-name = "vdd_1v8_ts";
1072724ba675SRob Herring		regulator-min-microvolt = <1800000>;
1073724ba675SRob Herring		regulator-max-microvolt = <1800000>;
1074724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_LOW>;
1075724ba675SRob Herring		regulator-boot-on;
1076724ba675SRob Herring	};
1077724ba675SRob Herring
1078724ba675SRob Herring	regulator-3v3ts {
1079724ba675SRob Herring		compatible = "regulator-fixed";
1080724ba675SRob Herring		regulator-name = "vdd_3v3_ts";
1081724ba675SRob Herring		regulator-min-microvolt = <3300000>;
1082724ba675SRob Herring		regulator-max-microvolt = <3300000>;
1083724ba675SRob Herring		enable-active-high;
1084724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
1085724ba675SRob Herring		regulator-boot-on;
1086724ba675SRob Herring	};
1087724ba675SRob Herring
1088724ba675SRob Herring	regulator-1v8com {
1089724ba675SRob Herring		compatible = "regulator-fixed";
1090724ba675SRob Herring		regulator-name = "vdd_1v8_com";
1091724ba675SRob Herring		regulator-min-microvolt = <1800000>;
1092724ba675SRob Herring		regulator-max-microvolt = <1800000>;
1093724ba675SRob Herring		vin-supply = <&vdd_1v8>;
1094724ba675SRob Herring		enable-active-high;
1095724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
1096724ba675SRob Herring		regulator-boot-on;
1097724ba675SRob Herring	};
1098724ba675SRob Herring
1099724ba675SRob Herring	regulator-3v3com {
1100724ba675SRob Herring		compatible = "regulator-fixed";
1101724ba675SRob Herring		regulator-name = "vdd_3v3_com";
1102724ba675SRob Herring		regulator-min-microvolt = <3300000>;
1103724ba675SRob Herring		regulator-max-microvolt = <3300000>;
1104724ba675SRob Herring		vin-supply = <&vdd_3v3_sys>;
1105724ba675SRob Herring		enable-active-high;
1106724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>;
1107724ba675SRob Herring		regulator-always-on;
1108724ba675SRob Herring		regulator-boot-on;
1109724ba675SRob Herring	};
1110724ba675SRob Herring};
1111