1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2*724ba675SRob Herring// Copyright 2021 Jonathan Neuschäfer
3*724ba675SRob Herring
4*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h>
5*724ba675SRob Herring
6*724ba675SRob Herring/ {
7*724ba675SRob Herring	compatible = "nuvoton,wpcm450";
8*724ba675SRob Herring	#address-cells = <1>;
9*724ba675SRob Herring	#size-cells = <1>;
10*724ba675SRob Herring
11*724ba675SRob Herring	aliases {
12*724ba675SRob Herring		gpio0 = &gpio0;
13*724ba675SRob Herring		gpio1 = &gpio1;
14*724ba675SRob Herring		gpio2 = &gpio2;
15*724ba675SRob Herring		gpio3 = &gpio3;
16*724ba675SRob Herring		gpio4 = &gpio4;
17*724ba675SRob Herring		gpio5 = &gpio5;
18*724ba675SRob Herring		gpio6 = &gpio6;
19*724ba675SRob Herring		gpio7 = &gpio7;
20*724ba675SRob Herring	};
21*724ba675SRob Herring
22*724ba675SRob Herring	cpus {
23*724ba675SRob Herring		#address-cells = <1>;
24*724ba675SRob Herring		#size-cells = <0>;
25*724ba675SRob Herring
26*724ba675SRob Herring		cpu@0 {
27*724ba675SRob Herring			compatible = "arm,arm926ej-s";
28*724ba675SRob Herring			device_type = "cpu";
29*724ba675SRob Herring			reg = <0>;
30*724ba675SRob Herring		};
31*724ba675SRob Herring	};
32*724ba675SRob Herring
33*724ba675SRob Herring	clk24m: clock-24mhz {
34*724ba675SRob Herring		/* 24 MHz dummy clock */
35*724ba675SRob Herring		compatible = "fixed-clock";
36*724ba675SRob Herring		clock-frequency = <24000000>;
37*724ba675SRob Herring		#clock-cells = <0>;
38*724ba675SRob Herring	};
39*724ba675SRob Herring
40*724ba675SRob Herring	refclk: clock-48mhz {
41*724ba675SRob Herring		/* 48 MHz reference oscillator */
42*724ba675SRob Herring		compatible = "fixed-clock";
43*724ba675SRob Herring		clock-output-names = "ref";
44*724ba675SRob Herring		clock-frequency = <48000000>;
45*724ba675SRob Herring		#clock-cells = <0>;
46*724ba675SRob Herring	};
47*724ba675SRob Herring
48*724ba675SRob Herring	soc {
49*724ba675SRob Herring		compatible = "simple-bus";
50*724ba675SRob Herring		#address-cells = <1>;
51*724ba675SRob Herring		#size-cells = <1>;
52*724ba675SRob Herring		interrupt-parent = <&aic>;
53*724ba675SRob Herring		ranges;
54*724ba675SRob Herring
55*724ba675SRob Herring		gcr: syscon@b0000000 {
56*724ba675SRob Herring			compatible = "nuvoton,wpcm450-gcr", "syscon", "simple-mfd";
57*724ba675SRob Herring			reg = <0xb0000000 0x200>;
58*724ba675SRob Herring		};
59*724ba675SRob Herring
60*724ba675SRob Herring		clk: clock-controller@b0000200 {
61*724ba675SRob Herring			compatible = "nuvoton,wpcm450-clk";
62*724ba675SRob Herring			reg = <0xb0000200 0x100>;
63*724ba675SRob Herring			clocks = <&refclk>;
64*724ba675SRob Herring			clock-names = "ref";
65*724ba675SRob Herring			#clock-cells = <1>;
66*724ba675SRob Herring			#reset-cells = <1>;
67*724ba675SRob Herring		};
68*724ba675SRob Herring
69*724ba675SRob Herring		serial0: serial@b8000000 {
70*724ba675SRob Herring			compatible = "nuvoton,wpcm450-uart";
71*724ba675SRob Herring			reg = <0xb8000000 0x20>;
72*724ba675SRob Herring			reg-shift = <2>;
73*724ba675SRob Herring			interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
74*724ba675SRob Herring			clocks = <&clk24m>;
75*724ba675SRob Herring			pinctrl-names = "default";
76*724ba675SRob Herring			pinctrl-0 = <&bsp_pins>;
77*724ba675SRob Herring			status = "disabled";
78*724ba675SRob Herring		};
79*724ba675SRob Herring
80*724ba675SRob Herring		serial1: serial@b8000100 {
81*724ba675SRob Herring			compatible = "nuvoton,wpcm450-uart";
82*724ba675SRob Herring			reg = <0xb8000100 0x20>;
83*724ba675SRob Herring			reg-shift = <2>;
84*724ba675SRob Herring			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
85*724ba675SRob Herring			clocks = <&clk24m>;
86*724ba675SRob Herring			status = "disabled";
87*724ba675SRob Herring		};
88*724ba675SRob Herring
89*724ba675SRob Herring		timer0: timer@b8001000 {
90*724ba675SRob Herring			compatible = "nuvoton,wpcm450-timer";
91*724ba675SRob Herring			interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
92*724ba675SRob Herring			reg = <0xb8001000 0x1c>;
93*724ba675SRob Herring			clocks = <&clk24m>;
94*724ba675SRob Herring		};
95*724ba675SRob Herring
96*724ba675SRob Herring		watchdog0: watchdog@b800101c {
97*724ba675SRob Herring			compatible = "nuvoton,wpcm450-wdt";
98*724ba675SRob Herring			interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
99*724ba675SRob Herring			reg = <0xb800101c 0x4>;
100*724ba675SRob Herring			clocks = <&clk24m>;
101*724ba675SRob Herring		};
102*724ba675SRob Herring
103*724ba675SRob Herring		aic: interrupt-controller@b8002000 {
104*724ba675SRob Herring			compatible = "nuvoton,wpcm450-aic";
105*724ba675SRob Herring			reg = <0xb8002000 0x1000>;
106*724ba675SRob Herring			interrupt-controller;
107*724ba675SRob Herring			#interrupt-cells = <2>;
108*724ba675SRob Herring		};
109*724ba675SRob Herring
110*724ba675SRob Herring		pinctrl: pinctrl@b8003000 {
111*724ba675SRob Herring			compatible = "nuvoton,wpcm450-pinctrl";
112*724ba675SRob Herring			reg = <0xb8003000 0x1000>;
113*724ba675SRob Herring			#address-cells = <1>;
114*724ba675SRob Herring			#size-cells = <0>;
115*724ba675SRob Herring
116*724ba675SRob Herring			gpio0: gpio@0 {
117*724ba675SRob Herring				reg = <0>;
118*724ba675SRob Herring				gpio-controller;
119*724ba675SRob Herring				#gpio-cells = <2>;
120*724ba675SRob Herring				interrupts = <2 IRQ_TYPE_LEVEL_HIGH>,
121*724ba675SRob Herring					     <3 IRQ_TYPE_LEVEL_HIGH>,
122*724ba675SRob Herring					     <4 IRQ_TYPE_LEVEL_HIGH>;
123*724ba675SRob Herring				interrupt-controller;
124*724ba675SRob Herring			};
125*724ba675SRob Herring
126*724ba675SRob Herring			gpio1: gpio@1 {
127*724ba675SRob Herring				reg = <1>;
128*724ba675SRob Herring				gpio-controller;
129*724ba675SRob Herring				#gpio-cells = <2>;
130*724ba675SRob Herring				interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
131*724ba675SRob Herring				interrupt-controller;
132*724ba675SRob Herring			};
133*724ba675SRob Herring
134*724ba675SRob Herring			gpio2: gpio@2 {
135*724ba675SRob Herring				reg = <2>;
136*724ba675SRob Herring				gpio-controller;
137*724ba675SRob Herring				#gpio-cells = <2>;
138*724ba675SRob Herring			};
139*724ba675SRob Herring
140*724ba675SRob Herring			gpio3: gpio@3 {
141*724ba675SRob Herring				reg = <3>;
142*724ba675SRob Herring				gpio-controller;
143*724ba675SRob Herring				#gpio-cells = <2>;
144*724ba675SRob Herring			};
145*724ba675SRob Herring
146*724ba675SRob Herring			gpio4: gpio@4 {
147*724ba675SRob Herring				reg = <4>;
148*724ba675SRob Herring				gpio-controller;
149*724ba675SRob Herring				#gpio-cells = <2>;
150*724ba675SRob Herring			};
151*724ba675SRob Herring
152*724ba675SRob Herring			gpio5: gpio@5 {
153*724ba675SRob Herring				reg = <5>;
154*724ba675SRob Herring				gpio-controller;
155*724ba675SRob Herring				#gpio-cells = <2>;
156*724ba675SRob Herring			};
157*724ba675SRob Herring
158*724ba675SRob Herring			gpio6: gpio@6 {
159*724ba675SRob Herring				reg = <6>;
160*724ba675SRob Herring				gpio-controller;
161*724ba675SRob Herring				#gpio-cells = <2>;
162*724ba675SRob Herring			};
163*724ba675SRob Herring
164*724ba675SRob Herring			gpio7: gpio@7 {
165*724ba675SRob Herring				reg = <7>;
166*724ba675SRob Herring				gpio-controller;
167*724ba675SRob Herring				#gpio-cells = <2>;
168*724ba675SRob Herring			};
169*724ba675SRob Herring
170*724ba675SRob Herring			smb3_pins: mux-smb3 {
171*724ba675SRob Herring				groups = "smb3";
172*724ba675SRob Herring				function = "smb3";
173*724ba675SRob Herring			};
174*724ba675SRob Herring
175*724ba675SRob Herring			smb4_pins: mux-smb4 {
176*724ba675SRob Herring				groups = "smb4";
177*724ba675SRob Herring				function = "smb4";
178*724ba675SRob Herring			};
179*724ba675SRob Herring
180*724ba675SRob Herring			smb5_pins: mux-smb5 {
181*724ba675SRob Herring				groups = "smb5";
182*724ba675SRob Herring				function = "smb5";
183*724ba675SRob Herring			};
184*724ba675SRob Herring
185*724ba675SRob Herring			scs1_pins: mux-scs1 {
186*724ba675SRob Herring				groups = "scs1";
187*724ba675SRob Herring				function = "scs1";
188*724ba675SRob Herring			};
189*724ba675SRob Herring
190*724ba675SRob Herring			scs2_pins: mux-scs2 {
191*724ba675SRob Herring				groups = "scs2";
192*724ba675SRob Herring				function = "scs2";
193*724ba675SRob Herring			};
194*724ba675SRob Herring
195*724ba675SRob Herring			scs3_pins: mux-scs3 {
196*724ba675SRob Herring				groups = "scs3";
197*724ba675SRob Herring				function = "scs3";
198*724ba675SRob Herring			};
199*724ba675SRob Herring
200*724ba675SRob Herring			smb0_pins: mux-smb0 {
201*724ba675SRob Herring				groups = "smb0";
202*724ba675SRob Herring				function = "smb0";
203*724ba675SRob Herring			};
204*724ba675SRob Herring
205*724ba675SRob Herring			smb1_pins: mux-smb1 {
206*724ba675SRob Herring				groups = "smb1";
207*724ba675SRob Herring				function = "smb1";
208*724ba675SRob Herring			};
209*724ba675SRob Herring
210*724ba675SRob Herring			smb2_pins: mux-smb2 {
211*724ba675SRob Herring				groups = "smb2";
212*724ba675SRob Herring				function = "smb2";
213*724ba675SRob Herring			};
214*724ba675SRob Herring
215*724ba675SRob Herring			bsp_pins: mux-bsp {
216*724ba675SRob Herring				groups = "bsp";
217*724ba675SRob Herring				function = "bsp";
218*724ba675SRob Herring			};
219*724ba675SRob Herring
220*724ba675SRob Herring			hsp1_pins: mux-hsp1 {
221*724ba675SRob Herring				groups = "hsp1";
222*724ba675SRob Herring				function = "hsp1";
223*724ba675SRob Herring			};
224*724ba675SRob Herring
225*724ba675SRob Herring			hsp2_pins: mux-hsp2 {
226*724ba675SRob Herring				groups = "hsp2";
227*724ba675SRob Herring				function = "hsp2";
228*724ba675SRob Herring			};
229*724ba675SRob Herring
230*724ba675SRob Herring			r1err_pins: mux-r1err {
231*724ba675SRob Herring				groups = "r1err";
232*724ba675SRob Herring				function = "r1err";
233*724ba675SRob Herring			};
234*724ba675SRob Herring
235*724ba675SRob Herring			r1md_pins: mux-r1md {
236*724ba675SRob Herring				groups = "r1md";
237*724ba675SRob Herring				function = "r1md";
238*724ba675SRob Herring			};
239*724ba675SRob Herring
240*724ba675SRob Herring			rmii2_pins: mux-rmii2 {
241*724ba675SRob Herring				groups = "rmii2";
242*724ba675SRob Herring				function = "rmii2";
243*724ba675SRob Herring			};
244*724ba675SRob Herring
245*724ba675SRob Herring			r2err_pins: mux-r2err {
246*724ba675SRob Herring				groups = "r2err";
247*724ba675SRob Herring				function = "r2err";
248*724ba675SRob Herring			};
249*724ba675SRob Herring
250*724ba675SRob Herring			r2md_pins: mux-r2md {
251*724ba675SRob Herring				groups = "r2md";
252*724ba675SRob Herring				function = "r2md";
253*724ba675SRob Herring			};
254*724ba675SRob Herring
255*724ba675SRob Herring			kbcc_pins: mux-kbcc {
256*724ba675SRob Herring				groups = "kbcc";
257*724ba675SRob Herring				function = "kbcc";
258*724ba675SRob Herring			};
259*724ba675SRob Herring
260*724ba675SRob Herring			dvo0_pins: mux-dvo0 {
261*724ba675SRob Herring				groups = "dvo";
262*724ba675SRob Herring				function = "dvo0";
263*724ba675SRob Herring			};
264*724ba675SRob Herring
265*724ba675SRob Herring			dvo3_pins: mux-dvo3 {
266*724ba675SRob Herring				groups = "dvo";
267*724ba675SRob Herring				function = "dvo3";
268*724ba675SRob Herring			};
269*724ba675SRob Herring
270*724ba675SRob Herring			clko_pins: mux-clko {
271*724ba675SRob Herring				groups = "clko";
272*724ba675SRob Herring				function = "clko";
273*724ba675SRob Herring			};
274*724ba675SRob Herring
275*724ba675SRob Herring			smi_pins: mux-smi {
276*724ba675SRob Herring				groups = "smi";
277*724ba675SRob Herring				function = "smi";
278*724ba675SRob Herring			};
279*724ba675SRob Herring
280*724ba675SRob Herring			uinc_pins: mux-uinc {
281*724ba675SRob Herring				groups = "uinc";
282*724ba675SRob Herring				function = "uinc";
283*724ba675SRob Herring			};
284*724ba675SRob Herring
285*724ba675SRob Herring			gspi_pins: mux-gspi {
286*724ba675SRob Herring				groups = "gspi";
287*724ba675SRob Herring				function = "gspi";
288*724ba675SRob Herring			};
289*724ba675SRob Herring
290*724ba675SRob Herring			mben_pins: mux-mben {
291*724ba675SRob Herring				groups = "mben";
292*724ba675SRob Herring				function = "mben";
293*724ba675SRob Herring			};
294*724ba675SRob Herring
295*724ba675SRob Herring			xcs2_pins: mux-xcs2 {
296*724ba675SRob Herring				groups = "xcs2";
297*724ba675SRob Herring				function = "xcs2";
298*724ba675SRob Herring			};
299*724ba675SRob Herring
300*724ba675SRob Herring			xcs1_pins: mux-xcs1 {
301*724ba675SRob Herring				groups = "xcs1";
302*724ba675SRob Herring				function = "xcs1";
303*724ba675SRob Herring			};
304*724ba675SRob Herring
305*724ba675SRob Herring			sdio_pins: mux-sdio {
306*724ba675SRob Herring				groups = "sdio";
307*724ba675SRob Herring				function = "sdio";
308*724ba675SRob Herring			};
309*724ba675SRob Herring
310*724ba675SRob Herring			sspi_pins: mux-sspi {
311*724ba675SRob Herring				groups = "sspi";
312*724ba675SRob Herring				function = "sspi";
313*724ba675SRob Herring			};
314*724ba675SRob Herring
315*724ba675SRob Herring			fi0_pins: mux-fi0 {
316*724ba675SRob Herring				groups = "fi0";
317*724ba675SRob Herring				function = "fi0";
318*724ba675SRob Herring			};
319*724ba675SRob Herring
320*724ba675SRob Herring			fi1_pins: mux-fi1 {
321*724ba675SRob Herring				groups = "fi1";
322*724ba675SRob Herring				function = "fi1";
323*724ba675SRob Herring			};
324*724ba675SRob Herring
325*724ba675SRob Herring			fi2_pins: mux-fi2 {
326*724ba675SRob Herring				groups = "fi2";
327*724ba675SRob Herring				function = "fi2";
328*724ba675SRob Herring			};
329*724ba675SRob Herring
330*724ba675SRob Herring			fi3_pins: mux-fi3 {
331*724ba675SRob Herring				groups = "fi3";
332*724ba675SRob Herring				function = "fi3";
333*724ba675SRob Herring			};
334*724ba675SRob Herring
335*724ba675SRob Herring			fi4_pins: mux-fi4 {
336*724ba675SRob Herring				groups = "fi4";
337*724ba675SRob Herring				function = "fi4";
338*724ba675SRob Herring			};
339*724ba675SRob Herring
340*724ba675SRob Herring			fi5_pins: mux-fi5 {
341*724ba675SRob Herring				groups = "fi5";
342*724ba675SRob Herring				function = "fi5";
343*724ba675SRob Herring			};
344*724ba675SRob Herring
345*724ba675SRob Herring			fi6_pins: mux-fi6 {
346*724ba675SRob Herring				groups = "fi6";
347*724ba675SRob Herring				function = "fi6";
348*724ba675SRob Herring			};
349*724ba675SRob Herring
350*724ba675SRob Herring			fi7_pins: mux-fi7 {
351*724ba675SRob Herring				groups = "fi7";
352*724ba675SRob Herring				function = "fi7";
353*724ba675SRob Herring			};
354*724ba675SRob Herring
355*724ba675SRob Herring			fi8_pins: mux-fi8 {
356*724ba675SRob Herring				groups = "fi8";
357*724ba675SRob Herring				function = "fi8";
358*724ba675SRob Herring			};
359*724ba675SRob Herring
360*724ba675SRob Herring			fi9_pins: mux-fi9 {
361*724ba675SRob Herring				groups = "fi9";
362*724ba675SRob Herring				function = "fi9";
363*724ba675SRob Herring			};
364*724ba675SRob Herring
365*724ba675SRob Herring			fi10_pins: mux-fi10 {
366*724ba675SRob Herring				groups = "fi10";
367*724ba675SRob Herring				function = "fi10";
368*724ba675SRob Herring			};
369*724ba675SRob Herring
370*724ba675SRob Herring			fi11_pins: mux-fi11 {
371*724ba675SRob Herring				groups = "fi11";
372*724ba675SRob Herring				function = "fi11";
373*724ba675SRob Herring			};
374*724ba675SRob Herring
375*724ba675SRob Herring			fi12_pins: mux-fi12 {
376*724ba675SRob Herring				groups = "fi12";
377*724ba675SRob Herring				function = "fi12";
378*724ba675SRob Herring			};
379*724ba675SRob Herring
380*724ba675SRob Herring			fi13_pins: mux-fi13 {
381*724ba675SRob Herring				groups = "fi13";
382*724ba675SRob Herring				function = "fi13";
383*724ba675SRob Herring			};
384*724ba675SRob Herring
385*724ba675SRob Herring			fi14_pins: mux-fi14 {
386*724ba675SRob Herring				groups = "fi14";
387*724ba675SRob Herring				function = "fi14";
388*724ba675SRob Herring			};
389*724ba675SRob Herring
390*724ba675SRob Herring			fi15_pins: mux-fi15 {
391*724ba675SRob Herring				groups = "fi15";
392*724ba675SRob Herring				function = "fi15";
393*724ba675SRob Herring			};
394*724ba675SRob Herring
395*724ba675SRob Herring			pwm0_pins: mux-pwm0 {
396*724ba675SRob Herring				groups = "pwm0";
397*724ba675SRob Herring				function = "pwm0";
398*724ba675SRob Herring			};
399*724ba675SRob Herring
400*724ba675SRob Herring			pwm1_pins: mux-pwm1 {
401*724ba675SRob Herring				groups = "pwm1";
402*724ba675SRob Herring				function = "pwm1";
403*724ba675SRob Herring			};
404*724ba675SRob Herring
405*724ba675SRob Herring			pwm2_pins: mux-pwm2 {
406*724ba675SRob Herring				groups = "pwm2";
407*724ba675SRob Herring				function = "pwm2";
408*724ba675SRob Herring			};
409*724ba675SRob Herring
410*724ba675SRob Herring			pwm3_pins: mux-pwm3 {
411*724ba675SRob Herring				groups = "pwm3";
412*724ba675SRob Herring				function = "pwm3";
413*724ba675SRob Herring			};
414*724ba675SRob Herring
415*724ba675SRob Herring			pwm4_pins: mux-pwm4 {
416*724ba675SRob Herring				groups = "pwm4";
417*724ba675SRob Herring				function = "pwm4";
418*724ba675SRob Herring			};
419*724ba675SRob Herring
420*724ba675SRob Herring			pwm5_pins: mux-pwm5 {
421*724ba675SRob Herring				groups = "pwm5";
422*724ba675SRob Herring				function = "pwm5";
423*724ba675SRob Herring			};
424*724ba675SRob Herring
425*724ba675SRob Herring			pwm6_pins: mux-pwm6 {
426*724ba675SRob Herring				groups = "pwm6";
427*724ba675SRob Herring				function = "pwm6";
428*724ba675SRob Herring			};
429*724ba675SRob Herring
430*724ba675SRob Herring			pwm7_pins: mux-pwm7 {
431*724ba675SRob Herring				groups = "pwm7";
432*724ba675SRob Herring				function = "pwm7";
433*724ba675SRob Herring			};
434*724ba675SRob Herring
435*724ba675SRob Herring			hg0_pins: mux-hg0 {
436*724ba675SRob Herring				groups = "hg0";
437*724ba675SRob Herring				function = "hg0";
438*724ba675SRob Herring			};
439*724ba675SRob Herring
440*724ba675SRob Herring			hg1_pins: mux-hg1 {
441*724ba675SRob Herring				groups = "hg1";
442*724ba675SRob Herring				function = "hg1";
443*724ba675SRob Herring			};
444*724ba675SRob Herring
445*724ba675SRob Herring			hg2_pins: mux-hg2 {
446*724ba675SRob Herring				groups = "hg2";
447*724ba675SRob Herring				function = "hg2";
448*724ba675SRob Herring			};
449*724ba675SRob Herring
450*724ba675SRob Herring			hg3_pins: mux-hg3 {
451*724ba675SRob Herring				groups = "hg3";
452*724ba675SRob Herring				function = "hg3";
453*724ba675SRob Herring			};
454*724ba675SRob Herring
455*724ba675SRob Herring			hg4_pins: mux-hg4 {
456*724ba675SRob Herring				groups = "hg4";
457*724ba675SRob Herring				function = "hg4";
458*724ba675SRob Herring			};
459*724ba675SRob Herring
460*724ba675SRob Herring			hg5_pins: mux-hg5 {
461*724ba675SRob Herring				groups = "hg5";
462*724ba675SRob Herring				function = "hg5";
463*724ba675SRob Herring			};
464*724ba675SRob Herring
465*724ba675SRob Herring			hg6_pins: mux-hg6 {
466*724ba675SRob Herring				groups = "hg6";
467*724ba675SRob Herring				function = "hg6";
468*724ba675SRob Herring			};
469*724ba675SRob Herring
470*724ba675SRob Herring			hg7_pins: mux-hg7 {
471*724ba675SRob Herring				groups = "hg7";
472*724ba675SRob Herring				function = "hg7";
473*724ba675SRob Herring			};
474*724ba675SRob Herring		};
475*724ba675SRob Herring
476*724ba675SRob Herring		fiu: spi-controller@c8000000 {
477*724ba675SRob Herring			compatible = "nuvoton,wpcm450-fiu";
478*724ba675SRob Herring			#address-cells = <1>;
479*724ba675SRob Herring			#size-cells = <0>;
480*724ba675SRob Herring			reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>;
481*724ba675SRob Herring			reg-names = "control", "memory";
482*724ba675SRob Herring			clocks = <&clk 0>;
483*724ba675SRob Herring			nuvoton,shm = <&shm>;
484*724ba675SRob Herring			status = "disabled";
485*724ba675SRob Herring		};
486*724ba675SRob Herring
487*724ba675SRob Herring		shm: syscon@c8001000 {
488*724ba675SRob Herring			compatible = "nuvoton,wpcm450-shm", "syscon";
489*724ba675SRob Herring			reg = <0xc8001000 0x1000>;
490*724ba675SRob Herring			reg-io-width = <1>;
491*724ba675SRob Herring		};
492*724ba675SRob Herring	};
493*724ba675SRob Herring};
494