1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*724ba675SRob Herring/* 3*724ba675SRob Herring * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2014 Atmel, 6*724ba675SRob Herring * 2014 Nicolas Ferre <nicolas.ferre@atmel.com> 7*724ba675SRob Herring */ 8*724ba675SRob Herring 9*724ba675SRob Herring#include <dt-bindings/clock/at91.h> 10*724ba675SRob Herring#include <dt-bindings/dma/at91.h> 11*724ba675SRob Herring#include <dt-bindings/mfd/at91-usart.h> 12*724ba675SRob Herring#include <dt-bindings/pinctrl/at91.h> 13*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 14*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 15*724ba675SRob Herring 16*724ba675SRob Herring/ { 17*724ba675SRob Herring #address-cells = <1>; 18*724ba675SRob Herring #size-cells = <1>; 19*724ba675SRob Herring model = "Atmel SAMA5D4 family SoC"; 20*724ba675SRob Herring compatible = "atmel,sama5d4"; 21*724ba675SRob Herring interrupt-parent = <&aic>; 22*724ba675SRob Herring 23*724ba675SRob Herring aliases { 24*724ba675SRob Herring serial0 = &usart3; 25*724ba675SRob Herring serial1 = &usart4; 26*724ba675SRob Herring serial2 = &usart2; 27*724ba675SRob Herring serial3 = &usart0; 28*724ba675SRob Herring serial4 = &usart1; 29*724ba675SRob Herring serial5 = &uart0; 30*724ba675SRob Herring serial6 = &uart1; 31*724ba675SRob Herring gpio0 = &pioA; 32*724ba675SRob Herring gpio1 = &pioB; 33*724ba675SRob Herring gpio2 = &pioC; 34*724ba675SRob Herring gpio3 = &pioD; 35*724ba675SRob Herring gpio4 = &pioE; 36*724ba675SRob Herring pwm0 = &pwm0; 37*724ba675SRob Herring ssc0 = &ssc0; 38*724ba675SRob Herring ssc1 = &ssc1; 39*724ba675SRob Herring tcb0 = &tcb0; 40*724ba675SRob Herring tcb1 = &tcb1; 41*724ba675SRob Herring i2c0 = &i2c0; 42*724ba675SRob Herring i2c1 = &i2c1; 43*724ba675SRob Herring i2c2 = &i2c2; 44*724ba675SRob Herring }; 45*724ba675SRob Herring cpus { 46*724ba675SRob Herring #address-cells = <1>; 47*724ba675SRob Herring #size-cells = <0>; 48*724ba675SRob Herring 49*724ba675SRob Herring cpu@0 { 50*724ba675SRob Herring device_type = "cpu"; 51*724ba675SRob Herring compatible = "arm,cortex-a5"; 52*724ba675SRob Herring reg = <0>; 53*724ba675SRob Herring next-level-cache = <&L2>; 54*724ba675SRob Herring }; 55*724ba675SRob Herring }; 56*724ba675SRob Herring 57*724ba675SRob Herring memory@20000000 { 58*724ba675SRob Herring device_type = "memory"; 59*724ba675SRob Herring reg = <0x20000000 0x20000000>; 60*724ba675SRob Herring }; 61*724ba675SRob Herring 62*724ba675SRob Herring clocks { 63*724ba675SRob Herring slow_xtal: slow_xtal { 64*724ba675SRob Herring compatible = "fixed-clock"; 65*724ba675SRob Herring #clock-cells = <0>; 66*724ba675SRob Herring clock-frequency = <0>; 67*724ba675SRob Herring }; 68*724ba675SRob Herring 69*724ba675SRob Herring main_xtal: main_xtal { 70*724ba675SRob Herring compatible = "fixed-clock"; 71*724ba675SRob Herring #clock-cells = <0>; 72*724ba675SRob Herring clock-frequency = <0>; 73*724ba675SRob Herring }; 74*724ba675SRob Herring 75*724ba675SRob Herring adc_op_clk: adc_op_clk { 76*724ba675SRob Herring compatible = "fixed-clock"; 77*724ba675SRob Herring #clock-cells = <0>; 78*724ba675SRob Herring clock-frequency = <1000000>; 79*724ba675SRob Herring }; 80*724ba675SRob Herring }; 81*724ba675SRob Herring 82*724ba675SRob Herring ns_sram: sram@210000 { 83*724ba675SRob Herring compatible = "mmio-sram"; 84*724ba675SRob Herring reg = <0x00210000 0x10000>; 85*724ba675SRob Herring #address-cells = <1>; 86*724ba675SRob Herring #size-cells = <1>; 87*724ba675SRob Herring ranges = <0 0x00210000 0x10000>; 88*724ba675SRob Herring }; 89*724ba675SRob Herring 90*724ba675SRob Herring ahb { 91*724ba675SRob Herring compatible = "simple-bus"; 92*724ba675SRob Herring #address-cells = <1>; 93*724ba675SRob Herring #size-cells = <1>; 94*724ba675SRob Herring ranges; 95*724ba675SRob Herring 96*724ba675SRob Herring nfc_sram: sram@100000 { 97*724ba675SRob Herring compatible = "mmio-sram"; 98*724ba675SRob Herring no-memory-wc; 99*724ba675SRob Herring reg = <0x100000 0x2400>; 100*724ba675SRob Herring #address-cells = <1>; 101*724ba675SRob Herring #size-cells = <1>; 102*724ba675SRob Herring ranges = <0 0x100000 0x2400>; 103*724ba675SRob Herring }; 104*724ba675SRob Herring 105*724ba675SRob Herring vdec0: vdec@300000 { 106*724ba675SRob Herring compatible = "microchip,sama5d4-vdec"; 107*724ba675SRob Herring reg = <0x00300000 0x100000>; 108*724ba675SRob Herring interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; 109*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 110*724ba675SRob Herring }; 111*724ba675SRob Herring 112*724ba675SRob Herring usb0: gadget@400000 { 113*724ba675SRob Herring compatible = "atmel,sama5d3-udc"; 114*724ba675SRob Herring reg = <0x00400000 0x100000 115*724ba675SRob Herring 0xfc02c000 0x4000>; 116*724ba675SRob Herring interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>; 117*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE PMC_UTMI>; 118*724ba675SRob Herring clock-names = "pclk", "hclk"; 119*724ba675SRob Herring status = "disabled"; 120*724ba675SRob Herring }; 121*724ba675SRob Herring 122*724ba675SRob Herring usb1: ohci@500000 { 123*724ba675SRob Herring compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 124*724ba675SRob Herring reg = <0x00500000 0x100000>; 125*724ba675SRob Herring interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>; 126*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 6>; 127*724ba675SRob Herring clock-names = "ohci_clk", "hclk", "uhpck"; 128*724ba675SRob Herring status = "disabled"; 129*724ba675SRob Herring }; 130*724ba675SRob Herring 131*724ba675SRob Herring usb2: ehci@600000 { 132*724ba675SRob Herring compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 133*724ba675SRob Herring reg = <0x00600000 0x100000>; 134*724ba675SRob Herring interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>; 135*724ba675SRob Herring clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>; 136*724ba675SRob Herring clock-names = "usb_clk", "ehci_clk"; 137*724ba675SRob Herring status = "disabled"; 138*724ba675SRob Herring }; 139*724ba675SRob Herring 140*724ba675SRob Herring L2: cache-controller@a00000 { 141*724ba675SRob Herring compatible = "arm,pl310-cache"; 142*724ba675SRob Herring reg = <0x00a00000 0x1000>; 143*724ba675SRob Herring interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>; 144*724ba675SRob Herring cache-unified; 145*724ba675SRob Herring cache-level = <2>; 146*724ba675SRob Herring }; 147*724ba675SRob Herring 148*724ba675SRob Herring ebi: ebi@10000000 { 149*724ba675SRob Herring compatible = "atmel,sama5d3-ebi"; 150*724ba675SRob Herring #address-cells = <2>; 151*724ba675SRob Herring #size-cells = <1>; 152*724ba675SRob Herring atmel,smc = <&hsmc>; 153*724ba675SRob Herring reg = <0x10000000 0x10000000 154*724ba675SRob Herring 0x60000000 0x28000000>; 155*724ba675SRob Herring ranges = <0x0 0x0 0x10000000 0x10000000 156*724ba675SRob Herring 0x1 0x0 0x60000000 0x10000000 157*724ba675SRob Herring 0x2 0x0 0x70000000 0x10000000 158*724ba675SRob Herring 0x3 0x0 0x80000000 0x8000000>; 159*724ba675SRob Herring clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 160*724ba675SRob Herring status = "disabled"; 161*724ba675SRob Herring 162*724ba675SRob Herring nand_controller: nand-controller { 163*724ba675SRob Herring compatible = "atmel,sama5d3-nand-controller"; 164*724ba675SRob Herring atmel,nfc-sram = <&nfc_sram>; 165*724ba675SRob Herring atmel,nfc-io = <&nfc_io>; 166*724ba675SRob Herring ecc-engine = <&pmecc>; 167*724ba675SRob Herring #address-cells = <2>; 168*724ba675SRob Herring #size-cells = <1>; 169*724ba675SRob Herring ranges; 170*724ba675SRob Herring status = "disabled"; 171*724ba675SRob Herring }; 172*724ba675SRob Herring }; 173*724ba675SRob Herring 174*724ba675SRob Herring nfc_io: nfc-io@90000000 { 175*724ba675SRob Herring compatible = "atmel,sama5d3-nfc-io", "syscon"; 176*724ba675SRob Herring reg = <0x90000000 0x8000000>; 177*724ba675SRob Herring }; 178*724ba675SRob Herring 179*724ba675SRob Herring apb { 180*724ba675SRob Herring compatible = "simple-bus"; 181*724ba675SRob Herring #address-cells = <1>; 182*724ba675SRob Herring #size-cells = <1>; 183*724ba675SRob Herring ranges; 184*724ba675SRob Herring 185*724ba675SRob Herring hlcdc: hlcdc@f0000000 { 186*724ba675SRob Herring compatible = "atmel,sama5d4-hlcdc"; 187*724ba675SRob Herring reg = <0xf0000000 0x4000>; 188*724ba675SRob Herring interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>; 189*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>; 190*724ba675SRob Herring clock-names = "periph_clk","sys_clk", "slow_clk"; 191*724ba675SRob Herring status = "disabled"; 192*724ba675SRob Herring 193*724ba675SRob Herring hlcdc-display-controller { 194*724ba675SRob Herring compatible = "atmel,hlcdc-display-controller"; 195*724ba675SRob Herring #address-cells = <1>; 196*724ba675SRob Herring #size-cells = <0>; 197*724ba675SRob Herring 198*724ba675SRob Herring port@0 { 199*724ba675SRob Herring #address-cells = <1>; 200*724ba675SRob Herring #size-cells = <0>; 201*724ba675SRob Herring reg = <0>; 202*724ba675SRob Herring }; 203*724ba675SRob Herring }; 204*724ba675SRob Herring 205*724ba675SRob Herring hlcdc_pwm: hlcdc-pwm { 206*724ba675SRob Herring compatible = "atmel,hlcdc-pwm"; 207*724ba675SRob Herring pinctrl-names = "default"; 208*724ba675SRob Herring pinctrl-0 = <&pinctrl_lcd_pwm>; 209*724ba675SRob Herring #pwm-cells = <3>; 210*724ba675SRob Herring }; 211*724ba675SRob Herring }; 212*724ba675SRob Herring 213*724ba675SRob Herring dma1: dma-controller@f0004000 { 214*724ba675SRob Herring compatible = "atmel,sama5d4-dma"; 215*724ba675SRob Herring reg = <0xf0004000 0x200>; 216*724ba675SRob Herring interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>; 217*724ba675SRob Herring #dma-cells = <1>; 218*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 50>; 219*724ba675SRob Herring clock-names = "dma_clk"; 220*724ba675SRob Herring }; 221*724ba675SRob Herring 222*724ba675SRob Herring isi: isi@f0008000 { 223*724ba675SRob Herring compatible = "atmel,at91sam9g45-isi"; 224*724ba675SRob Herring reg = <0xf0008000 0x4000>; 225*724ba675SRob Herring interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>; 226*724ba675SRob Herring pinctrl-names = "default"; 227*724ba675SRob Herring pinctrl-0 = <&pinctrl_isi_data_0_7>; 228*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 52>; 229*724ba675SRob Herring clock-names = "isi_clk"; 230*724ba675SRob Herring status = "disabled"; 231*724ba675SRob Herring port { 232*724ba675SRob Herring #address-cells = <1>; 233*724ba675SRob Herring #size-cells = <0>; 234*724ba675SRob Herring }; 235*724ba675SRob Herring }; 236*724ba675SRob Herring 237*724ba675SRob Herring ramc0: ramc@f0010000 { 238*724ba675SRob Herring compatible = "atmel,sama5d3-ddramc"; 239*724ba675SRob Herring reg = <0xf0010000 0x200>; 240*724ba675SRob Herring clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 16>; 241*724ba675SRob Herring clock-names = "ddrck", "mpddr"; 242*724ba675SRob Herring }; 243*724ba675SRob Herring 244*724ba675SRob Herring dma0: dma-controller@f0014000 { 245*724ba675SRob Herring compatible = "atmel,sama5d4-dma"; 246*724ba675SRob Herring reg = <0xf0014000 0x200>; 247*724ba675SRob Herring interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>; 248*724ba675SRob Herring #dma-cells = <1>; 249*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 250*724ba675SRob Herring clock-names = "dma_clk"; 251*724ba675SRob Herring }; 252*724ba675SRob Herring 253*724ba675SRob Herring pmc: clock-controller@f0018000 { 254*724ba675SRob Herring compatible = "atmel,sama5d4-pmc", "syscon"; 255*724ba675SRob Herring reg = <0xf0018000 0x120>; 256*724ba675SRob Herring interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 257*724ba675SRob Herring #clock-cells = <2>; 258*724ba675SRob Herring clocks = <&clk32k>, <&main_xtal>; 259*724ba675SRob Herring clock-names = "slow_clk", "main_xtal"; 260*724ba675SRob Herring }; 261*724ba675SRob Herring 262*724ba675SRob Herring mmc0: mmc@f8000000 { 263*724ba675SRob Herring compatible = "atmel,hsmci"; 264*724ba675SRob Herring reg = <0xf8000000 0x600>; 265*724ba675SRob Herring interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>; 266*724ba675SRob Herring dmas = <&dma1 267*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 268*724ba675SRob Herring | AT91_XDMAC_DT_PERID(0))>; 269*724ba675SRob Herring dma-names = "rxtx"; 270*724ba675SRob Herring pinctrl-names = "default"; 271*724ba675SRob Herring pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>; 272*724ba675SRob Herring status = "disabled"; 273*724ba675SRob Herring #address-cells = <1>; 274*724ba675SRob Herring #size-cells = <0>; 275*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 35>; 276*724ba675SRob Herring clock-names = "mci_clk"; 277*724ba675SRob Herring }; 278*724ba675SRob Herring 279*724ba675SRob Herring uart0: serial@f8004000 { 280*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 281*724ba675SRob Herring reg = <0xf8004000 0x100>; 282*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 283*724ba675SRob Herring interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>; 284*724ba675SRob Herring dmas = <&dma0 285*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 286*724ba675SRob Herring | AT91_XDMAC_DT_PERID(22))>, 287*724ba675SRob Herring <&dma0 288*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 289*724ba675SRob Herring | AT91_XDMAC_DT_PERID(23))>; 290*724ba675SRob Herring dma-names = "tx", "rx"; 291*724ba675SRob Herring pinctrl-names = "default"; 292*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart0>; 293*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 27>; 294*724ba675SRob Herring clock-names = "usart"; 295*724ba675SRob Herring status = "disabled"; 296*724ba675SRob Herring }; 297*724ba675SRob Herring 298*724ba675SRob Herring ssc0: ssc@f8008000 { 299*724ba675SRob Herring compatible = "atmel,at91sam9g45-ssc"; 300*724ba675SRob Herring reg = <0xf8008000 0x4000>; 301*724ba675SRob Herring interrupts = <48 IRQ_TYPE_LEVEL_HIGH 0>; 302*724ba675SRob Herring pinctrl-names = "default"; 303*724ba675SRob Herring pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 304*724ba675SRob Herring dmas = <&dma1 305*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 306*724ba675SRob Herring | AT91_XDMAC_DT_PERID(26))>, 307*724ba675SRob Herring <&dma1 308*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 309*724ba675SRob Herring | AT91_XDMAC_DT_PERID(27))>; 310*724ba675SRob Herring dma-names = "tx", "rx"; 311*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 48>; 312*724ba675SRob Herring clock-names = "pclk"; 313*724ba675SRob Herring status = "disabled"; 314*724ba675SRob Herring }; 315*724ba675SRob Herring 316*724ba675SRob Herring pwm0: pwm@f800c000 { 317*724ba675SRob Herring compatible = "atmel,sama5d3-pwm"; 318*724ba675SRob Herring reg = <0xf800c000 0x300>; 319*724ba675SRob Herring interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>; 320*724ba675SRob Herring #pwm-cells = <3>; 321*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 43>; 322*724ba675SRob Herring status = "disabled"; 323*724ba675SRob Herring }; 324*724ba675SRob Herring 325*724ba675SRob Herring spi0: spi@f8010000 { 326*724ba675SRob Herring #address-cells = <1>; 327*724ba675SRob Herring #size-cells = <0>; 328*724ba675SRob Herring compatible = "atmel,at91rm9200-spi"; 329*724ba675SRob Herring reg = <0xf8010000 0x100>; 330*724ba675SRob Herring interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>; 331*724ba675SRob Herring dmas = <&dma1 332*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 333*724ba675SRob Herring | AT91_XDMAC_DT_PERID(10))>, 334*724ba675SRob Herring <&dma1 335*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 336*724ba675SRob Herring | AT91_XDMAC_DT_PERID(11))>; 337*724ba675SRob Herring dma-names = "tx", "rx"; 338*724ba675SRob Herring pinctrl-names = "default"; 339*724ba675SRob Herring pinctrl-0 = <&pinctrl_spi0>; 340*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; 341*724ba675SRob Herring clock-names = "spi_clk"; 342*724ba675SRob Herring status = "disabled"; 343*724ba675SRob Herring }; 344*724ba675SRob Herring 345*724ba675SRob Herring i2c0: i2c@f8014000 { 346*724ba675SRob Herring compatible = "atmel,sama5d4-i2c"; 347*724ba675SRob Herring reg = <0xf8014000 0x4000>; 348*724ba675SRob Herring interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>; 349*724ba675SRob Herring dmas = <&dma1 350*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 351*724ba675SRob Herring | AT91_XDMAC_DT_PERID(2))>, 352*724ba675SRob Herring <&dma1 353*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 354*724ba675SRob Herring | AT91_XDMAC_DT_PERID(3))>; 355*724ba675SRob Herring dma-names = "tx", "rx"; 356*724ba675SRob Herring pinctrl-names = "default", "gpio"; 357*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c0>; 358*724ba675SRob Herring pinctrl-1 = <&pinctrl_i2c0_gpio>; 359*724ba675SRob Herring sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>; 360*724ba675SRob Herring scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 361*724ba675SRob Herring #address-cells = <1>; 362*724ba675SRob Herring #size-cells = <0>; 363*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 32>; 364*724ba675SRob Herring status = "disabled"; 365*724ba675SRob Herring }; 366*724ba675SRob Herring 367*724ba675SRob Herring i2c1: i2c@f8018000 { 368*724ba675SRob Herring compatible = "atmel,sama5d4-i2c"; 369*724ba675SRob Herring reg = <0xf8018000 0x4000>; 370*724ba675SRob Herring interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>; 371*724ba675SRob Herring dmas = <&dma0 372*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 373*724ba675SRob Herring | AT91_XDMAC_DT_PERID(4))>, 374*724ba675SRob Herring <&dma0 375*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 376*724ba675SRob Herring | AT91_XDMAC_DT_PERID(5))>; 377*724ba675SRob Herring dma-names = "tx", "rx"; 378*724ba675SRob Herring pinctrl-names = "default", "gpio"; 379*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 380*724ba675SRob Herring pinctrl-1 = <&pinctrl_i2c1_gpio>; 381*724ba675SRob Herring sda-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>; 382*724ba675SRob Herring scl-gpios = <&pioE 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 383*724ba675SRob Herring #address-cells = <1>; 384*724ba675SRob Herring #size-cells = <0>; 385*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 33>; 386*724ba675SRob Herring status = "disabled"; 387*724ba675SRob Herring }; 388*724ba675SRob Herring 389*724ba675SRob Herring tcb0: timer@f801c000 { 390*724ba675SRob Herring compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; 391*724ba675SRob Herring #address-cells = <1>; 392*724ba675SRob Herring #size-cells = <0>; 393*724ba675SRob Herring reg = <0xf801c000 0x100>; 394*724ba675SRob Herring interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>; 395*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 40>, <&clk32k>; 396*724ba675SRob Herring clock-names = "t0_clk", "slow_clk"; 397*724ba675SRob Herring }; 398*724ba675SRob Herring 399*724ba675SRob Herring macb0: ethernet@f8020000 { 400*724ba675SRob Herring compatible = "atmel,sama5d4-gem"; 401*724ba675SRob Herring reg = <0xf8020000 0x100>; 402*724ba675SRob Herring interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>; 403*724ba675SRob Herring pinctrl-names = "default"; 404*724ba675SRob Herring pinctrl-0 = <&pinctrl_macb0_rmii>; 405*724ba675SRob Herring #address-cells = <1>; 406*724ba675SRob Herring #size-cells = <0>; 407*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_PERIPHERAL 54>; 408*724ba675SRob Herring clock-names = "hclk", "pclk"; 409*724ba675SRob Herring status = "disabled"; 410*724ba675SRob Herring }; 411*724ba675SRob Herring 412*724ba675SRob Herring i2c2: i2c@f8024000 { 413*724ba675SRob Herring compatible = "atmel,sama5d4-i2c"; 414*724ba675SRob Herring reg = <0xf8024000 0x4000>; 415*724ba675SRob Herring interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>; 416*724ba675SRob Herring dmas = <&dma1 417*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 418*724ba675SRob Herring | AT91_XDMAC_DT_PERID(6))>, 419*724ba675SRob Herring <&dma1 420*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 421*724ba675SRob Herring | AT91_XDMAC_DT_PERID(7))>; 422*724ba675SRob Herring dma-names = "tx", "rx"; 423*724ba675SRob Herring pinctrl-names = "default", "gpio"; 424*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 425*724ba675SRob Herring pinctrl-1 = <&pinctrl_i2c2_gpio>; 426*724ba675SRob Herring sda-gpios = <&pioB 29 GPIO_ACTIVE_HIGH>; 427*724ba675SRob Herring scl-gpios = <&pioB 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 428*724ba675SRob Herring #address-cells = <1>; 429*724ba675SRob Herring #size-cells = <0>; 430*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 34>; 431*724ba675SRob Herring status = "disabled"; 432*724ba675SRob Herring }; 433*724ba675SRob Herring 434*724ba675SRob Herring sfr: sfr@f8028000 { 435*724ba675SRob Herring compatible = "atmel,sama5d4-sfr", "syscon"; 436*724ba675SRob Herring reg = <0xf8028000 0x60>; 437*724ba675SRob Herring }; 438*724ba675SRob Herring 439*724ba675SRob Herring usart0: serial@f802c000 { 440*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 441*724ba675SRob Herring reg = <0xf802c000 0x100>; 442*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 443*724ba675SRob Herring interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 444*724ba675SRob Herring dmas = <&dma0 445*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 446*724ba675SRob Herring | AT91_XDMAC_DT_PERID(36))>, 447*724ba675SRob Herring <&dma0 448*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 449*724ba675SRob Herring | AT91_XDMAC_DT_PERID(37))>; 450*724ba675SRob Herring dma-names = "tx", "rx"; 451*724ba675SRob Herring pinctrl-names = "default"; 452*724ba675SRob Herring pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>; 453*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 454*724ba675SRob Herring clock-names = "usart"; 455*724ba675SRob Herring status = "disabled"; 456*724ba675SRob Herring }; 457*724ba675SRob Herring 458*724ba675SRob Herring usart1: serial@f8030000 { 459*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 460*724ba675SRob Herring reg = <0xf8030000 0x100>; 461*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 462*724ba675SRob Herring interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 463*724ba675SRob Herring dmas = <&dma0 464*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 465*724ba675SRob Herring | AT91_XDMAC_DT_PERID(38))>, 466*724ba675SRob Herring <&dma0 467*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 468*724ba675SRob Herring | AT91_XDMAC_DT_PERID(39))>; 469*724ba675SRob Herring dma-names = "tx", "rx"; 470*724ba675SRob Herring pinctrl-names = "default"; 471*724ba675SRob Herring pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>; 472*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 473*724ba675SRob Herring clock-names = "usart"; 474*724ba675SRob Herring status = "disabled"; 475*724ba675SRob Herring }; 476*724ba675SRob Herring 477*724ba675SRob Herring mmc1: mmc@fc000000 { 478*724ba675SRob Herring compatible = "atmel,hsmci"; 479*724ba675SRob Herring reg = <0xfc000000 0x600>; 480*724ba675SRob Herring interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; 481*724ba675SRob Herring dmas = <&dma1 482*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 483*724ba675SRob Herring | AT91_XDMAC_DT_PERID(1))>; 484*724ba675SRob Herring dma-names = "rxtx"; 485*724ba675SRob Herring pinctrl-names = "default"; 486*724ba675SRob Herring pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; 487*724ba675SRob Herring status = "disabled"; 488*724ba675SRob Herring #address-cells = <1>; 489*724ba675SRob Herring #size-cells = <0>; 490*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 36>; 491*724ba675SRob Herring clock-names = "mci_clk"; 492*724ba675SRob Herring }; 493*724ba675SRob Herring 494*724ba675SRob Herring uart1: serial@fc004000 { 495*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 496*724ba675SRob Herring reg = <0xfc004000 0x100>; 497*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 498*724ba675SRob Herring interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>; 499*724ba675SRob Herring dmas = <&dma0 500*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 501*724ba675SRob Herring | AT91_XDMAC_DT_PERID(24))>, 502*724ba675SRob Herring <&dma0 503*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 504*724ba675SRob Herring | AT91_XDMAC_DT_PERID(25))>; 505*724ba675SRob Herring dma-names = "tx", "rx"; 506*724ba675SRob Herring pinctrl-names = "default"; 507*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart1>; 508*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 28>; 509*724ba675SRob Herring clock-names = "usart"; 510*724ba675SRob Herring status = "disabled"; 511*724ba675SRob Herring }; 512*724ba675SRob Herring 513*724ba675SRob Herring usart2: serial@fc008000 { 514*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 515*724ba675SRob Herring reg = <0xfc008000 0x100>; 516*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 517*724ba675SRob Herring interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; 518*724ba675SRob Herring dmas = <&dma1 519*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 520*724ba675SRob Herring | AT91_XDMAC_DT_PERID(16))>, 521*724ba675SRob Herring <&dma1 522*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 523*724ba675SRob Herring | AT91_XDMAC_DT_PERID(17))>; 524*724ba675SRob Herring dma-names = "tx", "rx"; 525*724ba675SRob Herring pinctrl-names = "default"; 526*724ba675SRob Herring pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>; 527*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 29>; 528*724ba675SRob Herring clock-names = "usart"; 529*724ba675SRob Herring status = "disabled"; 530*724ba675SRob Herring }; 531*724ba675SRob Herring 532*724ba675SRob Herring usart3: serial@fc00c000 { 533*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 534*724ba675SRob Herring reg = <0xfc00c000 0x100>; 535*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 536*724ba675SRob Herring interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>; 537*724ba675SRob Herring dmas = <&dma1 538*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 539*724ba675SRob Herring | AT91_XDMAC_DT_PERID(18))>, 540*724ba675SRob Herring <&dma1 541*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 542*724ba675SRob Herring | AT91_XDMAC_DT_PERID(19))>; 543*724ba675SRob Herring dma-names = "tx", "rx"; 544*724ba675SRob Herring pinctrl-names = "default"; 545*724ba675SRob Herring pinctrl-0 = <&pinctrl_usart3>; 546*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 30>; 547*724ba675SRob Herring clock-names = "usart"; 548*724ba675SRob Herring status = "disabled"; 549*724ba675SRob Herring }; 550*724ba675SRob Herring 551*724ba675SRob Herring usart4: serial@fc010000 { 552*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 553*724ba675SRob Herring reg = <0xfc010000 0x100>; 554*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 555*724ba675SRob Herring interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>; 556*724ba675SRob Herring dmas = <&dma1 557*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 558*724ba675SRob Herring | AT91_XDMAC_DT_PERID(20))>, 559*724ba675SRob Herring <&dma1 560*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 561*724ba675SRob Herring | AT91_XDMAC_DT_PERID(21))>; 562*724ba675SRob Herring dma-names = "tx", "rx"; 563*724ba675SRob Herring pinctrl-names = "default"; 564*724ba675SRob Herring pinctrl-0 = <&pinctrl_usart4>; 565*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 31>; 566*724ba675SRob Herring clock-names = "usart"; 567*724ba675SRob Herring status = "disabled"; 568*724ba675SRob Herring }; 569*724ba675SRob Herring 570*724ba675SRob Herring ssc1: ssc@fc014000 { 571*724ba675SRob Herring compatible = "atmel,at91sam9g45-ssc"; 572*724ba675SRob Herring reg = <0xfc014000 0x4000>; 573*724ba675SRob Herring interrupts = <49 IRQ_TYPE_LEVEL_HIGH 0>; 574*724ba675SRob Herring pinctrl-names = "default"; 575*724ba675SRob Herring pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 576*724ba675SRob Herring dmas = <&dma1 577*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 578*724ba675SRob Herring | AT91_XDMAC_DT_PERID(28))>, 579*724ba675SRob Herring <&dma1 580*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 581*724ba675SRob Herring | AT91_XDMAC_DT_PERID(29))>; 582*724ba675SRob Herring dma-names = "tx", "rx"; 583*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 49>; 584*724ba675SRob Herring clock-names = "pclk"; 585*724ba675SRob Herring status = "disabled"; 586*724ba675SRob Herring }; 587*724ba675SRob Herring 588*724ba675SRob Herring spi1: spi@fc018000 { 589*724ba675SRob Herring #address-cells = <1>; 590*724ba675SRob Herring #size-cells = <0>; 591*724ba675SRob Herring compatible = "atmel,at91rm9200-spi"; 592*724ba675SRob Herring reg = <0xfc018000 0x100>; 593*724ba675SRob Herring interrupts = <38 IRQ_TYPE_LEVEL_HIGH 3>; 594*724ba675SRob Herring dmas = <&dma1 595*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 596*724ba675SRob Herring | AT91_XDMAC_DT_PERID(12))>, 597*724ba675SRob Herring <&dma1 598*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 599*724ba675SRob Herring | AT91_XDMAC_DT_PERID(13))>; 600*724ba675SRob Herring dma-names = "tx", "rx"; 601*724ba675SRob Herring pinctrl-names = "default"; 602*724ba675SRob Herring pinctrl-0 = <&pinctrl_spi1>; 603*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; 604*724ba675SRob Herring clock-names = "spi_clk"; 605*724ba675SRob Herring status = "disabled"; 606*724ba675SRob Herring }; 607*724ba675SRob Herring 608*724ba675SRob Herring spi2: spi@fc01c000 { 609*724ba675SRob Herring #address-cells = <1>; 610*724ba675SRob Herring #size-cells = <0>; 611*724ba675SRob Herring compatible = "atmel,at91rm9200-spi"; 612*724ba675SRob Herring reg = <0xfc01c000 0x100>; 613*724ba675SRob Herring interrupts = <39 IRQ_TYPE_LEVEL_HIGH 3>; 614*724ba675SRob Herring dmas = <&dma0 615*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 616*724ba675SRob Herring | AT91_XDMAC_DT_PERID(14))>, 617*724ba675SRob Herring <&dma0 618*724ba675SRob Herring (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 619*724ba675SRob Herring | AT91_XDMAC_DT_PERID(15))>; 620*724ba675SRob Herring dma-names = "tx", "rx"; 621*724ba675SRob Herring pinctrl-names = "default"; 622*724ba675SRob Herring pinctrl-0 = <&pinctrl_spi2>; 623*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; 624*724ba675SRob Herring clock-names = "spi_clk"; 625*724ba675SRob Herring status = "disabled"; 626*724ba675SRob Herring }; 627*724ba675SRob Herring 628*724ba675SRob Herring tcb1: timer@fc020000 { 629*724ba675SRob Herring compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; 630*724ba675SRob Herring #address-cells = <1>; 631*724ba675SRob Herring #size-cells = <0>; 632*724ba675SRob Herring reg = <0xfc020000 0x100>; 633*724ba675SRob Herring interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>; 634*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&clk32k>; 635*724ba675SRob Herring clock-names = "t0_clk", "slow_clk"; 636*724ba675SRob Herring }; 637*724ba675SRob Herring 638*724ba675SRob Herring tcb2: timer@fc024000 { 639*724ba675SRob Herring compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; 640*724ba675SRob Herring #address-cells = <1>; 641*724ba675SRob Herring #size-cells = <0>; 642*724ba675SRob Herring reg = <0xfc024000 0x100>; 643*724ba675SRob Herring interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; 644*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&clk32k>; 645*724ba675SRob Herring clock-names = "t0_clk", "slow_clk"; 646*724ba675SRob Herring }; 647*724ba675SRob Herring 648*724ba675SRob Herring macb1: ethernet@fc028000 { 649*724ba675SRob Herring compatible = "atmel,sama5d4-gem"; 650*724ba675SRob Herring reg = <0xfc028000 0x100>; 651*724ba675SRob Herring interrupts = <55 IRQ_TYPE_LEVEL_HIGH 3>; 652*724ba675SRob Herring pinctrl-names = "default"; 653*724ba675SRob Herring pinctrl-0 = <&pinctrl_macb1_rmii>; 654*724ba675SRob Herring #address-cells = <1>; 655*724ba675SRob Herring #size-cells = <0>; 656*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_PERIPHERAL 55>; 657*724ba675SRob Herring clock-names = "hclk", "pclk"; 658*724ba675SRob Herring status = "disabled"; 659*724ba675SRob Herring }; 660*724ba675SRob Herring 661*724ba675SRob Herring trng@fc030000 { 662*724ba675SRob Herring compatible = "atmel,at91sam9g45-trng"; 663*724ba675SRob Herring reg = <0xfc030000 0x100>; 664*724ba675SRob Herring interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>; 665*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 53>; 666*724ba675SRob Herring }; 667*724ba675SRob Herring 668*724ba675SRob Herring adc0: adc@fc034000 { 669*724ba675SRob Herring compatible = "atmel,at91sam9x5-adc"; 670*724ba675SRob Herring reg = <0xfc034000 0x100>; 671*724ba675SRob Herring interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>; 672*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 44>, 673*724ba675SRob Herring <&adc_op_clk>; 674*724ba675SRob Herring clock-names = "adc_clk", "adc_op_clk"; 675*724ba675SRob Herring atmel,adc-channels-used = <0x01f>; 676*724ba675SRob Herring atmel,adc-startup-time = <40>; 677*724ba675SRob Herring atmel,adc-use-external-triggers; 678*724ba675SRob Herring atmel,adc-vref = <3000>; 679*724ba675SRob Herring atmel,adc-sample-hold-time = <11>; 680*724ba675SRob Herring atmel,adc-ts-pressure-threshold = <10000>; 681*724ba675SRob Herring status = "disabled"; 682*724ba675SRob Herring }; 683*724ba675SRob Herring 684*724ba675SRob Herring aes: crypto@fc044000 { 685*724ba675SRob Herring compatible = "atmel,at91sam9g46-aes"; 686*724ba675SRob Herring reg = <0xfc044000 0x100>; 687*724ba675SRob Herring interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; 688*724ba675SRob Herring dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 689*724ba675SRob Herring | AT91_XDMAC_DT_PERID(41))>, 690*724ba675SRob Herring <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 691*724ba675SRob Herring | AT91_XDMAC_DT_PERID(40))>; 692*724ba675SRob Herring dma-names = "tx", "rx"; 693*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 694*724ba675SRob Herring clock-names = "aes_clk"; 695*724ba675SRob Herring }; 696*724ba675SRob Herring 697*724ba675SRob Herring tdes: crpyto@fc04c000 { 698*724ba675SRob Herring compatible = "atmel,at91sam9g46-tdes"; 699*724ba675SRob Herring reg = <0xfc04c000 0x100>; 700*724ba675SRob Herring interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>; 701*724ba675SRob Herring dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 702*724ba675SRob Herring | AT91_XDMAC_DT_PERID(42))>, 703*724ba675SRob Herring <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 704*724ba675SRob Herring | AT91_XDMAC_DT_PERID(43))>; 705*724ba675SRob Herring dma-names = "tx", "rx"; 706*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 707*724ba675SRob Herring clock-names = "tdes_clk"; 708*724ba675SRob Herring }; 709*724ba675SRob Herring 710*724ba675SRob Herring sha: crypto@fc050000 { 711*724ba675SRob Herring compatible = "atmel,at91sam9g46-sha"; 712*724ba675SRob Herring reg = <0xfc050000 0x100>; 713*724ba675SRob Herring interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>; 714*724ba675SRob Herring dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 715*724ba675SRob Herring | AT91_XDMAC_DT_PERID(44))>; 716*724ba675SRob Herring dma-names = "tx"; 717*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 718*724ba675SRob Herring clock-names = "sha_clk"; 719*724ba675SRob Herring }; 720*724ba675SRob Herring 721*724ba675SRob Herring hsmc: smc@fc05c000 { 722*724ba675SRob Herring compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd"; 723*724ba675SRob Herring reg = <0xfc05c000 0x1000>; 724*724ba675SRob Herring interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>; 725*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; 726*724ba675SRob Herring #address-cells = <1>; 727*724ba675SRob Herring #size-cells = <1>; 728*724ba675SRob Herring ranges; 729*724ba675SRob Herring 730*724ba675SRob Herring pmecc: ecc-engine@ffffc070 { 731*724ba675SRob Herring compatible = "atmel,sama5d4-pmecc"; 732*724ba675SRob Herring reg = <0xfc05c070 0x490>, 733*724ba675SRob Herring <0xfc05c500 0x100>; 734*724ba675SRob Herring }; 735*724ba675SRob Herring }; 736*724ba675SRob Herring 737*724ba675SRob Herring reset_controller: reset-controller@fc068600 { 738*724ba675SRob Herring compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; 739*724ba675SRob Herring reg = <0xfc068600 0x10>; 740*724ba675SRob Herring clocks = <&clk32k>; 741*724ba675SRob Herring }; 742*724ba675SRob Herring 743a4bd03e7SArnd Bergmann shutdown_controller: poweroff@fc068610 { 744*724ba675SRob Herring compatible = "atmel,at91sam9x5-shdwc"; 745*724ba675SRob Herring reg = <0xfc068610 0x10>; 746*724ba675SRob Herring clocks = <&clk32k>; 747*724ba675SRob Herring }; 748*724ba675SRob Herring 749*724ba675SRob Herring pit: timer@fc068630 { 750*724ba675SRob Herring compatible = "atmel,at91sam9260-pit"; 751*724ba675SRob Herring reg = <0xfc068630 0x10>; 752*724ba675SRob Herring interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; 753*724ba675SRob Herring clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>; 754*724ba675SRob Herring }; 755*724ba675SRob Herring 756*724ba675SRob Herring watchdog: watchdog@fc068640 { 757*724ba675SRob Herring compatible = "atmel,sama5d4-wdt"; 758*724ba675SRob Herring reg = <0xfc068640 0x10>; 759*724ba675SRob Herring interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>; 760*724ba675SRob Herring clocks = <&clk32k>; 761*724ba675SRob Herring status = "disabled"; 762*724ba675SRob Herring }; 763*724ba675SRob Herring 764*724ba675SRob Herring clk32k: clock-controller@fc068650 { 765*724ba675SRob Herring compatible = "atmel,sama5d4-sckc"; 766*724ba675SRob Herring reg = <0xfc068650 0x4>; 767*724ba675SRob Herring #clock-cells = <0>; 768*724ba675SRob Herring clocks = <&slow_xtal>; 769*724ba675SRob Herring }; 770*724ba675SRob Herring 771*724ba675SRob Herring rtc@fc0686b0 { 772*724ba675SRob Herring compatible = "atmel,sama5d4-rtc"; 773*724ba675SRob Herring reg = <0xfc0686b0 0x30>; 774*724ba675SRob Herring interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 775*724ba675SRob Herring clocks = <&clk32k>; 776*724ba675SRob Herring }; 777*724ba675SRob Herring 778*724ba675SRob Herring dbgu: serial@fc069000 { 779*724ba675SRob Herring compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 780*724ba675SRob Herring reg = <0xfc069000 0x200>; 781*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 782*724ba675SRob Herring interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>; 783*724ba675SRob Herring pinctrl-names = "default"; 784*724ba675SRob Herring pinctrl-0 = <&pinctrl_dbgu>; 785*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; 786*724ba675SRob Herring clock-names = "usart"; 787*724ba675SRob Herring status = "disabled"; 788*724ba675SRob Herring }; 789*724ba675SRob Herring 790*724ba675SRob Herring 791*724ba675SRob Herring pinctrl: pinctrl@fc06a000 { 792*724ba675SRob Herring #address-cells = <1>; 793*724ba675SRob Herring #size-cells = <1>; 794*724ba675SRob Herring compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus"; 795*724ba675SRob Herring ranges = <0xfc068000 0xfc068000 0x100 796*724ba675SRob Herring 0xfc06a000 0xfc06a000 0x4000>; 797*724ba675SRob Herring /* WARNING: revisit as pin spec has changed */ 798*724ba675SRob Herring atmel,mux-mask = < 799*724ba675SRob Herring /* A B C */ 800*724ba675SRob Herring 0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */ 801*724ba675SRob Herring 0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */ 802*724ba675SRob Herring 0xffffffff 0x3ff83fff 0xff00ffff /* pioC */ 803*724ba675SRob Herring 0xb003ff00 0x8002a800 0x00000000 /* pioD */ 804*724ba675SRob Herring 0xffffffff 0x7fffffff 0x76fff1bf /* pioE */ 805*724ba675SRob Herring >; 806*724ba675SRob Herring 807*724ba675SRob Herring pioA: gpio@fc06a000 { 808*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 809*724ba675SRob Herring reg = <0xfc06a000 0x100>; 810*724ba675SRob Herring interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>; 811*724ba675SRob Herring #gpio-cells = <2>; 812*724ba675SRob Herring gpio-controller; 813*724ba675SRob Herring interrupt-controller; 814*724ba675SRob Herring #interrupt-cells = <2>; 815*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; 816*724ba675SRob Herring }; 817*724ba675SRob Herring 818*724ba675SRob Herring pioB: gpio@fc06b000 { 819*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 820*724ba675SRob Herring reg = <0xfc06b000 0x100>; 821*724ba675SRob Herring interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>; 822*724ba675SRob Herring #gpio-cells = <2>; 823*724ba675SRob Herring gpio-controller; 824*724ba675SRob Herring interrupt-controller; 825*724ba675SRob Herring #interrupt-cells = <2>; 826*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; 827*724ba675SRob Herring }; 828*724ba675SRob Herring 829*724ba675SRob Herring pioC: gpio@fc06c000 { 830*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 831*724ba675SRob Herring reg = <0xfc06c000 0x100>; 832*724ba675SRob Herring interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>; 833*724ba675SRob Herring #gpio-cells = <2>; 834*724ba675SRob Herring gpio-controller; 835*724ba675SRob Herring interrupt-controller; 836*724ba675SRob Herring #interrupt-cells = <2>; 837*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 25>; 838*724ba675SRob Herring }; 839*724ba675SRob Herring 840*724ba675SRob Herring pioD: gpio@fc068000 { 841*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 842*724ba675SRob Herring reg = <0xfc068000 0x100>; 843*724ba675SRob Herring interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; 844*724ba675SRob Herring #gpio-cells = <2>; 845*724ba675SRob Herring gpio-controller; 846*724ba675SRob Herring interrupt-controller; 847*724ba675SRob Herring #interrupt-cells = <2>; 848*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 849*724ba675SRob Herring }; 850*724ba675SRob Herring 851*724ba675SRob Herring pioE: gpio@fc06d000 { 852*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 853*724ba675SRob Herring reg = <0xfc06d000 0x100>; 854*724ba675SRob Herring interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>; 855*724ba675SRob Herring #gpio-cells = <2>; 856*724ba675SRob Herring gpio-controller; 857*724ba675SRob Herring interrupt-controller; 858*724ba675SRob Herring #interrupt-cells = <2>; 859*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 26>; 860*724ba675SRob Herring }; 861*724ba675SRob Herring 862*724ba675SRob Herring /* pinctrl pin settings */ 863*724ba675SRob Herring adc0 { 864*724ba675SRob Herring pinctrl_adc0_adtrg: adc0_adtrg { 865*724ba675SRob Herring atmel,pins = 866*724ba675SRob Herring <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */ 867*724ba675SRob Herring }; 868*724ba675SRob Herring pinctrl_adc0_ad0: adc0_ad0 { 869*724ba675SRob Herring atmel,pins = 870*724ba675SRob Herring <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 871*724ba675SRob Herring }; 872*724ba675SRob Herring pinctrl_adc0_ad1: adc0_ad1 { 873*724ba675SRob Herring atmel,pins = 874*724ba675SRob Herring <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; 875*724ba675SRob Herring }; 876*724ba675SRob Herring pinctrl_adc0_ad2: adc0_ad2 { 877*724ba675SRob Herring atmel,pins = 878*724ba675SRob Herring <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 879*724ba675SRob Herring }; 880*724ba675SRob Herring pinctrl_adc0_ad3: adc0_ad3 { 881*724ba675SRob Herring atmel,pins = 882*724ba675SRob Herring <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; 883*724ba675SRob Herring }; 884*724ba675SRob Herring pinctrl_adc0_ad4: adc0_ad4 { 885*724ba675SRob Herring atmel,pins = 886*724ba675SRob Herring <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 887*724ba675SRob Herring }; 888*724ba675SRob Herring }; 889*724ba675SRob Herring 890*724ba675SRob Herring dbgu { 891*724ba675SRob Herring pinctrl_dbgu: dbgu-0 { 892*724ba675SRob Herring atmel,pins = 893*724ba675SRob Herring <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with D14 and TDI */ 894*724ba675SRob Herring AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with D15 and TDO */ 895*724ba675SRob Herring }; 896*724ba675SRob Herring }; 897*724ba675SRob Herring 898*724ba675SRob Herring ebi { 899*724ba675SRob Herring pinctrl_ebi_addr: ebi-addr-0 { 900*724ba675SRob Herring atmel,pins = 901*724ba675SRob Herring <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE 902*724ba675SRob Herring AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE 903*724ba675SRob Herring AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE 904*724ba675SRob Herring AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE 905*724ba675SRob Herring AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE 906*724ba675SRob Herring AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE 907*724ba675SRob Herring AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE 908*724ba675SRob Herring AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE 909*724ba675SRob Herring AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE 910*724ba675SRob Herring AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE 911*724ba675SRob Herring AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE 912*724ba675SRob Herring AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE 913*724ba675SRob Herring AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE 914*724ba675SRob Herring AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE 915*724ba675SRob Herring AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE 916*724ba675SRob Herring AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE 917*724ba675SRob Herring AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE 918*724ba675SRob Herring AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE 919*724ba675SRob Herring AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE 920*724ba675SRob Herring AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE 921*724ba675SRob Herring AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE 922*724ba675SRob Herring AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE 923*724ba675SRob Herring AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE 924*724ba675SRob Herring AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE 925*724ba675SRob Herring AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE 926*724ba675SRob Herring AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 927*724ba675SRob Herring }; 928*724ba675SRob Herring 929*724ba675SRob Herring pinctrl_ebi_nand_addr: ebi-addr-1 { 930*724ba675SRob Herring atmel,pins = 931*724ba675SRob Herring <AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE 932*724ba675SRob Herring AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 933*724ba675SRob Herring }; 934*724ba675SRob Herring 935*724ba675SRob Herring pinctrl_ebi_cs0: ebi-cs0-0 { 936*724ba675SRob Herring atmel,pins = 937*724ba675SRob Herring <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; 938*724ba675SRob Herring }; 939*724ba675SRob Herring 940*724ba675SRob Herring pinctrl_ebi_cs1: ebi-cs1-0 { 941*724ba675SRob Herring atmel,pins = 942*724ba675SRob Herring <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 943*724ba675SRob Herring }; 944*724ba675SRob Herring 945*724ba675SRob Herring pinctrl_ebi_cs2: ebi-cs2-0 { 946*724ba675SRob Herring atmel,pins = 947*724ba675SRob Herring <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; 948*724ba675SRob Herring }; 949*724ba675SRob Herring 950*724ba675SRob Herring pinctrl_ebi_cs3: ebi-cs3-0 { 951*724ba675SRob Herring atmel,pins = 952*724ba675SRob Herring <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 953*724ba675SRob Herring }; 954*724ba675SRob Herring 955*724ba675SRob Herring pinctrl_ebi_data_0_7: ebi-data-lsb-0 { 956*724ba675SRob Herring atmel,pins = 957*724ba675SRob Herring <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE 958*724ba675SRob Herring AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE 959*724ba675SRob Herring AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE 960*724ba675SRob Herring AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE 961*724ba675SRob Herring AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE 962*724ba675SRob Herring AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE 963*724ba675SRob Herring AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE 964*724ba675SRob Herring AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; 965*724ba675SRob Herring }; 966*724ba675SRob Herring 967*724ba675SRob Herring pinctrl_ebi_data_8_15: ebi-data-msb-0 { 968*724ba675SRob Herring atmel,pins = 969*724ba675SRob Herring <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE 970*724ba675SRob Herring AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE 971*724ba675SRob Herring AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE 972*724ba675SRob Herring AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE 973*724ba675SRob Herring AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE 974*724ba675SRob Herring AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE 975*724ba675SRob Herring AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE 976*724ba675SRob Herring AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; 977*724ba675SRob Herring }; 978*724ba675SRob Herring 979*724ba675SRob Herring pinctrl_ebi_nandrdy: ebi-nandrdy-0 { 980*724ba675SRob Herring atmel,pins = 981*724ba675SRob Herring <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; 982*724ba675SRob Herring }; 983*724ba675SRob Herring 984*724ba675SRob Herring pinctrl_ebi_nrd_nandoe: ebi-nrd-nandoe-0 { 985*724ba675SRob Herring atmel,pins = 986*724ba675SRob Herring <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; 987*724ba675SRob Herring }; 988*724ba675SRob Herring 989*724ba675SRob Herring pinctrl_ebi_nwait: ebi-nwait-0 { 990*724ba675SRob Herring atmel,pins = 991*724ba675SRob Herring <AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; 992*724ba675SRob Herring }; 993*724ba675SRob Herring 994*724ba675SRob Herring pinctrl_ebi_nwe_nandwe: ebi-nwe-nandwe-0 { 995*724ba675SRob Herring atmel,pins = 996*724ba675SRob Herring <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; 997*724ba675SRob Herring }; 998*724ba675SRob Herring 999*724ba675SRob Herring pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 { 1000*724ba675SRob Herring atmel,pins = 1001*724ba675SRob Herring <AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1002*724ba675SRob Herring }; 1003*724ba675SRob Herring }; 1004*724ba675SRob Herring 1005*724ba675SRob Herring i2c0 { 1006*724ba675SRob Herring pinctrl_i2c0: i2c0-0 { 1007*724ba675SRob Herring atmel,pins = 1008*724ba675SRob Herring <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE 1009*724ba675SRob Herring AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1010*724ba675SRob Herring }; 1011*724ba675SRob Herring 1012*724ba675SRob Herring pinctrl_i2c0_gpio: i2c0-gpio { 1013*724ba675SRob Herring atmel,pins = 1014*724ba675SRob Herring <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 1015*724ba675SRob Herring AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 1016*724ba675SRob Herring }; 1017*724ba675SRob Herring }; 1018*724ba675SRob Herring 1019*724ba675SRob Herring i2c1 { 1020*724ba675SRob Herring pinctrl_i2c1: i2c1-0 { 1021*724ba675SRob Herring atmel,pins = 1022*724ba675SRob Herring <AT91_PIOE 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* TWD1, conflicts with UART0 RX and DIBP */ 1023*724ba675SRob Herring AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* TWCK1, conflicts with UART0 TX and DIBN */ 1024*724ba675SRob Herring }; 1025*724ba675SRob Herring 1026*724ba675SRob Herring pinctrl_i2c1_gpio: i2c1-gpio { 1027*724ba675SRob Herring atmel,pins = 1028*724ba675SRob Herring <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 1029*724ba675SRob Herring AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 1030*724ba675SRob Herring }; 1031*724ba675SRob Herring }; 1032*724ba675SRob Herring 1033*724ba675SRob Herring i2c2 { 1034*724ba675SRob Herring pinctrl_i2c2: i2c2-0 { 1035*724ba675SRob Herring atmel,pins = 1036*724ba675SRob Herring <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* TWD2, conflicts with RD0 and PWML1 */ 1037*724ba675SRob Herring AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */ 1038*724ba675SRob Herring }; 1039*724ba675SRob Herring 1040*724ba675SRob Herring pinctrl_i2c2_gpio: i2c2-gpio { 1041*724ba675SRob Herring atmel,pins = 1042*724ba675SRob Herring <AT91_PIOB 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 1043*724ba675SRob Herring AT91_PIOB 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 1044*724ba675SRob Herring }; 1045*724ba675SRob Herring }; 1046*724ba675SRob Herring 1047*724ba675SRob Herring isi { 1048*724ba675SRob Herring pinctrl_isi_data_0_7: isi-0-data-0-7 { 1049*724ba675SRob Herring atmel,pins = 1050*724ba675SRob Herring <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D0 */ 1051*724ba675SRob Herring AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D1 */ 1052*724ba675SRob Herring AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D2 */ 1053*724ba675SRob Herring AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D3 */ 1054*724ba675SRob Herring AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D4 */ 1055*724ba675SRob Herring AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D5 */ 1056*724ba675SRob Herring AT91_PIOC 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D6 */ 1057*724ba675SRob Herring AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D7 */ 1058*724ba675SRob Herring AT91_PIOB 1 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_PCK, conflict with G0_RXCK */ 1059*724ba675SRob Herring AT91_PIOB 3 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_VSYNC */ 1060*724ba675SRob Herring AT91_PIOB 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_HSYNC */ 1061*724ba675SRob Herring }; 1062*724ba675SRob Herring pinctrl_isi_data_8_9: isi-0-data-8-9 { 1063*724ba675SRob Herring atmel,pins = 1064*724ba675SRob Herring <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D8, conflicts with SPI0_MISO, PWMH2 */ 1065*724ba675SRob Herring AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D9, conflicts with SPI0_MOSI, PWML2 */ 1066*724ba675SRob Herring }; 1067*724ba675SRob Herring pinctrl_isi_data_10_11: isi-0-data-10-11 { 1068*724ba675SRob Herring atmel,pins = 1069*724ba675SRob Herring <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D10, conflicts with SPI0_SPCK, PWMH3 */ 1070*724ba675SRob Herring AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D11, conflicts with SPI0_NPCS0, PWML3 */ 1071*724ba675SRob Herring }; 1072*724ba675SRob Herring }; 1073*724ba675SRob Herring 1074*724ba675SRob Herring lcd { 1075*724ba675SRob Herring pinctrl_lcd_base: lcd-base-0 { 1076*724ba675SRob Herring atmel,pins = 1077*724ba675SRob Herring <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */ 1078*724ba675SRob Herring AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */ 1079*724ba675SRob Herring AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */ 1080*724ba675SRob Herring AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */ 1081*724ba675SRob Herring }; 1082*724ba675SRob Herring pinctrl_lcd_pwm: lcd-pwm-0 { 1083*724ba675SRob Herring atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */ 1084*724ba675SRob Herring }; 1085*724ba675SRob Herring pinctrl_lcd_rgb444: lcd-rgb-0 { 1086*724ba675SRob Herring atmel,pins = 1087*724ba675SRob Herring <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 1088*724ba675SRob Herring AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 1089*724ba675SRob Herring AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 1090*724ba675SRob Herring AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 1091*724ba675SRob Herring AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 1092*724ba675SRob Herring AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 1093*724ba675SRob Herring AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 1094*724ba675SRob Herring AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 1095*724ba675SRob Herring AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 1096*724ba675SRob Herring AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ 1097*724ba675SRob Herring AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ 1098*724ba675SRob Herring AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */ 1099*724ba675SRob Herring }; 1100*724ba675SRob Herring pinctrl_lcd_rgb565: lcd-rgb-1 { 1101*724ba675SRob Herring atmel,pins = 1102*724ba675SRob Herring <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 1103*724ba675SRob Herring AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 1104*724ba675SRob Herring AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 1105*724ba675SRob Herring AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 1106*724ba675SRob Herring AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 1107*724ba675SRob Herring AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 1108*724ba675SRob Herring AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 1109*724ba675SRob Herring AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 1110*724ba675SRob Herring AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 1111*724ba675SRob Herring AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ 1112*724ba675SRob Herring AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ 1113*724ba675SRob Herring AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ 1114*724ba675SRob Herring AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ 1115*724ba675SRob Herring AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ 1116*724ba675SRob Herring AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ 1117*724ba675SRob Herring AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */ 1118*724ba675SRob Herring }; 1119*724ba675SRob Herring pinctrl_lcd_rgb666: lcd-rgb-2 { 1120*724ba675SRob Herring atmel,pins = 1121*724ba675SRob Herring <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 1122*724ba675SRob Herring AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 1123*724ba675SRob Herring AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 1124*724ba675SRob Herring AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 1125*724ba675SRob Herring AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 1126*724ba675SRob Herring AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 1127*724ba675SRob Herring AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ 1128*724ba675SRob Herring AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ 1129*724ba675SRob Herring AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ 1130*724ba675SRob Herring AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ 1131*724ba675SRob Herring AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ 1132*724ba675SRob Herring AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ 1133*724ba675SRob Herring AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */ 1134*724ba675SRob Herring AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */ 1135*724ba675SRob Herring AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */ 1136*724ba675SRob Herring AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */ 1137*724ba675SRob Herring AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */ 1138*724ba675SRob Herring AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */ 1139*724ba675SRob Herring }; 1140*724ba675SRob Herring pinctrl_lcd_rgb777: lcd-rgb-3 { 1141*724ba675SRob Herring atmel,pins = 1142*724ba675SRob Herring /* LCDDAT0 conflicts with TMS */ 1143*724ba675SRob Herring <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 1144*724ba675SRob Herring AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 1145*724ba675SRob Herring AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 1146*724ba675SRob Herring AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 1147*724ba675SRob Herring AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 1148*724ba675SRob Herring AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 1149*724ba675SRob Herring AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 1150*724ba675SRob Herring /* LCDDAT8 conflicts with TCK */ 1151*724ba675SRob Herring AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ 1152*724ba675SRob Herring AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ 1153*724ba675SRob Herring AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ 1154*724ba675SRob Herring AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ 1155*724ba675SRob Herring AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ 1156*724ba675SRob Herring AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ 1157*724ba675SRob Herring AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ 1158*724ba675SRob Herring /* LCDDAT16 conflicts with NTRST */ 1159*724ba675SRob Herring AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */ 1160*724ba675SRob Herring AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */ 1161*724ba675SRob Herring AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */ 1162*724ba675SRob Herring AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */ 1163*724ba675SRob Herring AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */ 1164*724ba675SRob Herring AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */ 1165*724ba675SRob Herring AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */ 1166*724ba675SRob Herring }; 1167*724ba675SRob Herring pinctrl_lcd_rgb888: lcd-rgb-4 { 1168*724ba675SRob Herring atmel,pins = 1169*724ba675SRob Herring <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 1170*724ba675SRob Herring AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 1171*724ba675SRob Herring AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 1172*724ba675SRob Herring AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 1173*724ba675SRob Herring AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 1174*724ba675SRob Herring AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 1175*724ba675SRob Herring AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 1176*724ba675SRob Herring AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 1177*724ba675SRob Herring AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 1178*724ba675SRob Herring AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ 1179*724ba675SRob Herring AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ 1180*724ba675SRob Herring AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ 1181*724ba675SRob Herring AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ 1182*724ba675SRob Herring AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ 1183*724ba675SRob Herring AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ 1184*724ba675SRob Herring AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ 1185*724ba675SRob Herring AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */ 1186*724ba675SRob Herring AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */ 1187*724ba675SRob Herring AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */ 1188*724ba675SRob Herring AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */ 1189*724ba675SRob Herring AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */ 1190*724ba675SRob Herring AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */ 1191*724ba675SRob Herring AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */ 1192*724ba675SRob Herring AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */ 1193*724ba675SRob Herring }; 1194*724ba675SRob Herring }; 1195*724ba675SRob Herring 1196*724ba675SRob Herring macb0 { 1197*724ba675SRob Herring pinctrl_macb0_rmii: macb0_rmii-0 { 1198*724ba675SRob Herring atmel,pins = 1199*724ba675SRob Herring <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX0 */ 1200*724ba675SRob Herring AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX1 */ 1201*724ba675SRob Herring AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX0 */ 1202*724ba675SRob Herring AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX1 */ 1203*724ba675SRob Herring AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXDV */ 1204*724ba675SRob Herring AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXER */ 1205*724ba675SRob Herring AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXEN */ 1206*724ba675SRob Herring AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXCK */ 1207*724ba675SRob Herring AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDC */ 1208*724ba675SRob Herring AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDIO */ 1209*724ba675SRob Herring >; 1210*724ba675SRob Herring }; 1211*724ba675SRob Herring }; 1212*724ba675SRob Herring 1213*724ba675SRob Herring macb1 { 1214*724ba675SRob Herring pinctrl_macb1_rmii: macb1_rmii-0 { 1215*724ba675SRob Herring atmel,pins = 1216*724ba675SRob Herring <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX0 */ 1217*724ba675SRob Herring AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX1 */ 1218*724ba675SRob Herring AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX0 */ 1219*724ba675SRob Herring AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX1 */ 1220*724ba675SRob Herring AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXDV */ 1221*724ba675SRob Herring AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXER */ 1222*724ba675SRob Herring AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXEN */ 1223*724ba675SRob Herring AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXCK */ 1224*724ba675SRob Herring AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDC */ 1225*724ba675SRob Herring AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDIO */ 1226*724ba675SRob Herring >; 1227*724ba675SRob Herring }; 1228*724ba675SRob Herring }; 1229*724ba675SRob Herring 1230*724ba675SRob Herring mmc0 { 1231*724ba675SRob Herring pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { 1232*724ba675SRob Herring atmel,pins = 1233*724ba675SRob Herring <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* MCI0_CK, conflict with PCK1(ISI_MCK) */ 1234*724ba675SRob Herring AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDA, conflict with NAND_D0 */ 1235*724ba675SRob Herring AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA0, conflict with NAND_D1 */ 1236*724ba675SRob Herring >; 1237*724ba675SRob Herring }; 1238*724ba675SRob Herring pinctrl_mmc0_dat1_3: mmc0_dat1_3 { 1239*724ba675SRob Herring atmel,pins = 1240*724ba675SRob Herring <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA1, conflict with NAND_D2 */ 1241*724ba675SRob Herring AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA2, conflict with NAND_D3 */ 1242*724ba675SRob Herring AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA3, conflict with NAND_D4 */ 1243*724ba675SRob Herring >; 1244*724ba675SRob Herring }; 1245*724ba675SRob Herring pinctrl_mmc0_dat4_7: mmc0_dat4_7 { 1246*724ba675SRob Herring atmel,pins = 1247*724ba675SRob Herring <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA4, conflict with NAND_D5 */ 1248*724ba675SRob Herring AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA5, conflict with NAND_D6 */ 1249*724ba675SRob Herring AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA6, conflict with NAND_D7 */ 1250*724ba675SRob Herring AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA7, conflict with NAND_OE */ 1251*724ba675SRob Herring >; 1252*724ba675SRob Herring }; 1253*724ba675SRob Herring }; 1254*724ba675SRob Herring 1255*724ba675SRob Herring mmc1 { 1256*724ba675SRob Herring pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { 1257*724ba675SRob Herring atmel,pins = 1258*724ba675SRob Herring <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* MCI1_CK */ 1259*724ba675SRob Herring AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_CDA */ 1260*724ba675SRob Herring AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA0 */ 1261*724ba675SRob Herring >; 1262*724ba675SRob Herring }; 1263*724ba675SRob Herring pinctrl_mmc1_dat1_3: mmc1_dat1_3 { 1264*724ba675SRob Herring atmel,pins = 1265*724ba675SRob Herring <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA1 */ 1266*724ba675SRob Herring AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA2 */ 1267*724ba675SRob Herring AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA3 */ 1268*724ba675SRob Herring >; 1269*724ba675SRob Herring }; 1270*724ba675SRob Herring }; 1271*724ba675SRob Herring 1272*724ba675SRob Herring nand0 { 1273*724ba675SRob Herring pinctrl_nand: nand-0 { 1274*724ba675SRob Herring atmel,pins = 1275*724ba675SRob Herring <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A Read Enable */ 1276*724ba675SRob Herring AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A Write Enable */ 1277*724ba675SRob Herring 1278*724ba675SRob Herring AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC17 ALE */ 1279*724ba675SRob Herring AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC18 CLE */ 1280*724ba675SRob Herring 1281*724ba675SRob Herring AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC15 NCS3/Chip Enable */ 1282*724ba675SRob Herring AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC16 NANDRDY */ 1283*724ba675SRob Herring AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 Data bit 0 */ 1284*724ba675SRob Herring AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 Data bit 1 */ 1285*724ba675SRob Herring AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 Data bit 2 */ 1286*724ba675SRob Herring AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 Data bit 3 */ 1287*724ba675SRob Herring AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 Data bit 4 */ 1288*724ba675SRob Herring AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 Data bit 5 */ 1289*724ba675SRob Herring AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A Data bit 6 */ 1290*724ba675SRob Herring AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */ 1291*724ba675SRob Herring }; 1292*724ba675SRob Herring }; 1293*724ba675SRob Herring 1294*724ba675SRob Herring spi0 { 1295*724ba675SRob Herring pinctrl_spi0: spi0-0 { 1296*724ba675SRob Herring atmel,pins = 1297*724ba675SRob Herring <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MISO */ 1298*724ba675SRob Herring AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MOSI */ 1299*724ba675SRob Herring AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_SPCK */ 1300*724ba675SRob Herring >; 1301*724ba675SRob Herring }; 1302*724ba675SRob Herring }; 1303*724ba675SRob Herring 1304*724ba675SRob Herring ssc0 { 1305*724ba675SRob Herring pinctrl_ssc0_tx: ssc0_tx { 1306*724ba675SRob Herring atmel,pins = 1307*724ba675SRob Herring <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK0 */ 1308*724ba675SRob Herring AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF0 */ 1309*724ba675SRob Herring AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD0 */ 1310*724ba675SRob Herring }; 1311*724ba675SRob Herring 1312*724ba675SRob Herring pinctrl_ssc0_rx: ssc0_rx { 1313*724ba675SRob Herring atmel,pins = 1314*724ba675SRob Herring <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK0 */ 1315*724ba675SRob Herring AT91_PIOB 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF0 */ 1316*724ba675SRob Herring AT91_PIOB 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD0 */ 1317*724ba675SRob Herring }; 1318*724ba675SRob Herring }; 1319*724ba675SRob Herring 1320*724ba675SRob Herring ssc1 { 1321*724ba675SRob Herring pinctrl_ssc1_tx: ssc1_tx { 1322*724ba675SRob Herring atmel,pins = 1323*724ba675SRob Herring <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK1 */ 1324*724ba675SRob Herring AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF1 */ 1325*724ba675SRob Herring AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD1 */ 1326*724ba675SRob Herring }; 1327*724ba675SRob Herring 1328*724ba675SRob Herring pinctrl_ssc1_rx: ssc1_rx { 1329*724ba675SRob Herring atmel,pins = 1330*724ba675SRob Herring <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK1 */ 1331*724ba675SRob Herring AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF1 */ 1332*724ba675SRob Herring AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD1 */ 1333*724ba675SRob Herring }; 1334*724ba675SRob Herring }; 1335*724ba675SRob Herring 1336*724ba675SRob Herring spi1 { 1337*724ba675SRob Herring pinctrl_spi1: spi1-0 { 1338*724ba675SRob Herring atmel,pins = 1339*724ba675SRob Herring <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MISO */ 1340*724ba675SRob Herring AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MOSI */ 1341*724ba675SRob Herring AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_SPCK */ 1342*724ba675SRob Herring >; 1343*724ba675SRob Herring }; 1344*724ba675SRob Herring }; 1345*724ba675SRob Herring 1346*724ba675SRob Herring spi2 { 1347*724ba675SRob Herring pinctrl_spi2: spi2-0 { 1348*724ba675SRob Herring atmel,pins = 1349*724ba675SRob Herring <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MISO conflicts with RTS0 */ 1350*724ba675SRob Herring AT91_PIOD 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MOSI conflicts with TXD0 */ 1351*724ba675SRob Herring AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_SPCK conflicts with RTS1 */ 1352*724ba675SRob Herring >; 1353*724ba675SRob Herring }; 1354*724ba675SRob Herring }; 1355*724ba675SRob Herring 1356*724ba675SRob Herring uart0 { 1357*724ba675SRob Herring pinctrl_uart0: uart0-0 { 1358*724ba675SRob Herring atmel,pins = 1359*724ba675SRob Herring <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */ 1360*724ba675SRob Herring AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */ 1361*724ba675SRob Herring >; 1362*724ba675SRob Herring }; 1363*724ba675SRob Herring }; 1364*724ba675SRob Herring 1365*724ba675SRob Herring uart1 { 1366*724ba675SRob Herring pinctrl_uart1: uart1-0 { 1367*724ba675SRob Herring atmel,pins = 1368*724ba675SRob Herring <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* RXD */ 1369*724ba675SRob Herring AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE /* TXD */ 1370*724ba675SRob Herring >; 1371*724ba675SRob Herring }; 1372*724ba675SRob Herring }; 1373*724ba675SRob Herring 1374*724ba675SRob Herring usart0 { 1375*724ba675SRob Herring pinctrl_usart0: usart0-0 { 1376*724ba675SRob Herring atmel,pins = 1377*724ba675SRob Herring <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */ 1378*724ba675SRob Herring AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */ 1379*724ba675SRob Herring >; 1380*724ba675SRob Herring }; 1381*724ba675SRob Herring pinctrl_usart0_rts: usart0_rts-0 { 1382*724ba675SRob Herring atmel,pins = <AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1383*724ba675SRob Herring }; 1384*724ba675SRob Herring pinctrl_usart0_cts: usart0_cts-0 { 1385*724ba675SRob Herring atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1386*724ba675SRob Herring }; 1387*724ba675SRob Herring }; 1388*724ba675SRob Herring 1389*724ba675SRob Herring usart1 { 1390*724ba675SRob Herring pinctrl_usart1: usart1-0 { 1391*724ba675SRob Herring atmel,pins = 1392*724ba675SRob Herring <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */ 1393*724ba675SRob Herring AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */ 1394*724ba675SRob Herring >; 1395*724ba675SRob Herring }; 1396*724ba675SRob Herring pinctrl_usart1_rts: usart1_rts-0 { 1397*724ba675SRob Herring atmel,pins = <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1398*724ba675SRob Herring }; 1399*724ba675SRob Herring pinctrl_usart1_cts: usart1_cts-0 { 1400*724ba675SRob Herring atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1401*724ba675SRob Herring }; 1402*724ba675SRob Herring }; 1403*724ba675SRob Herring 1404*724ba675SRob Herring usart2 { 1405*724ba675SRob Herring pinctrl_usart2: usart2-0 { 1406*724ba675SRob Herring atmel,pins = 1407*724ba675SRob Herring <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD - conflicts with G0_CRS, ISI_HSYNC */ 1408*724ba675SRob Herring AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD - conflicts with G0_COL, PCK2 */ 1409*724ba675SRob Herring >; 1410*724ba675SRob Herring }; 1411*724ba675SRob Herring pinctrl_usart2_rts: usart2_rts-0 { 1412*724ba675SRob Herring atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_RX3, PWMH1 */ 1413*724ba675SRob Herring }; 1414*724ba675SRob Herring pinctrl_usart2_cts: usart2_cts-0 { 1415*724ba675SRob Herring atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_TXER, ISI_VSYNC */ 1416*724ba675SRob Herring }; 1417*724ba675SRob Herring }; 1418*724ba675SRob Herring 1419*724ba675SRob Herring usart3 { 1420*724ba675SRob Herring pinctrl_usart3: usart3-0 { 1421*724ba675SRob Herring atmel,pins = 1422*724ba675SRob Herring <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */ 1423*724ba675SRob Herring AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */ 1424*724ba675SRob Herring >; 1425*724ba675SRob Herring }; 1426*724ba675SRob Herring }; 1427*724ba675SRob Herring 1428*724ba675SRob Herring usart4 { 1429*724ba675SRob Herring pinctrl_usart4: usart4-0 { 1430*724ba675SRob Herring atmel,pins = 1431*724ba675SRob Herring <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */ 1432*724ba675SRob Herring AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */ 1433*724ba675SRob Herring >; 1434*724ba675SRob Herring }; 1435*724ba675SRob Herring pinctrl_usart4_rts: usart4_rts-0 { 1436*724ba675SRob Herring atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with NWAIT, A19 */ 1437*724ba675SRob Herring }; 1438*724ba675SRob Herring pinctrl_usart4_cts: usart4_cts-0 { 1439*724ba675SRob Herring atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with A0/NBS0, MCI0_CDB */ 1440*724ba675SRob Herring }; 1441*724ba675SRob Herring }; 1442*724ba675SRob Herring }; 1443*724ba675SRob Herring 1444*724ba675SRob Herring aic: interrupt-controller@fc06e000 { 1445*724ba675SRob Herring #interrupt-cells = <3>; 1446*724ba675SRob Herring compatible = "atmel,sama5d4-aic"; 1447*724ba675SRob Herring interrupt-controller; 1448*724ba675SRob Herring reg = <0xfc06e000 0x200>; 1449*724ba675SRob Herring atmel,external-irqs = <56>; 1450*724ba675SRob Herring }; 1451*724ba675SRob Herring }; 1452*724ba675SRob Herring }; 1453*724ba675SRob Herring}; 1454