1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only
2*724ba675SRob Herring/*
3*724ba675SRob Herring * sama5d3_can.dtsi - Device Tree Include file for SAMA5D3 SoC with
4*724ba675SRob Herring * CAN support
5*724ba675SRob Herring *
6*724ba675SRob Herring * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
7*724ba675SRob Herring */
8*724ba675SRob Herring
9*724ba675SRob Herring#include <dt-bindings/pinctrl/at91.h>
10*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h>
11*724ba675SRob Herring
12*724ba675SRob Herring/ {
13*724ba675SRob Herring	ahb {
14*724ba675SRob Herring		apb {
15*724ba675SRob Herring			pinctrl@fffff200 {
16*724ba675SRob Herring				can0 {
17*724ba675SRob Herring					pinctrl_can0_rx_tx: can0_rx_tx {
18*724ba675SRob Herring						atmel,pins =
19*724ba675SRob Herring							<AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE	/* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
20*724ba675SRob Herring							 AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
21*724ba675SRob Herring					};
22*724ba675SRob Herring				};
23*724ba675SRob Herring
24*724ba675SRob Herring				can1 {
25*724ba675SRob Herring					pinctrl_can1_rx_tx: can1_rx_tx {
26*724ba675SRob Herring						atmel,pins =
27*724ba675SRob Herring							<AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB14 periph B RX, conflicts with GCRS */
28*724ba675SRob Herring							 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB15 periph B TX, conflicts with GCOL */
29*724ba675SRob Herring					};
30*724ba675SRob Herring				};
31*724ba675SRob Herring
32*724ba675SRob Herring			};
33*724ba675SRob Herring
34*724ba675SRob Herring			can0: can@f000c000 {
35*724ba675SRob Herring				compatible = "atmel,at91sam9x5-can";
36*724ba675SRob Herring				reg = <0xf000c000 0x300>;
37*724ba675SRob Herring				interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
38*724ba675SRob Herring				pinctrl-names = "default";
39*724ba675SRob Herring				pinctrl-0 = <&pinctrl_can0_rx_tx>;
40*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
41*724ba675SRob Herring				clock-names = "can_clk";
42*724ba675SRob Herring				status = "disabled";
43*724ba675SRob Herring			};
44*724ba675SRob Herring
45*724ba675SRob Herring			can1: can@f8010000 {
46*724ba675SRob Herring				compatible = "atmel,at91sam9x5-can";
47*724ba675SRob Herring				reg = <0xf8010000 0x300>;
48*724ba675SRob Herring				interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
49*724ba675SRob Herring				pinctrl-names = "default";
50*724ba675SRob Herring				pinctrl-0 = <&pinctrl_can1_rx_tx>;
51*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
52*724ba675SRob Herring				clock-names = "can_clk";
53*724ba675SRob Herring				status = "disabled";
54*724ba675SRob Herring			};
55*724ba675SRob Herring		};
56*724ba675SRob Herring	};
57*724ba675SRob Herring};
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