1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2*724ba675SRob Herring/* 3*724ba675SRob Herring * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC 4*724ba675SRob Herring * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC 5*724ba675SRob Herring * 6*724ba675SRob Herring * Copyright (C) 2013 Atmel, 7*724ba675SRob Herring * 2013 Ludovic Desroches <ludovic.desroches@atmel.com> 8*724ba675SRob Herring */ 9*724ba675SRob Herring 10*724ba675SRob Herring#include <dt-bindings/dma/at91.h> 11*724ba675SRob Herring#include <dt-bindings/pinctrl/at91.h> 12*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 13*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 14*724ba675SRob Herring#include <dt-bindings/clock/at91.h> 15*724ba675SRob Herring#include <dt-bindings/mfd/at91-usart.h> 16*724ba675SRob Herring 17*724ba675SRob Herring/ { 18*724ba675SRob Herring #address-cells = <1>; 19*724ba675SRob Herring #size-cells = <1>; 20*724ba675SRob Herring model = "Atmel SAMA5D3 family SoC"; 21*724ba675SRob Herring compatible = "atmel,sama5d3", "atmel,sama5"; 22*724ba675SRob Herring interrupt-parent = <&aic>; 23*724ba675SRob Herring 24*724ba675SRob Herring aliases { 25*724ba675SRob Herring serial0 = &dbgu; 26*724ba675SRob Herring serial1 = &usart0; 27*724ba675SRob Herring serial2 = &usart1; 28*724ba675SRob Herring serial3 = &usart2; 29*724ba675SRob Herring serial4 = &usart3; 30*724ba675SRob Herring serial5 = &uart0; 31*724ba675SRob Herring gpio0 = &pioA; 32*724ba675SRob Herring gpio1 = &pioB; 33*724ba675SRob Herring gpio2 = &pioC; 34*724ba675SRob Herring gpio3 = &pioD; 35*724ba675SRob Herring gpio4 = &pioE; 36*724ba675SRob Herring tcb0 = &tcb0; 37*724ba675SRob Herring i2c0 = &i2c0; 38*724ba675SRob Herring i2c1 = &i2c1; 39*724ba675SRob Herring i2c2 = &i2c2; 40*724ba675SRob Herring ssc0 = &ssc0; 41*724ba675SRob Herring ssc1 = &ssc1; 42*724ba675SRob Herring pwm0 = &pwm0; 43*724ba675SRob Herring }; 44*724ba675SRob Herring cpus { 45*724ba675SRob Herring #address-cells = <1>; 46*724ba675SRob Herring #size-cells = <0>; 47*724ba675SRob Herring cpu@0 { 48*724ba675SRob Herring device_type = "cpu"; 49*724ba675SRob Herring compatible = "arm,cortex-a5"; 50*724ba675SRob Herring reg = <0x0>; 51*724ba675SRob Herring }; 52*724ba675SRob Herring }; 53*724ba675SRob Herring 54*724ba675SRob Herring pmu { 55*724ba675SRob Herring compatible = "arm,cortex-a5-pmu"; 56*724ba675SRob Herring interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>; 57*724ba675SRob Herring }; 58*724ba675SRob Herring 59*724ba675SRob Herring memory@20000000 { 60*724ba675SRob Herring device_type = "memory"; 61*724ba675SRob Herring reg = <0x20000000 0x8000000>; 62*724ba675SRob Herring }; 63*724ba675SRob Herring 64*724ba675SRob Herring clocks { 65*724ba675SRob Herring slow_xtal: slow_xtal { 66*724ba675SRob Herring compatible = "fixed-clock"; 67*724ba675SRob Herring #clock-cells = <0>; 68*724ba675SRob Herring clock-frequency = <0>; 69*724ba675SRob Herring }; 70*724ba675SRob Herring 71*724ba675SRob Herring main_xtal: main_xtal { 72*724ba675SRob Herring compatible = "fixed-clock"; 73*724ba675SRob Herring #clock-cells = <0>; 74*724ba675SRob Herring clock-frequency = <0>; 75*724ba675SRob Herring }; 76*724ba675SRob Herring 77*724ba675SRob Herring adc_op_clk: adc_op_clk { 78*724ba675SRob Herring compatible = "fixed-clock"; 79*724ba675SRob Herring #clock-cells = <0>; 80*724ba675SRob Herring clock-frequency = <1000000>; 81*724ba675SRob Herring }; 82*724ba675SRob Herring }; 83*724ba675SRob Herring 84*724ba675SRob Herring sram: sram@300000 { 85*724ba675SRob Herring compatible = "mmio-sram"; 86*724ba675SRob Herring reg = <0x00300000 0x20000>; 87*724ba675SRob Herring #address-cells = <1>; 88*724ba675SRob Herring #size-cells = <1>; 89*724ba675SRob Herring ranges = <0 0x00300000 0x20000>; 90*724ba675SRob Herring }; 91*724ba675SRob Herring 92*724ba675SRob Herring ahb { 93*724ba675SRob Herring compatible = "simple-bus"; 94*724ba675SRob Herring #address-cells = <1>; 95*724ba675SRob Herring #size-cells = <1>; 96*724ba675SRob Herring ranges; 97*724ba675SRob Herring 98*724ba675SRob Herring apb { 99*724ba675SRob Herring compatible = "simple-bus"; 100*724ba675SRob Herring #address-cells = <1>; 101*724ba675SRob Herring #size-cells = <1>; 102*724ba675SRob Herring ranges; 103*724ba675SRob Herring 104*724ba675SRob Herring mmc0: mmc@f0000000 { 105*724ba675SRob Herring compatible = "atmel,hsmci"; 106*724ba675SRob Herring reg = <0xf0000000 0x600>; 107*724ba675SRob Herring interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; 108*724ba675SRob Herring dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>; 109*724ba675SRob Herring dma-names = "rxtx"; 110*724ba675SRob Herring pinctrl-names = "default"; 111*724ba675SRob Herring pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; 112*724ba675SRob Herring status = "disabled"; 113*724ba675SRob Herring #address-cells = <1>; 114*724ba675SRob Herring #size-cells = <0>; 115*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; 116*724ba675SRob Herring clock-names = "mci_clk"; 117*724ba675SRob Herring }; 118*724ba675SRob Herring 119*724ba675SRob Herring spi0: spi@f0004000 { 120*724ba675SRob Herring #address-cells = <1>; 121*724ba675SRob Herring #size-cells = <0>; 122*724ba675SRob Herring compatible = "atmel,at91rm9200-spi"; 123*724ba675SRob Herring reg = <0xf0004000 0x100>; 124*724ba675SRob Herring interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; 125*724ba675SRob Herring dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>, 126*724ba675SRob Herring <&dma0 2 AT91_DMA_CFG_PER_ID(2)>; 127*724ba675SRob Herring dma-names = "tx", "rx"; 128*724ba675SRob Herring pinctrl-names = "default"; 129*724ba675SRob Herring pinctrl-0 = <&pinctrl_spi0>; 130*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; 131*724ba675SRob Herring clock-names = "spi_clk"; 132*724ba675SRob Herring status = "disabled"; 133*724ba675SRob Herring }; 134*724ba675SRob Herring 135*724ba675SRob Herring ssc0: ssc@f0008000 { 136*724ba675SRob Herring compatible = "atmel,at91sam9g45-ssc"; 137*724ba675SRob Herring reg = <0xf0008000 0x4000>; 138*724ba675SRob Herring interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; 139*724ba675SRob Herring dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>, 140*724ba675SRob Herring <&dma0 2 AT91_DMA_CFG_PER_ID(14)>; 141*724ba675SRob Herring dma-names = "tx", "rx"; 142*724ba675SRob Herring pinctrl-names = "default"; 143*724ba675SRob Herring pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 144*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; 145*724ba675SRob Herring clock-names = "pclk"; 146*724ba675SRob Herring status = "disabled"; 147*724ba675SRob Herring }; 148*724ba675SRob Herring 149*724ba675SRob Herring tcb0: timer@f0010000 { 150*724ba675SRob Herring compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; 151*724ba675SRob Herring #address-cells = <1>; 152*724ba675SRob Herring #size-cells = <0>; 153*724ba675SRob Herring reg = <0xf0010000 0x100>; 154*724ba675SRob Herring interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; 155*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&clk32k>; 156*724ba675SRob Herring clock-names = "t0_clk", "slow_clk"; 157*724ba675SRob Herring }; 158*724ba675SRob Herring 159*724ba675SRob Herring i2c0: i2c@f0014000 { 160*724ba675SRob Herring compatible = "atmel,at91sam9x5-i2c"; 161*724ba675SRob Herring reg = <0xf0014000 0x4000>; 162*724ba675SRob Herring interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>; 163*724ba675SRob Herring dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>, 164*724ba675SRob Herring <&dma0 2 AT91_DMA_CFG_PER_ID(8)>; 165*724ba675SRob Herring dma-names = "tx", "rx"; 166*724ba675SRob Herring pinctrl-names = "default", "gpio"; 167*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c0>; 168*724ba675SRob Herring pinctrl-1 = <&pinctrl_i2c0_gpio>; 169*724ba675SRob Herring sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>; 170*724ba675SRob Herring scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 171*724ba675SRob Herring #address-cells = <1>; 172*724ba675SRob Herring #size-cells = <0>; 173*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; 174*724ba675SRob Herring status = "disabled"; 175*724ba675SRob Herring }; 176*724ba675SRob Herring 177*724ba675SRob Herring i2c1: i2c@f0018000 { 178*724ba675SRob Herring compatible = "atmel,at91sam9x5-i2c"; 179*724ba675SRob Herring reg = <0xf0018000 0x4000>; 180*724ba675SRob Herring interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>; 181*724ba675SRob Herring dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>, 182*724ba675SRob Herring <&dma0 2 AT91_DMA_CFG_PER_ID(10)>; 183*724ba675SRob Herring dma-names = "tx", "rx"; 184*724ba675SRob Herring pinctrl-names = "default", "gpio"; 185*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 186*724ba675SRob Herring pinctrl-1 = <&pinctrl_i2c1_gpio>; 187*724ba675SRob Herring sda-gpios = <&pioC 26 GPIO_ACTIVE_HIGH>; 188*724ba675SRob Herring scl-gpios = <&pioC 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 189*724ba675SRob Herring #address-cells = <1>; 190*724ba675SRob Herring #size-cells = <0>; 191*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 192*724ba675SRob Herring status = "disabled"; 193*724ba675SRob Herring }; 194*724ba675SRob Herring 195*724ba675SRob Herring usart0: serial@f001c000 { 196*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 197*724ba675SRob Herring reg = <0xf001c000 0x100>; 198*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 199*724ba675SRob Herring interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; 200*724ba675SRob Herring dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, 201*724ba675SRob Herring <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 202*724ba675SRob Herring dma-names = "tx", "rx"; 203*724ba675SRob Herring pinctrl-names = "default"; 204*724ba675SRob Herring pinctrl-0 = <&pinctrl_usart0>; 205*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 206*724ba675SRob Herring clock-names = "usart"; 207*724ba675SRob Herring status = "disabled"; 208*724ba675SRob Herring }; 209*724ba675SRob Herring 210*724ba675SRob Herring usart1: serial@f0020000 { 211*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 212*724ba675SRob Herring reg = <0xf0020000 0x100>; 213*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 214*724ba675SRob Herring interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; 215*724ba675SRob Herring dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>, 216*724ba675SRob Herring <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 217*724ba675SRob Herring dma-names = "tx", "rx"; 218*724ba675SRob Herring pinctrl-names = "default"; 219*724ba675SRob Herring pinctrl-0 = <&pinctrl_usart1>; 220*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 221*724ba675SRob Herring clock-names = "usart"; 222*724ba675SRob Herring status = "disabled"; 223*724ba675SRob Herring }; 224*724ba675SRob Herring 225*724ba675SRob Herring uart0: serial@f0024000 { 226*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 227*724ba675SRob Herring reg = <0xf0024000 0x100>; 228*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 229*724ba675SRob Herring interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 230*724ba675SRob Herring pinctrl-names = "default"; 231*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart0>; 232*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; 233*724ba675SRob Herring clock-names = "usart"; 234*724ba675SRob Herring status = "disabled"; 235*724ba675SRob Herring }; 236*724ba675SRob Herring 237*724ba675SRob Herring pwm0: pwm@f002c000 { 238*724ba675SRob Herring compatible = "atmel,sama5d3-pwm"; 239*724ba675SRob Herring reg = <0xf002c000 0x300>; 240*724ba675SRob Herring interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>; 241*724ba675SRob Herring #pwm-cells = <3>; 242*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 28>; 243*724ba675SRob Herring status = "disabled"; 244*724ba675SRob Herring }; 245*724ba675SRob Herring 246*724ba675SRob Herring isi: isi@f0034000 { 247*724ba675SRob Herring compatible = "atmel,at91sam9g45-isi"; 248*724ba675SRob Herring reg = <0xf0034000 0x4000>; 249*724ba675SRob Herring interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>; 250*724ba675SRob Herring pinctrl-names = "default"; 251*724ba675SRob Herring pinctrl-0 = <&pinctrl_isi_data_0_7>; 252*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; 253*724ba675SRob Herring clock-names = "isi_clk"; 254*724ba675SRob Herring status = "disabled"; 255*724ba675SRob Herring port { 256*724ba675SRob Herring #address-cells = <1>; 257*724ba675SRob Herring #size-cells = <0>; 258*724ba675SRob Herring }; 259*724ba675SRob Herring }; 260*724ba675SRob Herring 261*724ba675SRob Herring sfr: sfr@f0038000 { 262*724ba675SRob Herring compatible = "atmel,sama5d3-sfr", "syscon"; 263*724ba675SRob Herring reg = <0xf0038000 0x60>; 264*724ba675SRob Herring }; 265*724ba675SRob Herring 266*724ba675SRob Herring mmc1: mmc@f8000000 { 267*724ba675SRob Herring compatible = "atmel,hsmci"; 268*724ba675SRob Herring reg = <0xf8000000 0x600>; 269*724ba675SRob Herring interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>; 270*724ba675SRob Herring dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>; 271*724ba675SRob Herring dma-names = "rxtx"; 272*724ba675SRob Herring pinctrl-names = "default"; 273*724ba675SRob Herring pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; 274*724ba675SRob Herring status = "disabled"; 275*724ba675SRob Herring #address-cells = <1>; 276*724ba675SRob Herring #size-cells = <0>; 277*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; 278*724ba675SRob Herring clock-names = "mci_clk"; 279*724ba675SRob Herring }; 280*724ba675SRob Herring 281*724ba675SRob Herring spi1: spi@f8008000 { 282*724ba675SRob Herring #address-cells = <1>; 283*724ba675SRob Herring #size-cells = <0>; 284*724ba675SRob Herring compatible = "atmel,at91rm9200-spi"; 285*724ba675SRob Herring reg = <0xf8008000 0x100>; 286*724ba675SRob Herring interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; 287*724ba675SRob Herring dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>, 288*724ba675SRob Herring <&dma1 2 AT91_DMA_CFG_PER_ID(16)>; 289*724ba675SRob Herring dma-names = "tx", "rx"; 290*724ba675SRob Herring pinctrl-names = "default"; 291*724ba675SRob Herring pinctrl-0 = <&pinctrl_spi1>; 292*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 25>; 293*724ba675SRob Herring clock-names = "spi_clk"; 294*724ba675SRob Herring status = "disabled"; 295*724ba675SRob Herring }; 296*724ba675SRob Herring 297*724ba675SRob Herring ssc1: ssc@f800c000 { 298*724ba675SRob Herring compatible = "atmel,at91sam9g45-ssc"; 299*724ba675SRob Herring reg = <0xf800c000 0x4000>; 300*724ba675SRob Herring interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; 301*724ba675SRob Herring dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>, 302*724ba675SRob Herring <&dma1 2 AT91_DMA_CFG_PER_ID(4)>; 303*724ba675SRob Herring dma-names = "tx", "rx"; 304*724ba675SRob Herring pinctrl-names = "default"; 305*724ba675SRob Herring pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 306*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; 307*724ba675SRob Herring clock-names = "pclk"; 308*724ba675SRob Herring status = "disabled"; 309*724ba675SRob Herring }; 310*724ba675SRob Herring 311*724ba675SRob Herring adc0: adc@f8018000 { 312*724ba675SRob Herring compatible = "atmel,sama5d3-adc"; 313*724ba675SRob Herring reg = <0xf8018000 0x100>; 314*724ba675SRob Herring interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; 315*724ba675SRob Herring pinctrl-names = "default"; 316*724ba675SRob Herring pinctrl-0 = < 317*724ba675SRob Herring &pinctrl_adc0_adtrg 318*724ba675SRob Herring &pinctrl_adc0_ad0 319*724ba675SRob Herring &pinctrl_adc0_ad1 320*724ba675SRob Herring &pinctrl_adc0_ad2 321*724ba675SRob Herring &pinctrl_adc0_ad3 322*724ba675SRob Herring &pinctrl_adc0_ad4 323*724ba675SRob Herring &pinctrl_adc0_ad5 324*724ba675SRob Herring &pinctrl_adc0_ad6 325*724ba675SRob Herring &pinctrl_adc0_ad7 326*724ba675SRob Herring &pinctrl_adc0_ad8 327*724ba675SRob Herring &pinctrl_adc0_ad9 328*724ba675SRob Herring &pinctrl_adc0_ad10 329*724ba675SRob Herring &pinctrl_adc0_ad11 330*724ba675SRob Herring >; 331*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, 332*724ba675SRob Herring <&adc_op_clk>; 333*724ba675SRob Herring clock-names = "adc_clk", "adc_op_clk"; 334*724ba675SRob Herring atmel,adc-channels-used = <0xfff>; 335*724ba675SRob Herring atmel,adc-startup-time = <40>; 336*724ba675SRob Herring atmel,adc-use-external-triggers; 337*724ba675SRob Herring atmel,adc-vref = <3000>; 338*724ba675SRob Herring atmel,adc-sample-hold-time = <11>; 339*724ba675SRob Herring status = "disabled"; 340*724ba675SRob Herring }; 341*724ba675SRob Herring 342*724ba675SRob Herring i2c2: i2c@f801c000 { 343*724ba675SRob Herring compatible = "atmel,at91sam9x5-i2c"; 344*724ba675SRob Herring reg = <0xf801c000 0x4000>; 345*724ba675SRob Herring interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>; 346*724ba675SRob Herring dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>, 347*724ba675SRob Herring <&dma1 2 AT91_DMA_CFG_PER_ID(12)>; 348*724ba675SRob Herring dma-names = "tx", "rx"; 349*724ba675SRob Herring pinctrl-names = "default", "gpio"; 350*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 351*724ba675SRob Herring pinctrl-1 = <&pinctrl_i2c2_gpio>; 352*724ba675SRob Herring sda-gpios = <&pioA 18 GPIO_ACTIVE_HIGH>; 353*724ba675SRob Herring scl-gpios = <&pioA 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 354*724ba675SRob Herring #address-cells = <1>; 355*724ba675SRob Herring #size-cells = <0>; 356*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; 357*724ba675SRob Herring status = "disabled"; 358*724ba675SRob Herring }; 359*724ba675SRob Herring 360*724ba675SRob Herring usart2: serial@f8020000 { 361*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 362*724ba675SRob Herring reg = <0xf8020000 0x100>; 363*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 364*724ba675SRob Herring interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 365*724ba675SRob Herring dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>, 366*724ba675SRob Herring <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 367*724ba675SRob Herring dma-names = "tx", "rx"; 368*724ba675SRob Herring pinctrl-names = "default"; 369*724ba675SRob Herring pinctrl-0 = <&pinctrl_usart2>; 370*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 371*724ba675SRob Herring clock-names = "usart"; 372*724ba675SRob Herring status = "disabled"; 373*724ba675SRob Herring }; 374*724ba675SRob Herring 375*724ba675SRob Herring usart3: serial@f8024000 { 376*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 377*724ba675SRob Herring reg = <0xf8024000 0x100>; 378*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 379*724ba675SRob Herring interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 380*724ba675SRob Herring dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>, 381*724ba675SRob Herring <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 382*724ba675SRob Herring dma-names = "tx", "rx"; 383*724ba675SRob Herring pinctrl-names = "default"; 384*724ba675SRob Herring pinctrl-0 = <&pinctrl_usart3>; 385*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 386*724ba675SRob Herring clock-names = "usart"; 387*724ba675SRob Herring status = "disabled"; 388*724ba675SRob Herring }; 389*724ba675SRob Herring 390*724ba675SRob Herring sha: crypto@f8034000 { 391*724ba675SRob Herring compatible = "atmel,at91sam9g46-sha"; 392*724ba675SRob Herring reg = <0xf8034000 0x100>; 393*724ba675SRob Herring interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; 394*724ba675SRob Herring dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>; 395*724ba675SRob Herring dma-names = "tx"; 396*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; 397*724ba675SRob Herring clock-names = "sha_clk"; 398*724ba675SRob Herring }; 399*724ba675SRob Herring 400*724ba675SRob Herring aes: crypto@f8038000 { 401*724ba675SRob Herring compatible = "atmel,at91sam9g46-aes"; 402*724ba675SRob Herring reg = <0xf8038000 0x100>; 403*724ba675SRob Herring interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>; 404*724ba675SRob Herring dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>, 405*724ba675SRob Herring <&dma1 2 AT91_DMA_CFG_PER_ID(19)>; 406*724ba675SRob Herring dma-names = "tx", "rx"; 407*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 43>; 408*724ba675SRob Herring clock-names = "aes_clk"; 409*724ba675SRob Herring }; 410*724ba675SRob Herring 411*724ba675SRob Herring tdes: crypto@f803c000 { 412*724ba675SRob Herring compatible = "atmel,at91sam9g46-tdes"; 413*724ba675SRob Herring reg = <0xf803c000 0x100>; 414*724ba675SRob Herring interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>; 415*724ba675SRob Herring dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>, 416*724ba675SRob Herring <&dma1 2 AT91_DMA_CFG_PER_ID(21)>; 417*724ba675SRob Herring dma-names = "tx", "rx"; 418*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 44>; 419*724ba675SRob Herring clock-names = "tdes_clk"; 420*724ba675SRob Herring }; 421*724ba675SRob Herring 422*724ba675SRob Herring trng@f8040000 { 423*724ba675SRob Herring compatible = "atmel,at91sam9g45-trng"; 424*724ba675SRob Herring reg = <0xf8040000 0x100>; 425*724ba675SRob Herring interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>; 426*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; 427*724ba675SRob Herring }; 428*724ba675SRob Herring 429*724ba675SRob Herring hsmc: hsmc@ffffc000 { 430*724ba675SRob Herring compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd"; 431*724ba675SRob Herring reg = <0xffffc000 0x1000>; 432*724ba675SRob Herring interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>; 433*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 434*724ba675SRob Herring #address-cells = <1>; 435*724ba675SRob Herring #size-cells = <1>; 436*724ba675SRob Herring ranges; 437*724ba675SRob Herring 438*724ba675SRob Herring pmecc: ecc-engine@ffffc070 { 439*724ba675SRob Herring compatible = "atmel,at91sam9g45-pmecc"; 440*724ba675SRob Herring reg = <0xffffc070 0x490>, 441*724ba675SRob Herring <0xffffc500 0x100>; 442*724ba675SRob Herring }; 443*724ba675SRob Herring }; 444*724ba675SRob Herring 445*724ba675SRob Herring dma0: dma-controller@ffffe600 { 446*724ba675SRob Herring compatible = "atmel,at91sam9g45-dma"; 447*724ba675SRob Herring reg = <0xffffe600 0x200>; 448*724ba675SRob Herring interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; 449*724ba675SRob Herring #dma-cells = <2>; 450*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 30>; 451*724ba675SRob Herring clock-names = "dma_clk"; 452*724ba675SRob Herring }; 453*724ba675SRob Herring 454*724ba675SRob Herring dma1: dma-controller@ffffe800 { 455*724ba675SRob Herring compatible = "atmel,at91sam9g45-dma"; 456*724ba675SRob Herring reg = <0xffffe800 0x200>; 457*724ba675SRob Herring interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; 458*724ba675SRob Herring #dma-cells = <2>; 459*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 31>; 460*724ba675SRob Herring clock-names = "dma_clk"; 461*724ba675SRob Herring }; 462*724ba675SRob Herring 463*724ba675SRob Herring ramc0: ramc@ffffea00 { 464*724ba675SRob Herring compatible = "atmel,sama5d3-ddramc"; 465*724ba675SRob Herring reg = <0xffffea00 0x200>; 466*724ba675SRob Herring clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>; 467*724ba675SRob Herring clock-names = "ddrck", "mpddr"; 468*724ba675SRob Herring }; 469*724ba675SRob Herring 470*724ba675SRob Herring dbgu: serial@ffffee00 { 471*724ba675SRob Herring compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 472*724ba675SRob Herring reg = <0xffffee00 0x200>; 473*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 474*724ba675SRob Herring interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; 475*724ba675SRob Herring dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>, 476*724ba675SRob Herring <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 477*724ba675SRob Herring dma-names = "tx", "rx"; 478*724ba675SRob Herring pinctrl-names = "default"; 479*724ba675SRob Herring pinctrl-0 = <&pinctrl_dbgu>; 480*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 481*724ba675SRob Herring clock-names = "usart"; 482*724ba675SRob Herring status = "disabled"; 483*724ba675SRob Herring }; 484*724ba675SRob Herring 485*724ba675SRob Herring aic: interrupt-controller@fffff000 { 486*724ba675SRob Herring #interrupt-cells = <3>; 487*724ba675SRob Herring compatible = "atmel,sama5d3-aic"; 488*724ba675SRob Herring interrupt-controller; 489*724ba675SRob Herring reg = <0xfffff000 0x200>; 490*724ba675SRob Herring atmel,external-irqs = <47>; 491*724ba675SRob Herring }; 492*724ba675SRob Herring 493*724ba675SRob Herring pinctrl: pinctrl@fffff200 { 494*724ba675SRob Herring #address-cells = <1>; 495*724ba675SRob Herring #size-cells = <1>; 496*724ba675SRob Herring compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus"; 497*724ba675SRob Herring ranges = <0xfffff200 0xfffff200 0xa00>; 498*724ba675SRob Herring atmel,mux-mask = < 499*724ba675SRob Herring /* A B C */ 500*724ba675SRob Herring 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */ 501*724ba675SRob Herring 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */ 502*724ba675SRob Herring 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */ 503*724ba675SRob Herring 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */ 504*724ba675SRob Herring 0xffffffff 0xbf9f8000 0x18000000 /* pioE */ 505*724ba675SRob Herring >; 506*724ba675SRob Herring 507*724ba675SRob Herring /* shared pinctrl settings */ 508*724ba675SRob Herring adc0 { 509*724ba675SRob Herring pinctrl_adc0_adtrg: adc0_adtrg { 510*724ba675SRob Herring atmel,pins = 511*724ba675SRob Herring <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */ 512*724ba675SRob Herring }; 513*724ba675SRob Herring pinctrl_adc0_ad0: adc0_ad0 { 514*724ba675SRob Herring atmel,pins = 515*724ba675SRob Herring <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */ 516*724ba675SRob Herring }; 517*724ba675SRob Herring pinctrl_adc0_ad1: adc0_ad1 { 518*724ba675SRob Herring atmel,pins = 519*724ba675SRob Herring <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */ 520*724ba675SRob Herring }; 521*724ba675SRob Herring pinctrl_adc0_ad2: adc0_ad2 { 522*724ba675SRob Herring atmel,pins = 523*724ba675SRob Herring <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */ 524*724ba675SRob Herring }; 525*724ba675SRob Herring pinctrl_adc0_ad3: adc0_ad3 { 526*724ba675SRob Herring atmel,pins = 527*724ba675SRob Herring <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */ 528*724ba675SRob Herring }; 529*724ba675SRob Herring pinctrl_adc0_ad4: adc0_ad4 { 530*724ba675SRob Herring atmel,pins = 531*724ba675SRob Herring <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */ 532*724ba675SRob Herring }; 533*724ba675SRob Herring pinctrl_adc0_ad5: adc0_ad5 { 534*724ba675SRob Herring atmel,pins = 535*724ba675SRob Herring <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */ 536*724ba675SRob Herring }; 537*724ba675SRob Herring pinctrl_adc0_ad6: adc0_ad6 { 538*724ba675SRob Herring atmel,pins = 539*724ba675SRob Herring <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */ 540*724ba675SRob Herring }; 541*724ba675SRob Herring pinctrl_adc0_ad7: adc0_ad7 { 542*724ba675SRob Herring atmel,pins = 543*724ba675SRob Herring <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */ 544*724ba675SRob Herring }; 545*724ba675SRob Herring pinctrl_adc0_ad8: adc0_ad8 { 546*724ba675SRob Herring atmel,pins = 547*724ba675SRob Herring <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */ 548*724ba675SRob Herring }; 549*724ba675SRob Herring pinctrl_adc0_ad9: adc0_ad9 { 550*724ba675SRob Herring atmel,pins = 551*724ba675SRob Herring <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */ 552*724ba675SRob Herring }; 553*724ba675SRob Herring pinctrl_adc0_ad10: adc0_ad10 { 554*724ba675SRob Herring atmel,pins = 555*724ba675SRob Herring <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */ 556*724ba675SRob Herring }; 557*724ba675SRob Herring pinctrl_adc0_ad11: adc0_ad11 { 558*724ba675SRob Herring atmel,pins = 559*724ba675SRob Herring <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */ 560*724ba675SRob Herring }; 561*724ba675SRob Herring }; 562*724ba675SRob Herring 563*724ba675SRob Herring dbgu { 564*724ba675SRob Herring pinctrl_dbgu: dbgu-0 { 565*724ba675SRob Herring atmel,pins = 566*724ba675SRob Herring <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 567*724ba675SRob Herring AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 568*724ba675SRob Herring }; 569*724ba675SRob Herring }; 570*724ba675SRob Herring 571*724ba675SRob Herring ebi { 572*724ba675SRob Herring pinctrl_ebi_addr: ebi-addr-0 { 573*724ba675SRob Herring atmel,pins = 574*724ba675SRob Herring <AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE 575*724ba675SRob Herring AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE 576*724ba675SRob Herring AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE 577*724ba675SRob Herring AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE 578*724ba675SRob Herring AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE 579*724ba675SRob Herring AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE 580*724ba675SRob Herring AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE 581*724ba675SRob Herring AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE 582*724ba675SRob Herring AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE 583*724ba675SRob Herring AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE 584*724ba675SRob Herring AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE 585*724ba675SRob Herring AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE 586*724ba675SRob Herring AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE 587*724ba675SRob Herring AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE 588*724ba675SRob Herring AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE 589*724ba675SRob Herring AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE 590*724ba675SRob Herring AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE 591*724ba675SRob Herring AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE 592*724ba675SRob Herring AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE 593*724ba675SRob Herring AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE 594*724ba675SRob Herring AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE 595*724ba675SRob Herring AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE 596*724ba675SRob Herring AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 597*724ba675SRob Herring }; 598*724ba675SRob Herring 599*724ba675SRob Herring pinctrl_ebi_nand_addr: ebi-addr-1 { 600*724ba675SRob Herring atmel,pins = 601*724ba675SRob Herring <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE 602*724ba675SRob Herring AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; 603*724ba675SRob Herring }; 604*724ba675SRob Herring 605*724ba675SRob Herring pinctrl_ebi_cs0: ebi-cs0-0 { 606*724ba675SRob Herring atmel,pins = 607*724ba675SRob Herring <AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; 608*724ba675SRob Herring }; 609*724ba675SRob Herring 610*724ba675SRob Herring pinctrl_ebi_cs1: ebi-cs1-0 { 611*724ba675SRob Herring atmel,pins = 612*724ba675SRob Herring <AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; 613*724ba675SRob Herring }; 614*724ba675SRob Herring 615*724ba675SRob Herring pinctrl_ebi_cs2: ebi-cs2-0 { 616*724ba675SRob Herring atmel,pins = 617*724ba675SRob Herring <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; 618*724ba675SRob Herring }; 619*724ba675SRob Herring 620*724ba675SRob Herring pinctrl_ebi_nwait: ebi-nwait-0 { 621*724ba675SRob Herring atmel,pins = 622*724ba675SRob Herring <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; 623*724ba675SRob Herring }; 624*724ba675SRob Herring 625*724ba675SRob Herring pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 { 626*724ba675SRob Herring atmel,pins = 627*724ba675SRob Herring <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 628*724ba675SRob Herring }; 629*724ba675SRob Herring }; 630*724ba675SRob Herring 631*724ba675SRob Herring i2c0 { 632*724ba675SRob Herring pinctrl_i2c0: i2c0-0 { 633*724ba675SRob Herring atmel,pins = 634*724ba675SRob Herring <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ 635*724ba675SRob Herring AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ 636*724ba675SRob Herring }; 637*724ba675SRob Herring 638*724ba675SRob Herring pinctrl_i2c0_gpio: i2c0-gpio { 639*724ba675SRob Herring atmel,pins = 640*724ba675SRob Herring <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 641*724ba675SRob Herring AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 642*724ba675SRob Herring }; 643*724ba675SRob Herring }; 644*724ba675SRob Herring 645*724ba675SRob Herring i2c1 { 646*724ba675SRob Herring pinctrl_i2c1: i2c1-0 { 647*724ba675SRob Herring atmel,pins = 648*724ba675SRob Herring <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */ 649*724ba675SRob Herring AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */ 650*724ba675SRob Herring }; 651*724ba675SRob Herring 652*724ba675SRob Herring pinctrl_i2c1_gpio: i2c1-gpio { 653*724ba675SRob Herring atmel,pins = 654*724ba675SRob Herring <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 655*724ba675SRob Herring AT91_PIOC 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 656*724ba675SRob Herring }; 657*724ba675SRob Herring }; 658*724ba675SRob Herring 659*724ba675SRob Herring i2c2 { 660*724ba675SRob Herring pinctrl_i2c2: i2c2-0 { 661*724ba675SRob Herring atmel,pins = 662*724ba675SRob Herring <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */ 663*724ba675SRob Herring AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */ 664*724ba675SRob Herring }; 665*724ba675SRob Herring 666*724ba675SRob Herring pinctrl_i2c2_gpio: i2c2-gpio { 667*724ba675SRob Herring atmel,pins = 668*724ba675SRob Herring <AT91_PIOA 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 669*724ba675SRob Herring AT91_PIOA 19 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 670*724ba675SRob Herring }; 671*724ba675SRob Herring }; 672*724ba675SRob Herring 673*724ba675SRob Herring isi { 674*724ba675SRob Herring pinctrl_isi_data_0_7: isi-0-data-0-7 { 675*724ba675SRob Herring atmel,pins = 676*724ba675SRob Herring <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */ 677*724ba675SRob Herring AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */ 678*724ba675SRob Herring AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */ 679*724ba675SRob Herring AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */ 680*724ba675SRob Herring AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */ 681*724ba675SRob Herring AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */ 682*724ba675SRob Herring AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */ 683*724ba675SRob Herring AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */ 684*724ba675SRob Herring AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */ 685*724ba675SRob Herring AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */ 686*724ba675SRob Herring AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ 687*724ba675SRob Herring }; 688*724ba675SRob Herring 689*724ba675SRob Herring pinctrl_isi_data_8_9: isi-0-data-8-9 { 690*724ba675SRob Herring atmel,pins = 691*724ba675SRob Herring <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ 692*724ba675SRob Herring AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */ 693*724ba675SRob Herring }; 694*724ba675SRob Herring 695*724ba675SRob Herring pinctrl_isi_data_10_11: isi-0-data-10-11 { 696*724ba675SRob Herring atmel,pins = 697*724ba675SRob Herring <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */ 698*724ba675SRob Herring AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */ 699*724ba675SRob Herring }; 700*724ba675SRob Herring }; 701*724ba675SRob Herring 702*724ba675SRob Herring mmc0 { 703*724ba675SRob Herring pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { 704*724ba675SRob Herring atmel,pins = 705*724ba675SRob Herring <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */ 706*724ba675SRob Herring AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */ 707*724ba675SRob Herring AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */ 708*724ba675SRob Herring }; 709*724ba675SRob Herring pinctrl_mmc0_dat1_3: mmc0_dat1_3 { 710*724ba675SRob Herring atmel,pins = 711*724ba675SRob Herring <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */ 712*724ba675SRob Herring AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */ 713*724ba675SRob Herring AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */ 714*724ba675SRob Herring }; 715*724ba675SRob Herring pinctrl_mmc0_dat4_7: mmc0_dat4_7 { 716*724ba675SRob Herring atmel,pins = 717*724ba675SRob Herring <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */ 718*724ba675SRob Herring AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */ 719*724ba675SRob Herring AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conflicts with TCLK0, PWMH3 */ 720*724ba675SRob Herring AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */ 721*724ba675SRob Herring }; 722*724ba675SRob Herring }; 723*724ba675SRob Herring 724*724ba675SRob Herring mmc1 { 725*724ba675SRob Herring pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { 726*724ba675SRob Herring atmel,pins = 727*724ba675SRob Herring <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */ 728*724ba675SRob Herring AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */ 729*724ba675SRob Herring AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */ 730*724ba675SRob Herring }; 731*724ba675SRob Herring pinctrl_mmc1_dat1_3: mmc1_dat1_3 { 732*724ba675SRob Herring atmel,pins = 733*724ba675SRob Herring <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */ 734*724ba675SRob Herring AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */ 735*724ba675SRob Herring AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */ 736*724ba675SRob Herring }; 737*724ba675SRob Herring }; 738*724ba675SRob Herring 739*724ba675SRob Herring nand0 { 740*724ba675SRob Herring pinctrl_nand0_ale_cle: nand0_ale_cle-0 { 741*724ba675SRob Herring atmel,pins = 742*724ba675SRob Herring <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */ 743*724ba675SRob Herring AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */ 744*724ba675SRob Herring }; 745*724ba675SRob Herring }; 746*724ba675SRob Herring 747*724ba675SRob Herring pwm0 { 748*724ba675SRob Herring pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 { 749*724ba675SRob Herring atmel,pins = 750*724ba675SRob Herring <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */ 751*724ba675SRob Herring }; 752*724ba675SRob Herring pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 { 753*724ba675SRob Herring atmel,pins = 754*724ba675SRob Herring <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */ 755*724ba675SRob Herring }; 756*724ba675SRob Herring pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 { 757*724ba675SRob Herring atmel,pins = 758*724ba675SRob Herring <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */ 759*724ba675SRob Herring }; 760*724ba675SRob Herring pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 { 761*724ba675SRob Herring atmel,pins = 762*724ba675SRob Herring <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */ 763*724ba675SRob Herring }; 764*724ba675SRob Herring 765*724ba675SRob Herring pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 { 766*724ba675SRob Herring atmel,pins = 767*724ba675SRob Herring <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */ 768*724ba675SRob Herring }; 769*724ba675SRob Herring pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 { 770*724ba675SRob Herring atmel,pins = 771*724ba675SRob Herring <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */ 772*724ba675SRob Herring }; 773*724ba675SRob Herring pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 { 774*724ba675SRob Herring atmel,pins = 775*724ba675SRob Herring <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */ 776*724ba675SRob Herring }; 777*724ba675SRob Herring pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 { 778*724ba675SRob Herring atmel,pins = 779*724ba675SRob Herring <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */ 780*724ba675SRob Herring }; 781*724ba675SRob Herring pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 { 782*724ba675SRob Herring atmel,pins = 783*724ba675SRob Herring <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */ 784*724ba675SRob Herring }; 785*724ba675SRob Herring pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 { 786*724ba675SRob Herring atmel,pins = 787*724ba675SRob Herring <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */ 788*724ba675SRob Herring }; 789*724ba675SRob Herring 790*724ba675SRob Herring pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 { 791*724ba675SRob Herring atmel,pins = 792*724ba675SRob Herring <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */ 793*724ba675SRob Herring }; 794*724ba675SRob Herring pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 { 795*724ba675SRob Herring atmel,pins = 796*724ba675SRob Herring <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */ 797*724ba675SRob Herring }; 798*724ba675SRob Herring pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 { 799*724ba675SRob Herring atmel,pins = 800*724ba675SRob Herring <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */ 801*724ba675SRob Herring }; 802*724ba675SRob Herring pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 { 803*724ba675SRob Herring atmel,pins = 804*724ba675SRob Herring <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */ 805*724ba675SRob Herring }; 806*724ba675SRob Herring 807*724ba675SRob Herring pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 { 808*724ba675SRob Herring atmel,pins = 809*724ba675SRob Herring <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */ 810*724ba675SRob Herring }; 811*724ba675SRob Herring pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 { 812*724ba675SRob Herring atmel,pins = 813*724ba675SRob Herring <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */ 814*724ba675SRob Herring }; 815*724ba675SRob Herring pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 { 816*724ba675SRob Herring atmel,pins = 817*724ba675SRob Herring <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */ 818*724ba675SRob Herring }; 819*724ba675SRob Herring pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 { 820*724ba675SRob Herring atmel,pins = 821*724ba675SRob Herring <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */ 822*724ba675SRob Herring }; 823*724ba675SRob Herring }; 824*724ba675SRob Herring 825*724ba675SRob Herring spi0 { 826*724ba675SRob Herring pinctrl_spi0: spi0-0 { 827*724ba675SRob Herring atmel,pins = 828*724ba675SRob Herring <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */ 829*724ba675SRob Herring AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */ 830*724ba675SRob Herring AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */ 831*724ba675SRob Herring }; 832*724ba675SRob Herring }; 833*724ba675SRob Herring 834*724ba675SRob Herring spi1 { 835*724ba675SRob Herring pinctrl_spi1: spi1-0 { 836*724ba675SRob Herring atmel,pins = 837*724ba675SRob Herring <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */ 838*724ba675SRob Herring AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */ 839*724ba675SRob Herring AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */ 840*724ba675SRob Herring }; 841*724ba675SRob Herring }; 842*724ba675SRob Herring 843*724ba675SRob Herring ssc0 { 844*724ba675SRob Herring pinctrl_ssc0_tx: ssc0_tx { 845*724ba675SRob Herring atmel,pins = 846*724ba675SRob Herring <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */ 847*724ba675SRob Herring AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */ 848*724ba675SRob Herring AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */ 849*724ba675SRob Herring }; 850*724ba675SRob Herring 851*724ba675SRob Herring pinctrl_ssc0_rx: ssc0_rx { 852*724ba675SRob Herring atmel,pins = 853*724ba675SRob Herring <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */ 854*724ba675SRob Herring AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */ 855*724ba675SRob Herring AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */ 856*724ba675SRob Herring }; 857*724ba675SRob Herring }; 858*724ba675SRob Herring 859*724ba675SRob Herring ssc1 { 860*724ba675SRob Herring pinctrl_ssc1_tx: ssc1_tx { 861*724ba675SRob Herring atmel,pins = 862*724ba675SRob Herring <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */ 863*724ba675SRob Herring AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */ 864*724ba675SRob Herring AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */ 865*724ba675SRob Herring }; 866*724ba675SRob Herring 867*724ba675SRob Herring pinctrl_ssc1_rx: ssc1_rx { 868*724ba675SRob Herring atmel,pins = 869*724ba675SRob Herring <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */ 870*724ba675SRob Herring AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */ 871*724ba675SRob Herring AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */ 872*724ba675SRob Herring }; 873*724ba675SRob Herring }; 874*724ba675SRob Herring 875*724ba675SRob Herring uart0 { 876*724ba675SRob Herring pinctrl_uart0: uart0-0 { 877*724ba675SRob Herring atmel,pins = 878*724ba675SRob Herring <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */ 879*724ba675SRob Herring AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */ 880*724ba675SRob Herring }; 881*724ba675SRob Herring }; 882*724ba675SRob Herring 883*724ba675SRob Herring uart1 { 884*724ba675SRob Herring pinctrl_uart1: uart1-0 { 885*724ba675SRob Herring atmel,pins = 886*724ba675SRob Herring <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */ 887*724ba675SRob Herring AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */ 888*724ba675SRob Herring }; 889*724ba675SRob Herring }; 890*724ba675SRob Herring 891*724ba675SRob Herring usart0 { 892*724ba675SRob Herring pinctrl_usart0: usart0-0 { 893*724ba675SRob Herring atmel,pins = 894*724ba675SRob Herring <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 895*724ba675SRob Herring AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 896*724ba675SRob Herring }; 897*724ba675SRob Herring 898*724ba675SRob Herring pinctrl_usart0_rts_cts: usart0_rts_cts-0 { 899*724ba675SRob Herring atmel,pins = 900*724ba675SRob Herring <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */ 901*724ba675SRob Herring AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */ 902*724ba675SRob Herring }; 903*724ba675SRob Herring }; 904*724ba675SRob Herring 905*724ba675SRob Herring usart1 { 906*724ba675SRob Herring pinctrl_usart1: usart1-0 { 907*724ba675SRob Herring atmel,pins = 908*724ba675SRob Herring <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 909*724ba675SRob Herring AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 910*724ba675SRob Herring }; 911*724ba675SRob Herring 912*724ba675SRob Herring pinctrl_usart1_rts_cts: usart1_rts_cts-0 { 913*724ba675SRob Herring atmel,pins = 914*724ba675SRob Herring <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */ 915*724ba675SRob Herring AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */ 916*724ba675SRob Herring }; 917*724ba675SRob Herring }; 918*724ba675SRob Herring 919*724ba675SRob Herring usart2 { 920*724ba675SRob Herring pinctrl_usart2: usart2-0 { 921*724ba675SRob Herring atmel,pins = 922*724ba675SRob Herring <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A25 */ 923*724ba675SRob Herring AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */ 924*724ba675SRob Herring }; 925*724ba675SRob Herring 926*724ba675SRob Herring pinctrl_usart2_rts_cts: usart2_rts_cts-0 { 927*724ba675SRob Herring atmel,pins = 928*724ba675SRob Herring <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */ 929*724ba675SRob Herring AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */ 930*724ba675SRob Herring }; 931*724ba675SRob Herring }; 932*724ba675SRob Herring 933*724ba675SRob Herring usart3 { 934*724ba675SRob Herring pinctrl_usart3: usart3-0 { 935*724ba675SRob Herring atmel,pins = 936*724ba675SRob Herring <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A18 */ 937*724ba675SRob Herring AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */ 938*724ba675SRob Herring }; 939*724ba675SRob Herring 940*724ba675SRob Herring pinctrl_usart3_rts_cts: usart3_rts_cts-0 { 941*724ba675SRob Herring atmel,pins = 942*724ba675SRob Herring <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */ 943*724ba675SRob Herring AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */ 944*724ba675SRob Herring }; 945*724ba675SRob Herring }; 946*724ba675SRob Herring 947*724ba675SRob Herring 948*724ba675SRob Herring pioA: gpio@fffff200 { 949*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 950*724ba675SRob Herring reg = <0xfffff200 0x100>; 951*724ba675SRob Herring interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>; 952*724ba675SRob Herring #gpio-cells = <2>; 953*724ba675SRob Herring gpio-controller; 954*724ba675SRob Herring interrupt-controller; 955*724ba675SRob Herring #interrupt-cells = <2>; 956*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 957*724ba675SRob Herring }; 958*724ba675SRob Herring 959*724ba675SRob Herring pioB: gpio@fffff400 { 960*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 961*724ba675SRob Herring reg = <0xfffff400 0x100>; 962*724ba675SRob Herring interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>; 963*724ba675SRob Herring #gpio-cells = <2>; 964*724ba675SRob Herring gpio-controller; 965*724ba675SRob Herring interrupt-controller; 966*724ba675SRob Herring #interrupt-cells = <2>; 967*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 968*724ba675SRob Herring }; 969*724ba675SRob Herring 970*724ba675SRob Herring pioC: gpio@fffff600 { 971*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 972*724ba675SRob Herring reg = <0xfffff600 0x100>; 973*724ba675SRob Herring interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>; 974*724ba675SRob Herring #gpio-cells = <2>; 975*724ba675SRob Herring gpio-controller; 976*724ba675SRob Herring interrupt-controller; 977*724ba675SRob Herring #interrupt-cells = <2>; 978*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 979*724ba675SRob Herring }; 980*724ba675SRob Herring 981*724ba675SRob Herring pioD: gpio@fffff800 { 982*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 983*724ba675SRob Herring reg = <0xfffff800 0x100>; 984*724ba675SRob Herring interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>; 985*724ba675SRob Herring #gpio-cells = <2>; 986*724ba675SRob Herring gpio-controller; 987*724ba675SRob Herring interrupt-controller; 988*724ba675SRob Herring #interrupt-cells = <2>; 989*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 990*724ba675SRob Herring }; 991*724ba675SRob Herring 992*724ba675SRob Herring pioE: gpio@fffffa00 { 993*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 994*724ba675SRob Herring reg = <0xfffffa00 0x100>; 995*724ba675SRob Herring interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>; 996*724ba675SRob Herring #gpio-cells = <2>; 997*724ba675SRob Herring gpio-controller; 998*724ba675SRob Herring interrupt-controller; 999*724ba675SRob Herring #interrupt-cells = <2>; 1000*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 1001*724ba675SRob Herring }; 1002*724ba675SRob Herring }; 1003*724ba675SRob Herring 1004*724ba675SRob Herring pmc: clock-controller@fffffc00 { 1005*724ba675SRob Herring compatible = "atmel,sama5d3-pmc", "syscon"; 1006*724ba675SRob Herring reg = <0xfffffc00 0x120>; 1007*724ba675SRob Herring interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1008*724ba675SRob Herring #clock-cells = <2>; 1009*724ba675SRob Herring clocks = <&clk32k>, <&main_xtal>; 1010*724ba675SRob Herring clock-names = "slow_clk", "main_xtal"; 1011*724ba675SRob Herring }; 1012*724ba675SRob Herring 1013*724ba675SRob Herring reset_controller: reset-controller@fffffe00 { 1014*724ba675SRob Herring compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; 1015*724ba675SRob Herring reg = <0xfffffe00 0x10>; 1016*724ba675SRob Herring clocks = <&clk32k>; 1017*724ba675SRob Herring }; 1018*724ba675SRob Herring 1019a4bd03e7SArnd Bergmann shutdown_controller: poweroff@fffffe10 { 1020*724ba675SRob Herring compatible = "atmel,at91sam9x5-shdwc"; 1021*724ba675SRob Herring reg = <0xfffffe10 0x10>; 1022*724ba675SRob Herring clocks = <&clk32k>; 1023*724ba675SRob Herring }; 1024*724ba675SRob Herring 1025*724ba675SRob Herring pit: timer@fffffe30 { 1026*724ba675SRob Herring compatible = "atmel,at91sam9260-pit"; 1027*724ba675SRob Herring reg = <0xfffffe30 0xf>; 1028*724ba675SRob Herring interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; 1029*724ba675SRob Herring clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 1030*724ba675SRob Herring }; 1031*724ba675SRob Herring 1032*724ba675SRob Herring watchdog: watchdog@fffffe40 { 1033*724ba675SRob Herring compatible = "atmel,at91sam9260-wdt"; 1034*724ba675SRob Herring reg = <0xfffffe40 0x10>; 1035*724ba675SRob Herring interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>; 1036*724ba675SRob Herring clocks = <&clk32k>; 1037*724ba675SRob Herring atmel,watchdog-type = "hardware"; 1038*724ba675SRob Herring atmel,reset-type = "all"; 1039*724ba675SRob Herring atmel,dbg-halt; 1040*724ba675SRob Herring status = "disabled"; 1041*724ba675SRob Herring }; 1042*724ba675SRob Herring 1043*724ba675SRob Herring clk32k: clock-controller@fffffe50 { 1044*724ba675SRob Herring compatible = "atmel,sama5d3-sckc"; 1045*724ba675SRob Herring reg = <0xfffffe50 0x4>; 1046*724ba675SRob Herring clocks = <&slow_xtal>; 1047*724ba675SRob Herring #clock-cells = <0>; 1048*724ba675SRob Herring }; 1049*724ba675SRob Herring 1050*724ba675SRob Herring rtc@fffffeb0 { 1051*724ba675SRob Herring compatible = "atmel,at91rm9200-rtc"; 1052*724ba675SRob Herring reg = <0xfffffeb0 0x30>; 1053*724ba675SRob Herring interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1054*724ba675SRob Herring clocks = <&clk32k>; 1055*724ba675SRob Herring }; 1056*724ba675SRob Herring }; 1057*724ba675SRob Herring 1058*724ba675SRob Herring nfc_sram: sram@200000 { 1059*724ba675SRob Herring compatible = "mmio-sram"; 1060*724ba675SRob Herring no-memory-wc; 1061*724ba675SRob Herring reg = <0x200000 0x2400>; 1062*724ba675SRob Herring #address-cells = <1>; 1063*724ba675SRob Herring #size-cells = <1>; 1064*724ba675SRob Herring ranges = <0 0x200000 0x2400>; 1065*724ba675SRob Herring }; 1066*724ba675SRob Herring 1067*724ba675SRob Herring usb0: gadget@500000 { 1068*724ba675SRob Herring compatible = "atmel,sama5d3-udc"; 1069*724ba675SRob Herring reg = <0x00500000 0x100000 1070*724ba675SRob Herring 0xf8030000 0x4000>; 1071*724ba675SRob Herring interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; 1072*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 33>, <&pmc PMC_TYPE_CORE PMC_UTMI>; 1073*724ba675SRob Herring clock-names = "pclk", "hclk"; 1074*724ba675SRob Herring status = "disabled"; 1075*724ba675SRob Herring }; 1076*724ba675SRob Herring 1077*724ba675SRob Herring usb1: ohci@600000 { 1078*724ba675SRob Herring compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1079*724ba675SRob Herring reg = <0x00600000 0x100000>; 1080*724ba675SRob Herring interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1081*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_SYSTEM 6>; 1082*724ba675SRob Herring clock-names = "ohci_clk", "hclk", "uhpck"; 1083*724ba675SRob Herring status = "disabled"; 1084*724ba675SRob Herring }; 1085*724ba675SRob Herring 1086*724ba675SRob Herring usb2: ehci@700000 { 1087*724ba675SRob Herring compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1088*724ba675SRob Herring reg = <0x00700000 0x100000>; 1089*724ba675SRob Herring interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1090*724ba675SRob Herring clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 32>; 1091*724ba675SRob Herring clock-names = "usb_clk", "ehci_clk"; 1092*724ba675SRob Herring status = "disabled"; 1093*724ba675SRob Herring }; 1094*724ba675SRob Herring 1095*724ba675SRob Herring ebi: ebi@10000000 { 1096*724ba675SRob Herring compatible = "atmel,sama5d3-ebi"; 1097*724ba675SRob Herring #address-cells = <2>; 1098*724ba675SRob Herring #size-cells = <1>; 1099*724ba675SRob Herring atmel,smc = <&hsmc>; 1100*724ba675SRob Herring reg = <0x10000000 0x10000000 1101*724ba675SRob Herring 0x40000000 0x30000000>; 1102*724ba675SRob Herring ranges = <0x0 0x0 0x10000000 0x10000000 1103*724ba675SRob Herring 0x1 0x0 0x40000000 0x10000000 1104*724ba675SRob Herring 0x2 0x0 0x50000000 0x10000000 1105*724ba675SRob Herring 0x3 0x0 0x60000000 0x10000000>; 1106*724ba675SRob Herring clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 1107*724ba675SRob Herring status = "disabled"; 1108*724ba675SRob Herring 1109*724ba675SRob Herring nand_controller: nand-controller { 1110*724ba675SRob Herring compatible = "atmel,sama5d3-nand-controller"; 1111*724ba675SRob Herring atmel,nfc-sram = <&nfc_sram>; 1112*724ba675SRob Herring atmel,nfc-io = <&nfc_io>; 1113*724ba675SRob Herring ecc-engine = <&pmecc>; 1114*724ba675SRob Herring #address-cells = <2>; 1115*724ba675SRob Herring #size-cells = <1>; 1116*724ba675SRob Herring ranges; 1117*724ba675SRob Herring status = "disabled"; 1118*724ba675SRob Herring }; 1119*724ba675SRob Herring }; 1120*724ba675SRob Herring 1121*724ba675SRob Herring nfc_io: nfc-io@70000000 { 1122*724ba675SRob Herring compatible = "atmel,sama5d3-nfc-io", "syscon"; 1123*724ba675SRob Herring reg = <0x70000000 0x8000000>; 1124*724ba675SRob Herring }; 1125*724ba675SRob Herring }; 1126*724ba675SRob Herring}; 1127