1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Common part of the device tree for the Kontron KSwitch D10 MMT 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring/dts-v1/; 7*724ba675SRob Herring#include "lan966x.dtsi" 8*724ba675SRob Herring#include "dt-bindings/phy/phy-lan966x-serdes.h" 9*724ba675SRob Herring 10*724ba675SRob Herring/ { 11*724ba675SRob Herring aliases { 12*724ba675SRob Herring serial0 = &usart0; 13*724ba675SRob Herring }; 14*724ba675SRob Herring 15*724ba675SRob Herring chosen { 16*724ba675SRob Herring stdout-path = "serial0:115200n8"; 17*724ba675SRob Herring }; 18*724ba675SRob Herring 19*724ba675SRob Herring gpio-restart { 20*724ba675SRob Herring compatible = "gpio-restart"; 21*724ba675SRob Herring pinctrl-0 = <&reset_pins>; 22*724ba675SRob Herring pinctrl-names = "default"; 23*724ba675SRob Herring gpios = <&gpio 56 GPIO_ACTIVE_LOW>; 24*724ba675SRob Herring priority = <200>; 25*724ba675SRob Herring }; 26*724ba675SRob Herring}; 27*724ba675SRob Herring 28*724ba675SRob Herring&flx0 { 29*724ba675SRob Herring atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; 30*724ba675SRob Herring status = "okay"; 31*724ba675SRob Herring 32*724ba675SRob Herring usart0: serial@200 { 33*724ba675SRob Herring pinctrl-0 = <&usart0_pins>; 34*724ba675SRob Herring pinctrl-names = "default"; 35*724ba675SRob Herring status = "okay"; 36*724ba675SRob Herring }; 37*724ba675SRob Herring}; 38*724ba675SRob Herring 39*724ba675SRob Herring&flx3 { 40*724ba675SRob Herring atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>; 41*724ba675SRob Herring status = "okay"; 42*724ba675SRob Herring 43*724ba675SRob Herring spi3: spi@400 { 44*724ba675SRob Herring pinctrl-0 = <&fc3_b_pins>, <&spi3_cs_pins>; 45*724ba675SRob Herring pinctrl-names = "default"; 46*724ba675SRob Herring status = "okay"; 47*724ba675SRob Herring cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; 48*724ba675SRob Herring }; 49*724ba675SRob Herring}; 50*724ba675SRob Herring 51*724ba675SRob Herring&gpio { 52*724ba675SRob Herring pinctrl-0 = <&phy_int_pins>; 53*724ba675SRob Herring pinctrl-names = "default"; 54*724ba675SRob Herring 55*724ba675SRob Herring fc3_b_pins: fc3-b-pins { 56*724ba675SRob Herring /* SCK, MISO, MOSI */ 57*724ba675SRob Herring pins = "GPIO_51", "GPIO_52", "GPIO_53"; 58*724ba675SRob Herring function = "fc3_b"; 59*724ba675SRob Herring }; 60*724ba675SRob Herring 61*724ba675SRob Herring miim_c_pins: miim-c-pins { 62*724ba675SRob Herring /* MDC, MDIO */ 63*724ba675SRob Herring pins = "GPIO_59", "GPIO_60"; 64*724ba675SRob Herring function = "miim_c"; 65*724ba675SRob Herring }; 66*724ba675SRob Herring 67*724ba675SRob Herring phy_int_pins: phy-int-pins { 68*724ba675SRob Herring /* PHY_INT# */ 69*724ba675SRob Herring pins = "GPIO_24"; 70*724ba675SRob Herring function = "gpio"; 71*724ba675SRob Herring }; 72*724ba675SRob Herring 73*724ba675SRob Herring reset_pins: reset-pins { 74*724ba675SRob Herring /* SYS_RST# */ 75*724ba675SRob Herring pins = "GPIO_56"; 76*724ba675SRob Herring function = "gpio"; 77*724ba675SRob Herring }; 78*724ba675SRob Herring 79*724ba675SRob Herring sgpio_a_pins: sgpio-a-pins { 80*724ba675SRob Herring /* SCK, D0, D1 */ 81*724ba675SRob Herring pins = "GPIO_32", "GPIO_33", "GPIO_34"; 82*724ba675SRob Herring function = "sgpio_a"; 83*724ba675SRob Herring }; 84*724ba675SRob Herring 85*724ba675SRob Herring sgpio_b_pins: sgpio-b-pins { 86*724ba675SRob Herring /* LD */ 87*724ba675SRob Herring pins = "GPIO_64"; 88*724ba675SRob Herring function = "sgpio_b"; 89*724ba675SRob Herring }; 90*724ba675SRob Herring 91*724ba675SRob Herring spi3_cs_pins: spi3-cs-pins { 92*724ba675SRob Herring /* CS# */ 93*724ba675SRob Herring pins = "GPIO_46"; 94*724ba675SRob Herring function = "gpio"; 95*724ba675SRob Herring }; 96*724ba675SRob Herring 97*724ba675SRob Herring usart0_pins: usart0-pins { 98*724ba675SRob Herring /* RXD, TXD */ 99*724ba675SRob Herring pins = "GPIO_25", "GPIO_26"; 100*724ba675SRob Herring function = "fc0_b"; 101*724ba675SRob Herring }; 102*724ba675SRob Herring 103*724ba675SRob Herring usbs_a_pins: usbs-a-pins { 104*724ba675SRob Herring /* VBUS_DET */ 105*724ba675SRob Herring pins = "GPIO_66"; 106*724ba675SRob Herring function = "gpio"; 107*724ba675SRob Herring }; 108*724ba675SRob Herring}; 109*724ba675SRob Herring 110*724ba675SRob Herring&mdio0 { 111*724ba675SRob Herring pinctrl-0 = <&miim_c_pins>; 112*724ba675SRob Herring pinctrl-names = "default"; 113*724ba675SRob Herring reset-gpios = <&gpio 29 GPIO_ACTIVE_LOW>; 114*724ba675SRob Herring clock-frequency = <2500000>; 115*724ba675SRob Herring status = "okay"; 116*724ba675SRob Herring 117*724ba675SRob Herring phy4: ethernet-phy@5 { 118*724ba675SRob Herring reg = <5>; 119*724ba675SRob Herring interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>; 120*724ba675SRob Herring coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>; 121*724ba675SRob Herring }; 122*724ba675SRob Herring 123*724ba675SRob Herring phy5: ethernet-phy@6 { 124*724ba675SRob Herring reg = <6>; 125*724ba675SRob Herring interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>; 126*724ba675SRob Herring coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>; 127*724ba675SRob Herring }; 128*724ba675SRob Herring 129*724ba675SRob Herring phy6: ethernet-phy@7 { 130*724ba675SRob Herring reg = <7>; 131*724ba675SRob Herring interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>; 132*724ba675SRob Herring coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>; 133*724ba675SRob Herring }; 134*724ba675SRob Herring 135*724ba675SRob Herring phy7: ethernet-phy@8 { 136*724ba675SRob Herring reg = <8>; 137*724ba675SRob Herring interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>; 138*724ba675SRob Herring coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>; 139*724ba675SRob Herring }; 140*724ba675SRob Herring}; 141*724ba675SRob Herring 142*724ba675SRob Herring&mdio1 { 143*724ba675SRob Herring status = "okay"; 144*724ba675SRob Herring}; 145*724ba675SRob Herring 146*724ba675SRob Herring&phy0 { 147*724ba675SRob Herring status = "okay"; 148*724ba675SRob Herring}; 149*724ba675SRob Herring 150*724ba675SRob Herring&phy1 { 151*724ba675SRob Herring status = "okay"; 152*724ba675SRob Herring}; 153*724ba675SRob Herring 154*724ba675SRob Herring&port0 { 155*724ba675SRob Herring phys = <&serdes 0 CU(0)>; 156*724ba675SRob Herring phy-handle = <&phy0>; 157*724ba675SRob Herring phy-mode = "gmii"; 158*724ba675SRob Herring status = "okay"; 159*724ba675SRob Herring}; 160*724ba675SRob Herring 161*724ba675SRob Herring&port1 { 162*724ba675SRob Herring phys = <&serdes 1 CU(1)>; 163*724ba675SRob Herring phy-handle = <&phy1>; 164*724ba675SRob Herring phy-mode = "gmii"; 165*724ba675SRob Herring status = "okay"; 166*724ba675SRob Herring}; 167*724ba675SRob Herring 168*724ba675SRob Herring&port4 { 169*724ba675SRob Herring phys = <&serdes 4 SERDES6G(2)>; 170*724ba675SRob Herring phy-handle = <&phy4>; 171*724ba675SRob Herring phy-mode = "qsgmii"; 172*724ba675SRob Herring status = "okay"; 173*724ba675SRob Herring}; 174*724ba675SRob Herring 175*724ba675SRob Herring&port5 { 176*724ba675SRob Herring phys = <&serdes 5 SERDES6G(2)>; 177*724ba675SRob Herring phy-handle = <&phy5>; 178*724ba675SRob Herring phy-mode = "qsgmii"; 179*724ba675SRob Herring status = "okay"; 180*724ba675SRob Herring}; 181*724ba675SRob Herring 182*724ba675SRob Herring&port6 { 183*724ba675SRob Herring phys = <&serdes 6 SERDES6G(2)>; 184*724ba675SRob Herring phy-handle = <&phy6>; 185*724ba675SRob Herring phy-mode = "qsgmii"; 186*724ba675SRob Herring status = "okay"; 187*724ba675SRob Herring}; 188*724ba675SRob Herring 189*724ba675SRob Herring&port7 { 190*724ba675SRob Herring phys = <&serdes 7 SERDES6G(2)>; 191*724ba675SRob Herring phy-handle = <&phy7>; 192*724ba675SRob Herring phy-mode = "qsgmii"; 193*724ba675SRob Herring status = "okay"; 194*724ba675SRob Herring}; 195*724ba675SRob Herring 196*724ba675SRob Herring&serdes { 197*724ba675SRob Herring status = "okay"; 198*724ba675SRob Herring}; 199*724ba675SRob Herring 200*724ba675SRob Herring&sgpio { 201*724ba675SRob Herring pinctrl-0 = <&sgpio_a_pins>, <&sgpio_b_pins>; 202*724ba675SRob Herring pinctrl-names = "default"; 203*724ba675SRob Herring bus-frequency = <8000000>; 204 /* arbitrary range because all GPIOs are in software mode */ 205 microchip,sgpio-port-ranges = <0 11>; 206 status = "okay"; 207 208 sgpio_in: gpio@0 { 209 ngpios = <128>; 210 }; 211 212 sgpio_out: gpio@1 { 213 ngpios = <128>; 214 }; 215}; 216 217&switch { 218 status = "okay"; 219}; 220 221&udc { 222 pinctrl-0 = <&usbs_a_pins>; 223 pinctrl-names = "default"; 224 atmel,vbus-gpio = <&gpio 66 GPIO_ACTIVE_HIGH>; 225 status = "okay"; 226}; 227 228&watchdog { 229 status = "okay"; 230}; 231