1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2724ba675SRob Herring/* 3724ba675SRob Herring * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC 4724ba675SRob Herring * 5724ba675SRob Herring * Copyright (C) 2011 Atmel, 6724ba675SRob Herring * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>, 7724ba675SRob Herring * 2012 Joachim Eastwood <manabian@gmail.com> 8724ba675SRob Herring * 9724ba675SRob Herring * Based on at91sam9260.dtsi 10724ba675SRob Herring */ 11724ba675SRob Herring 12724ba675SRob Herring#include <dt-bindings/pinctrl/at91.h> 13724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 14724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 15724ba675SRob Herring#include <dt-bindings/clock/at91.h> 16724ba675SRob Herring#include <dt-bindings/mfd/at91-usart.h> 17724ba675SRob Herring 18724ba675SRob Herring/ { 19724ba675SRob Herring #address-cells = <1>; 20724ba675SRob Herring #size-cells = <1>; 21724ba675SRob Herring model = "Atmel AT91RM9200 family SoC"; 22724ba675SRob Herring compatible = "atmel,at91rm9200"; 23724ba675SRob Herring interrupt-parent = <&aic>; 24724ba675SRob Herring 25724ba675SRob Herring aliases { 26724ba675SRob Herring serial0 = &dbgu; 27724ba675SRob Herring serial1 = &usart0; 28724ba675SRob Herring serial2 = &usart1; 29724ba675SRob Herring serial3 = &usart2; 30724ba675SRob Herring serial4 = &usart3; 31724ba675SRob Herring gpio0 = &pioA; 32724ba675SRob Herring gpio1 = &pioB; 33724ba675SRob Herring gpio2 = &pioC; 34724ba675SRob Herring gpio3 = &pioD; 35724ba675SRob Herring tcb0 = &tcb0; 36724ba675SRob Herring tcb1 = &tcb1; 37724ba675SRob Herring i2c0 = &i2c0; 38724ba675SRob Herring ssc0 = &ssc0; 39724ba675SRob Herring ssc1 = &ssc1; 40724ba675SRob Herring ssc2 = &ssc2; 41724ba675SRob Herring }; 42724ba675SRob Herring cpus { 43724ba675SRob Herring #address-cells = <1>; 44724ba675SRob Herring #size-cells = <0>; 45724ba675SRob Herring 46724ba675SRob Herring cpu@0 { 47724ba675SRob Herring compatible = "arm,arm920t"; 48724ba675SRob Herring device_type = "cpu"; 49724ba675SRob Herring reg = <0>; 50724ba675SRob Herring }; 51724ba675SRob Herring }; 52724ba675SRob Herring 53724ba675SRob Herring memory@20000000 { 54724ba675SRob Herring device_type = "memory"; 55724ba675SRob Herring reg = <0x20000000 0x04000000>; 56724ba675SRob Herring }; 57724ba675SRob Herring 58724ba675SRob Herring clocks { 59724ba675SRob Herring slow_xtal: slow_xtal { 60724ba675SRob Herring compatible = "fixed-clock"; 61724ba675SRob Herring #clock-cells = <0>; 62724ba675SRob Herring clock-frequency = <0>; 63724ba675SRob Herring }; 64724ba675SRob Herring 65724ba675SRob Herring main_xtal: main_xtal { 66724ba675SRob Herring compatible = "fixed-clock"; 67724ba675SRob Herring #clock-cells = <0>; 68724ba675SRob Herring clock-frequency = <0>; 69724ba675SRob Herring }; 70724ba675SRob Herring }; 71724ba675SRob Herring 72724ba675SRob Herring sram: sram@200000 { 73724ba675SRob Herring compatible = "mmio-sram"; 74724ba675SRob Herring reg = <0x00200000 0x4000>; 75724ba675SRob Herring #address-cells = <1>; 76724ba675SRob Herring #size-cells = <1>; 77724ba675SRob Herring ranges = <0 0x00200000 0x4000>; 78724ba675SRob Herring }; 79724ba675SRob Herring 80724ba675SRob Herring ahb { 81724ba675SRob Herring compatible = "simple-bus"; 82724ba675SRob Herring #address-cells = <1>; 83724ba675SRob Herring #size-cells = <1>; 84724ba675SRob Herring ranges; 85724ba675SRob Herring 86724ba675SRob Herring apb { 87724ba675SRob Herring compatible = "simple-bus"; 88724ba675SRob Herring #address-cells = <1>; 89724ba675SRob Herring #size-cells = <1>; 90724ba675SRob Herring ranges; 91724ba675SRob Herring 92724ba675SRob Herring aic: interrupt-controller@fffff000 { 93724ba675SRob Herring #interrupt-cells = <3>; 94724ba675SRob Herring compatible = "atmel,at91rm9200-aic"; 95724ba675SRob Herring interrupt-controller; 96724ba675SRob Herring reg = <0xfffff000 0x200>; 97724ba675SRob Herring atmel,external-irqs = <25 26 27 28 29 30 31>; 98724ba675SRob Herring }; 99724ba675SRob Herring 100724ba675SRob Herring ramc0: ramc@ffffff00 { 101724ba675SRob Herring compatible = "atmel,at91rm9200-sdramc", "syscon"; 102724ba675SRob Herring reg = <0xffffff00 0x100>; 103724ba675SRob Herring }; 104724ba675SRob Herring 105724ba675SRob Herring pmc: clock-controller@fffffc00 { 106724ba675SRob Herring compatible = "atmel,at91rm9200-pmc", "syscon"; 107724ba675SRob Herring reg = <0xfffffc00 0x100>; 108724ba675SRob Herring interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 109724ba675SRob Herring #clock-cells = <2>; 110724ba675SRob Herring clocks = <&slow_xtal>, <&main_xtal>; 111724ba675SRob Herring clock-names = "slow_xtal", "main_xtal"; 112724ba675SRob Herring }; 113724ba675SRob Herring 114724ba675SRob Herring st: timer@fffffd00 { 115724ba675SRob Herring compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd"; 116724ba675SRob Herring reg = <0xfffffd00 0x100>; 117724ba675SRob Herring interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 118724ba675SRob Herring clocks = <&slow_xtal>; 119724ba675SRob Herring 120724ba675SRob Herring watchdog { 121724ba675SRob Herring compatible = "atmel,at91rm9200-wdt"; 122724ba675SRob Herring }; 123724ba675SRob Herring }; 124724ba675SRob Herring 125724ba675SRob Herring rtc: rtc@fffffe00 { 126724ba675SRob Herring compatible = "atmel,at91rm9200-rtc"; 127724ba675SRob Herring reg = <0xfffffe00 0x40>; 128724ba675SRob Herring interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 129724ba675SRob Herring clocks = <&slow_xtal>; 130724ba675SRob Herring status = "disabled"; 131724ba675SRob Herring }; 132724ba675SRob Herring 133724ba675SRob Herring tcb0: timer@fffa0000 { 134724ba675SRob Herring compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 135724ba675SRob Herring #address-cells = <1>; 136724ba675SRob Herring #size-cells = <0>; 137724ba675SRob Herring reg = <0xfffa0000 0x100>; 138*dc1890b9SKrzysztof Kozlowski interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>, 139*dc1890b9SKrzysztof Kozlowski <18 IRQ_TYPE_LEVEL_HIGH 0>, 140*dc1890b9SKrzysztof Kozlowski <19 IRQ_TYPE_LEVEL_HIGH 0>; 141724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>; 142724ba675SRob Herring clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 143724ba675SRob Herring }; 144724ba675SRob Herring 145724ba675SRob Herring tcb1: timer@fffa4000 { 146724ba675SRob Herring compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 147724ba675SRob Herring #address-cells = <1>; 148724ba675SRob Herring #size-cells = <0>; 149724ba675SRob Herring reg = <0xfffa4000 0x100>; 150*dc1890b9SKrzysztof Kozlowski interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>, 151*dc1890b9SKrzysztof Kozlowski <21 IRQ_TYPE_LEVEL_HIGH 0>, 152*dc1890b9SKrzysztof Kozlowski <22 IRQ_TYPE_LEVEL_HIGH 0>; 153724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&slow_xtal>; 154724ba675SRob Herring clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 155724ba675SRob Herring }; 156724ba675SRob Herring 157724ba675SRob Herring i2c0: i2c@fffb8000 { 158724ba675SRob Herring compatible = "atmel,at91rm9200-i2c"; 159724ba675SRob Herring reg = <0xfffb8000 0x4000>; 160724ba675SRob Herring interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; 161724ba675SRob Herring pinctrl-names = "default"; 162724ba675SRob Herring pinctrl-0 = <&pinctrl_twi>; 163724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 164724ba675SRob Herring #address-cells = <1>; 165724ba675SRob Herring #size-cells = <0>; 166724ba675SRob Herring status = "disabled"; 167724ba675SRob Herring }; 168724ba675SRob Herring 169724ba675SRob Herring mmc0: mmc@fffb4000 { 170724ba675SRob Herring compatible = "atmel,hsmci"; 171724ba675SRob Herring reg = <0xfffb4000 0x4000>; 172724ba675SRob Herring interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; 173724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 174724ba675SRob Herring clock-names = "mci_clk"; 175724ba675SRob Herring #address-cells = <1>; 176724ba675SRob Herring #size-cells = <0>; 177724ba675SRob Herring status = "disabled"; 178724ba675SRob Herring }; 179724ba675SRob Herring 180724ba675SRob Herring ssc0: ssc@fffd0000 { 181724ba675SRob Herring compatible = "atmel,at91rm9200-ssc"; 182724ba675SRob Herring reg = <0xfffd0000 0x4000>; 183724ba675SRob Herring interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 184724ba675SRob Herring pinctrl-names = "default"; 185724ba675SRob Herring pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 186724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 187724ba675SRob Herring clock-names = "pclk"; 188724ba675SRob Herring status = "disabled"; 189724ba675SRob Herring }; 190724ba675SRob Herring 191724ba675SRob Herring ssc1: ssc@fffd4000 { 192724ba675SRob Herring compatible = "atmel,at91rm9200-ssc"; 193724ba675SRob Herring reg = <0xfffd4000 0x4000>; 194724ba675SRob Herring interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 195724ba675SRob Herring pinctrl-names = "default"; 196724ba675SRob Herring pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 197724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 198724ba675SRob Herring clock-names = "pclk"; 199724ba675SRob Herring status = "disabled"; 200724ba675SRob Herring }; 201724ba675SRob Herring 202724ba675SRob Herring ssc2: ssc@fffd8000 { 203724ba675SRob Herring compatible = "atmel,at91rm9200-ssc"; 204724ba675SRob Herring reg = <0xfffd8000 0x4000>; 205724ba675SRob Herring interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 206724ba675SRob Herring pinctrl-names = "default"; 207724ba675SRob Herring pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; 208724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; 209724ba675SRob Herring clock-names = "pclk"; 210724ba675SRob Herring status = "disabled"; 211724ba675SRob Herring }; 212724ba675SRob Herring 213724ba675SRob Herring macb0: ethernet@fffbc000 { 214724ba675SRob Herring compatible = "cdns,at91rm9200-emac", "cdns,emac"; 215724ba675SRob Herring reg = <0xfffbc000 0x4000>; 216724ba675SRob Herring interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; 217724ba675SRob Herring phy-mode = "rmii"; 218724ba675SRob Herring pinctrl-names = "default"; 219724ba675SRob Herring pinctrl-0 = <&pinctrl_macb_rmii>; 220724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; 221724ba675SRob Herring clock-names = "ether_clk"; 222724ba675SRob Herring status = "disabled"; 223724ba675SRob Herring }; 224724ba675SRob Herring 225724ba675SRob Herring pinctrl@fffff400 { 226724ba675SRob Herring #address-cells = <1>; 227724ba675SRob Herring #size-cells = <1>; 228724ba675SRob Herring compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 229724ba675SRob Herring ranges = <0xfffff400 0xfffff400 0x800>; 230724ba675SRob Herring 231724ba675SRob Herring atmel,mux-mask = < 232724ba675SRob Herring /* A B */ 233724ba675SRob Herring 0xffffffff 0xffffffff /* pioA */ 234724ba675SRob Herring 0xffffffff 0x083fffff /* pioB */ 235724ba675SRob Herring 0xffff3fff 0x00000000 /* pioC */ 236724ba675SRob Herring 0x03ff87ff 0x0fffff80 /* pioD */ 237724ba675SRob Herring >; 238724ba675SRob Herring 239724ba675SRob Herring /* shared pinctrl settings */ 240724ba675SRob Herring dbgu { 241724ba675SRob Herring pinctrl_dbgu: dbgu-0 { 242724ba675SRob Herring atmel,pins = 243724ba675SRob Herring <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 244724ba675SRob Herring AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 245724ba675SRob Herring }; 246724ba675SRob Herring }; 247724ba675SRob Herring 248724ba675SRob Herring uart0 { 249724ba675SRob Herring pinctrl_uart0: uart0-0 { 250724ba675SRob Herring atmel,pins = 251724ba675SRob Herring <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE 252724ba675SRob Herring AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 253724ba675SRob Herring }; 254724ba675SRob Herring 255724ba675SRob Herring pinctrl_uart0_cts: uart0_cts-0 { 256724ba675SRob Herring atmel,pins = 257724ba675SRob Herring <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */ 258724ba675SRob Herring }; 259724ba675SRob Herring 260724ba675SRob Herring pinctrl_uart0_rts: uart0_rts-0 { 261724ba675SRob Herring atmel,pins = 262724ba675SRob Herring <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */ 263724ba675SRob Herring }; 264724ba675SRob Herring }; 265724ba675SRob Herring 266724ba675SRob Herring uart1 { 267724ba675SRob Herring pinctrl_uart1: uart1-0 { 268724ba675SRob Herring atmel,pins = 269724ba675SRob Herring <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE 270724ba675SRob Herring AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 271724ba675SRob Herring }; 272724ba675SRob Herring 273724ba675SRob Herring pinctrl_uart1_rts: uart1_rts-0 { 274724ba675SRob Herring atmel,pins = 275724ba675SRob Herring <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */ 276724ba675SRob Herring }; 277724ba675SRob Herring 278724ba675SRob Herring pinctrl_uart1_cts: uart1_cts-0 { 279724ba675SRob Herring atmel,pins = 280724ba675SRob Herring <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */ 281724ba675SRob Herring }; 282724ba675SRob Herring 283724ba675SRob Herring pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 { 284724ba675SRob Herring atmel,pins = 285724ba675SRob Herring <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */ 286724ba675SRob Herring AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */ 287724ba675SRob Herring }; 288724ba675SRob Herring 289724ba675SRob Herring pinctrl_uart1_dcd: uart1_dcd-0 { 290724ba675SRob Herring atmel,pins = 291724ba675SRob Herring <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */ 292724ba675SRob Herring }; 293724ba675SRob Herring 294724ba675SRob Herring pinctrl_uart1_ri: uart1_ri-0 { 295724ba675SRob Herring atmel,pins = 296724ba675SRob Herring <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ 297724ba675SRob Herring }; 298724ba675SRob Herring }; 299724ba675SRob Herring 300724ba675SRob Herring uart2 { 301724ba675SRob Herring pinctrl_uart2: uart2-0 { 302724ba675SRob Herring atmel,pins = 303724ba675SRob Herring <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 304724ba675SRob Herring AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 305724ba675SRob Herring }; 306724ba675SRob Herring 307724ba675SRob Herring pinctrl_uart2_rts: uart2_rts-0 { 308724ba675SRob Herring atmel,pins = 309724ba675SRob Herring <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ 310724ba675SRob Herring }; 311724ba675SRob Herring 312724ba675SRob Herring pinctrl_uart2_cts: uart2_cts-0 { 313724ba675SRob Herring atmel,pins = 314724ba675SRob Herring <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */ 315724ba675SRob Herring }; 316724ba675SRob Herring }; 317724ba675SRob Herring 318724ba675SRob Herring uart3 { 319724ba675SRob Herring pinctrl_uart3: uart3-0 { 320724ba675SRob Herring atmel,pins = 321724ba675SRob Herring <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE 322724ba675SRob Herring AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; 323724ba675SRob Herring }; 324724ba675SRob Herring 325724ba675SRob Herring pinctrl_uart3_rts: uart3_rts-0 { 326724ba675SRob Herring atmel,pins = 327724ba675SRob Herring <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ 328724ba675SRob Herring }; 329724ba675SRob Herring 330724ba675SRob Herring pinctrl_uart3_cts: uart3_cts-0 { 331724ba675SRob Herring atmel,pins = 332724ba675SRob Herring <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ 333724ba675SRob Herring }; 334724ba675SRob Herring }; 335724ba675SRob Herring 336724ba675SRob Herring nand { 337724ba675SRob Herring pinctrl_nand: nand-0 { 338724ba675SRob Herring atmel,pins = 339724ba675SRob Herring <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */ 340724ba675SRob Herring AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */ 341724ba675SRob Herring }; 342724ba675SRob Herring }; 343724ba675SRob Herring 344724ba675SRob Herring macb { 345724ba675SRob Herring pinctrl_macb_rmii: macb_rmii-0 { 346724ba675SRob Herring atmel,pins = 347724ba675SRob Herring <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */ 348724ba675SRob Herring AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */ 349724ba675SRob Herring AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */ 350724ba675SRob Herring AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */ 351724ba675SRob Herring AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */ 352724ba675SRob Herring AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ 353724ba675SRob Herring AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ 354724ba675SRob Herring AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ 355724ba675SRob Herring AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ 356724ba675SRob Herring AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */ 357724ba675SRob Herring }; 358724ba675SRob Herring 359724ba675SRob Herring pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 360724ba675SRob Herring atmel,pins = 361724ba675SRob Herring <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */ 362724ba675SRob Herring AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */ 363724ba675SRob Herring AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */ 364724ba675SRob Herring AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */ 365724ba675SRob Herring AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */ 366724ba675SRob Herring AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */ 367724ba675SRob Herring AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */ 368724ba675SRob Herring AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */ 369724ba675SRob Herring }; 370724ba675SRob Herring }; 371724ba675SRob Herring 372724ba675SRob Herring mmc0 { 373724ba675SRob Herring pinctrl_mmc0_clk: mmc0_clk-0 { 374724ba675SRob Herring atmel,pins = 375724ba675SRob Herring <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */ 376724ba675SRob Herring }; 377724ba675SRob Herring 378724ba675SRob Herring pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 379724ba675SRob Herring atmel,pins = 380724ba675SRob Herring <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */ 381724ba675SRob Herring AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */ 382724ba675SRob Herring }; 383724ba675SRob Herring 384724ba675SRob Herring pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 385724ba675SRob Herring atmel,pins = 386724ba675SRob Herring <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */ 387724ba675SRob Herring AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */ 388724ba675SRob Herring AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */ 389724ba675SRob Herring }; 390724ba675SRob Herring 391724ba675SRob Herring pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { 392724ba675SRob Herring atmel,pins = 393724ba675SRob Herring <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */ 394724ba675SRob Herring AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */ 395724ba675SRob Herring }; 396724ba675SRob Herring 397724ba675SRob Herring pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { 398724ba675SRob Herring atmel,pins = 399724ba675SRob Herring <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */ 400724ba675SRob Herring AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */ 401724ba675SRob Herring AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */ 402724ba675SRob Herring }; 403724ba675SRob Herring }; 404724ba675SRob Herring 405724ba675SRob Herring ssc0 { 406724ba675SRob Herring pinctrl_ssc0_tx: ssc0_tx-0 { 407724ba675SRob Herring atmel,pins = 408724ba675SRob Herring <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ 409724ba675SRob Herring AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ 410724ba675SRob Herring AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */ 411724ba675SRob Herring }; 412724ba675SRob Herring 413724ba675SRob Herring pinctrl_ssc0_rx: ssc0_rx-0 { 414724ba675SRob Herring atmel,pins = 415724ba675SRob Herring <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ 416724ba675SRob Herring AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ 417724ba675SRob Herring AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ 418724ba675SRob Herring }; 419724ba675SRob Herring }; 420724ba675SRob Herring 421724ba675SRob Herring ssc1 { 422724ba675SRob Herring pinctrl_ssc1_tx: ssc1_tx-0 { 423724ba675SRob Herring atmel,pins = 424724ba675SRob Herring <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ 425724ba675SRob Herring AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ 426724ba675SRob Herring AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ 427724ba675SRob Herring }; 428724ba675SRob Herring 429724ba675SRob Herring pinctrl_ssc1_rx: ssc1_rx-0 { 430724ba675SRob Herring atmel,pins = 431724ba675SRob Herring <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ 432724ba675SRob Herring AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ 433724ba675SRob Herring AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ 434724ba675SRob Herring }; 435724ba675SRob Herring }; 436724ba675SRob Herring 437724ba675SRob Herring ssc2 { 438724ba675SRob Herring pinctrl_ssc2_tx: ssc2_tx-0 { 439724ba675SRob Herring atmel,pins = 440724ba675SRob Herring <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */ 441724ba675SRob Herring AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */ 442724ba675SRob Herring AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */ 443724ba675SRob Herring }; 444724ba675SRob Herring 445724ba675SRob Herring pinctrl_ssc2_rx: ssc2_rx-0 { 446724ba675SRob Herring atmel,pins = 447724ba675SRob Herring <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */ 448724ba675SRob Herring AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ 449724ba675SRob Herring AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */ 450724ba675SRob Herring }; 451724ba675SRob Herring }; 452724ba675SRob Herring 453724ba675SRob Herring twi { 454724ba675SRob Herring pinctrl_twi: twi-0 { 455724ba675SRob Herring atmel,pins = 456724ba675SRob Herring <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */ 457724ba675SRob Herring AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */ 458724ba675SRob Herring }; 459724ba675SRob Herring 460724ba675SRob Herring pinctrl_twi_gpio: twi_gpio-0 { 461724ba675SRob Herring atmel,pins = 462724ba675SRob Herring <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */ 463724ba675SRob Herring AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */ 464724ba675SRob Herring }; 465724ba675SRob Herring }; 466724ba675SRob Herring 467724ba675SRob Herring tcb0 { 468724ba675SRob Herring pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 469724ba675SRob Herring atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; 470724ba675SRob Herring }; 471724ba675SRob Herring 472724ba675SRob Herring pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 473724ba675SRob Herring atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; 474724ba675SRob Herring }; 475724ba675SRob Herring 476724ba675SRob Herring pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 477724ba675SRob Herring atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; 478724ba675SRob Herring }; 479724ba675SRob Herring 480724ba675SRob Herring pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 481724ba675SRob Herring atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; 482724ba675SRob Herring }; 483724ba675SRob Herring 484724ba675SRob Herring pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 485724ba675SRob Herring atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 486724ba675SRob Herring }; 487724ba675SRob Herring 488724ba675SRob Herring pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 489724ba675SRob Herring atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; 490724ba675SRob Herring }; 491724ba675SRob Herring 492724ba675SRob Herring pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 493724ba675SRob Herring atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 494724ba675SRob Herring }; 495724ba675SRob Herring 496724ba675SRob Herring pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 497724ba675SRob Herring atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; 498724ba675SRob Herring }; 499724ba675SRob Herring 500724ba675SRob Herring pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 501724ba675SRob Herring atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; 502724ba675SRob Herring }; 503724ba675SRob Herring }; 504724ba675SRob Herring 505724ba675SRob Herring tcb1 { 506724ba675SRob Herring pinctrl_tcb1_tclk0: tcb1_tclk0-0 { 507724ba675SRob Herring atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; 508724ba675SRob Herring }; 509724ba675SRob Herring 510724ba675SRob Herring pinctrl_tcb1_tclk1: tcb1_tclk1-0 { 511724ba675SRob Herring atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 512724ba675SRob Herring }; 513724ba675SRob Herring 514724ba675SRob Herring pinctrl_tcb1_tclk2: tcb1_tclk2-0 { 515724ba675SRob Herring atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; 516724ba675SRob Herring }; 517724ba675SRob Herring 518724ba675SRob Herring pinctrl_tcb1_tioa0: tcb1_tioa0-0 { 519724ba675SRob Herring atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; 520724ba675SRob Herring }; 521724ba675SRob Herring 522724ba675SRob Herring pinctrl_tcb1_tioa1: tcb1_tioa1-0 { 523724ba675SRob Herring atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 524724ba675SRob Herring }; 525724ba675SRob Herring 526724ba675SRob Herring pinctrl_tcb1_tioa2: tcb1_tioa2-0 { 527724ba675SRob Herring atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; 528724ba675SRob Herring }; 529724ba675SRob Herring 530724ba675SRob Herring pinctrl_tcb1_tiob0: tcb1_tiob0-0 { 531724ba675SRob Herring atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; 532724ba675SRob Herring }; 533724ba675SRob Herring 534724ba675SRob Herring pinctrl_tcb1_tiob1: tcb1_tiob1-0 { 535724ba675SRob Herring atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 536724ba675SRob Herring }; 537724ba675SRob Herring 538724ba675SRob Herring pinctrl_tcb1_tiob2: tcb1_tiob2-0 { 539724ba675SRob Herring atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; 540724ba675SRob Herring }; 541724ba675SRob Herring }; 542724ba675SRob Herring 543724ba675SRob Herring spi0 { 544724ba675SRob Herring pinctrl_spi0: spi0-0 { 545724ba675SRob Herring atmel,pins = 546724ba675SRob Herring <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */ 547724ba675SRob Herring AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */ 548724ba675SRob Herring AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */ 549724ba675SRob Herring }; 550724ba675SRob Herring }; 551724ba675SRob Herring 552724ba675SRob Herring pioA: gpio@fffff400 { 553724ba675SRob Herring compatible = "atmel,at91rm9200-gpio"; 554724ba675SRob Herring reg = <0xfffff400 0x200>; 555724ba675SRob Herring interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 556724ba675SRob Herring #gpio-cells = <2>; 557724ba675SRob Herring gpio-controller; 558724ba675SRob Herring interrupt-controller; 559724ba675SRob Herring #interrupt-cells = <2>; 560724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 561724ba675SRob Herring }; 562724ba675SRob Herring 563724ba675SRob Herring pioB: gpio@fffff600 { 564724ba675SRob Herring compatible = "atmel,at91rm9200-gpio"; 565724ba675SRob Herring reg = <0xfffff600 0x200>; 566724ba675SRob Herring interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 567724ba675SRob Herring #gpio-cells = <2>; 568724ba675SRob Herring gpio-controller; 569724ba675SRob Herring interrupt-controller; 570724ba675SRob Herring #interrupt-cells = <2>; 571724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; 572724ba675SRob Herring }; 573724ba675SRob Herring 574724ba675SRob Herring pioC: gpio@fffff800 { 575724ba675SRob Herring compatible = "atmel,at91rm9200-gpio"; 576724ba675SRob Herring reg = <0xfffff800 0x200>; 577724ba675SRob Herring interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 578724ba675SRob Herring #gpio-cells = <2>; 579724ba675SRob Herring gpio-controller; 580724ba675SRob Herring interrupt-controller; 581724ba675SRob Herring #interrupt-cells = <2>; 582724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 583724ba675SRob Herring }; 584724ba675SRob Herring 585724ba675SRob Herring pioD: gpio@fffffa00 { 586724ba675SRob Herring compatible = "atmel,at91rm9200-gpio"; 587724ba675SRob Herring reg = <0xfffffa00 0x200>; 588724ba675SRob Herring interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; 589724ba675SRob Herring #gpio-cells = <2>; 590724ba675SRob Herring gpio-controller; 591724ba675SRob Herring interrupt-controller; 592724ba675SRob Herring #interrupt-cells = <2>; 593724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 594724ba675SRob Herring }; 595724ba675SRob Herring }; 596724ba675SRob Herring 597724ba675SRob Herring dbgu: serial@fffff200 { 598724ba675SRob Herring compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart"; 599724ba675SRob Herring reg = <0xfffff200 0x200>; 600724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 601724ba675SRob Herring interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 602724ba675SRob Herring pinctrl-names = "default"; 603724ba675SRob Herring pinctrl-0 = <&pinctrl_dbgu>; 604724ba675SRob Herring clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 605724ba675SRob Herring clock-names = "usart"; 606724ba675SRob Herring status = "disabled"; 607724ba675SRob Herring }; 608724ba675SRob Herring 609724ba675SRob Herring usart0: serial@fffc0000 { 610724ba675SRob Herring compatible = "atmel,at91rm9200-usart"; 611724ba675SRob Herring reg = <0xfffc0000 0x200>; 612724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 613724ba675SRob Herring interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 614724ba675SRob Herring atmel,use-dma-rx; 615724ba675SRob Herring atmel,use-dma-tx; 616724ba675SRob Herring pinctrl-names = "default"; 617724ba675SRob Herring pinctrl-0 = <&pinctrl_uart0>; 618724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 619724ba675SRob Herring clock-names = "usart"; 620724ba675SRob Herring status = "disabled"; 621724ba675SRob Herring }; 622724ba675SRob Herring 623724ba675SRob Herring usart1: serial@fffc4000 { 624724ba675SRob Herring compatible = "atmel,at91rm9200-usart"; 625724ba675SRob Herring reg = <0xfffc4000 0x200>; 626724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 627724ba675SRob Herring interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 628724ba675SRob Herring atmel,use-dma-rx; 629724ba675SRob Herring atmel,use-dma-tx; 630724ba675SRob Herring pinctrl-names = "default"; 631724ba675SRob Herring pinctrl-0 = <&pinctrl_uart1>; 632724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 633724ba675SRob Herring clock-names = "usart"; 634724ba675SRob Herring status = "disabled"; 635724ba675SRob Herring }; 636724ba675SRob Herring 637724ba675SRob Herring usart2: serial@fffc8000 { 638724ba675SRob Herring compatible = "atmel,at91rm9200-usart"; 639724ba675SRob Herring reg = <0xfffc8000 0x200>; 640724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 641724ba675SRob Herring interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 642724ba675SRob Herring atmel,use-dma-rx; 643724ba675SRob Herring atmel,use-dma-tx; 644724ba675SRob Herring pinctrl-names = "default"; 645724ba675SRob Herring pinctrl-0 = <&pinctrl_uart2>; 646724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 647724ba675SRob Herring clock-names = "usart"; 648724ba675SRob Herring status = "disabled"; 649724ba675SRob Herring }; 650724ba675SRob Herring 651724ba675SRob Herring usart3: serial@fffcc000 { 652724ba675SRob Herring compatible = "atmel,at91rm9200-usart"; 653724ba675SRob Herring reg = <0xfffcc000 0x200>; 654724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 655724ba675SRob Herring interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>; 656724ba675SRob Herring atmel,use-dma-rx; 657724ba675SRob Herring atmel,use-dma-tx; 658724ba675SRob Herring pinctrl-names = "default"; 659724ba675SRob Herring pinctrl-0 = <&pinctrl_uart3>; 660724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 661724ba675SRob Herring clock-names = "usart"; 662724ba675SRob Herring status = "disabled"; 663724ba675SRob Herring }; 664724ba675SRob Herring 665724ba675SRob Herring usb1: gadget@fffb0000 { 666724ba675SRob Herring compatible = "atmel,at91rm9200-udc"; 667724ba675SRob Herring reg = <0xfffb0000 0x4000>; 668724ba675SRob Herring interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>; 669724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 11>, <&pmc PMC_TYPE_SYSTEM 1>; 670724ba675SRob Herring clock-names = "pclk", "hclk"; 671724ba675SRob Herring status = "disabled"; 672724ba675SRob Herring }; 673724ba675SRob Herring 674724ba675SRob Herring spi0: spi@fffe0000 { 675724ba675SRob Herring #address-cells = <1>; 676724ba675SRob Herring #size-cells = <0>; 677724ba675SRob Herring compatible = "atmel,at91rm9200-spi"; 678724ba675SRob Herring reg = <0xfffe0000 0x200>; 679724ba675SRob Herring interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; 680724ba675SRob Herring pinctrl-names = "default"; 681724ba675SRob Herring pinctrl-0 = <&pinctrl_spi0>; 682724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 683724ba675SRob Herring clock-names = "spi_clk"; 684724ba675SRob Herring status = "disabled"; 685724ba675SRob Herring }; 686724ba675SRob Herring }; 687724ba675SRob Herring 688724ba675SRob Herring nand0: nand@40000000 { 689724ba675SRob Herring compatible = "atmel,at91rm9200-nand"; 690724ba675SRob Herring #address-cells = <1>; 691724ba675SRob Herring #size-cells = <1>; 692724ba675SRob Herring reg = <0x40000000 0x10000000>; 693724ba675SRob Herring atmel,nand-addr-offset = <21>; 694724ba675SRob Herring atmel,nand-cmd-offset = <22>; 695724ba675SRob Herring pinctrl-names = "default"; 696724ba675SRob Herring pinctrl-0 = <&pinctrl_nand>; 697724ba675SRob Herring nand-ecc-mode = "soft"; 698724ba675SRob Herring gpios = <&pioC 2 GPIO_ACTIVE_HIGH 699724ba675SRob Herring 0 700724ba675SRob Herring &pioB 1 GPIO_ACTIVE_HIGH 701724ba675SRob Herring >; 702724ba675SRob Herring status = "disabled"; 703724ba675SRob Herring }; 704724ba675SRob Herring 705724ba675SRob Herring usb0: ohci@300000 { 706724ba675SRob Herring compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 707724ba675SRob Herring reg = <0x00300000 0x100000>; 708724ba675SRob Herring interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>; 709724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 4>; 710724ba675SRob Herring clock-names = "ohci_clk", "hclk", "uhpck"; 711724ba675SRob Herring status = "disabled"; 712724ba675SRob Herring }; 713724ba675SRob Herring }; 714724ba675SRob Herring 715724ba675SRob Herring i2c-gpio-0 { 716724ba675SRob Herring compatible = "i2c-gpio"; 717724ba675SRob Herring gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */ 718724ba675SRob Herring &pioA 26 GPIO_ACTIVE_HIGH /* scl */ 719724ba675SRob Herring >; 720724ba675SRob Herring i2c-gpio,sda-open-drain; 721724ba675SRob Herring i2c-gpio,scl-open-drain; 722724ba675SRob Herring i2c-gpio,delay-us = <2>; /* ~100 kHz */ 723724ba675SRob Herring pinctrl-names = "default"; 724724ba675SRob Herring pinctrl-0 = <&pinctrl_twi_gpio>; 725724ba675SRob Herring #address-cells = <1>; 726724ba675SRob Herring #size-cells = <0>; 727724ba675SRob Herring status = "disabled"; 728724ba675SRob Herring }; 729724ba675SRob Herring}; 730