1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Copyright (c) 2019 MediaTek Inc.
4*724ba675SRob Herring * Author: Ryder Lee <ryder.lee@mediatek.com>
5*724ba675SRob Herring */
6*724ba675SRob Herring
7*724ba675SRob Herring/dts-v1/;
8*724ba675SRob Herring#include <dt-bindings/input/input.h>
9*724ba675SRob Herring#include "mt7629.dtsi"
10*724ba675SRob Herring
11*724ba675SRob Herring/ {
12*724ba675SRob Herring	model = "MediaTek MT7629 reference board";
13*724ba675SRob Herring	compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
14*724ba675SRob Herring
15*724ba675SRob Herring	aliases {
16*724ba675SRob Herring		serial0 = &uart0;
17*724ba675SRob Herring	};
18*724ba675SRob Herring
19*724ba675SRob Herring	chosen {
20*724ba675SRob Herring		stdout-path = "serial0:115200n8";
21*724ba675SRob Herring	};
22*724ba675SRob Herring
23*724ba675SRob Herring	gpio-keys {
24*724ba675SRob Herring		compatible = "gpio-keys";
25*724ba675SRob Herring
26*724ba675SRob Herring		button-reset {
27*724ba675SRob Herring			label = "factory";
28*724ba675SRob Herring			linux,code = <KEY_RESTART>;
29*724ba675SRob Herring			gpios = <&pio 60 GPIO_ACTIVE_LOW>;
30*724ba675SRob Herring		};
31*724ba675SRob Herring
32*724ba675SRob Herring		button-wps {
33*724ba675SRob Herring			label = "wps";
34*724ba675SRob Herring			linux,code = <KEY_WPS_BUTTON>;
35*724ba675SRob Herring			gpios = <&pio 58 GPIO_ACTIVE_LOW>;
36*724ba675SRob Herring		};
37*724ba675SRob Herring	};
38*724ba675SRob Herring
39*724ba675SRob Herring	memory@40000000 {
40*724ba675SRob Herring		device_type = "memory";
41*724ba675SRob Herring		reg = <0x40000000 0x10000000>;
42*724ba675SRob Herring	};
43*724ba675SRob Herring
44*724ba675SRob Herring	reg_3p3v: regulator-3p3v {
45*724ba675SRob Herring		compatible = "regulator-fixed";
46*724ba675SRob Herring		regulator-name = "fixed-3.3V";
47*724ba675SRob Herring		regulator-min-microvolt = <3300000>;
48*724ba675SRob Herring		regulator-max-microvolt = <3300000>;
49*724ba675SRob Herring		regulator-boot-on;
50*724ba675SRob Herring		regulator-always-on;
51*724ba675SRob Herring	};
52*724ba675SRob Herring
53*724ba675SRob Herring	reg_5v: regulator-5v {
54*724ba675SRob Herring		compatible = "regulator-fixed";
55*724ba675SRob Herring		regulator-name = "fixed-5V";
56*724ba675SRob Herring		regulator-min-microvolt = <5000000>;
57*724ba675SRob Herring		regulator-max-microvolt = <5000000>;
58*724ba675SRob Herring		regulator-boot-on;
59*724ba675SRob Herring		regulator-always-on;
60*724ba675SRob Herring	};
61*724ba675SRob Herring};
62*724ba675SRob Herring
63*724ba675SRob Herring&eth {
64*724ba675SRob Herring	pinctrl-names = "default";
65*724ba675SRob Herring	pinctrl-0 = <&eth_pins>;
66*724ba675SRob Herring	pinctrl-1 = <&ephy_leds_pins>;
67*724ba675SRob Herring	status = "okay";
68*724ba675SRob Herring
69*724ba675SRob Herring	gmac0: mac@0 {
70*724ba675SRob Herring		compatible = "mediatek,eth-mac";
71*724ba675SRob Herring		reg = <0>;
72*724ba675SRob Herring		phy-mode = "2500base-x";
73*724ba675SRob Herring		fixed-link {
74*724ba675SRob Herring			speed = <2500>;
75*724ba675SRob Herring			full-duplex;
76*724ba675SRob Herring			pause;
77*724ba675SRob Herring		};
78*724ba675SRob Herring	};
79*724ba675SRob Herring
80*724ba675SRob Herring	gmac1: mac@1 {
81*724ba675SRob Herring		compatible = "mediatek,eth-mac";
82*724ba675SRob Herring		reg = <1>;
83*724ba675SRob Herring		phy-mode = "gmii";
84*724ba675SRob Herring		phy-handle = <&phy0>;
85*724ba675SRob Herring	};
86*724ba675SRob Herring
87*724ba675SRob Herring	mdio: mdio-bus {
88*724ba675SRob Herring		#address-cells = <1>;
89*724ba675SRob Herring		#size-cells = <0>;
90*724ba675SRob Herring
91*724ba675SRob Herring		phy0: ethernet-phy@0 {
92*724ba675SRob Herring			reg = <0>;
93*724ba675SRob Herring		};
94*724ba675SRob Herring	};
95*724ba675SRob Herring};
96*724ba675SRob Herring
97*724ba675SRob Herring&i2c {
98*724ba675SRob Herring	pinctrl-names = "default";
99*724ba675SRob Herring	pinctrl-0 = <&i2c_pins>;
100*724ba675SRob Herring	status = "okay";
101*724ba675SRob Herring};
102*724ba675SRob Herring
103*724ba675SRob Herring&qspi {
104*724ba675SRob Herring	pinctrl-names = "default";
105*724ba675SRob Herring	pinctrl-0 = <&qspi_pins>;
106*724ba675SRob Herring	status = "okay";
107*724ba675SRob Herring
108*724ba675SRob Herring	flash@0 {
109*724ba675SRob Herring		compatible = "jedec,spi-nor";
110*724ba675SRob Herring		reg = <0>;
111*724ba675SRob Herring
112*724ba675SRob Herring		partitions {
113*724ba675SRob Herring			compatible = "fixed-partitions";
114*724ba675SRob Herring			#address-cells = <1>;
115*724ba675SRob Herring			#size-cells = <1>;
116*724ba675SRob Herring
117*724ba675SRob Herring			partition@0 {
118*724ba675SRob Herring				label = "u-boot";
119*724ba675SRob Herring				reg = <0x00000 0x60000>;
120*724ba675SRob Herring				read-only;
121*724ba675SRob Herring			};
122*724ba675SRob Herring
123*724ba675SRob Herring			partition@60000 {
124*724ba675SRob Herring				label = "u-boot-env";
125*724ba675SRob Herring				reg = <0x60000 0x10000>;
126*724ba675SRob Herring				read-only;
127*724ba675SRob Herring			};
128*724ba675SRob Herring
129*724ba675SRob Herring			factory: partition@70000 {
130*724ba675SRob Herring				label = "factory";
131*724ba675SRob Herring				reg = <0x70000 0x40000>;
132*724ba675SRob Herring				read-only;
133*724ba675SRob Herring			};
134*724ba675SRob Herring
135*724ba675SRob Herring			partition@b0000 {
136*724ba675SRob Herring				label = "kernel";
137*724ba675SRob Herring				reg = <0xb0000 0xb50000>;
138*724ba675SRob Herring			};
139*724ba675SRob Herring		};
140*724ba675SRob Herring	};
141*724ba675SRob Herring};
142*724ba675SRob Herring
143*724ba675SRob Herring&pcie1 {
144*724ba675SRob Herring	pinctrl-names = "default";
145*724ba675SRob Herring	pinctrl-0 = <&pcie_pins>;
146*724ba675SRob Herring	status = "okay";
147*724ba675SRob Herring};
148*724ba675SRob Herring
149*724ba675SRob Herring&pciephy1 {
150*724ba675SRob Herring	status = "okay";
151*724ba675SRob Herring};
152*724ba675SRob Herring
153*724ba675SRob Herring&pio {
154*724ba675SRob Herring	eth_pins: eth-pins {
155*724ba675SRob Herring		mux {
156*724ba675SRob Herring			function = "eth";
157*724ba675SRob Herring			groups = "mdc_mdio";
158*724ba675SRob Herring		};
159*724ba675SRob Herring	};
160*724ba675SRob Herring
161*724ba675SRob Herring	ephy_leds_pins: ephy-leds-pins {
162*724ba675SRob Herring		mux {
163*724ba675SRob Herring			function = "led";
164*724ba675SRob Herring			groups = "gphy_leds_0", "ephy_leds";
165*724ba675SRob Herring		};
166*724ba675SRob Herring	};
167*724ba675SRob Herring
168*724ba675SRob Herring	i2c_pins: i2c-pins {
169*724ba675SRob Herring		mux {
170*724ba675SRob Herring			function = "i2c";
171*724ba675SRob Herring			groups =  "i2c_0";
172*724ba675SRob Herring		};
173*724ba675SRob Herring
174*724ba675SRob Herring		conf {
175*724ba675SRob Herring			pins = "I2C_SDA", "I2C_SCL";
176*724ba675SRob Herring			drive-strength = <4>;
177*724ba675SRob Herring			bias-disable;
178*724ba675SRob Herring		};
179*724ba675SRob Herring	};
180*724ba675SRob Herring
181*724ba675SRob Herring	pcie_pins: pcie-pins {
182*724ba675SRob Herring		mux {
183*724ba675SRob Herring			function = "pcie";
184*724ba675SRob Herring			groups = "pcie_clkreq",
185*724ba675SRob Herring				 "pcie_pereset",
186*724ba675SRob Herring				 "pcie_wake";
187*724ba675SRob Herring		};
188*724ba675SRob Herring	};
189*724ba675SRob Herring
190*724ba675SRob Herring	pwm_pins: pwm-pins {
191*724ba675SRob Herring		mux {
192*724ba675SRob Herring			function = "pwm";
193*724ba675SRob Herring			groups = "pwm_0";
194*724ba675SRob Herring		};
195*724ba675SRob Herring	};
196*724ba675SRob Herring
197*724ba675SRob Herring	/* SPI-NOR is shared pin with serial NAND */
198*724ba675SRob Herring	qspi_pins: qspi-pins {
199*724ba675SRob Herring		mux {
200*724ba675SRob Herring			function = "flash";
201*724ba675SRob Herring			groups = "spi_nor";
202*724ba675SRob Herring		};
203*724ba675SRob Herring	};
204*724ba675SRob Herring
205*724ba675SRob Herring	/* Serial NAND is shared pin with SPI-NOR */
206*724ba675SRob Herring	serial_nand_pins: serial-nand-pins {
207*724ba675SRob Herring		mux {
208*724ba675SRob Herring			function = "flash";
209*724ba675SRob Herring			groups = "snfi";
210*724ba675SRob Herring		};
211*724ba675SRob Herring	};
212*724ba675SRob Herring
213*724ba675SRob Herring	spi_pins: spi-pins {
214*724ba675SRob Herring		mux {
215*724ba675SRob Herring			function = "spi";
216*724ba675SRob Herring			groups = "spi_0";
217*724ba675SRob Herring		};
218*724ba675SRob Herring	};
219*724ba675SRob Herring
220*724ba675SRob Herring	uart0_pins: uart0-pins {
221*724ba675SRob Herring		mux {
222*724ba675SRob Herring			function = "uart";
223*724ba675SRob Herring			groups = "uart0_txd_rxd" ;
224*724ba675SRob Herring		};
225*724ba675SRob Herring	};
226*724ba675SRob Herring
227*724ba675SRob Herring	uart1_pins: uart1-pins {
228*724ba675SRob Herring		mux {
229*724ba675SRob Herring			function = "uart";
230*724ba675SRob Herring			groups = "uart1_0_tx_rx" ;
231*724ba675SRob Herring		};
232*724ba675SRob Herring	};
233*724ba675SRob Herring
234*724ba675SRob Herring	uart2_pins: uart2-pins {
235*724ba675SRob Herring		mux {
236*724ba675SRob Herring			function = "uart";
237*724ba675SRob Herring			groups = "uart2_0_txd_rxd" ;
238*724ba675SRob Herring		};
239*724ba675SRob Herring	};
240*724ba675SRob Herring
241*724ba675SRob Herring	watchdog_pins: watchdog-pins {
242*724ba675SRob Herring		mux {
243*724ba675SRob Herring			function = "watchdog";
244*724ba675SRob Herring			groups = "watchdog";
245*724ba675SRob Herring		};
246*724ba675SRob Herring	};
247*724ba675SRob Herring};
248*724ba675SRob Herring
249*724ba675SRob Herring&spi {
250*724ba675SRob Herring	pinctrl-names = "default";
251*724ba675SRob Herring	pinctrl-0 = <&spi_pins>;
252*724ba675SRob Herring	status = "okay";
253*724ba675SRob Herring};
254*724ba675SRob Herring
255*724ba675SRob Herring&ssusb {
256*724ba675SRob Herring	vusb33-supply = <&reg_3p3v>;
257*724ba675SRob Herring	vbus-supply = <&reg_5v>;
258*724ba675SRob Herring	status = "okay";
259*724ba675SRob Herring};
260*724ba675SRob Herring
261*724ba675SRob Herring&u3phy0 {
262*724ba675SRob Herring	status = "okay";
263*724ba675SRob Herring};
264*724ba675SRob Herring
265*724ba675SRob Herring&uart0 {
266*724ba675SRob Herring	pinctrl-names = "default";
267*724ba675SRob Herring	pinctrl-0 = <&uart0_pins>;
268*724ba675SRob Herring	status = "okay";
269*724ba675SRob Herring};
270*724ba675SRob Herring
271*724ba675SRob Herring&watchdog {
272*724ba675SRob Herring	pinctrl-names = "default";
273*724ba675SRob Herring	pinctrl-0 = <&watchdog_pins>;
274*724ba675SRob Herring	status = "okay";
275*724ba675SRob Herring};
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