1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 4*724ba675SRob Herring * Copyright (C) Sylver Bruneau <sylver.bruneau@googlemail.com> 5*724ba675SRob Herring */ 6*724ba675SRob Herring 7*724ba675SRob Herring/dts-v1/; 8*724ba675SRob Herring 9*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 10*724ba675SRob Herring#include <dt-bindings/input/input.h> 11*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 12*724ba675SRob Herring#include "orion5x-mv88f5182.dtsi" 13*724ba675SRob Herring 14*724ba675SRob Herring/ { 15*724ba675SRob Herring model = "Maxtor Shared Storage II"; 16*724ba675SRob Herring compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x"; 17*724ba675SRob Herring 18*724ba675SRob Herring memory { 19*724ba675SRob Herring device_type = "memory"; 20*724ba675SRob Herring reg = <0x00000000 0x4000000>; /* 64 MB */ 21*724ba675SRob Herring }; 22*724ba675SRob Herring 23*724ba675SRob Herring chosen { 24*724ba675SRob Herring bootargs = "console=ttyS0,115200n8 earlyprintk"; 25*724ba675SRob Herring stdout-path = &uart0; 26*724ba675SRob Herring }; 27*724ba675SRob Herring 28*724ba675SRob Herring soc { 29*724ba675SRob Herring ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>, 30*724ba675SRob Herring <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>, 31*724ba675SRob Herring <MBUS_ID(0x01, 0x0f) 0 0xff800000 0x40000>; 32*724ba675SRob Herring }; 33*724ba675SRob Herring 34*724ba675SRob Herring gpio-keys { 35*724ba675SRob Herring compatible = "gpio-keys"; 36*724ba675SRob Herring pinctrl-0 = <&pmx_buttons>; 37*724ba675SRob Herring pinctrl-names = "default"; 38*724ba675SRob Herring #address-cells = <1>; 39*724ba675SRob Herring #size-cells = <0>; 40*724ba675SRob Herring power { 41*724ba675SRob Herring label = "Power"; 42*724ba675SRob Herring linux,code = <KEY_POWER>; 43*724ba675SRob Herring gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; 44*724ba675SRob Herring }; 45*724ba675SRob Herring 46*724ba675SRob Herring reset { 47*724ba675SRob Herring label = "Reset"; 48*724ba675SRob Herring linux,code = <KEY_RESTART>; 49*724ba675SRob Herring gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; 50*724ba675SRob Herring }; 51*724ba675SRob Herring }; 52*724ba675SRob Herring}; 53*724ba675SRob Herring 54*724ba675SRob Herring&devbus_bootcs { 55*724ba675SRob Herring status = "okay"; 56*724ba675SRob Herring 57*724ba675SRob Herring devbus,keep-config; 58*724ba675SRob Herring 59*724ba675SRob Herring /* 60*724ba675SRob Herring * Currently the MTD code does not recognize the MX29LV400CBCT 61*724ba675SRob Herring * as a bottom-type device. This could cause risks of 62*724ba675SRob Herring * accidentally erasing critical flash sectors. We thus define 63*724ba675SRob Herring * a single, write-protected partition covering the whole 64*724ba675SRob Herring * flash. TODO: once the flash part TOP/BOTTOM detection 65*724ba675SRob Herring * issue is sorted out in the MTD code, break this into at 66*724ba675SRob Herring * least three partitions: 'u-boot code', 'u-boot environment' 67*724ba675SRob Herring * and 'whatever is left'. 68*724ba675SRob Herring */ 69*724ba675SRob Herring flash@0 { 70*724ba675SRob Herring compatible = "cfi-flash"; 71*724ba675SRob Herring reg = <0 0x40000>; 72*724ba675SRob Herring bank-width = <1>; 73*724ba675SRob Herring #address-cells = <1>; 74*724ba675SRob Herring #size-cells = <1>; 75*724ba675SRob Herring }; 76*724ba675SRob Herring}; 77*724ba675SRob Herring 78*724ba675SRob Herring&mdio { 79*724ba675SRob Herring status = "okay"; 80*724ba675SRob Herring 81*724ba675SRob Herring ethphy: ethernet-phy { 82*724ba675SRob Herring reg = <8>; 83*724ba675SRob Herring }; 84*724ba675SRob Herring}; 85*724ba675SRob Herring 86*724ba675SRob Herring&ehci0 { 87*724ba675SRob Herring status = "okay"; 88*724ba675SRob Herring}; 89*724ba675SRob Herring 90*724ba675SRob Herringð { 91*724ba675SRob Herring status = "okay"; 92*724ba675SRob Herring 93*724ba675SRob Herring ethernet-port@0 { 94*724ba675SRob Herring phy-handle = <ðphy>; 95*724ba675SRob Herring }; 96*724ba675SRob Herring}; 97*724ba675SRob Herring 98*724ba675SRob Herring&i2c { 99*724ba675SRob Herring status = "okay"; 100*724ba675SRob Herring clock-frequency = <100000>; 101*724ba675SRob Herring #address-cells = <1>; 102*724ba675SRob Herring 103*724ba675SRob Herring rtc@68 { 104*724ba675SRob Herring compatible = "st,m41t81"; 105*724ba675SRob Herring reg = <0x68>; 106*724ba675SRob Herring pinctrl-0 = <&pmx_rtc>; 107*724ba675SRob Herring pinctrl-names = "default"; 108*724ba675SRob Herring interrupt-parent = <&gpio0>; 109*724ba675SRob Herring interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 110*724ba675SRob Herring }; 111*724ba675SRob Herring}; 112*724ba675SRob Herring 113*724ba675SRob Herring&pinctrl { 114*724ba675SRob Herring pinctrl-0 = <&pmx_leds &pmx_misc>; 115*724ba675SRob Herring pinctrl-names = "default"; 116*724ba675SRob Herring 117*724ba675SRob Herring pmx_buttons: pmx-buttons { 118*724ba675SRob Herring marvell,pins = "mpp11", "mpp12"; 119*724ba675SRob Herring marvell,function = "gpio"; 120*724ba675SRob Herring }; 121*724ba675SRob Herring 122*724ba675SRob Herring /* 123*724ba675SRob Herring * MPP0: Power LED 124*724ba675SRob Herring * MPP1: Error LED 125*724ba675SRob Herring */ 126*724ba675SRob Herring pmx_leds: pmx-leds { 127*724ba675SRob Herring marvell,pins = "mpp0", "mpp1"; 128*724ba675SRob Herring marvell,function = "gpio"; 129*724ba675SRob Herring }; 130*724ba675SRob Herring 131*724ba675SRob Herring /* 132*724ba675SRob Herring * MPP4: HDD ind. (Single/Dual) 133*724ba675SRob Herring * MPP5: HD0 5V control 134*724ba675SRob Herring * MPP6: HD0 12V control 135*724ba675SRob Herring * MPP7: HD1 5V control 136*724ba675SRob Herring * MPP8: HD1 12V control 137*724ba675SRob Herring */ 138*724ba675SRob Herring pmx_misc: pmx-misc { 139*724ba675SRob Herring marvell,pins = "mpp4", "mpp5", "mpp6", "mpp7", "mpp8", "mpp10"; 140*724ba675SRob Herring marvell,function = "gpio"; 141*724ba675SRob Herring }; 142*724ba675SRob Herring 143*724ba675SRob Herring pmx_rtc: pmx-rtc { 144*724ba675SRob Herring marvell,pins = "mpp3"; 145*724ba675SRob Herring marvell,function = "gpio"; 146*724ba675SRob Herring }; 147*724ba675SRob Herring 148*724ba675SRob Herring pmx_sata0_led_active: pmx-sata0-led-active { 149*724ba675SRob Herring marvell,pins = "mpp14"; 150*724ba675SRob Herring marvell,function = "sata0"; 151*724ba675SRob Herring }; 152*724ba675SRob Herring 153*724ba675SRob Herring pmx_sata1_led_active: pmx-sata1-led-active { 154*724ba675SRob Herring marvell,pins = "mpp15"; 155*724ba675SRob Herring marvell,function = "sata1"; 156*724ba675SRob Herring }; 157*724ba675SRob Herring 158*724ba675SRob Herring /* 159*724ba675SRob Herring * Non MPP GPIOs: 160*724ba675SRob Herring * GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok) 161*724ba675SRob Herring * GPIO 23: Blue front LED off 162*724ba675SRob Herring * GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled) 163*724ba675SRob Herring */ 164*724ba675SRob Herring}; 165*724ba675SRob Herring 166*724ba675SRob Herring&sata { 167*724ba675SRob Herring pinctrl-0 = <&pmx_sata0_led_active 168*724ba675SRob Herring &pmx_sata1_led_active>; 169*724ba675SRob Herring pinctrl-names = "default"; 170*724ba675SRob Herring status = "okay"; 171*724ba675SRob Herring nr-ports = <2>; 172*724ba675SRob Herring}; 173*724ba675SRob Herring 174*724ba675SRob Herring&uart0 { 175*724ba675SRob Herring status = "okay"; 176*724ba675SRob Herring}; 177